cputable.c 37 KB

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  1. /*
  2. * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
  3. *
  4. * Modifications for ppc64:
  5. * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version
  10. * 2 of the License, or (at your option) any later version.
  11. */
  12. #include <linux/string.h>
  13. #include <linux/sched.h>
  14. #include <linux/threads.h>
  15. #include <linux/init.h>
  16. #include <linux/module.h>
  17. #include <asm/oprofile_impl.h>
  18. #include <asm/cputable.h>
  19. #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */
  20. struct cpu_spec* cur_cpu_spec = NULL;
  21. EXPORT_SYMBOL(cur_cpu_spec);
  22. /* NOTE:
  23. * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
  24. * the responsibility of the appropriate CPU save/restore functions to
  25. * eventually copy these settings over. Those save/restore aren't yet
  26. * part of the cputable though. That has to be fixed for both ppc32
  27. * and ppc64
  28. */
  29. #ifdef CONFIG_PPC32
  30. extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
  31. extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
  32. extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
  33. extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
  34. extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
  35. extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
  36. extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
  37. extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
  38. #endif /* CONFIG_PPC32 */
  39. #ifdef CONFIG_PPC64
  40. extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
  41. extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);
  42. extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);
  43. extern void __restore_cpu_pa6t(void);
  44. extern void __restore_cpu_ppc970(void);
  45. #endif /* CONFIG_PPC64 */
  46. /* This table only contains "desktop" CPUs, it need to be filled with embedded
  47. * ones as well...
  48. */
  49. #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
  50. PPC_FEATURE_HAS_MMU)
  51. #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
  52. #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
  53. #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
  54. PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
  55. #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
  56. PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
  57. #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
  58. PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
  59. PPC_FEATURE_TRUE_LE)
  60. #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
  61. PPC_FEATURE_TRUE_LE | \
  62. PPC_FEATURE_HAS_ALTIVEC_COMP)
  63. #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
  64. PPC_FEATURE_BOOKE)
  65. /* We only set the spe features if the kernel was compiled with
  66. * spe support
  67. */
  68. #ifdef CONFIG_SPE
  69. #define PPC_FEATURE_SPE_COMP PPC_FEATURE_HAS_SPE
  70. #else
  71. #define PPC_FEATURE_SPE_COMP 0
  72. #endif
  73. static struct cpu_spec cpu_specs[] = {
  74. #ifdef CONFIG_PPC64
  75. { /* Power3 */
  76. .pvr_mask = 0xffff0000,
  77. .pvr_value = 0x00400000,
  78. .cpu_name = "POWER3 (630)",
  79. .cpu_features = CPU_FTRS_POWER3,
  80. .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
  81. .icache_bsize = 128,
  82. .dcache_bsize = 128,
  83. .num_pmcs = 8,
  84. .pmc_type = PPC_PMC_IBM,
  85. .oprofile_cpu_type = "ppc64/power3",
  86. .oprofile_type = PPC_OPROFILE_RS64,
  87. .platform = "power3",
  88. },
  89. { /* Power3+ */
  90. .pvr_mask = 0xffff0000,
  91. .pvr_value = 0x00410000,
  92. .cpu_name = "POWER3 (630+)",
  93. .cpu_features = CPU_FTRS_POWER3,
  94. .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
  95. .icache_bsize = 128,
  96. .dcache_bsize = 128,
  97. .num_pmcs = 8,
  98. .pmc_type = PPC_PMC_IBM,
  99. .oprofile_cpu_type = "ppc64/power3",
  100. .oprofile_type = PPC_OPROFILE_RS64,
  101. .platform = "power3",
  102. },
  103. { /* Northstar */
  104. .pvr_mask = 0xffff0000,
  105. .pvr_value = 0x00330000,
  106. .cpu_name = "RS64-II (northstar)",
  107. .cpu_features = CPU_FTRS_RS64,
  108. .cpu_user_features = COMMON_USER_PPC64,
  109. .icache_bsize = 128,
  110. .dcache_bsize = 128,
  111. .num_pmcs = 8,
  112. .pmc_type = PPC_PMC_IBM,
  113. .oprofile_cpu_type = "ppc64/rs64",
  114. .oprofile_type = PPC_OPROFILE_RS64,
  115. .platform = "rs64",
  116. },
  117. { /* Pulsar */
  118. .pvr_mask = 0xffff0000,
  119. .pvr_value = 0x00340000,
  120. .cpu_name = "RS64-III (pulsar)",
  121. .cpu_features = CPU_FTRS_RS64,
  122. .cpu_user_features = COMMON_USER_PPC64,
  123. .icache_bsize = 128,
  124. .dcache_bsize = 128,
  125. .num_pmcs = 8,
  126. .pmc_type = PPC_PMC_IBM,
  127. .oprofile_cpu_type = "ppc64/rs64",
  128. .oprofile_type = PPC_OPROFILE_RS64,
  129. .platform = "rs64",
  130. },
  131. { /* I-star */
  132. .pvr_mask = 0xffff0000,
  133. .pvr_value = 0x00360000,
  134. .cpu_name = "RS64-III (icestar)",
  135. .cpu_features = CPU_FTRS_RS64,
  136. .cpu_user_features = COMMON_USER_PPC64,
  137. .icache_bsize = 128,
  138. .dcache_bsize = 128,
  139. .num_pmcs = 8,
  140. .pmc_type = PPC_PMC_IBM,
  141. .oprofile_cpu_type = "ppc64/rs64",
  142. .oprofile_type = PPC_OPROFILE_RS64,
  143. .platform = "rs64",
  144. },
  145. { /* S-star */
  146. .pvr_mask = 0xffff0000,
  147. .pvr_value = 0x00370000,
  148. .cpu_name = "RS64-IV (sstar)",
  149. .cpu_features = CPU_FTRS_RS64,
  150. .cpu_user_features = COMMON_USER_PPC64,
  151. .icache_bsize = 128,
  152. .dcache_bsize = 128,
  153. .num_pmcs = 8,
  154. .pmc_type = PPC_PMC_IBM,
  155. .oprofile_cpu_type = "ppc64/rs64",
  156. .oprofile_type = PPC_OPROFILE_RS64,
  157. .platform = "rs64",
  158. },
  159. { /* Power4 */
  160. .pvr_mask = 0xffff0000,
  161. .pvr_value = 0x00350000,
  162. .cpu_name = "POWER4 (gp)",
  163. .cpu_features = CPU_FTRS_POWER4,
  164. .cpu_user_features = COMMON_USER_POWER4,
  165. .icache_bsize = 128,
  166. .dcache_bsize = 128,
  167. .num_pmcs = 8,
  168. .pmc_type = PPC_PMC_IBM,
  169. .oprofile_cpu_type = "ppc64/power4",
  170. .oprofile_type = PPC_OPROFILE_POWER4,
  171. .platform = "power4",
  172. },
  173. { /* Power4+ */
  174. .pvr_mask = 0xffff0000,
  175. .pvr_value = 0x00380000,
  176. .cpu_name = "POWER4+ (gq)",
  177. .cpu_features = CPU_FTRS_POWER4,
  178. .cpu_user_features = COMMON_USER_POWER4,
  179. .icache_bsize = 128,
  180. .dcache_bsize = 128,
  181. .num_pmcs = 8,
  182. .pmc_type = PPC_PMC_IBM,
  183. .oprofile_cpu_type = "ppc64/power4",
  184. .oprofile_type = PPC_OPROFILE_POWER4,
  185. .platform = "power4",
  186. },
  187. { /* PPC970 */
  188. .pvr_mask = 0xffff0000,
  189. .pvr_value = 0x00390000,
  190. .cpu_name = "PPC970",
  191. .cpu_features = CPU_FTRS_PPC970,
  192. .cpu_user_features = COMMON_USER_POWER4 |
  193. PPC_FEATURE_HAS_ALTIVEC_COMP,
  194. .icache_bsize = 128,
  195. .dcache_bsize = 128,
  196. .num_pmcs = 8,
  197. .pmc_type = PPC_PMC_IBM,
  198. .cpu_setup = __setup_cpu_ppc970,
  199. .cpu_restore = __restore_cpu_ppc970,
  200. .oprofile_cpu_type = "ppc64/970",
  201. .oprofile_type = PPC_OPROFILE_POWER4,
  202. .platform = "ppc970",
  203. },
  204. { /* PPC970FX */
  205. .pvr_mask = 0xffff0000,
  206. .pvr_value = 0x003c0000,
  207. .cpu_name = "PPC970FX",
  208. .cpu_features = CPU_FTRS_PPC970,
  209. .cpu_user_features = COMMON_USER_POWER4 |
  210. PPC_FEATURE_HAS_ALTIVEC_COMP,
  211. .icache_bsize = 128,
  212. .dcache_bsize = 128,
  213. .num_pmcs = 8,
  214. .pmc_type = PPC_PMC_IBM,
  215. .cpu_setup = __setup_cpu_ppc970,
  216. .cpu_restore = __restore_cpu_ppc970,
  217. .oprofile_cpu_type = "ppc64/970",
  218. .oprofile_type = PPC_OPROFILE_POWER4,
  219. .platform = "ppc970",
  220. },
  221. { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */
  222. .pvr_mask = 0xffffffff,
  223. .pvr_value = 0x00440100,
  224. .cpu_name = "PPC970MP",
  225. .cpu_features = CPU_FTRS_PPC970,
  226. .cpu_user_features = COMMON_USER_POWER4 |
  227. PPC_FEATURE_HAS_ALTIVEC_COMP,
  228. .icache_bsize = 128,
  229. .dcache_bsize = 128,
  230. .num_pmcs = 8,
  231. .cpu_setup = __setup_cpu_ppc970,
  232. .cpu_restore = __restore_cpu_ppc970,
  233. .oprofile_cpu_type = "ppc64/970MP",
  234. .oprofile_type = PPC_OPROFILE_POWER4,
  235. .platform = "ppc970",
  236. },
  237. { /* PPC970MP */
  238. .pvr_mask = 0xffff0000,
  239. .pvr_value = 0x00440000,
  240. .cpu_name = "PPC970MP",
  241. .cpu_features = CPU_FTRS_PPC970,
  242. .cpu_user_features = COMMON_USER_POWER4 |
  243. PPC_FEATURE_HAS_ALTIVEC_COMP,
  244. .icache_bsize = 128,
  245. .dcache_bsize = 128,
  246. .num_pmcs = 8,
  247. .cpu_setup = __setup_cpu_ppc970MP,
  248. .cpu_restore = __restore_cpu_ppc970,
  249. .oprofile_cpu_type = "ppc64/970MP",
  250. .oprofile_type = PPC_OPROFILE_POWER4,
  251. .platform = "ppc970",
  252. },
  253. { /* PPC970GX */
  254. .pvr_mask = 0xffff0000,
  255. .pvr_value = 0x00450000,
  256. .cpu_name = "PPC970GX",
  257. .cpu_features = CPU_FTRS_PPC970,
  258. .cpu_user_features = COMMON_USER_POWER4 |
  259. PPC_FEATURE_HAS_ALTIVEC_COMP,
  260. .icache_bsize = 128,
  261. .dcache_bsize = 128,
  262. .num_pmcs = 8,
  263. .pmc_type = PPC_PMC_IBM,
  264. .cpu_setup = __setup_cpu_ppc970,
  265. .oprofile_cpu_type = "ppc64/970",
  266. .oprofile_type = PPC_OPROFILE_POWER4,
  267. .platform = "ppc970",
  268. },
  269. { /* Power5 GR */
  270. .pvr_mask = 0xffff0000,
  271. .pvr_value = 0x003a0000,
  272. .cpu_name = "POWER5 (gr)",
  273. .cpu_features = CPU_FTRS_POWER5,
  274. .cpu_user_features = COMMON_USER_POWER5,
  275. .icache_bsize = 128,
  276. .dcache_bsize = 128,
  277. .num_pmcs = 6,
  278. .pmc_type = PPC_PMC_IBM,
  279. .oprofile_cpu_type = "ppc64/power5",
  280. .oprofile_type = PPC_OPROFILE_POWER4,
  281. /* SIHV / SIPR bits are implemented on POWER4+ (GQ)
  282. * and above but only works on POWER5 and above
  283. */
  284. .oprofile_mmcra_sihv = MMCRA_SIHV,
  285. .oprofile_mmcra_sipr = MMCRA_SIPR,
  286. .platform = "power5",
  287. },
  288. { /* Power5 GS */
  289. .pvr_mask = 0xffff0000,
  290. .pvr_value = 0x003b0000,
  291. .cpu_name = "POWER5+ (gs)",
  292. .cpu_features = CPU_FTRS_POWER5,
  293. .cpu_user_features = COMMON_USER_POWER5_PLUS,
  294. .icache_bsize = 128,
  295. .dcache_bsize = 128,
  296. .num_pmcs = 6,
  297. .pmc_type = PPC_PMC_IBM,
  298. .oprofile_cpu_type = "ppc64/power5+",
  299. .oprofile_type = PPC_OPROFILE_POWER4,
  300. .oprofile_mmcra_sihv = MMCRA_SIHV,
  301. .oprofile_mmcra_sipr = MMCRA_SIPR,
  302. .platform = "power5+",
  303. },
  304. { /* POWER6 in P5+ mode; 2.04-compliant processor */
  305. .pvr_mask = 0xffffffff,
  306. .pvr_value = 0x0f000001,
  307. .cpu_name = "POWER5+",
  308. .cpu_features = CPU_FTRS_POWER5,
  309. .cpu_user_features = COMMON_USER_POWER5_PLUS,
  310. .icache_bsize = 128,
  311. .dcache_bsize = 128,
  312. .num_pmcs = 6,
  313. .oprofile_cpu_type = "ppc64/power6",
  314. .oprofile_type = PPC_OPROFILE_POWER4,
  315. .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
  316. .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
  317. .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
  318. POWER6_MMCRA_OTHER,
  319. .platform = "power5+",
  320. },
  321. { /* Power6 */
  322. .pvr_mask = 0xffff0000,
  323. .pvr_value = 0x003e0000,
  324. .cpu_name = "POWER6 (raw)",
  325. .cpu_features = CPU_FTRS_POWER6,
  326. .cpu_user_features = COMMON_USER_POWER6 |
  327. PPC_FEATURE_POWER6_EXT,
  328. .icache_bsize = 128,
  329. .dcache_bsize = 128,
  330. .num_pmcs = 6,
  331. .oprofile_cpu_type = "ppc64/power6",
  332. .oprofile_type = PPC_OPROFILE_POWER4,
  333. .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
  334. .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
  335. .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
  336. POWER6_MMCRA_OTHER,
  337. .platform = "power6x",
  338. },
  339. { /* 2.05-compliant processor, i.e. Power6 "architected" mode */
  340. .pvr_mask = 0xffffffff,
  341. .pvr_value = 0x0f000002,
  342. .cpu_name = "POWER6 (architected)",
  343. .cpu_features = CPU_FTRS_POWER6,
  344. .cpu_user_features = COMMON_USER_POWER6,
  345. .icache_bsize = 128,
  346. .dcache_bsize = 128,
  347. .num_pmcs = 6,
  348. .pmc_type = PPC_PMC_IBM,
  349. .oprofile_cpu_type = "ppc64/power6",
  350. .oprofile_type = PPC_OPROFILE_POWER4,
  351. .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
  352. .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
  353. .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
  354. POWER6_MMCRA_OTHER,
  355. .platform = "power6",
  356. },
  357. { /* Cell Broadband Engine */
  358. .pvr_mask = 0xffff0000,
  359. .pvr_value = 0x00700000,
  360. .cpu_name = "Cell Broadband Engine",
  361. .cpu_features = CPU_FTRS_CELL,
  362. .cpu_user_features = COMMON_USER_PPC64 |
  363. PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
  364. PPC_FEATURE_SMT,
  365. .icache_bsize = 128,
  366. .dcache_bsize = 128,
  367. .num_pmcs = 4,
  368. .pmc_type = PPC_PMC_IBM,
  369. .oprofile_cpu_type = "ppc64/cell-be",
  370. .oprofile_type = PPC_OPROFILE_CELL,
  371. .platform = "ppc-cell-be",
  372. },
  373. { /* PA Semi PA6T */
  374. .pvr_mask = 0x7fff0000,
  375. .pvr_value = 0x00900000,
  376. .cpu_name = "PA6T",
  377. .cpu_features = CPU_FTRS_PA6T,
  378. .cpu_user_features = COMMON_USER_PA6T,
  379. .icache_bsize = 64,
  380. .dcache_bsize = 64,
  381. .num_pmcs = 6,
  382. .pmc_type = PPC_PMC_PA6T,
  383. .cpu_setup = __setup_cpu_pa6t,
  384. .cpu_restore = __restore_cpu_pa6t,
  385. .oprofile_cpu_type = "ppc64/pa6t",
  386. .oprofile_type = PPC_OPROFILE_PA6T,
  387. .platform = "pa6t",
  388. },
  389. { /* default match */
  390. .pvr_mask = 0x00000000,
  391. .pvr_value = 0x00000000,
  392. .cpu_name = "POWER4 (compatible)",
  393. .cpu_features = CPU_FTRS_COMPATIBLE,
  394. .cpu_user_features = COMMON_USER_PPC64,
  395. .icache_bsize = 128,
  396. .dcache_bsize = 128,
  397. .num_pmcs = 6,
  398. .pmc_type = PPC_PMC_IBM,
  399. .platform = "power4",
  400. }
  401. #endif /* CONFIG_PPC64 */
  402. #ifdef CONFIG_PPC32
  403. #if CLASSIC_PPC
  404. { /* 601 */
  405. .pvr_mask = 0xffff0000,
  406. .pvr_value = 0x00010000,
  407. .cpu_name = "601",
  408. .cpu_features = CPU_FTRS_PPC601,
  409. .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
  410. PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
  411. .icache_bsize = 32,
  412. .dcache_bsize = 32,
  413. .platform = "ppc601",
  414. },
  415. { /* 603 */
  416. .pvr_mask = 0xffff0000,
  417. .pvr_value = 0x00030000,
  418. .cpu_name = "603",
  419. .cpu_features = CPU_FTRS_603,
  420. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  421. .icache_bsize = 32,
  422. .dcache_bsize = 32,
  423. .cpu_setup = __setup_cpu_603,
  424. .platform = "ppc603",
  425. },
  426. { /* 603e */
  427. .pvr_mask = 0xffff0000,
  428. .pvr_value = 0x00060000,
  429. .cpu_name = "603e",
  430. .cpu_features = CPU_FTRS_603,
  431. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  432. .icache_bsize = 32,
  433. .dcache_bsize = 32,
  434. .cpu_setup = __setup_cpu_603,
  435. .platform = "ppc603",
  436. },
  437. { /* 603ev */
  438. .pvr_mask = 0xffff0000,
  439. .pvr_value = 0x00070000,
  440. .cpu_name = "603ev",
  441. .cpu_features = CPU_FTRS_603,
  442. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  443. .icache_bsize = 32,
  444. .dcache_bsize = 32,
  445. .cpu_setup = __setup_cpu_603,
  446. .platform = "ppc603",
  447. },
  448. { /* 604 */
  449. .pvr_mask = 0xffff0000,
  450. .pvr_value = 0x00040000,
  451. .cpu_name = "604",
  452. .cpu_features = CPU_FTRS_604,
  453. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  454. .icache_bsize = 32,
  455. .dcache_bsize = 32,
  456. .num_pmcs = 2,
  457. .cpu_setup = __setup_cpu_604,
  458. .platform = "ppc604",
  459. },
  460. { /* 604e */
  461. .pvr_mask = 0xfffff000,
  462. .pvr_value = 0x00090000,
  463. .cpu_name = "604e",
  464. .cpu_features = CPU_FTRS_604,
  465. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  466. .icache_bsize = 32,
  467. .dcache_bsize = 32,
  468. .num_pmcs = 4,
  469. .cpu_setup = __setup_cpu_604,
  470. .platform = "ppc604",
  471. },
  472. { /* 604r */
  473. .pvr_mask = 0xffff0000,
  474. .pvr_value = 0x00090000,
  475. .cpu_name = "604r",
  476. .cpu_features = CPU_FTRS_604,
  477. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  478. .icache_bsize = 32,
  479. .dcache_bsize = 32,
  480. .num_pmcs = 4,
  481. .cpu_setup = __setup_cpu_604,
  482. .platform = "ppc604",
  483. },
  484. { /* 604ev */
  485. .pvr_mask = 0xffff0000,
  486. .pvr_value = 0x000a0000,
  487. .cpu_name = "604ev",
  488. .cpu_features = CPU_FTRS_604,
  489. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  490. .icache_bsize = 32,
  491. .dcache_bsize = 32,
  492. .num_pmcs = 4,
  493. .cpu_setup = __setup_cpu_604,
  494. .platform = "ppc604",
  495. },
  496. { /* 740/750 (0x4202, don't support TAU ?) */
  497. .pvr_mask = 0xffffffff,
  498. .pvr_value = 0x00084202,
  499. .cpu_name = "740/750",
  500. .cpu_features = CPU_FTRS_740_NOTAU,
  501. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  502. .icache_bsize = 32,
  503. .dcache_bsize = 32,
  504. .num_pmcs = 4,
  505. .cpu_setup = __setup_cpu_750,
  506. .platform = "ppc750",
  507. },
  508. { /* 750CX (80100 and 8010x?) */
  509. .pvr_mask = 0xfffffff0,
  510. .pvr_value = 0x00080100,
  511. .cpu_name = "750CX",
  512. .cpu_features = CPU_FTRS_750,
  513. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  514. .icache_bsize = 32,
  515. .dcache_bsize = 32,
  516. .num_pmcs = 4,
  517. .cpu_setup = __setup_cpu_750cx,
  518. .platform = "ppc750",
  519. },
  520. { /* 750CX (82201 and 82202) */
  521. .pvr_mask = 0xfffffff0,
  522. .pvr_value = 0x00082200,
  523. .cpu_name = "750CX",
  524. .cpu_features = CPU_FTRS_750,
  525. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  526. .icache_bsize = 32,
  527. .dcache_bsize = 32,
  528. .num_pmcs = 4,
  529. .cpu_setup = __setup_cpu_750cx,
  530. .platform = "ppc750",
  531. },
  532. { /* 750CXe (82214) */
  533. .pvr_mask = 0xfffffff0,
  534. .pvr_value = 0x00082210,
  535. .cpu_name = "750CXe",
  536. .cpu_features = CPU_FTRS_750,
  537. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  538. .icache_bsize = 32,
  539. .dcache_bsize = 32,
  540. .num_pmcs = 4,
  541. .cpu_setup = __setup_cpu_750cx,
  542. .platform = "ppc750",
  543. },
  544. { /* 750CXe "Gekko" (83214) */
  545. .pvr_mask = 0xffffffff,
  546. .pvr_value = 0x00083214,
  547. .cpu_name = "750CXe",
  548. .cpu_features = CPU_FTRS_750,
  549. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  550. .icache_bsize = 32,
  551. .dcache_bsize = 32,
  552. .num_pmcs = 4,
  553. .cpu_setup = __setup_cpu_750cx,
  554. .platform = "ppc750",
  555. },
  556. { /* 750CL */
  557. .pvr_mask = 0xfffff0f0,
  558. .pvr_value = 0x00087010,
  559. .cpu_name = "750CL",
  560. .cpu_features = CPU_FTRS_750CL,
  561. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  562. .icache_bsize = 32,
  563. .dcache_bsize = 32,
  564. .num_pmcs = 4,
  565. .cpu_setup = __setup_cpu_750,
  566. .platform = "ppc750",
  567. },
  568. { /* 745/755 */
  569. .pvr_mask = 0xfffff000,
  570. .pvr_value = 0x00083000,
  571. .cpu_name = "745/755",
  572. .cpu_features = CPU_FTRS_750,
  573. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  574. .icache_bsize = 32,
  575. .dcache_bsize = 32,
  576. .num_pmcs = 4,
  577. .cpu_setup = __setup_cpu_750,
  578. .platform = "ppc750",
  579. },
  580. { /* 750FX rev 1.x */
  581. .pvr_mask = 0xffffff00,
  582. .pvr_value = 0x70000100,
  583. .cpu_name = "750FX",
  584. .cpu_features = CPU_FTRS_750FX1,
  585. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  586. .icache_bsize = 32,
  587. .dcache_bsize = 32,
  588. .num_pmcs = 4,
  589. .cpu_setup = __setup_cpu_750,
  590. .platform = "ppc750",
  591. },
  592. { /* 750FX rev 2.0 must disable HID0[DPM] */
  593. .pvr_mask = 0xffffffff,
  594. .pvr_value = 0x70000200,
  595. .cpu_name = "750FX",
  596. .cpu_features = CPU_FTRS_750FX2,
  597. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  598. .icache_bsize = 32,
  599. .dcache_bsize = 32,
  600. .num_pmcs = 4,
  601. .cpu_setup = __setup_cpu_750,
  602. .platform = "ppc750",
  603. },
  604. { /* 750FX (All revs except 2.0) */
  605. .pvr_mask = 0xffff0000,
  606. .pvr_value = 0x70000000,
  607. .cpu_name = "750FX",
  608. .cpu_features = CPU_FTRS_750FX,
  609. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  610. .icache_bsize = 32,
  611. .dcache_bsize = 32,
  612. .num_pmcs = 4,
  613. .cpu_setup = __setup_cpu_750fx,
  614. .platform = "ppc750",
  615. },
  616. { /* 750GX */
  617. .pvr_mask = 0xffff0000,
  618. .pvr_value = 0x70020000,
  619. .cpu_name = "750GX",
  620. .cpu_features = CPU_FTRS_750GX,
  621. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  622. .icache_bsize = 32,
  623. .dcache_bsize = 32,
  624. .num_pmcs = 4,
  625. .cpu_setup = __setup_cpu_750fx,
  626. .platform = "ppc750",
  627. },
  628. { /* 740/750 (L2CR bit need fixup for 740) */
  629. .pvr_mask = 0xffff0000,
  630. .pvr_value = 0x00080000,
  631. .cpu_name = "740/750",
  632. .cpu_features = CPU_FTRS_740,
  633. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  634. .icache_bsize = 32,
  635. .dcache_bsize = 32,
  636. .num_pmcs = 4,
  637. .cpu_setup = __setup_cpu_750,
  638. .platform = "ppc750",
  639. },
  640. { /* 7400 rev 1.1 ? (no TAU) */
  641. .pvr_mask = 0xffffffff,
  642. .pvr_value = 0x000c1101,
  643. .cpu_name = "7400 (1.1)",
  644. .cpu_features = CPU_FTRS_7400_NOTAU,
  645. .cpu_user_features = COMMON_USER |
  646. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  647. .icache_bsize = 32,
  648. .dcache_bsize = 32,
  649. .num_pmcs = 4,
  650. .cpu_setup = __setup_cpu_7400,
  651. .platform = "ppc7400",
  652. },
  653. { /* 7400 */
  654. .pvr_mask = 0xffff0000,
  655. .pvr_value = 0x000c0000,
  656. .cpu_name = "7400",
  657. .cpu_features = CPU_FTRS_7400,
  658. .cpu_user_features = COMMON_USER |
  659. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  660. .icache_bsize = 32,
  661. .dcache_bsize = 32,
  662. .num_pmcs = 4,
  663. .cpu_setup = __setup_cpu_7400,
  664. .platform = "ppc7400",
  665. },
  666. { /* 7410 */
  667. .pvr_mask = 0xffff0000,
  668. .pvr_value = 0x800c0000,
  669. .cpu_name = "7410",
  670. .cpu_features = CPU_FTRS_7400,
  671. .cpu_user_features = COMMON_USER |
  672. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  673. .icache_bsize = 32,
  674. .dcache_bsize = 32,
  675. .num_pmcs = 4,
  676. .cpu_setup = __setup_cpu_7410,
  677. .platform = "ppc7400",
  678. },
  679. { /* 7450 2.0 - no doze/nap */
  680. .pvr_mask = 0xffffffff,
  681. .pvr_value = 0x80000200,
  682. .cpu_name = "7450",
  683. .cpu_features = CPU_FTRS_7450_20,
  684. .cpu_user_features = COMMON_USER |
  685. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  686. .icache_bsize = 32,
  687. .dcache_bsize = 32,
  688. .num_pmcs = 6,
  689. .cpu_setup = __setup_cpu_745x,
  690. .oprofile_cpu_type = "ppc/7450",
  691. .oprofile_type = PPC_OPROFILE_G4,
  692. .platform = "ppc7450",
  693. },
  694. { /* 7450 2.1 */
  695. .pvr_mask = 0xffffffff,
  696. .pvr_value = 0x80000201,
  697. .cpu_name = "7450",
  698. .cpu_features = CPU_FTRS_7450_21,
  699. .cpu_user_features = COMMON_USER |
  700. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  701. .icache_bsize = 32,
  702. .dcache_bsize = 32,
  703. .num_pmcs = 6,
  704. .cpu_setup = __setup_cpu_745x,
  705. .oprofile_cpu_type = "ppc/7450",
  706. .oprofile_type = PPC_OPROFILE_G4,
  707. .platform = "ppc7450",
  708. },
  709. { /* 7450 2.3 and newer */
  710. .pvr_mask = 0xffff0000,
  711. .pvr_value = 0x80000000,
  712. .cpu_name = "7450",
  713. .cpu_features = CPU_FTRS_7450_23,
  714. .cpu_user_features = COMMON_USER |
  715. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  716. .icache_bsize = 32,
  717. .dcache_bsize = 32,
  718. .num_pmcs = 6,
  719. .cpu_setup = __setup_cpu_745x,
  720. .oprofile_cpu_type = "ppc/7450",
  721. .oprofile_type = PPC_OPROFILE_G4,
  722. .platform = "ppc7450",
  723. },
  724. { /* 7455 rev 1.x */
  725. .pvr_mask = 0xffffff00,
  726. .pvr_value = 0x80010100,
  727. .cpu_name = "7455",
  728. .cpu_features = CPU_FTRS_7455_1,
  729. .cpu_user_features = COMMON_USER |
  730. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  731. .icache_bsize = 32,
  732. .dcache_bsize = 32,
  733. .num_pmcs = 6,
  734. .cpu_setup = __setup_cpu_745x,
  735. .oprofile_cpu_type = "ppc/7450",
  736. .oprofile_type = PPC_OPROFILE_G4,
  737. .platform = "ppc7450",
  738. },
  739. { /* 7455 rev 2.0 */
  740. .pvr_mask = 0xffffffff,
  741. .pvr_value = 0x80010200,
  742. .cpu_name = "7455",
  743. .cpu_features = CPU_FTRS_7455_20,
  744. .cpu_user_features = COMMON_USER |
  745. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  746. .icache_bsize = 32,
  747. .dcache_bsize = 32,
  748. .num_pmcs = 6,
  749. .cpu_setup = __setup_cpu_745x,
  750. .oprofile_cpu_type = "ppc/7450",
  751. .oprofile_type = PPC_OPROFILE_G4,
  752. .platform = "ppc7450",
  753. },
  754. { /* 7455 others */
  755. .pvr_mask = 0xffff0000,
  756. .pvr_value = 0x80010000,
  757. .cpu_name = "7455",
  758. .cpu_features = CPU_FTRS_7455,
  759. .cpu_user_features = COMMON_USER |
  760. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  761. .icache_bsize = 32,
  762. .dcache_bsize = 32,
  763. .num_pmcs = 6,
  764. .cpu_setup = __setup_cpu_745x,
  765. .oprofile_cpu_type = "ppc/7450",
  766. .oprofile_type = PPC_OPROFILE_G4,
  767. .platform = "ppc7450",
  768. },
  769. { /* 7447/7457 Rev 1.0 */
  770. .pvr_mask = 0xffffffff,
  771. .pvr_value = 0x80020100,
  772. .cpu_name = "7447/7457",
  773. .cpu_features = CPU_FTRS_7447_10,
  774. .cpu_user_features = COMMON_USER |
  775. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  776. .icache_bsize = 32,
  777. .dcache_bsize = 32,
  778. .num_pmcs = 6,
  779. .cpu_setup = __setup_cpu_745x,
  780. .oprofile_cpu_type = "ppc/7450",
  781. .oprofile_type = PPC_OPROFILE_G4,
  782. .platform = "ppc7450",
  783. },
  784. { /* 7447/7457 Rev 1.1 */
  785. .pvr_mask = 0xffffffff,
  786. .pvr_value = 0x80020101,
  787. .cpu_name = "7447/7457",
  788. .cpu_features = CPU_FTRS_7447_10,
  789. .cpu_user_features = COMMON_USER |
  790. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  791. .icache_bsize = 32,
  792. .dcache_bsize = 32,
  793. .num_pmcs = 6,
  794. .cpu_setup = __setup_cpu_745x,
  795. .oprofile_cpu_type = "ppc/7450",
  796. .oprofile_type = PPC_OPROFILE_G4,
  797. .platform = "ppc7450",
  798. },
  799. { /* 7447/7457 Rev 1.2 and later */
  800. .pvr_mask = 0xffff0000,
  801. .pvr_value = 0x80020000,
  802. .cpu_name = "7447/7457",
  803. .cpu_features = CPU_FTRS_7447,
  804. .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  805. .icache_bsize = 32,
  806. .dcache_bsize = 32,
  807. .num_pmcs = 6,
  808. .cpu_setup = __setup_cpu_745x,
  809. .oprofile_cpu_type = "ppc/7450",
  810. .oprofile_type = PPC_OPROFILE_G4,
  811. .platform = "ppc7450",
  812. },
  813. { /* 7447A */
  814. .pvr_mask = 0xffff0000,
  815. .pvr_value = 0x80030000,
  816. .cpu_name = "7447A",
  817. .cpu_features = CPU_FTRS_7447A,
  818. .cpu_user_features = COMMON_USER |
  819. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  820. .icache_bsize = 32,
  821. .dcache_bsize = 32,
  822. .num_pmcs = 6,
  823. .cpu_setup = __setup_cpu_745x,
  824. .oprofile_cpu_type = "ppc/7450",
  825. .oprofile_type = PPC_OPROFILE_G4,
  826. .platform = "ppc7450",
  827. },
  828. { /* 7448 */
  829. .pvr_mask = 0xffff0000,
  830. .pvr_value = 0x80040000,
  831. .cpu_name = "7448",
  832. .cpu_features = CPU_FTRS_7447A,
  833. .cpu_user_features = COMMON_USER |
  834. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  835. .icache_bsize = 32,
  836. .dcache_bsize = 32,
  837. .num_pmcs = 6,
  838. .cpu_setup = __setup_cpu_745x,
  839. .oprofile_cpu_type = "ppc/7450",
  840. .oprofile_type = PPC_OPROFILE_G4,
  841. .platform = "ppc7450",
  842. },
  843. { /* 82xx (8240, 8245, 8260 are all 603e cores) */
  844. .pvr_mask = 0x7fff0000,
  845. .pvr_value = 0x00810000,
  846. .cpu_name = "82xx",
  847. .cpu_features = CPU_FTRS_82XX,
  848. .cpu_user_features = COMMON_USER,
  849. .icache_bsize = 32,
  850. .dcache_bsize = 32,
  851. .cpu_setup = __setup_cpu_603,
  852. .platform = "ppc603",
  853. },
  854. { /* All G2_LE (603e core, plus some) have the same pvr */
  855. .pvr_mask = 0x7fff0000,
  856. .pvr_value = 0x00820000,
  857. .cpu_name = "G2_LE",
  858. .cpu_features = CPU_FTRS_G2_LE,
  859. .cpu_user_features = COMMON_USER,
  860. .icache_bsize = 32,
  861. .dcache_bsize = 32,
  862. .cpu_setup = __setup_cpu_603,
  863. .platform = "ppc603",
  864. },
  865. { /* e300c1 (a 603e core, plus some) on 83xx */
  866. .pvr_mask = 0x7fff0000,
  867. .pvr_value = 0x00830000,
  868. .cpu_name = "e300c1",
  869. .cpu_features = CPU_FTRS_E300,
  870. .cpu_user_features = COMMON_USER,
  871. .icache_bsize = 32,
  872. .dcache_bsize = 32,
  873. .cpu_setup = __setup_cpu_603,
  874. .platform = "ppc603",
  875. },
  876. { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */
  877. .pvr_mask = 0x7fff0000,
  878. .pvr_value = 0x00840000,
  879. .cpu_name = "e300c2",
  880. .cpu_features = CPU_FTRS_E300C2,
  881. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  882. .icache_bsize = 32,
  883. .dcache_bsize = 32,
  884. .cpu_setup = __setup_cpu_603,
  885. .platform = "ppc603",
  886. },
  887. { /* e300c3 on 83xx */
  888. .pvr_mask = 0x7fff0000,
  889. .pvr_value = 0x00850000,
  890. .cpu_name = "e300c3",
  891. .cpu_features = CPU_FTRS_E300,
  892. .cpu_user_features = COMMON_USER,
  893. .icache_bsize = 32,
  894. .dcache_bsize = 32,
  895. .cpu_setup = __setup_cpu_603,
  896. .platform = "ppc603",
  897. },
  898. { /* default match, we assume split I/D cache & TB (non-601)... */
  899. .pvr_mask = 0x00000000,
  900. .pvr_value = 0x00000000,
  901. .cpu_name = "(generic PPC)",
  902. .cpu_features = CPU_FTRS_CLASSIC32,
  903. .cpu_user_features = COMMON_USER,
  904. .icache_bsize = 32,
  905. .dcache_bsize = 32,
  906. .platform = "ppc603",
  907. },
  908. #endif /* CLASSIC_PPC */
  909. #ifdef CONFIG_8xx
  910. { /* 8xx */
  911. .pvr_mask = 0xffff0000,
  912. .pvr_value = 0x00500000,
  913. .cpu_name = "8xx",
  914. /* CPU_FTR_MAYBE_CAN_DOZE is possible,
  915. * if the 8xx code is there.... */
  916. .cpu_features = CPU_FTRS_8XX,
  917. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  918. .icache_bsize = 16,
  919. .dcache_bsize = 16,
  920. .platform = "ppc823",
  921. },
  922. #endif /* CONFIG_8xx */
  923. #ifdef CONFIG_40x
  924. { /* 403GC */
  925. .pvr_mask = 0xffffff00,
  926. .pvr_value = 0x00200200,
  927. .cpu_name = "403GC",
  928. .cpu_features = CPU_FTRS_40X,
  929. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  930. .icache_bsize = 16,
  931. .dcache_bsize = 16,
  932. .platform = "ppc403",
  933. },
  934. { /* 403GCX */
  935. .pvr_mask = 0xffffff00,
  936. .pvr_value = 0x00201400,
  937. .cpu_name = "403GCX",
  938. .cpu_features = CPU_FTRS_40X,
  939. .cpu_user_features = PPC_FEATURE_32 |
  940. PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
  941. .icache_bsize = 16,
  942. .dcache_bsize = 16,
  943. .platform = "ppc403",
  944. },
  945. { /* 403G ?? */
  946. .pvr_mask = 0xffff0000,
  947. .pvr_value = 0x00200000,
  948. .cpu_name = "403G ??",
  949. .cpu_features = CPU_FTRS_40X,
  950. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  951. .icache_bsize = 16,
  952. .dcache_bsize = 16,
  953. .platform = "ppc403",
  954. },
  955. { /* 405GP */
  956. .pvr_mask = 0xffff0000,
  957. .pvr_value = 0x40110000,
  958. .cpu_name = "405GP",
  959. .cpu_features = CPU_FTRS_40X,
  960. .cpu_user_features = PPC_FEATURE_32 |
  961. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  962. .icache_bsize = 32,
  963. .dcache_bsize = 32,
  964. .platform = "ppc405",
  965. },
  966. { /* STB 03xxx */
  967. .pvr_mask = 0xffff0000,
  968. .pvr_value = 0x40130000,
  969. .cpu_name = "STB03xxx",
  970. .cpu_features = CPU_FTRS_40X,
  971. .cpu_user_features = PPC_FEATURE_32 |
  972. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  973. .icache_bsize = 32,
  974. .dcache_bsize = 32,
  975. .platform = "ppc405",
  976. },
  977. { /* STB 04xxx */
  978. .pvr_mask = 0xffff0000,
  979. .pvr_value = 0x41810000,
  980. .cpu_name = "STB04xxx",
  981. .cpu_features = CPU_FTRS_40X,
  982. .cpu_user_features = PPC_FEATURE_32 |
  983. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  984. .icache_bsize = 32,
  985. .dcache_bsize = 32,
  986. .platform = "ppc405",
  987. },
  988. { /* NP405L */
  989. .pvr_mask = 0xffff0000,
  990. .pvr_value = 0x41610000,
  991. .cpu_name = "NP405L",
  992. .cpu_features = CPU_FTRS_40X,
  993. .cpu_user_features = PPC_FEATURE_32 |
  994. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  995. .icache_bsize = 32,
  996. .dcache_bsize = 32,
  997. .platform = "ppc405",
  998. },
  999. { /* NP4GS3 */
  1000. .pvr_mask = 0xffff0000,
  1001. .pvr_value = 0x40B10000,
  1002. .cpu_name = "NP4GS3",
  1003. .cpu_features = CPU_FTRS_40X,
  1004. .cpu_user_features = PPC_FEATURE_32 |
  1005. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1006. .icache_bsize = 32,
  1007. .dcache_bsize = 32,
  1008. .platform = "ppc405",
  1009. },
  1010. { /* NP405H */
  1011. .pvr_mask = 0xffff0000,
  1012. .pvr_value = 0x41410000,
  1013. .cpu_name = "NP405H",
  1014. .cpu_features = CPU_FTRS_40X,
  1015. .cpu_user_features = PPC_FEATURE_32 |
  1016. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1017. .icache_bsize = 32,
  1018. .dcache_bsize = 32,
  1019. .platform = "ppc405",
  1020. },
  1021. { /* 405GPr */
  1022. .pvr_mask = 0xffff0000,
  1023. .pvr_value = 0x50910000,
  1024. .cpu_name = "405GPr",
  1025. .cpu_features = CPU_FTRS_40X,
  1026. .cpu_user_features = PPC_FEATURE_32 |
  1027. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1028. .icache_bsize = 32,
  1029. .dcache_bsize = 32,
  1030. .platform = "ppc405",
  1031. },
  1032. { /* STBx25xx */
  1033. .pvr_mask = 0xffff0000,
  1034. .pvr_value = 0x51510000,
  1035. .cpu_name = "STBx25xx",
  1036. .cpu_features = CPU_FTRS_40X,
  1037. .cpu_user_features = PPC_FEATURE_32 |
  1038. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1039. .icache_bsize = 32,
  1040. .dcache_bsize = 32,
  1041. .platform = "ppc405",
  1042. },
  1043. { /* 405LP */
  1044. .pvr_mask = 0xffff0000,
  1045. .pvr_value = 0x41F10000,
  1046. .cpu_name = "405LP",
  1047. .cpu_features = CPU_FTRS_40X,
  1048. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  1049. .icache_bsize = 32,
  1050. .dcache_bsize = 32,
  1051. .platform = "ppc405",
  1052. },
  1053. { /* Xilinx Virtex-II Pro */
  1054. .pvr_mask = 0xfffff000,
  1055. .pvr_value = 0x20010000,
  1056. .cpu_name = "Virtex-II Pro",
  1057. .cpu_features = CPU_FTRS_40X,
  1058. .cpu_user_features = PPC_FEATURE_32 |
  1059. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1060. .icache_bsize = 32,
  1061. .dcache_bsize = 32,
  1062. .platform = "ppc405",
  1063. },
  1064. { /* Xilinx Virtex-4 FX */
  1065. .pvr_mask = 0xfffff000,
  1066. .pvr_value = 0x20011000,
  1067. .cpu_name = "Virtex-4 FX",
  1068. .cpu_features = CPU_FTRS_40X,
  1069. .cpu_user_features = PPC_FEATURE_32 |
  1070. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1071. .icache_bsize = 32,
  1072. .dcache_bsize = 32,
  1073. .platform = "ppc405",
  1074. },
  1075. { /* 405EP */
  1076. .pvr_mask = 0xffff0000,
  1077. .pvr_value = 0x51210000,
  1078. .cpu_name = "405EP",
  1079. .cpu_features = CPU_FTRS_40X,
  1080. .cpu_user_features = PPC_FEATURE_32 |
  1081. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1082. .icache_bsize = 32,
  1083. .dcache_bsize = 32,
  1084. .platform = "ppc405",
  1085. },
  1086. #endif /* CONFIG_40x */
  1087. #ifdef CONFIG_44x
  1088. {
  1089. .pvr_mask = 0xf0000fff,
  1090. .pvr_value = 0x40000850,
  1091. .cpu_name = "440EP Rev. A",
  1092. .cpu_features = CPU_FTRS_44X,
  1093. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1094. .icache_bsize = 32,
  1095. .dcache_bsize = 32,
  1096. .platform = "ppc440",
  1097. },
  1098. {
  1099. .pvr_mask = 0xf0000fff,
  1100. .pvr_value = 0x400008d3,
  1101. .cpu_name = "440EP Rev. B",
  1102. .cpu_features = CPU_FTRS_44X,
  1103. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1104. .icache_bsize = 32,
  1105. .dcache_bsize = 32,
  1106. .platform = "ppc440",
  1107. },
  1108. { /* 440GP Rev. B */
  1109. .pvr_mask = 0xf0000fff,
  1110. .pvr_value = 0x40000440,
  1111. .cpu_name = "440GP Rev. B",
  1112. .cpu_features = CPU_FTRS_44X,
  1113. .cpu_user_features = COMMON_USER_BOOKE,
  1114. .icache_bsize = 32,
  1115. .dcache_bsize = 32,
  1116. .platform = "ppc440gp",
  1117. },
  1118. { /* 440GP Rev. C */
  1119. .pvr_mask = 0xf0000fff,
  1120. .pvr_value = 0x40000481,
  1121. .cpu_name = "440GP Rev. C",
  1122. .cpu_features = CPU_FTRS_44X,
  1123. .cpu_user_features = COMMON_USER_BOOKE,
  1124. .icache_bsize = 32,
  1125. .dcache_bsize = 32,
  1126. .platform = "ppc440gp",
  1127. },
  1128. { /* 440GX Rev. A */
  1129. .pvr_mask = 0xf0000fff,
  1130. .pvr_value = 0x50000850,
  1131. .cpu_name = "440GX Rev. A",
  1132. .cpu_features = CPU_FTRS_44X,
  1133. .cpu_user_features = COMMON_USER_BOOKE,
  1134. .icache_bsize = 32,
  1135. .dcache_bsize = 32,
  1136. .platform = "ppc440",
  1137. },
  1138. { /* 440GX Rev. B */
  1139. .pvr_mask = 0xf0000fff,
  1140. .pvr_value = 0x50000851,
  1141. .cpu_name = "440GX Rev. B",
  1142. .cpu_features = CPU_FTRS_44X,
  1143. .cpu_user_features = COMMON_USER_BOOKE,
  1144. .icache_bsize = 32,
  1145. .dcache_bsize = 32,
  1146. .platform = "ppc440",
  1147. },
  1148. { /* 440GX Rev. C */
  1149. .pvr_mask = 0xf0000fff,
  1150. .pvr_value = 0x50000892,
  1151. .cpu_name = "440GX Rev. C",
  1152. .cpu_features = CPU_FTRS_44X,
  1153. .cpu_user_features = COMMON_USER_BOOKE,
  1154. .icache_bsize = 32,
  1155. .dcache_bsize = 32,
  1156. .platform = "ppc440",
  1157. },
  1158. { /* 440GX Rev. F */
  1159. .pvr_mask = 0xf0000fff,
  1160. .pvr_value = 0x50000894,
  1161. .cpu_name = "440GX Rev. F",
  1162. .cpu_features = CPU_FTRS_44X,
  1163. .cpu_user_features = COMMON_USER_BOOKE,
  1164. .icache_bsize = 32,
  1165. .dcache_bsize = 32,
  1166. .platform = "ppc440",
  1167. },
  1168. { /* 440SP Rev. A */
  1169. .pvr_mask = 0xff000fff,
  1170. .pvr_value = 0x53000891,
  1171. .cpu_name = "440SP Rev. A",
  1172. .cpu_features = CPU_FTRS_44X,
  1173. .cpu_user_features = COMMON_USER_BOOKE,
  1174. .icache_bsize = 32,
  1175. .dcache_bsize = 32,
  1176. .platform = "ppc440",
  1177. },
  1178. { /* 440SPe Rev. A */
  1179. .pvr_mask = 0xff000fff,
  1180. .pvr_value = 0x53000890,
  1181. .cpu_name = "440SPe Rev. A",
  1182. .cpu_features = CPU_FTRS_44X,
  1183. .cpu_user_features = COMMON_USER_BOOKE,
  1184. .icache_bsize = 32,
  1185. .dcache_bsize = 32,
  1186. .platform = "ppc440",
  1187. },
  1188. #endif /* CONFIG_44x */
  1189. #ifdef CONFIG_FSL_BOOKE
  1190. { /* e200z5 */
  1191. .pvr_mask = 0xfff00000,
  1192. .pvr_value = 0x81000000,
  1193. .cpu_name = "e200z5",
  1194. /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
  1195. .cpu_features = CPU_FTRS_E200,
  1196. .cpu_user_features = COMMON_USER_BOOKE |
  1197. PPC_FEATURE_HAS_EFP_SINGLE |
  1198. PPC_FEATURE_UNIFIED_CACHE,
  1199. .dcache_bsize = 32,
  1200. .platform = "ppc5554",
  1201. },
  1202. { /* e200z6 */
  1203. .pvr_mask = 0xfff00000,
  1204. .pvr_value = 0x81100000,
  1205. .cpu_name = "e200z6",
  1206. /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
  1207. .cpu_features = CPU_FTRS_E200,
  1208. .cpu_user_features = COMMON_USER_BOOKE |
  1209. PPC_FEATURE_SPE_COMP |
  1210. PPC_FEATURE_HAS_EFP_SINGLE |
  1211. PPC_FEATURE_UNIFIED_CACHE,
  1212. .dcache_bsize = 32,
  1213. .platform = "ppc5554",
  1214. },
  1215. { /* e500 */
  1216. .pvr_mask = 0xffff0000,
  1217. .pvr_value = 0x80200000,
  1218. .cpu_name = "e500",
  1219. /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
  1220. .cpu_features = CPU_FTRS_E500,
  1221. .cpu_user_features = COMMON_USER_BOOKE |
  1222. PPC_FEATURE_SPE_COMP |
  1223. PPC_FEATURE_HAS_EFP_SINGLE,
  1224. .icache_bsize = 32,
  1225. .dcache_bsize = 32,
  1226. .num_pmcs = 4,
  1227. .oprofile_cpu_type = "ppc/e500",
  1228. .oprofile_type = PPC_OPROFILE_BOOKE,
  1229. .platform = "ppc8540",
  1230. },
  1231. { /* e500v2 */
  1232. .pvr_mask = 0xffff0000,
  1233. .pvr_value = 0x80210000,
  1234. .cpu_name = "e500v2",
  1235. /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
  1236. .cpu_features = CPU_FTRS_E500_2,
  1237. .cpu_user_features = COMMON_USER_BOOKE |
  1238. PPC_FEATURE_SPE_COMP |
  1239. PPC_FEATURE_HAS_EFP_SINGLE |
  1240. PPC_FEATURE_HAS_EFP_DOUBLE,
  1241. .icache_bsize = 32,
  1242. .dcache_bsize = 32,
  1243. .num_pmcs = 4,
  1244. .oprofile_cpu_type = "ppc/e500",
  1245. .oprofile_type = PPC_OPROFILE_BOOKE,
  1246. .platform = "ppc8548",
  1247. },
  1248. #endif
  1249. #if !CLASSIC_PPC
  1250. { /* default match */
  1251. .pvr_mask = 0x00000000,
  1252. .pvr_value = 0x00000000,
  1253. .cpu_name = "(generic PPC)",
  1254. .cpu_features = CPU_FTRS_GENERIC_32,
  1255. .cpu_user_features = PPC_FEATURE_32,
  1256. .icache_bsize = 32,
  1257. .dcache_bsize = 32,
  1258. .platform = "powerpc",
  1259. }
  1260. #endif /* !CLASSIC_PPC */
  1261. #endif /* CONFIG_PPC32 */
  1262. };
  1263. struct cpu_spec *identify_cpu(unsigned long offset, unsigned int pvr)
  1264. {
  1265. struct cpu_spec *s = cpu_specs;
  1266. struct cpu_spec **cur = &cur_cpu_spec;
  1267. int i;
  1268. s = PTRRELOC(s);
  1269. cur = PTRRELOC(cur);
  1270. for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++)
  1271. if ((pvr & s->pvr_mask) == s->pvr_value) {
  1272. *cur = cpu_specs + i;
  1273. #ifdef CONFIG_PPC64
  1274. /* ppc64 expects identify_cpu to also call setup_cpu
  1275. * for that processor. I will consolidate that at a
  1276. * later time, for now, just use our friend #ifdef.
  1277. * we also don't need to PTRRELOC the function pointer
  1278. * on ppc64 as we are running at 0 in real mode.
  1279. */
  1280. if (s->cpu_setup) {
  1281. s->cpu_setup(offset, s);
  1282. }
  1283. #endif /* CONFIG_PPC64 */
  1284. return s;
  1285. }
  1286. BUG();
  1287. return NULL;
  1288. }
  1289. void do_feature_fixups(unsigned long value, void *fixup_start, void *fixup_end)
  1290. {
  1291. struct fixup_entry {
  1292. unsigned long mask;
  1293. unsigned long value;
  1294. long start_off;
  1295. long end_off;
  1296. } *fcur, *fend;
  1297. fcur = fixup_start;
  1298. fend = fixup_end;
  1299. for (; fcur < fend; fcur++) {
  1300. unsigned int *pstart, *pend, *p;
  1301. if ((value & fcur->mask) == fcur->value)
  1302. continue;
  1303. /* These PTRRELOCs will disappear once the new scheme for
  1304. * modules and vdso is implemented
  1305. */
  1306. pstart = ((unsigned int *)fcur) + (fcur->start_off / 4);
  1307. pend = ((unsigned int *)fcur) + (fcur->end_off / 4);
  1308. for (p = pstart; p < pend; p++) {
  1309. *p = 0x60000000u;
  1310. asm volatile ("dcbst 0, %0" : : "r" (p));
  1311. }
  1312. asm volatile ("sync" : : : "memory");
  1313. for (p = pstart; p < pend; p++)
  1314. asm volatile ("icbi 0,%0" : : "r" (p));
  1315. asm volatile ("sync; isync" : : : "memory");
  1316. }
  1317. }