mpc866ads.dts 3.4 KB

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  1. /*
  2. * MPC866 ADS Device Tree Source
  3. *
  4. * Copyright 2006 MontaVista Software, Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. */
  11. / {
  12. model = "MPC866ADS";
  13. compatible = "mpc8xx";
  14. #address-cells = <1>;
  15. #size-cells = <1>;
  16. linux,phandle = <100>;
  17. cpus {
  18. #address-cells = <1>;
  19. #size-cells = <0>;
  20. linux,phandle = <200>;
  21. PowerPC,866@0 {
  22. device_type = "cpu";
  23. reg = <0>;
  24. d-cache-line-size = <20>; // 32 bytes
  25. i-cache-line-size = <20>; // 32 bytes
  26. d-cache-size = <2000>; // L1, 8K
  27. i-cache-size = <4000>; // L1, 16K
  28. timebase-frequency = <0>;
  29. bus-frequency = <0>;
  30. clock-frequency = <0>;
  31. 32-bit;
  32. interrupts = <f 2>; // decrementer interrupt
  33. interrupt-parent = <ff000000>;
  34. linux,phandle = <201>;
  35. };
  36. };
  37. memory {
  38. device_type = "memory";
  39. linux,phandle = <300>;
  40. reg = <00000000 800000>;
  41. };
  42. soc866@ff000000 {
  43. #address-cells = <1>;
  44. #size-cells = <1>;
  45. #interrupt-cells = <2>;
  46. device_type = "soc";
  47. ranges = <0 ff000000 00100000>;
  48. reg = <ff000000 00000200>;
  49. bus-frequency = <0>;
  50. mdio@e80 {
  51. device_type = "mdio";
  52. compatible = "fs_enet";
  53. reg = <e80 8>;
  54. linux,phandle = <e80>;
  55. #address-cells = <1>;
  56. #size-cells = <0>;
  57. ethernet-phy@f {
  58. linux,phandle = <e800f>;
  59. reg = <f>;
  60. device_type = "ethernet-phy";
  61. };
  62. };
  63. fec@e00 {
  64. device_type = "network";
  65. compatible = "fs_enet";
  66. model = "FEC";
  67. device-id = <1>;
  68. reg = <e00 188>;
  69. mac-address = [ 00 00 0C 00 01 FD ];
  70. interrupts = <3 1>;
  71. interrupt-parent = <ff000000>;
  72. phy-handle = <e800f>;
  73. };
  74. pic@ff000000 {
  75. linux,phandle = <ff000000>;
  76. interrupt-controller;
  77. #address-cells = <0>;
  78. #interrupt-cells = <2>;
  79. reg = <0 24>;
  80. built-in;
  81. device_type = "mpc8xx-pic";
  82. compatible = "CPM";
  83. };
  84. cpm@ff000000 {
  85. linux,phandle = <ff000000>;
  86. #address-cells = <1>;
  87. #size-cells = <1>;
  88. #interrupt-cells = <2>;
  89. device_type = "cpm";
  90. model = "CPM";
  91. ranges = <0 0 4000>;
  92. reg = <860 f0>;
  93. command-proc = <9c0>;
  94. brg-frequency = <0>;
  95. interrupts = <0 2>; // cpm error interrupt
  96. interrupt-parent = <930>;
  97. pic@930 {
  98. linux,phandle = <930>;
  99. interrupt-controller;
  100. #address-cells = <0>;
  101. #interrupt-cells = <2>;
  102. interrupts = <5 2 0 2>;
  103. interrupt-parent = <ff000000>;
  104. reg = <930 20>;
  105. built-in;
  106. device_type = "cpm-pic";
  107. compatible = "CPM";
  108. };
  109. smc@a80 {
  110. device_type = "serial";
  111. compatible = "cpm_uart";
  112. model = "SMC";
  113. device-id = <1>;
  114. reg = <a80 10 3e80 40>;
  115. clock-setup = <00ffffff 0>;
  116. rx-clock = <1>;
  117. tx-clock = <1>;
  118. current-speed = <0>;
  119. interrupts = <4 3>;
  120. interrupt-parent = <930>;
  121. };
  122. smc@a90 {
  123. device_type = "serial";
  124. compatible = "cpm_uart";
  125. model = "SMC";
  126. device-id = <2>;
  127. reg = <a90 20 3f80 40>;
  128. clock-setup = <ff00ffff 90000>;
  129. rx-clock = <2>;
  130. tx-clock = <2>;
  131. current-speed = <0>;
  132. interrupts = <3 3>;
  133. interrupt-parent = <930>;
  134. };
  135. scc@a00 {
  136. device_type = "network";
  137. compatible = "fs_enet";
  138. model = "SCC";
  139. device-id = <1>;
  140. reg = <a00 18 3c00 80>;
  141. mac-address = [ 00 00 0C 00 03 FD ];
  142. interrupts = <1e 3>;
  143. interrupt-parent = <930>;
  144. };
  145. };
  146. };
  147. };