mpc834x_mds.dts 7.4 KB

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  1. /*
  2. * MPC8349E MDS Device Tree Source
  3. *
  4. * Copyright 2005, 2006 Freescale Semiconductor Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. */
  11. / {
  12. model = "MPC8349EMDS";
  13. compatible = "MPC8349EMDS", "MPC834xMDS", "MPC83xxMDS";
  14. #address-cells = <1>;
  15. #size-cells = <1>;
  16. cpus {
  17. #address-cells = <1>;
  18. #size-cells = <0>;
  19. PowerPC,8349@0 {
  20. device_type = "cpu";
  21. reg = <0>;
  22. d-cache-line-size = <20>; // 32 bytes
  23. i-cache-line-size = <20>; // 32 bytes
  24. d-cache-size = <8000>; // L1, 32K
  25. i-cache-size = <8000>; // L1, 32K
  26. timebase-frequency = <0>; // from bootloader
  27. bus-frequency = <0>; // from bootloader
  28. clock-frequency = <0>; // from bootloader
  29. 32-bit;
  30. };
  31. };
  32. memory {
  33. device_type = "memory";
  34. reg = <00000000 10000000>; // 256MB at 0
  35. };
  36. bcsr@e2400000 {
  37. device_type = "board-control";
  38. reg = <e2400000 8000>;
  39. };
  40. soc8349@e0000000 {
  41. #address-cells = <1>;
  42. #size-cells = <1>;
  43. #interrupt-cells = <2>;
  44. device_type = "soc";
  45. ranges = <0 e0000000 00100000>;
  46. reg = <e0000000 00000200>;
  47. bus-frequency = <0>;
  48. wdt@200 {
  49. device_type = "watchdog";
  50. compatible = "mpc83xx_wdt";
  51. reg = <200 100>;
  52. };
  53. i2c@3000 {
  54. device_type = "i2c";
  55. compatible = "fsl-i2c";
  56. reg = <3000 100>;
  57. interrupts = <e 8>;
  58. interrupt-parent = < &ipic >;
  59. dfsrr;
  60. };
  61. i2c@3100 {
  62. device_type = "i2c";
  63. compatible = "fsl-i2c";
  64. reg = <3100 100>;
  65. interrupts = <f 8>;
  66. interrupt-parent = < &ipic >;
  67. dfsrr;
  68. };
  69. spi@7000 {
  70. device_type = "spi";
  71. compatible = "mpc83xx_spi";
  72. reg = <7000 1000>;
  73. interrupts = <10 8>;
  74. interrupt-parent = < &ipic >;
  75. mode = <0>;
  76. };
  77. /* phy type (ULPI or SERIAL) are only types supportted for MPH */
  78. /* port = 0 or 1 */
  79. usb@22000 {
  80. device_type = "usb";
  81. compatible = "fsl-usb2-mph";
  82. reg = <22000 1000>;
  83. #address-cells = <1>;
  84. #size-cells = <0>;
  85. interrupt-parent = < &ipic >;
  86. interrupts = <27 8>;
  87. phy_type = "ulpi";
  88. port1;
  89. };
  90. /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
  91. usb@23000 {
  92. device_type = "usb";
  93. compatible = "fsl-usb2-dr";
  94. reg = <23000 1000>;
  95. #address-cells = <1>;
  96. #size-cells = <0>;
  97. interrupt-parent = < &ipic >;
  98. interrupts = <26 8>;
  99. dr_mode = "otg";
  100. phy_type = "ulpi";
  101. };
  102. mdio@24520 {
  103. device_type = "mdio";
  104. compatible = "gianfar";
  105. reg = <24520 20>;
  106. #address-cells = <1>;
  107. #size-cells = <0>;
  108. phy0: ethernet-phy@0 {
  109. interrupt-parent = < &ipic >;
  110. interrupts = <11 8>;
  111. reg = <0>;
  112. device_type = "ethernet-phy";
  113. };
  114. phy1: ethernet-phy@1 {
  115. interrupt-parent = < &ipic >;
  116. interrupts = <12 8>;
  117. reg = <1>;
  118. device_type = "ethernet-phy";
  119. };
  120. };
  121. ethernet@24000 {
  122. device_type = "network";
  123. model = "TSEC";
  124. compatible = "gianfar";
  125. reg = <24000 1000>;
  126. address = [ 00 00 00 00 00 00 ];
  127. local-mac-address = [ 00 00 00 00 00 00 ];
  128. interrupts = <20 8 21 8 22 8>;
  129. interrupt-parent = < &ipic >;
  130. phy-handle = < &phy0 >;
  131. };
  132. ethernet@25000 {
  133. #address-cells = <1>;
  134. #size-cells = <0>;
  135. device_type = "network";
  136. model = "TSEC";
  137. compatible = "gianfar";
  138. reg = <25000 1000>;
  139. address = [ 00 00 00 00 00 00 ];
  140. local-mac-address = [ 00 00 00 00 00 00 ];
  141. interrupts = <23 8 24 8 25 8>;
  142. interrupt-parent = < &ipic >;
  143. phy-handle = < &phy1 >;
  144. };
  145. serial@4500 {
  146. device_type = "serial";
  147. compatible = "ns16550";
  148. reg = <4500 100>;
  149. clock-frequency = <0>;
  150. interrupts = <9 8>;
  151. interrupt-parent = < &ipic >;
  152. };
  153. serial@4600 {
  154. device_type = "serial";
  155. compatible = "ns16550";
  156. reg = <4600 100>;
  157. clock-frequency = <0>;
  158. interrupts = <a 8>;
  159. interrupt-parent = < &ipic >;
  160. };
  161. pci@8500 {
  162. interrupt-map-mask = <f800 0 0 7>;
  163. interrupt-map = <
  164. /* IDSEL 0x11 */
  165. 8800 0 0 1 &ipic 14 8
  166. 8800 0 0 2 &ipic 15 8
  167. 8800 0 0 3 &ipic 16 8
  168. 8800 0 0 4 &ipic 17 8
  169. /* IDSEL 0x12 */
  170. 9000 0 0 1 &ipic 16 8
  171. 9000 0 0 2 &ipic 17 8
  172. 9000 0 0 3 &ipic 14 8
  173. 9000 0 0 4 &ipic 15 8
  174. /* IDSEL 0x13 */
  175. 9800 0 0 1 &ipic 17 8
  176. 9800 0 0 2 &ipic 14 8
  177. 9800 0 0 3 &ipic 15 8
  178. 9800 0 0 4 &ipic 16 8
  179. /* IDSEL 0x15 */
  180. a800 0 0 1 &ipic 14 8
  181. a800 0 0 2 &ipic 15 8
  182. a800 0 0 3 &ipic 16 8
  183. a800 0 0 4 &ipic 17 8
  184. /* IDSEL 0x16 */
  185. b000 0 0 1 &ipic 17 8
  186. b000 0 0 2 &ipic 14 8
  187. b000 0 0 3 &ipic 15 8
  188. b000 0 0 4 &ipic 16 8
  189. /* IDSEL 0x17 */
  190. b800 0 0 1 &ipic 16 8
  191. b800 0 0 2 &ipic 17 8
  192. b800 0 0 3 &ipic 14 8
  193. b800 0 0 4 &ipic 15 8
  194. /* IDSEL 0x18 */
  195. c000 0 0 1 &ipic 15 8
  196. c000 0 0 2 &ipic 16 8
  197. c000 0 0 3 &ipic 17 8
  198. c000 0 0 4 &ipic 14 8>;
  199. interrupt-parent = < &ipic >;
  200. interrupts = <42 8>;
  201. bus-range = <0 0>;
  202. ranges = <02000000 0 90000000 90000000 0 10000000
  203. 42000000 0 80000000 80000000 0 10000000
  204. 01000000 0 00000000 e2000000 0 00100000>;
  205. clock-frequency = <3f940aa>;
  206. #interrupt-cells = <1>;
  207. #size-cells = <2>;
  208. #address-cells = <3>;
  209. reg = <8500 100>;
  210. compatible = "83xx";
  211. device_type = "pci";
  212. };
  213. pci@8600 {
  214. interrupt-map-mask = <f800 0 0 7>;
  215. interrupt-map = <
  216. /* IDSEL 0x11 */
  217. 8800 0 0 1 &ipic 14 8
  218. 8800 0 0 2 &ipic 15 8
  219. 8800 0 0 3 &ipic 16 8
  220. 8800 0 0 4 &ipic 17 8
  221. /* IDSEL 0x12 */
  222. 9000 0 0 1 &ipic 16 8
  223. 9000 0 0 2 &ipic 17 8
  224. 9000 0 0 3 &ipic 14 8
  225. 9000 0 0 4 &ipic 15 8
  226. /* IDSEL 0x13 */
  227. 9800 0 0 1 &ipic 17 8
  228. 9800 0 0 2 &ipic 14 8
  229. 9800 0 0 3 &ipic 15 8
  230. 9800 0 0 4 &ipic 16 8
  231. /* IDSEL 0x15 */
  232. a800 0 0 1 &ipic 14 8
  233. a800 0 0 2 &ipic 15 8
  234. a800 0 0 3 &ipic 16 8
  235. a800 0 0 4 &ipic 17 8
  236. /* IDSEL 0x16 */
  237. b000 0 0 1 &ipic 17 8
  238. b000 0 0 2 &ipic 14 8
  239. b000 0 0 3 &ipic 15 8
  240. b000 0 0 4 &ipic 16 8
  241. /* IDSEL 0x17 */
  242. b800 0 0 1 &ipic 16 8
  243. b800 0 0 2 &ipic 17 8
  244. b800 0 0 3 &ipic 14 8
  245. b800 0 0 4 &ipic 15 8
  246. /* IDSEL 0x18 */
  247. c000 0 0 1 &ipic 15 8
  248. c000 0 0 2 &ipic 16 8
  249. c000 0 0 3 &ipic 17 8
  250. c000 0 0 4 &ipic 14 8>;
  251. interrupt-parent = < &ipic >;
  252. interrupts = <42 8>;
  253. bus-range = <0 0>;
  254. ranges = <02000000 0 b0000000 b0000000 0 10000000
  255. 42000000 0 a0000000 a0000000 0 10000000
  256. 01000000 0 00000000 e2100000 0 00100000>;
  257. clock-frequency = <3f940aa>;
  258. #interrupt-cells = <1>;
  259. #size-cells = <2>;
  260. #address-cells = <3>;
  261. reg = <8600 100>;
  262. compatible = "83xx";
  263. device_type = "pci";
  264. };
  265. /* May need to remove if on a part without crypto engine */
  266. crypto@30000 {
  267. device_type = "crypto";
  268. model = "SEC2";
  269. compatible = "talitos";
  270. reg = <30000 10000>;
  271. interrupts = <b 8>;
  272. interrupt-parent = < &ipic >;
  273. num-channels = <4>;
  274. channel-fifo-len = <18>;
  275. exec-units-mask = <0000007e>;
  276. /* desc mask is for rev2.0,
  277. * we need runtime fixup for >2.0 */
  278. descriptor-types-mask = <01010ebf>;
  279. };
  280. /* IPIC
  281. * interrupts cell = <intr #, sense>
  282. * sense values match linux IORESOURCE_IRQ_* defines:
  283. * sense == 8: Level, low assertion
  284. * sense == 2: Edge, high-to-low change
  285. */
  286. ipic: pic@700 {
  287. interrupt-controller;
  288. #address-cells = <0>;
  289. #interrupt-cells = <2>;
  290. reg = <700 100>;
  291. built-in;
  292. device_type = "ipic";
  293. };
  294. };
  295. };