mpc8313erdb.dts 4.7 KB

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  1. /*
  2. * MPC8313E RDB Device Tree Source
  3. *
  4. * Copyright 2005, 2006, 2007 Freescale Semiconductor Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. */
  11. / {
  12. model = "MPC8313ERDB";
  13. compatible = "MPC8313ERDB", "MPC831xRDB", "MPC83xxRDB";
  14. #address-cells = <1>;
  15. #size-cells = <1>;
  16. cpus {
  17. #address-cells = <1>;
  18. #size-cells = <0>;
  19. PowerPC,8313@0 {
  20. device_type = "cpu";
  21. reg = <0>;
  22. d-cache-line-size = <20>; // 32 bytes
  23. i-cache-line-size = <20>; // 32 bytes
  24. d-cache-size = <4000>; // L1, 16K
  25. i-cache-size = <4000>; // L1, 16K
  26. timebase-frequency = <0>; // from bootloader
  27. bus-frequency = <0>; // from bootloader
  28. clock-frequency = <0>; // from bootloader
  29. 32-bit;
  30. };
  31. };
  32. memory {
  33. device_type = "memory";
  34. reg = <00000000 08000000>; // 128MB at 0
  35. };
  36. soc8313@e0000000 {
  37. #address-cells = <1>;
  38. #size-cells = <1>;
  39. #interrupt-cells = <2>;
  40. device_type = "soc";
  41. ranges = <0 e0000000 00100000>;
  42. reg = <e0000000 00000200>;
  43. bus-frequency = <0>;
  44. wdt@200 {
  45. device_type = "watchdog";
  46. compatible = "mpc83xx_wdt";
  47. reg = <200 100>;
  48. };
  49. i2c@3000 {
  50. device_type = "i2c";
  51. compatible = "fsl-i2c";
  52. reg = <3000 100>;
  53. interrupts = <e 8>;
  54. interrupt-parent = < &ipic >;
  55. dfsrr;
  56. };
  57. i2c@3100 {
  58. device_type = "i2c";
  59. compatible = "fsl-i2c";
  60. reg = <3100 100>;
  61. interrupts = <f 8>;
  62. interrupt-parent = < &ipic >;
  63. dfsrr;
  64. };
  65. spi@7000 {
  66. device_type = "spi";
  67. compatible = "mpc83xx_spi";
  68. reg = <7000 1000>;
  69. interrupts = <10 8>;
  70. interrupt-parent = < &ipic >;
  71. mode = <0>;
  72. };
  73. /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
  74. usb@23000 {
  75. device_type = "usb";
  76. compatible = "fsl-usb2-dr";
  77. reg = <23000 1000>;
  78. #address-cells = <1>;
  79. #size-cells = <0>;
  80. interrupt-parent = < &ipic >;
  81. interrupts = <26 8>;
  82. phy_type = "utmi_wide";
  83. };
  84. mdio@24520 {
  85. device_type = "mdio";
  86. compatible = "gianfar";
  87. reg = <24520 20>;
  88. #address-cells = <1>;
  89. #size-cells = <0>;
  90. phy1: ethernet-phy@1 {
  91. interrupt-parent = < &ipic >;
  92. interrupts = <13 8>;
  93. reg = <1>;
  94. device_type = "ethernet-phy";
  95. };
  96. phy4: ethernet-phy@4 {
  97. interrupt-parent = < &ipic >;
  98. interrupts = <14 8>;
  99. reg = <4>;
  100. device_type = "ethernet-phy";
  101. };
  102. };
  103. ethernet@24000 {
  104. device_type = "network";
  105. model = "eTSEC";
  106. compatible = "gianfar";
  107. reg = <24000 1000>;
  108. local-mac-address = [ 00 00 00 00 00 00 ];
  109. interrupts = <25 8 24 8 23 8>;
  110. interrupt-parent = < &ipic >;
  111. phy-handle = < &phy1 >;
  112. };
  113. ethernet@25000 {
  114. device_type = "network";
  115. model = "eTSEC";
  116. compatible = "gianfar";
  117. reg = <25000 1000>;
  118. local-mac-address = [ 00 00 00 00 00 00 ];
  119. interrupts = <22 8 21 8 20 8>;
  120. interrupt-parent = < &ipic >;
  121. phy-handle = < &phy4 >;
  122. };
  123. serial@4500 {
  124. device_type = "serial";
  125. compatible = "ns16550";
  126. reg = <4500 100>;
  127. clock-frequency = <0>;
  128. interrupts = <9 8>;
  129. interrupt-parent = < &ipic >;
  130. };
  131. serial@4600 {
  132. device_type = "serial";
  133. compatible = "ns16550";
  134. reg = <4600 100>;
  135. clock-frequency = <0>;
  136. interrupts = <a 8>;
  137. interrupt-parent = < &ipic >;
  138. };
  139. pci@8500 {
  140. interrupt-map-mask = <f800 0 0 7>;
  141. interrupt-map = <
  142. /* IDSEL 0x0E -mini PCI */
  143. 7000 0 0 1 &ipic 12 8
  144. 7000 0 0 2 &ipic 12 8
  145. 7000 0 0 3 &ipic 12 8
  146. 7000 0 0 4 &ipic 12 8
  147. /* IDSEL 0x0F - PCI slot */
  148. 7800 0 0 1 &ipic 11 8
  149. 7800 0 0 2 &ipic 12 8
  150. 7800 0 0 3 &ipic 11 8
  151. 7800 0 0 4 &ipic 12 8>;
  152. interrupt-parent = < &ipic >;
  153. interrupts = <42 8>;
  154. bus-range = <0 0>;
  155. ranges = <02000000 0 90000000 90000000 0 10000000
  156. 42000000 0 80000000 80000000 0 10000000
  157. 01000000 0 00000000 e2000000 0 00100000>;
  158. clock-frequency = <3f940aa>;
  159. #interrupt-cells = <1>;
  160. #size-cells = <2>;
  161. #address-cells = <3>;
  162. reg = <8500 100>;
  163. compatible = "83xx";
  164. device_type = "pci";
  165. };
  166. crypto@30000 {
  167. device_type = "crypto";
  168. model = "SEC2";
  169. compatible = "talitos";
  170. reg = <30000 7000>;
  171. interrupts = <b 8>;
  172. interrupt-parent = < &ipic >;
  173. /* Rev. 2.2 */
  174. num-channels = <1>;
  175. channel-fifo-len = <18>;
  176. exec-units-mask = <0000004c>;
  177. descriptor-types-mask = <0122003f>;
  178. };
  179. /* IPIC
  180. * interrupts cell = <intr #, sense>
  181. * sense values match linux IORESOURCE_IRQ_* defines:
  182. * sense == 8: Level, low assertion
  183. * sense == 2: Edge, high-to-low change
  184. */
  185. ipic: pic@700 {
  186. interrupt-controller;
  187. #address-cells = <0>;
  188. #interrupt-cells = <2>;
  189. reg = <700 100>;
  190. built-in;
  191. device_type = "ipic";
  192. };
  193. };
  194. };