mpc8272ads.dts 8.9 KB

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  1. /*
  2. * MPC8272 ADS Device Tree Source
  3. *
  4. * Copyright 2005 Freescale Semiconductor Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. */
  11. / {
  12. model = "MPC8272ADS";
  13. compatible = "MPC8260ADS";
  14. #address-cells = <1>;
  15. #size-cells = <1>;
  16. linux,phandle = <100>;
  17. cpus {
  18. #address-cells = <1>;
  19. #size-cells = <0>;
  20. linux,phandle = <200>;
  21. PowerPC,8272@0 {
  22. device_type = "cpu";
  23. reg = <0>;
  24. d-cache-line-size = <20>; // 32 bytes
  25. i-cache-line-size = <20>; // 32 bytes
  26. d-cache-size = <4000>; // L1, 16K
  27. i-cache-size = <4000>; // L1, 16K
  28. timebase-frequency = <0>;
  29. bus-frequency = <0>;
  30. clock-frequency = <0>;
  31. 32-bit;
  32. linux,phandle = <201>;
  33. };
  34. };
  35. interrupt-controller@f8200000 {
  36. linux,phandle = <f8200000>;
  37. #address-cells = <0>;
  38. #interrupt-cells = <2>;
  39. interrupt-controller;
  40. reg = <f8200000 f8200004>;
  41. built-in;
  42. device_type = "pci-pic";
  43. };
  44. memory {
  45. device_type = "memory";
  46. linux,phandle = <300>;
  47. reg = <00000000 4000000 f4500000 00000020>;
  48. };
  49. chosen {
  50. name = "chosen";
  51. linux,platform = <0>;
  52. interrupt-controller = <10c00>;
  53. linux,phandle = <400>;
  54. };
  55. soc8272@f0000000 {
  56. #address-cells = <1>;
  57. #size-cells = <1>;
  58. #interrupt-cells = <2>;
  59. device_type = "soc";
  60. ranges = <00000000 f0000000 00053000>;
  61. reg = <f0000000 10000>;
  62. mdio@0 {
  63. device_type = "mdio";
  64. compatible = "fs_enet";
  65. reg = <0 0>;
  66. linux,phandle = <24520>;
  67. #address-cells = <1>;
  68. #size-cells = <0>;
  69. ethernet-phy@0 {
  70. linux,phandle = <2452000>;
  71. interrupt-parent = <10c00>;
  72. interrupts = <17 4>;
  73. reg = <0>;
  74. bitbang = [ 12 12 13 02 02 01 ];
  75. device_type = "ethernet-phy";
  76. };
  77. ethernet-phy@1 {
  78. linux,phandle = <2452001>;
  79. interrupt-parent = <10c00>;
  80. interrupts = <17 4>;
  81. bitbang = [ 12 12 13 02 02 01 ];
  82. reg = <3>;
  83. device_type = "ethernet-phy";
  84. };
  85. };
  86. ethernet@24000 {
  87. #address-cells = <1>;
  88. #size-cells = <0>;
  89. device_type = "network";
  90. device-id = <1>;
  91. compatible = "fs_enet";
  92. model = "FCC";
  93. reg = <11300 20 8400 100 11380 30>;
  94. mac-address = [ 00 11 2F 99 43 54 ];
  95. interrupts = <20 2>;
  96. interrupt-parent = <10c00>;
  97. phy-handle = <2452000>;
  98. rx-clock = <13>;
  99. tx-clock = <12>;
  100. };
  101. ethernet@25000 {
  102. device_type = "network";
  103. device-id = <2>;
  104. compatible = "fs_enet";
  105. model = "FCC";
  106. reg = <11320 20 8500 100 113b0 30>;
  107. mac-address = [ 00 11 2F 99 44 54 ];
  108. interrupts = <21 2>;
  109. interrupt-parent = <10c00>;
  110. phy-handle = <2452001>;
  111. rx-clock = <17>;
  112. tx-clock = <18>;
  113. };
  114. cpm@f0000000 {
  115. linux,phandle = <f0000000>;
  116. #address-cells = <1>;
  117. #size-cells = <1>;
  118. #interrupt-cells = <2>;
  119. device_type = "cpm";
  120. model = "CPM2";
  121. ranges = <00000000 00000000 20000>;
  122. reg = <0 20000>;
  123. command-proc = <119c0>;
  124. brg-frequency = <17D7840>;
  125. cpm_clk = <BEBC200>;
  126. scc@11a00 {
  127. device_type = "serial";
  128. compatible = "cpm_uart";
  129. model = "SCC";
  130. device-id = <1>;
  131. reg = <11a00 20 8000 100>;
  132. current-speed = <1c200>;
  133. interrupts = <28 2>;
  134. interrupt-parent = <10c00>;
  135. clock-setup = <0 00ffffff>;
  136. rx-clock = <1>;
  137. tx-clock = <1>;
  138. };
  139. scc@11a60 {
  140. device_type = "serial";
  141. compatible = "cpm_uart";
  142. model = "SCC";
  143. device-id = <4>;
  144. reg = <11a60 20 8300 100>;
  145. current-speed = <1c200>;
  146. interrupts = <2b 2>;
  147. interrupt-parent = <10c00>;
  148. clock-setup = <1b ffffff00>;
  149. rx-clock = <4>;
  150. tx-clock = <4>;
  151. };
  152. };
  153. interrupt-controller@10c00 {
  154. linux,phandle = <10c00>;
  155. #address-cells = <0>;
  156. #interrupt-cells = <2>;
  157. interrupt-controller;
  158. reg = <10c00 80>;
  159. built-in;
  160. device_type = "cpm-pic";
  161. compatible = "CPM2";
  162. };
  163. pci@0500 {
  164. linux,phandle = <0500>;
  165. #interrupt-cells = <1>;
  166. #size-cells = <2>;
  167. #address-cells = <3>;
  168. compatible = "8272";
  169. device_type = "pci";
  170. reg = <10430 4dc>;
  171. clock-frequency = <3f940aa>;
  172. interrupt-map-mask = <f800 0 0 7>;
  173. interrupt-map = <
  174. /* IDSEL 0x16 */
  175. b000 0 0 1 f8200000 40 8
  176. b000 0 0 2 f8200000 41 8
  177. b000 0 0 3 f8200000 42 8
  178. b000 0 0 4 f8200000 43 8
  179. /* IDSEL 0x17 */
  180. b800 0 0 1 f8200000 43 8
  181. b800 0 0 2 f8200000 40 8
  182. b800 0 0 3 f8200000 41 8
  183. b800 0 0 4 f8200000 42 8
  184. /* IDSEL 0x18 */
  185. c000 0 0 1 f8200000 42 8
  186. c000 0 0 2 f8200000 43 8
  187. c000 0 0 3 f8200000 40 8
  188. c000 0 0 4 f8200000 41 8>;
  189. interrupt-parent = <10c00>;
  190. interrupts = <14 8>;
  191. bus-range = <0 0>;
  192. ranges = <02000000 0 80000000 80000000 0 40000000
  193. 01000000 0 00000000 f6000000 0 02000000>;
  194. };
  195. /* May need to remove if on a part without crypto engine */
  196. crypto@30000 {
  197. device_type = "crypto";
  198. model = "SEC2";
  199. compatible = "talitos";
  200. reg = <30000 10000>;
  201. interrupts = <b 2>;
  202. interrupt-parent = <10c00>;
  203. num-channels = <4>;
  204. channel-fifo-len = <18>;
  205. exec-units-mask = <0000007e>;
  206. /* desc mask is for rev1.x, we need runtime fixup for >=2.x */
  207. descriptor-types-mask = <01010ebf>;
  208. };
  209. };
  210. };