processor.c 11 KB

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  1. /* $Id: processor.c,v 1.1 2002/07/20 16:27:06 rhirst Exp $
  2. *
  3. * Initial setup-routines for HP 9000 based hardware.
  4. *
  5. * Copyright (C) 1991, 1992, 1995 Linus Torvalds
  6. * Modifications for PA-RISC (C) 1999 Helge Deller <deller@gmx.de>
  7. * Modifications copyright 1999 SuSE GmbH (Philipp Rumpf)
  8. * Modifications copyright 2000 Martin K. Petersen <mkp@mkp.net>
  9. * Modifications copyright 2000 Philipp Rumpf <prumpf@tux.org>
  10. * Modifications copyright 2001 Ryan Bradetich <rbradetich@uswest.net>
  11. *
  12. * Initial PA-RISC Version: 04-23-1999 by Helge Deller
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by
  16. * the Free Software Foundation; either version 2, or (at your option)
  17. * any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful,
  20. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  22. * GNU General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License
  25. * along with this program; if not, write to the Free Software
  26. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  27. *
  28. */
  29. #include <linux/delay.h>
  30. #include <linux/init.h>
  31. #include <linux/mm.h>
  32. #include <linux/module.h>
  33. #include <linux/seq_file.h>
  34. #include <linux/slab.h>
  35. #include <linux/cpu.h>
  36. #include <asm/cache.h>
  37. #include <asm/hardware.h> /* for register_parisc_driver() stuff */
  38. #include <asm/processor.h>
  39. #include <asm/page.h>
  40. #include <asm/pdc.h>
  41. #include <asm/pdcpat.h>
  42. #include <asm/irq.h> /* for struct irq_region */
  43. #include <asm/parisc-device.h>
  44. struct system_cpuinfo_parisc boot_cpu_data __read_mostly;
  45. EXPORT_SYMBOL(boot_cpu_data);
  46. struct cpuinfo_parisc cpu_data[NR_CPUS] __read_mostly;
  47. extern int update_cr16_clocksource(void); /* from time.c */
  48. /*
  49. ** PARISC CPU driver - claim "device" and initialize CPU data structures.
  50. **
  51. ** Consolidate per CPU initialization into (mostly) one module.
  52. ** Monarch CPU will initialize boot_cpu_data which shouldn't
  53. ** change once the system has booted.
  54. **
  55. ** The callback *should* do per-instance initialization of
  56. ** everything including the monarch. "Per CPU" init code in
  57. ** setup.c:start_parisc() has migrated here and start_parisc()
  58. ** will call register_parisc_driver(&cpu_driver) before calling do_inventory().
  59. **
  60. ** The goal of consolidating CPU initialization into one place is
  61. ** to make sure all CPU's get initialized the same way.
  62. ** The code path not shared is how PDC hands control of the CPU to the OS.
  63. ** The initialization of OS data structures is the same (done below).
  64. */
  65. /**
  66. * processor_probe - Determine if processor driver should claim this device.
  67. * @dev: The device which has been found.
  68. *
  69. * Determine if processor driver should claim this chip (return 0) or not
  70. * (return 1). If so, initialize the chip and tell other partners in crime
  71. * they have work to do.
  72. */
  73. static int __init processor_probe(struct parisc_device *dev)
  74. {
  75. unsigned long txn_addr;
  76. unsigned long cpuid;
  77. struct cpuinfo_parisc *p;
  78. #ifndef CONFIG_SMP
  79. if (boot_cpu_data.cpu_count > 0) {
  80. printk(KERN_INFO "CONFIG_SMP=n ignoring additional CPUs\n");
  81. return 1;
  82. }
  83. #endif
  84. /* logical CPU ID and update global counter
  85. * May get overwritten by PAT code.
  86. */
  87. cpuid = boot_cpu_data.cpu_count;
  88. txn_addr = dev->hpa.start; /* for legacy PDC */
  89. #ifdef CONFIG_64BIT
  90. if (is_pdc_pat()) {
  91. ulong status;
  92. unsigned long bytecnt;
  93. pdc_pat_cell_mod_maddr_block_t pa_pdc_cell;
  94. #undef USE_PAT_CPUID
  95. #ifdef USE_PAT_CPUID
  96. struct pdc_pat_cpu_num cpu_info;
  97. #endif
  98. status = pdc_pat_cell_module(&bytecnt, dev->pcell_loc,
  99. dev->mod_index, PA_VIEW, &pa_pdc_cell);
  100. BUG_ON(PDC_OK != status);
  101. /* verify it's the same as what do_pat_inventory() found */
  102. BUG_ON(dev->mod_info != pa_pdc_cell.mod_info);
  103. BUG_ON(dev->pmod_loc != pa_pdc_cell.mod_location);
  104. txn_addr = pa_pdc_cell.mod[0]; /* id_eid for IO sapic */
  105. #ifdef USE_PAT_CPUID
  106. /* We need contiguous numbers for cpuid. Firmware's notion
  107. * of cpuid is for physical CPUs and we just don't care yet.
  108. * We'll care when we need to query PAT PDC about a CPU *after*
  109. * boot time (ie shutdown a CPU from an OS perspective).
  110. */
  111. /* get the cpu number */
  112. status = pdc_pat_cpu_get_number(&cpu_info, dev->hpa.start);
  113. BUG_ON(PDC_OK != status);
  114. if (cpu_info.cpu_num >= NR_CPUS) {
  115. printk(KERN_WARNING "IGNORING CPU at 0x%x,"
  116. " cpu_slot_id > NR_CPUS"
  117. " (%ld > %d)\n",
  118. dev->hpa.start, cpu_info.cpu_num, NR_CPUS);
  119. /* Ignore CPU since it will only crash */
  120. boot_cpu_data.cpu_count--;
  121. return 1;
  122. } else {
  123. cpuid = cpu_info.cpu_num;
  124. }
  125. #endif
  126. }
  127. #endif
  128. p = &cpu_data[cpuid];
  129. boot_cpu_data.cpu_count++;
  130. /* initialize counters - CPU 0 gets it_value set in time_init() */
  131. if (cpuid)
  132. memset(p, 0, sizeof(struct cpuinfo_parisc));
  133. p->loops_per_jiffy = loops_per_jiffy;
  134. p->dev = dev; /* Save IODC data in case we need it */
  135. p->hpa = dev->hpa.start; /* save CPU hpa */
  136. p->cpuid = cpuid; /* save CPU id */
  137. p->txn_addr = txn_addr; /* save CPU IRQ address */
  138. #ifdef CONFIG_SMP
  139. /*
  140. ** FIXME: review if any other initialization is clobbered
  141. ** for boot_cpu by the above memset().
  142. */
  143. /* stolen from init_percpu_prof() */
  144. cpu_data[cpuid].prof_counter = 1;
  145. cpu_data[cpuid].prof_multiplier = 1;
  146. #endif
  147. /*
  148. ** CONFIG_SMP: init_smp_config() will attempt to get CPU's into
  149. ** OS control. RENDEZVOUS is the default state - see mem_set above.
  150. ** p->state = STATE_RENDEZVOUS;
  151. */
  152. #if 0
  153. /* CPU 0 IRQ table is statically allocated/initialized */
  154. if (cpuid) {
  155. struct irqaction actions[];
  156. /*
  157. ** itimer and ipi IRQ handlers are statically initialized in
  158. ** arch/parisc/kernel/irq.c. ie Don't need to register them.
  159. */
  160. actions = kmalloc(sizeof(struct irqaction)*MAX_CPU_IRQ, GFP_ATOMIC);
  161. if (!actions) {
  162. /* not getting it's own table, share with monarch */
  163. actions = cpu_irq_actions[0];
  164. }
  165. cpu_irq_actions[cpuid] = actions;
  166. }
  167. #endif
  168. /*
  169. * Bring this CPU up now! (ignore bootstrap cpuid == 0)
  170. */
  171. #ifdef CONFIG_SMP
  172. if (cpuid) {
  173. cpu_set(cpuid, cpu_present_map);
  174. cpu_up(cpuid);
  175. }
  176. #endif
  177. /* If we've registered more than one cpu,
  178. * we'll use the jiffies clocksource since cr16
  179. * is not synchronized between CPUs.
  180. */
  181. update_cr16_clocksource();
  182. return 0;
  183. }
  184. /**
  185. * collect_boot_cpu_data - Fill the boot_cpu_data structure.
  186. *
  187. * This function collects and stores the generic processor information
  188. * in the boot_cpu_data structure.
  189. */
  190. void __init collect_boot_cpu_data(void)
  191. {
  192. memset(&boot_cpu_data, 0, sizeof(boot_cpu_data));
  193. boot_cpu_data.cpu_hz = 100 * PAGE0->mem_10msec; /* Hz of this PARISC */
  194. /* get CPU-Model Information... */
  195. #define p ((unsigned long *)&boot_cpu_data.pdc.model)
  196. if (pdc_model_info(&boot_cpu_data.pdc.model) == PDC_OK)
  197. printk(KERN_INFO
  198. "model %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
  199. p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7], p[8]);
  200. #undef p
  201. if (pdc_model_versions(&boot_cpu_data.pdc.versions, 0) == PDC_OK)
  202. printk(KERN_INFO "vers %08lx\n",
  203. boot_cpu_data.pdc.versions);
  204. if (pdc_model_cpuid(&boot_cpu_data.pdc.cpuid) == PDC_OK)
  205. printk(KERN_INFO "CPUID vers %ld rev %ld (0x%08lx)\n",
  206. (boot_cpu_data.pdc.cpuid >> 5) & 127,
  207. boot_cpu_data.pdc.cpuid & 31,
  208. boot_cpu_data.pdc.cpuid);
  209. if (pdc_model_capabilities(&boot_cpu_data.pdc.capabilities) == PDC_OK)
  210. printk(KERN_INFO "capabilities 0x%lx\n",
  211. boot_cpu_data.pdc.capabilities);
  212. if (pdc_model_sysmodel(boot_cpu_data.pdc.sys_model_name) == PDC_OK)
  213. printk(KERN_INFO "model %s\n",
  214. boot_cpu_data.pdc.sys_model_name);
  215. boot_cpu_data.hversion = boot_cpu_data.pdc.model.hversion;
  216. boot_cpu_data.sversion = boot_cpu_data.pdc.model.sversion;
  217. boot_cpu_data.cpu_type = parisc_get_cpu_type(boot_cpu_data.hversion);
  218. boot_cpu_data.cpu_name = cpu_name_version[boot_cpu_data.cpu_type][0];
  219. boot_cpu_data.family_name = cpu_name_version[boot_cpu_data.cpu_type][1];
  220. }
  221. /**
  222. * init_cpu_profiler - enable/setup per cpu profiling hooks.
  223. * @cpunum: The processor instance.
  224. *
  225. * FIXME: doesn't do much yet...
  226. */
  227. static inline void __init
  228. init_percpu_prof(int cpunum)
  229. {
  230. cpu_data[cpunum].prof_counter = 1;
  231. cpu_data[cpunum].prof_multiplier = 1;
  232. }
  233. /**
  234. * init_per_cpu - Handle individual processor initializations.
  235. * @cpunum: logical processor number.
  236. *
  237. * This function handles initialization for *every* CPU
  238. * in the system:
  239. *
  240. * o Set "default" CPU width for trap handlers
  241. *
  242. * o Enable FP coprocessor
  243. * REVISIT: this could be done in the "code 22" trap handler.
  244. * (frowands idea - that way we know which processes need FP
  245. * registers saved on the interrupt stack.)
  246. * NEWS FLASH: wide kernels need FP coprocessor enabled to handle
  247. * formatted printing of %lx for example (double divides I think)
  248. *
  249. * o Enable CPU profiling hooks.
  250. */
  251. int __init init_per_cpu(int cpunum)
  252. {
  253. int ret;
  254. struct pdc_coproc_cfg coproc_cfg;
  255. set_firmware_width();
  256. ret = pdc_coproc_cfg(&coproc_cfg);
  257. if(ret >= 0 && coproc_cfg.ccr_functional) {
  258. mtctl(coproc_cfg.ccr_functional, 10); /* 10 == Coprocessor Control Reg */
  259. /* FWIW, FP rev/model is a more accurate way to determine
  260. ** CPU type. CPU rev/model has some ambiguous cases.
  261. */
  262. cpu_data[cpunum].fp_rev = coproc_cfg.revision;
  263. cpu_data[cpunum].fp_model = coproc_cfg.model;
  264. printk(KERN_INFO "FP[%d] enabled: Rev %ld Model %ld\n",
  265. cpunum, coproc_cfg.revision, coproc_cfg.model);
  266. /*
  267. ** store status register to stack (hopefully aligned)
  268. ** and clear the T-bit.
  269. */
  270. asm volatile ("fstd %fr0,8(%sp)");
  271. } else {
  272. printk(KERN_WARNING "WARNING: No FP CoProcessor?!"
  273. " (coproc_cfg.ccr_functional == 0x%lx, expected 0xc0)\n"
  274. #ifdef CONFIG_64BIT
  275. "Halting Machine - FP required\n"
  276. #endif
  277. , coproc_cfg.ccr_functional);
  278. #ifdef CONFIG_64BIT
  279. mdelay(100); /* previous chars get pushed to console */
  280. panic("FP CoProc not reported");
  281. #endif
  282. }
  283. /* FUTURE: Enable Performance Monitor : ccr bit 0x20 */
  284. init_percpu_prof(cpunum);
  285. return ret;
  286. }
  287. /*
  288. * Display cpu info for all cpu's.
  289. */
  290. int
  291. show_cpuinfo (struct seq_file *m, void *v)
  292. {
  293. int n;
  294. for(n=0; n<boot_cpu_data.cpu_count; n++) {
  295. #ifdef CONFIG_SMP
  296. if (0 == cpu_data[n].hpa)
  297. continue;
  298. #endif
  299. seq_printf(m, "processor\t: %d\n"
  300. "cpu family\t: PA-RISC %s\n",
  301. n, boot_cpu_data.family_name);
  302. seq_printf(m, "cpu\t\t: %s\n", boot_cpu_data.cpu_name );
  303. /* cpu MHz */
  304. seq_printf(m, "cpu MHz\t\t: %d.%06d\n",
  305. boot_cpu_data.cpu_hz / 1000000,
  306. boot_cpu_data.cpu_hz % 1000000 );
  307. seq_printf(m, "model\t\t: %s\n"
  308. "model name\t: %s\n",
  309. boot_cpu_data.pdc.sys_model_name,
  310. cpu_data[n].dev ?
  311. cpu_data[n].dev->name : "Unknown" );
  312. seq_printf(m, "hversion\t: 0x%08x\n"
  313. "sversion\t: 0x%08x\n",
  314. boot_cpu_data.hversion,
  315. boot_cpu_data.sversion );
  316. /* print cachesize info */
  317. show_cache_info(m);
  318. seq_printf(m, "bogomips\t: %lu.%02lu\n",
  319. cpu_data[n].loops_per_jiffy / (500000 / HZ),
  320. (cpu_data[n].loops_per_jiffy / (5000 / HZ)) % 100);
  321. seq_printf(m, "software id\t: %ld\n\n",
  322. boot_cpu_data.pdc.model.sw_id);
  323. }
  324. return 0;
  325. }
  326. static struct parisc_device_id processor_tbl[] __read_mostly = {
  327. { HPHW_NPROC, HVERSION_REV_ANY_ID, HVERSION_ANY_ID, SVERSION_ANY_ID },
  328. { 0, }
  329. };
  330. static struct parisc_driver cpu_driver __read_mostly = {
  331. .name = "CPU",
  332. .id_table = processor_tbl,
  333. .probe = processor_probe
  334. };
  335. /**
  336. * processor_init - Processor initalization procedure.
  337. *
  338. * Register this driver.
  339. */
  340. void __init processor_init(void)
  341. {
  342. register_parisc_driver(&cpu_driver);
  343. }