platform.c 4.7 KB

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  1. #include <linux/delay.h>
  2. #include <linux/if_ether.h>
  3. #include <linux/ioport.h>
  4. #include <linux/mv643xx.h>
  5. #include <linux/platform_device.h>
  6. #include "ocelot_3_fpga.h"
  7. #if defined(CONFIG_MV643XX_ETH) || defined(CONFIG_MV643XX_ETH_MODULE)
  8. static struct resource mv643xx_eth_shared_resources[] = {
  9. [0] = {
  10. .name = "ethernet shared base",
  11. .start = 0xf1000000 + MV643XX_ETH_SHARED_REGS,
  12. .end = 0xf1000000 + MV643XX_ETH_SHARED_REGS +
  13. MV643XX_ETH_SHARED_REGS_SIZE - 1,
  14. .flags = IORESOURCE_MEM,
  15. },
  16. };
  17. static struct platform_device mv643xx_eth_shared_device = {
  18. .name = MV643XX_ETH_SHARED_NAME,
  19. .id = 0,
  20. .num_resources = ARRAY_SIZE(mv643xx_eth_shared_resources),
  21. .resource = mv643xx_eth_shared_resources,
  22. };
  23. #define MV_SRAM_BASE 0xfe000000UL
  24. #define MV_SRAM_SIZE (256 * 1024)
  25. #define MV_SRAM_RXRING_SIZE (MV_SRAM_SIZE / 4)
  26. #define MV_SRAM_TXRING_SIZE (MV_SRAM_SIZE / 4)
  27. #define MV_SRAM_BASE_ETH0 MV_SRAM_BASE
  28. #define MV_SRAM_BASE_ETH1 (MV_SRAM_BASE + (MV_SRAM_SIZE / 2))
  29. #define MV64x60_IRQ_ETH_0 48
  30. #define MV64x60_IRQ_ETH_1 49
  31. #define MV64x60_IRQ_ETH_2 50
  32. static struct resource mv64x60_eth0_resources[] = {
  33. [0] = {
  34. .name = "eth0 irq",
  35. .start = MV64x60_IRQ_ETH_0,
  36. .end = MV64x60_IRQ_ETH_0,
  37. .flags = IORESOURCE_IRQ,
  38. },
  39. };
  40. static struct mv643xx_eth_platform_data eth0_pd = {
  41. .port_number = 0,
  42. .tx_sram_addr = MV_SRAM_BASE_ETH0,
  43. .tx_sram_size = MV_SRAM_TXRING_SIZE,
  44. .tx_queue_size = MV_SRAM_TXRING_SIZE / 16,
  45. .rx_sram_addr = MV_SRAM_BASE_ETH0 + MV_SRAM_TXRING_SIZE,
  46. .rx_sram_size = MV_SRAM_RXRING_SIZE,
  47. .rx_queue_size = MV_SRAM_RXRING_SIZE / 16,
  48. };
  49. static struct platform_device eth0_device = {
  50. .name = MV643XX_ETH_NAME,
  51. .id = 0,
  52. .num_resources = ARRAY_SIZE(mv64x60_eth0_resources),
  53. .resource = mv64x60_eth0_resources,
  54. .dev = {
  55. .platform_data = &eth0_pd,
  56. },
  57. };
  58. static struct resource mv64x60_eth1_resources[] = {
  59. [0] = {
  60. .name = "eth1 irq",
  61. .start = MV64x60_IRQ_ETH_1,
  62. .end = MV64x60_IRQ_ETH_1,
  63. .flags = IORESOURCE_IRQ,
  64. },
  65. };
  66. static struct mv643xx_eth_platform_data eth1_pd = {
  67. .port_number = 1,
  68. .tx_sram_addr = MV_SRAM_BASE_ETH1,
  69. .tx_sram_size = MV_SRAM_TXRING_SIZE,
  70. .tx_queue_size = MV_SRAM_TXRING_SIZE / 16,
  71. .rx_sram_addr = MV_SRAM_BASE_ETH1 + MV_SRAM_TXRING_SIZE,
  72. .rx_sram_size = MV_SRAM_RXRING_SIZE,
  73. .rx_queue_size = MV_SRAM_RXRING_SIZE / 16,
  74. };
  75. static struct platform_device eth1_device = {
  76. .name = MV643XX_ETH_NAME,
  77. .id = 1,
  78. .num_resources = ARRAY_SIZE(mv64x60_eth1_resources),
  79. .resource = mv64x60_eth1_resources,
  80. .dev = {
  81. .platform_data = &eth1_pd,
  82. },
  83. };
  84. static struct resource mv64x60_eth2_resources[] = {
  85. [0] = {
  86. .name = "eth2 irq",
  87. .start = MV64x60_IRQ_ETH_2,
  88. .end = MV64x60_IRQ_ETH_2,
  89. .flags = IORESOURCE_IRQ,
  90. },
  91. };
  92. static struct mv643xx_eth_platform_data eth2_pd = {
  93. .port_number = 2,
  94. };
  95. static struct platform_device eth2_device = {
  96. .name = MV643XX_ETH_NAME,
  97. .id = 2,
  98. .num_resources = ARRAY_SIZE(mv64x60_eth2_resources),
  99. .resource = mv64x60_eth2_resources,
  100. .dev = {
  101. .platform_data = &eth2_pd,
  102. },
  103. };
  104. static struct platform_device *mv643xx_eth_pd_devs[] __initdata = {
  105. &mv643xx_eth_shared_device,
  106. &eth0_device,
  107. &eth1_device,
  108. &eth2_device,
  109. };
  110. static u8 __init exchange_bit(u8 val, u8 cs)
  111. {
  112. /* place the data */
  113. OCELOT_FPGA_WRITE((val << 2) | cs, EEPROM_MODE);
  114. udelay(1);
  115. /* turn the clock on */
  116. OCELOT_FPGA_WRITE((val << 2) | cs | 0x2, EEPROM_MODE);
  117. udelay(1);
  118. /* turn the clock off and read-strobe */
  119. OCELOT_FPGA_WRITE((val << 2) | cs | 0x10, EEPROM_MODE);
  120. /* return the data */
  121. return (OCELOT_FPGA_READ(EEPROM_MODE) >> 3) & 0x1;
  122. }
  123. static void __init get_mac(char dest[6])
  124. {
  125. u8 read_opcode[12] = {1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
  126. int i,j;
  127. for (i = 0; i < 12; i++)
  128. exchange_bit(read_opcode[i], 1);
  129. for (j = 0; j < 6; j++) {
  130. dest[j] = 0;
  131. for (i = 0; i < 8; i++) {
  132. dest[j] <<= 1;
  133. dest[j] |= exchange_bit(0, 1);
  134. }
  135. }
  136. /* turn off CS */
  137. exchange_bit(0,0);
  138. }
  139. /*
  140. * Copy and increment ethernet MAC address by a small value.
  141. *
  142. * This is useful for systems where the only one MAC address is stored in
  143. * non-volatile memory for multiple ports.
  144. */
  145. static inline void eth_mac_add(unsigned char *dst, unsigned char *src,
  146. unsigned int add)
  147. {
  148. int i;
  149. BUG_ON(add >= 256);
  150. for (i = ETH_ALEN; i >= 0; i--) {
  151. dst[i] = src[i] + add;
  152. add = dst[i] < src[i]; /* compute carry */
  153. }
  154. WARN_ON(add);
  155. }
  156. static int __init mv643xx_eth_add_pds(void)
  157. {
  158. unsigned char mac[ETH_ALEN];
  159. int ret;
  160. get_mac(mac);
  161. eth_mac_add(eth0_pd.mac_addr, mac, 0);
  162. eth_mac_add(eth1_pd.mac_addr, mac, 1);
  163. eth_mac_add(eth2_pd.mac_addr, mac, 2);
  164. ret = platform_add_devices(mv643xx_eth_pd_devs,
  165. ARRAY_SIZE(mv643xx_eth_pd_devs));
  166. return ret;
  167. }
  168. device_initcall(mv643xx_eth_add_pds);
  169. #endif /* defined(CONFIG_MV643XX_ETH) || defined(CONFIG_MV643XX_ETH_MODULE) */