process.c 22 KB

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  1. /*
  2. * Architecture-specific setup.
  3. *
  4. * Copyright (C) 1998-2003 Hewlett-Packard Co
  5. * David Mosberger-Tang <davidm@hpl.hp.com>
  6. * 04/11/17 Ashok Raj <ashok.raj@intel.com> Added CPU Hotplug Support
  7. *
  8. * 2005-10-07 Keith Owens <kaos@sgi.com>
  9. * Add notify_die() hooks.
  10. */
  11. #include <linux/cpu.h>
  12. #include <linux/pm.h>
  13. #include <linux/elf.h>
  14. #include <linux/errno.h>
  15. #include <linux/kallsyms.h>
  16. #include <linux/kernel.h>
  17. #include <linux/mm.h>
  18. #include <linux/module.h>
  19. #include <linux/notifier.h>
  20. #include <linux/personality.h>
  21. #include <linux/sched.h>
  22. #include <linux/slab.h>
  23. #include <linux/stddef.h>
  24. #include <linux/thread_info.h>
  25. #include <linux/unistd.h>
  26. #include <linux/efi.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/delay.h>
  29. #include <linux/kdebug.h>
  30. #include <asm/cpu.h>
  31. #include <asm/delay.h>
  32. #include <asm/elf.h>
  33. #include <asm/ia32.h>
  34. #include <asm/irq.h>
  35. #include <asm/kexec.h>
  36. #include <asm/pgalloc.h>
  37. #include <asm/processor.h>
  38. #include <asm/sal.h>
  39. #include <asm/tlbflush.h>
  40. #include <asm/uaccess.h>
  41. #include <asm/unwind.h>
  42. #include <asm/user.h>
  43. #include "entry.h"
  44. #ifdef CONFIG_PERFMON
  45. # include <asm/perfmon.h>
  46. #endif
  47. #include "sigframe.h"
  48. void (*ia64_mark_idle)(int);
  49. static DEFINE_PER_CPU(unsigned int, cpu_idle_state);
  50. unsigned long boot_option_idle_override = 0;
  51. EXPORT_SYMBOL(boot_option_idle_override);
  52. void
  53. ia64_do_show_stack (struct unw_frame_info *info, void *arg)
  54. {
  55. unsigned long ip, sp, bsp;
  56. char buf[128]; /* don't make it so big that it overflows the stack! */
  57. printk("\nCall Trace:\n");
  58. do {
  59. unw_get_ip(info, &ip);
  60. if (ip == 0)
  61. break;
  62. unw_get_sp(info, &sp);
  63. unw_get_bsp(info, &bsp);
  64. snprintf(buf, sizeof(buf),
  65. " [<%016lx>] %%s\n"
  66. " sp=%016lx bsp=%016lx\n",
  67. ip, sp, bsp);
  68. print_symbol(buf, ip);
  69. } while (unw_unwind(info) >= 0);
  70. }
  71. void
  72. show_stack (struct task_struct *task, unsigned long *sp)
  73. {
  74. if (!task)
  75. unw_init_running(ia64_do_show_stack, NULL);
  76. else {
  77. struct unw_frame_info info;
  78. unw_init_from_blocked_task(&info, task);
  79. ia64_do_show_stack(&info, NULL);
  80. }
  81. }
  82. void
  83. dump_stack (void)
  84. {
  85. show_stack(NULL, NULL);
  86. }
  87. EXPORT_SYMBOL(dump_stack);
  88. void
  89. show_regs (struct pt_regs *regs)
  90. {
  91. unsigned long ip = regs->cr_iip + ia64_psr(regs)->ri;
  92. print_modules();
  93. printk("\nPid: %d, CPU %d, comm: %20s\n", current->pid, smp_processor_id(), current->comm);
  94. printk("psr : %016lx ifs : %016lx ip : [<%016lx>] %s\n",
  95. regs->cr_ipsr, regs->cr_ifs, ip, print_tainted());
  96. print_symbol("ip is at %s\n", ip);
  97. printk("unat: %016lx pfs : %016lx rsc : %016lx\n",
  98. regs->ar_unat, regs->ar_pfs, regs->ar_rsc);
  99. printk("rnat: %016lx bsps: %016lx pr : %016lx\n",
  100. regs->ar_rnat, regs->ar_bspstore, regs->pr);
  101. printk("ldrs: %016lx ccv : %016lx fpsr: %016lx\n",
  102. regs->loadrs, regs->ar_ccv, regs->ar_fpsr);
  103. printk("csd : %016lx ssd : %016lx\n", regs->ar_csd, regs->ar_ssd);
  104. printk("b0 : %016lx b6 : %016lx b7 : %016lx\n", regs->b0, regs->b6, regs->b7);
  105. printk("f6 : %05lx%016lx f7 : %05lx%016lx\n",
  106. regs->f6.u.bits[1], regs->f6.u.bits[0],
  107. regs->f7.u.bits[1], regs->f7.u.bits[0]);
  108. printk("f8 : %05lx%016lx f9 : %05lx%016lx\n",
  109. regs->f8.u.bits[1], regs->f8.u.bits[0],
  110. regs->f9.u.bits[1], regs->f9.u.bits[0]);
  111. printk("f10 : %05lx%016lx f11 : %05lx%016lx\n",
  112. regs->f10.u.bits[1], regs->f10.u.bits[0],
  113. regs->f11.u.bits[1], regs->f11.u.bits[0]);
  114. printk("r1 : %016lx r2 : %016lx r3 : %016lx\n", regs->r1, regs->r2, regs->r3);
  115. printk("r8 : %016lx r9 : %016lx r10 : %016lx\n", regs->r8, regs->r9, regs->r10);
  116. printk("r11 : %016lx r12 : %016lx r13 : %016lx\n", regs->r11, regs->r12, regs->r13);
  117. printk("r14 : %016lx r15 : %016lx r16 : %016lx\n", regs->r14, regs->r15, regs->r16);
  118. printk("r17 : %016lx r18 : %016lx r19 : %016lx\n", regs->r17, regs->r18, regs->r19);
  119. printk("r20 : %016lx r21 : %016lx r22 : %016lx\n", regs->r20, regs->r21, regs->r22);
  120. printk("r23 : %016lx r24 : %016lx r25 : %016lx\n", regs->r23, regs->r24, regs->r25);
  121. printk("r26 : %016lx r27 : %016lx r28 : %016lx\n", regs->r26, regs->r27, regs->r28);
  122. printk("r29 : %016lx r30 : %016lx r31 : %016lx\n", regs->r29, regs->r30, regs->r31);
  123. if (user_mode(regs)) {
  124. /* print the stacked registers */
  125. unsigned long val, *bsp, ndirty;
  126. int i, sof, is_nat = 0;
  127. sof = regs->cr_ifs & 0x7f; /* size of frame */
  128. ndirty = (regs->loadrs >> 19);
  129. bsp = ia64_rse_skip_regs((unsigned long *) regs->ar_bspstore, ndirty);
  130. for (i = 0; i < sof; ++i) {
  131. get_user(val, (unsigned long __user *) ia64_rse_skip_regs(bsp, i));
  132. printk("r%-3u:%c%016lx%s", 32 + i, is_nat ? '*' : ' ', val,
  133. ((i == sof - 1) || (i % 3) == 2) ? "\n" : " ");
  134. }
  135. } else
  136. show_stack(NULL, NULL);
  137. }
  138. void
  139. do_notify_resume_user (sigset_t *unused, struct sigscratch *scr, long in_syscall)
  140. {
  141. if (fsys_mode(current, &scr->pt)) {
  142. /* defer signal-handling etc. until we return to privilege-level 0. */
  143. if (!ia64_psr(&scr->pt)->lp)
  144. ia64_psr(&scr->pt)->lp = 1;
  145. return;
  146. }
  147. #ifdef CONFIG_PERFMON
  148. if (current->thread.pfm_needs_checking)
  149. pfm_handle_work();
  150. #endif
  151. /* deal with pending signal delivery */
  152. if (test_thread_flag(TIF_SIGPENDING)||test_thread_flag(TIF_RESTORE_SIGMASK))
  153. ia64_do_signal(scr, in_syscall);
  154. }
  155. static int pal_halt = 1;
  156. static int can_do_pal_halt = 1;
  157. static int __init nohalt_setup(char * str)
  158. {
  159. pal_halt = can_do_pal_halt = 0;
  160. return 1;
  161. }
  162. __setup("nohalt", nohalt_setup);
  163. void
  164. update_pal_halt_status(int status)
  165. {
  166. can_do_pal_halt = pal_halt && status;
  167. }
  168. /*
  169. * We use this if we don't have any better idle routine..
  170. */
  171. void
  172. default_idle (void)
  173. {
  174. local_irq_enable();
  175. while (!need_resched()) {
  176. if (can_do_pal_halt)
  177. safe_halt();
  178. else
  179. cpu_relax();
  180. }
  181. }
  182. #ifdef CONFIG_HOTPLUG_CPU
  183. /* We don't actually take CPU down, just spin without interrupts. */
  184. static inline void play_dead(void)
  185. {
  186. extern void ia64_cpu_local_tick (void);
  187. unsigned int this_cpu = smp_processor_id();
  188. /* Ack it */
  189. __get_cpu_var(cpu_state) = CPU_DEAD;
  190. max_xtp();
  191. local_irq_disable();
  192. idle_task_exit();
  193. ia64_jump_to_sal(&sal_boot_rendez_state[this_cpu]);
  194. /*
  195. * The above is a point of no-return, the processor is
  196. * expected to be in SAL loop now.
  197. */
  198. BUG();
  199. }
  200. #else
  201. static inline void play_dead(void)
  202. {
  203. BUG();
  204. }
  205. #endif /* CONFIG_HOTPLUG_CPU */
  206. void cpu_idle_wait(void)
  207. {
  208. unsigned int cpu, this_cpu = get_cpu();
  209. cpumask_t map;
  210. cpumask_t tmp = current->cpus_allowed;
  211. set_cpus_allowed(current, cpumask_of_cpu(this_cpu));
  212. put_cpu();
  213. cpus_clear(map);
  214. for_each_online_cpu(cpu) {
  215. per_cpu(cpu_idle_state, cpu) = 1;
  216. cpu_set(cpu, map);
  217. }
  218. __get_cpu_var(cpu_idle_state) = 0;
  219. wmb();
  220. do {
  221. ssleep(1);
  222. for_each_online_cpu(cpu) {
  223. if (cpu_isset(cpu, map) && !per_cpu(cpu_idle_state, cpu))
  224. cpu_clear(cpu, map);
  225. }
  226. cpus_and(map, map, cpu_online_map);
  227. } while (!cpus_empty(map));
  228. set_cpus_allowed(current, tmp);
  229. }
  230. EXPORT_SYMBOL_GPL(cpu_idle_wait);
  231. void __attribute__((noreturn))
  232. cpu_idle (void)
  233. {
  234. void (*mark_idle)(int) = ia64_mark_idle;
  235. int cpu = smp_processor_id();
  236. /* endless idle loop with no priority at all */
  237. while (1) {
  238. if (can_do_pal_halt) {
  239. current_thread_info()->status &= ~TS_POLLING;
  240. /*
  241. * TS_POLLING-cleared state must be visible before we
  242. * test NEED_RESCHED:
  243. */
  244. smp_mb();
  245. } else {
  246. current_thread_info()->status |= TS_POLLING;
  247. }
  248. if (!need_resched()) {
  249. void (*idle)(void);
  250. #ifdef CONFIG_SMP
  251. min_xtp();
  252. #endif
  253. if (__get_cpu_var(cpu_idle_state))
  254. __get_cpu_var(cpu_idle_state) = 0;
  255. rmb();
  256. if (mark_idle)
  257. (*mark_idle)(1);
  258. idle = pm_idle;
  259. if (!idle)
  260. idle = default_idle;
  261. (*idle)();
  262. if (mark_idle)
  263. (*mark_idle)(0);
  264. #ifdef CONFIG_SMP
  265. normal_xtp();
  266. #endif
  267. }
  268. preempt_enable_no_resched();
  269. schedule();
  270. preempt_disable();
  271. check_pgt_cache();
  272. if (cpu_is_offline(cpu))
  273. play_dead();
  274. }
  275. }
  276. void
  277. ia64_save_extra (struct task_struct *task)
  278. {
  279. #ifdef CONFIG_PERFMON
  280. unsigned long info;
  281. #endif
  282. if ((task->thread.flags & IA64_THREAD_DBG_VALID) != 0)
  283. ia64_save_debug_regs(&task->thread.dbr[0]);
  284. #ifdef CONFIG_PERFMON
  285. if ((task->thread.flags & IA64_THREAD_PM_VALID) != 0)
  286. pfm_save_regs(task);
  287. info = __get_cpu_var(pfm_syst_info);
  288. if (info & PFM_CPUINFO_SYST_WIDE)
  289. pfm_syst_wide_update_task(task, info, 0);
  290. #endif
  291. #ifdef CONFIG_IA32_SUPPORT
  292. if (IS_IA32_PROCESS(task_pt_regs(task)))
  293. ia32_save_state(task);
  294. #endif
  295. }
  296. void
  297. ia64_load_extra (struct task_struct *task)
  298. {
  299. #ifdef CONFIG_PERFMON
  300. unsigned long info;
  301. #endif
  302. if ((task->thread.flags & IA64_THREAD_DBG_VALID) != 0)
  303. ia64_load_debug_regs(&task->thread.dbr[0]);
  304. #ifdef CONFIG_PERFMON
  305. if ((task->thread.flags & IA64_THREAD_PM_VALID) != 0)
  306. pfm_load_regs(task);
  307. info = __get_cpu_var(pfm_syst_info);
  308. if (info & PFM_CPUINFO_SYST_WIDE)
  309. pfm_syst_wide_update_task(task, info, 1);
  310. #endif
  311. #ifdef CONFIG_IA32_SUPPORT
  312. if (IS_IA32_PROCESS(task_pt_regs(task)))
  313. ia32_load_state(task);
  314. #endif
  315. }
  316. /*
  317. * Copy the state of an ia-64 thread.
  318. *
  319. * We get here through the following call chain:
  320. *
  321. * from user-level: from kernel:
  322. *
  323. * <clone syscall> <some kernel call frames>
  324. * sys_clone :
  325. * do_fork do_fork
  326. * copy_thread copy_thread
  327. *
  328. * This means that the stack layout is as follows:
  329. *
  330. * +---------------------+ (highest addr)
  331. * | struct pt_regs |
  332. * +---------------------+
  333. * | struct switch_stack |
  334. * +---------------------+
  335. * | |
  336. * | memory stack |
  337. * | | <-- sp (lowest addr)
  338. * +---------------------+
  339. *
  340. * Observe that we copy the unat values that are in pt_regs and switch_stack. Spilling an
  341. * integer to address X causes bit N in ar.unat to be set to the NaT bit of the register,
  342. * with N=(X & 0x1ff)/8. Thus, copying the unat value preserves the NaT bits ONLY if the
  343. * pt_regs structure in the parent is congruent to that of the child, modulo 512. Since
  344. * the stack is page aligned and the page size is at least 4KB, this is always the case,
  345. * so there is nothing to worry about.
  346. */
  347. int
  348. copy_thread (int nr, unsigned long clone_flags,
  349. unsigned long user_stack_base, unsigned long user_stack_size,
  350. struct task_struct *p, struct pt_regs *regs)
  351. {
  352. extern char ia64_ret_from_clone, ia32_ret_from_clone;
  353. struct switch_stack *child_stack, *stack;
  354. unsigned long rbs, child_rbs, rbs_size;
  355. struct pt_regs *child_ptregs;
  356. int retval = 0;
  357. #ifdef CONFIG_SMP
  358. /*
  359. * For SMP idle threads, fork_by_hand() calls do_fork with
  360. * NULL regs.
  361. */
  362. if (!regs)
  363. return 0;
  364. #endif
  365. stack = ((struct switch_stack *) regs) - 1;
  366. child_ptregs = (struct pt_regs *) ((unsigned long) p + IA64_STK_OFFSET) - 1;
  367. child_stack = (struct switch_stack *) child_ptregs - 1;
  368. /* copy parent's switch_stack & pt_regs to child: */
  369. memcpy(child_stack, stack, sizeof(*child_ptregs) + sizeof(*child_stack));
  370. rbs = (unsigned long) current + IA64_RBS_OFFSET;
  371. child_rbs = (unsigned long) p + IA64_RBS_OFFSET;
  372. rbs_size = stack->ar_bspstore - rbs;
  373. /* copy the parent's register backing store to the child: */
  374. memcpy((void *) child_rbs, (void *) rbs, rbs_size);
  375. if (likely(user_mode(child_ptregs))) {
  376. if ((clone_flags & CLONE_SETTLS) && !IS_IA32_PROCESS(regs))
  377. child_ptregs->r13 = regs->r16; /* see sys_clone2() in entry.S */
  378. if (user_stack_base) {
  379. child_ptregs->r12 = user_stack_base + user_stack_size - 16;
  380. child_ptregs->ar_bspstore = user_stack_base;
  381. child_ptregs->ar_rnat = 0;
  382. child_ptregs->loadrs = 0;
  383. }
  384. } else {
  385. /*
  386. * Note: we simply preserve the relative position of
  387. * the stack pointer here. There is no need to
  388. * allocate a scratch area here, since that will have
  389. * been taken care of by the caller of sys_clone()
  390. * already.
  391. */
  392. child_ptregs->r12 = (unsigned long) child_ptregs - 16; /* kernel sp */
  393. child_ptregs->r13 = (unsigned long) p; /* set `current' pointer */
  394. }
  395. child_stack->ar_bspstore = child_rbs + rbs_size;
  396. if (IS_IA32_PROCESS(regs))
  397. child_stack->b0 = (unsigned long) &ia32_ret_from_clone;
  398. else
  399. child_stack->b0 = (unsigned long) &ia64_ret_from_clone;
  400. /* copy parts of thread_struct: */
  401. p->thread.ksp = (unsigned long) child_stack - 16;
  402. /* stop some PSR bits from being inherited.
  403. * the psr.up/psr.pp bits must be cleared on fork but inherited on execve()
  404. * therefore we must specify them explicitly here and not include them in
  405. * IA64_PSR_BITS_TO_CLEAR.
  406. */
  407. child_ptregs->cr_ipsr = ((child_ptregs->cr_ipsr | IA64_PSR_BITS_TO_SET)
  408. & ~(IA64_PSR_BITS_TO_CLEAR | IA64_PSR_PP | IA64_PSR_UP));
  409. /*
  410. * NOTE: The calling convention considers all floating point
  411. * registers in the high partition (fph) to be scratch. Since
  412. * the only way to get to this point is through a system call,
  413. * we know that the values in fph are all dead. Hence, there
  414. * is no need to inherit the fph state from the parent to the
  415. * child and all we have to do is to make sure that
  416. * IA64_THREAD_FPH_VALID is cleared in the child.
  417. *
  418. * XXX We could push this optimization a bit further by
  419. * clearing IA64_THREAD_FPH_VALID on ANY system call.
  420. * However, it's not clear this is worth doing. Also, it
  421. * would be a slight deviation from the normal Linux system
  422. * call behavior where scratch registers are preserved across
  423. * system calls (unless used by the system call itself).
  424. */
  425. # define THREAD_FLAGS_TO_CLEAR (IA64_THREAD_FPH_VALID | IA64_THREAD_DBG_VALID \
  426. | IA64_THREAD_PM_VALID)
  427. # define THREAD_FLAGS_TO_SET 0
  428. p->thread.flags = ((current->thread.flags & ~THREAD_FLAGS_TO_CLEAR)
  429. | THREAD_FLAGS_TO_SET);
  430. ia64_drop_fpu(p); /* don't pick up stale state from a CPU's fph */
  431. #ifdef CONFIG_IA32_SUPPORT
  432. /*
  433. * If we're cloning an IA32 task then save the IA32 extra
  434. * state from the current task to the new task
  435. */
  436. if (IS_IA32_PROCESS(task_pt_regs(current))) {
  437. ia32_save_state(p);
  438. if (clone_flags & CLONE_SETTLS)
  439. retval = ia32_clone_tls(p, child_ptregs);
  440. /* Copy partially mapped page list */
  441. if (!retval)
  442. retval = ia32_copy_partial_page_list(p, clone_flags);
  443. }
  444. #endif
  445. #ifdef CONFIG_PERFMON
  446. if (current->thread.pfm_context)
  447. pfm_inherit(p, child_ptregs);
  448. #endif
  449. return retval;
  450. }
  451. static void
  452. do_copy_task_regs (struct task_struct *task, struct unw_frame_info *info, void *arg)
  453. {
  454. unsigned long mask, sp, nat_bits = 0, ip, ar_rnat, urbs_end, cfm;
  455. elf_greg_t *dst = arg;
  456. struct pt_regs *pt;
  457. char nat;
  458. int i;
  459. memset(dst, 0, sizeof(elf_gregset_t)); /* don't leak any kernel bits to user-level */
  460. if (unw_unwind_to_user(info) < 0)
  461. return;
  462. unw_get_sp(info, &sp);
  463. pt = (struct pt_regs *) (sp + 16);
  464. urbs_end = ia64_get_user_rbs_end(task, pt, &cfm);
  465. if (ia64_sync_user_rbs(task, info->sw, pt->ar_bspstore, urbs_end) < 0)
  466. return;
  467. ia64_peek(task, info->sw, urbs_end, (long) ia64_rse_rnat_addr((long *) urbs_end),
  468. &ar_rnat);
  469. /*
  470. * coredump format:
  471. * r0-r31
  472. * NaT bits (for r0-r31; bit N == 1 iff rN is a NaT)
  473. * predicate registers (p0-p63)
  474. * b0-b7
  475. * ip cfm user-mask
  476. * ar.rsc ar.bsp ar.bspstore ar.rnat
  477. * ar.ccv ar.unat ar.fpsr ar.pfs ar.lc ar.ec
  478. */
  479. /* r0 is zero */
  480. for (i = 1, mask = (1UL << i); i < 32; ++i) {
  481. unw_get_gr(info, i, &dst[i], &nat);
  482. if (nat)
  483. nat_bits |= mask;
  484. mask <<= 1;
  485. }
  486. dst[32] = nat_bits;
  487. unw_get_pr(info, &dst[33]);
  488. for (i = 0; i < 8; ++i)
  489. unw_get_br(info, i, &dst[34 + i]);
  490. unw_get_rp(info, &ip);
  491. dst[42] = ip + ia64_psr(pt)->ri;
  492. dst[43] = cfm;
  493. dst[44] = pt->cr_ipsr & IA64_PSR_UM;
  494. unw_get_ar(info, UNW_AR_RSC, &dst[45]);
  495. /*
  496. * For bsp and bspstore, unw_get_ar() would return the kernel
  497. * addresses, but we need the user-level addresses instead:
  498. */
  499. dst[46] = urbs_end; /* note: by convention PT_AR_BSP points to the end of the urbs! */
  500. dst[47] = pt->ar_bspstore;
  501. dst[48] = ar_rnat;
  502. unw_get_ar(info, UNW_AR_CCV, &dst[49]);
  503. unw_get_ar(info, UNW_AR_UNAT, &dst[50]);
  504. unw_get_ar(info, UNW_AR_FPSR, &dst[51]);
  505. dst[52] = pt->ar_pfs; /* UNW_AR_PFS is == to pt->cr_ifs for interrupt frames */
  506. unw_get_ar(info, UNW_AR_LC, &dst[53]);
  507. unw_get_ar(info, UNW_AR_EC, &dst[54]);
  508. unw_get_ar(info, UNW_AR_CSD, &dst[55]);
  509. unw_get_ar(info, UNW_AR_SSD, &dst[56]);
  510. }
  511. void
  512. do_dump_task_fpu (struct task_struct *task, struct unw_frame_info *info, void *arg)
  513. {
  514. elf_fpreg_t *dst = arg;
  515. int i;
  516. memset(dst, 0, sizeof(elf_fpregset_t)); /* don't leak any "random" bits */
  517. if (unw_unwind_to_user(info) < 0)
  518. return;
  519. /* f0 is 0.0, f1 is 1.0 */
  520. for (i = 2; i < 32; ++i)
  521. unw_get_fr(info, i, dst + i);
  522. ia64_flush_fph(task);
  523. if ((task->thread.flags & IA64_THREAD_FPH_VALID) != 0)
  524. memcpy(dst + 32, task->thread.fph, 96*16);
  525. }
  526. void
  527. do_copy_regs (struct unw_frame_info *info, void *arg)
  528. {
  529. do_copy_task_regs(current, info, arg);
  530. }
  531. void
  532. do_dump_fpu (struct unw_frame_info *info, void *arg)
  533. {
  534. do_dump_task_fpu(current, info, arg);
  535. }
  536. int
  537. dump_task_regs(struct task_struct *task, elf_gregset_t *regs)
  538. {
  539. struct unw_frame_info tcore_info;
  540. if (current == task) {
  541. unw_init_running(do_copy_regs, regs);
  542. } else {
  543. memset(&tcore_info, 0, sizeof(tcore_info));
  544. unw_init_from_blocked_task(&tcore_info, task);
  545. do_copy_task_regs(task, &tcore_info, regs);
  546. }
  547. return 1;
  548. }
  549. void
  550. ia64_elf_core_copy_regs (struct pt_regs *pt, elf_gregset_t dst)
  551. {
  552. unw_init_running(do_copy_regs, dst);
  553. }
  554. int
  555. dump_task_fpu (struct task_struct *task, elf_fpregset_t *dst)
  556. {
  557. struct unw_frame_info tcore_info;
  558. if (current == task) {
  559. unw_init_running(do_dump_fpu, dst);
  560. } else {
  561. memset(&tcore_info, 0, sizeof(tcore_info));
  562. unw_init_from_blocked_task(&tcore_info, task);
  563. do_dump_task_fpu(task, &tcore_info, dst);
  564. }
  565. return 1;
  566. }
  567. int
  568. dump_fpu (struct pt_regs *pt, elf_fpregset_t dst)
  569. {
  570. unw_init_running(do_dump_fpu, dst);
  571. return 1; /* f0-f31 are always valid so we always return 1 */
  572. }
  573. long
  574. sys_execve (char __user *filename, char __user * __user *argv, char __user * __user *envp,
  575. struct pt_regs *regs)
  576. {
  577. char *fname;
  578. int error;
  579. fname = getname(filename);
  580. error = PTR_ERR(fname);
  581. if (IS_ERR(fname))
  582. goto out;
  583. error = do_execve(fname, argv, envp, regs);
  584. putname(fname);
  585. out:
  586. return error;
  587. }
  588. pid_t
  589. kernel_thread (int (*fn)(void *), void *arg, unsigned long flags)
  590. {
  591. extern void start_kernel_thread (void);
  592. unsigned long *helper_fptr = (unsigned long *) &start_kernel_thread;
  593. struct {
  594. struct switch_stack sw;
  595. struct pt_regs pt;
  596. } regs;
  597. memset(&regs, 0, sizeof(regs));
  598. regs.pt.cr_iip = helper_fptr[0]; /* set entry point (IP) */
  599. regs.pt.r1 = helper_fptr[1]; /* set GP */
  600. regs.pt.r9 = (unsigned long) fn; /* 1st argument */
  601. regs.pt.r11 = (unsigned long) arg; /* 2nd argument */
  602. /* Preserve PSR bits, except for bits 32-34 and 37-45, which we can't read. */
  603. regs.pt.cr_ipsr = ia64_getreg(_IA64_REG_PSR) | IA64_PSR_BN;
  604. regs.pt.cr_ifs = 1UL << 63; /* mark as valid, empty frame */
  605. regs.sw.ar_fpsr = regs.pt.ar_fpsr = ia64_getreg(_IA64_REG_AR_FPSR);
  606. regs.sw.ar_bspstore = (unsigned long) current + IA64_RBS_OFFSET;
  607. regs.sw.pr = (1 << PRED_KERNEL_STACK);
  608. return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, &regs.pt, 0, NULL, NULL);
  609. }
  610. EXPORT_SYMBOL(kernel_thread);
  611. /* This gets called from kernel_thread() via ia64_invoke_thread_helper(). */
  612. int
  613. kernel_thread_helper (int (*fn)(void *), void *arg)
  614. {
  615. #ifdef CONFIG_IA32_SUPPORT
  616. if (IS_IA32_PROCESS(task_pt_regs(current))) {
  617. /* A kernel thread is always a 64-bit process. */
  618. current->thread.map_base = DEFAULT_MAP_BASE;
  619. current->thread.task_size = DEFAULT_TASK_SIZE;
  620. ia64_set_kr(IA64_KR_IO_BASE, current->thread.old_iob);
  621. ia64_set_kr(IA64_KR_TSSD, current->thread.old_k1);
  622. }
  623. #endif
  624. return (*fn)(arg);
  625. }
  626. /*
  627. * Flush thread state. This is called when a thread does an execve().
  628. */
  629. void
  630. flush_thread (void)
  631. {
  632. /* drop floating-point and debug-register state if it exists: */
  633. current->thread.flags &= ~(IA64_THREAD_FPH_VALID | IA64_THREAD_DBG_VALID);
  634. ia64_drop_fpu(current);
  635. #ifdef CONFIG_IA32_SUPPORT
  636. if (IS_IA32_PROCESS(task_pt_regs(current))) {
  637. ia32_drop_partial_page_list(current);
  638. current->thread.task_size = IA32_PAGE_OFFSET;
  639. set_fs(USER_DS);
  640. }
  641. #endif
  642. }
  643. /*
  644. * Clean up state associated with current thread. This is called when
  645. * the thread calls exit().
  646. */
  647. void
  648. exit_thread (void)
  649. {
  650. ia64_drop_fpu(current);
  651. #ifdef CONFIG_PERFMON
  652. /* if needed, stop monitoring and flush state to perfmon context */
  653. if (current->thread.pfm_context)
  654. pfm_exit_thread(current);
  655. /* free debug register resources */
  656. if (current->thread.flags & IA64_THREAD_DBG_VALID)
  657. pfm_release_debug_registers(current);
  658. #endif
  659. if (IS_IA32_PROCESS(task_pt_regs(current)))
  660. ia32_drop_partial_page_list(current);
  661. }
  662. unsigned long
  663. get_wchan (struct task_struct *p)
  664. {
  665. struct unw_frame_info info;
  666. unsigned long ip;
  667. int count = 0;
  668. /*
  669. * Note: p may not be a blocked task (it could be current or
  670. * another process running on some other CPU. Rather than
  671. * trying to determine if p is really blocked, we just assume
  672. * it's blocked and rely on the unwind routines to fail
  673. * gracefully if the process wasn't really blocked after all.
  674. * --davidm 99/12/15
  675. */
  676. unw_init_from_blocked_task(&info, p);
  677. do {
  678. if (unw_unwind(&info) < 0)
  679. return 0;
  680. unw_get_ip(&info, &ip);
  681. if (!in_sched_functions(ip))
  682. return ip;
  683. } while (count++ < 16);
  684. return 0;
  685. }
  686. void
  687. cpu_halt (void)
  688. {
  689. pal_power_mgmt_info_u_t power_info[8];
  690. unsigned long min_power;
  691. int i, min_power_state;
  692. if (ia64_pal_halt_info(power_info) != 0)
  693. return;
  694. min_power_state = 0;
  695. min_power = power_info[0].pal_power_mgmt_info_s.power_consumption;
  696. for (i = 1; i < 8; ++i)
  697. if (power_info[i].pal_power_mgmt_info_s.im
  698. && power_info[i].pal_power_mgmt_info_s.power_consumption < min_power) {
  699. min_power = power_info[i].pal_power_mgmt_info_s.power_consumption;
  700. min_power_state = i;
  701. }
  702. while (1)
  703. ia64_pal_halt(min_power_state);
  704. }
  705. void machine_shutdown(void)
  706. {
  707. #ifdef CONFIG_HOTPLUG_CPU
  708. int cpu;
  709. for_each_online_cpu(cpu) {
  710. if (cpu != smp_processor_id())
  711. cpu_down(cpu);
  712. }
  713. #endif
  714. #ifdef CONFIG_KEXEC
  715. kexec_disable_iosapic();
  716. #endif
  717. }
  718. void
  719. machine_restart (char *restart_cmd)
  720. {
  721. (void) notify_die(DIE_MACHINE_RESTART, restart_cmd, NULL, 0, 0, 0);
  722. (*efi.reset_system)(EFI_RESET_WARM, 0, 0, NULL);
  723. }
  724. void
  725. machine_halt (void)
  726. {
  727. (void) notify_die(DIE_MACHINE_HALT, "", NULL, 0, 0, 0);
  728. cpu_halt();
  729. }
  730. void
  731. machine_power_off (void)
  732. {
  733. if (pm_power_off)
  734. pm_power_off();
  735. machine_halt();
  736. }