tsc.c 8.7 KB

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  1. /*
  2. * This code largely moved from arch/i386/kernel/timer/timer_tsc.c
  3. * which was originally moved from arch/i386/kernel/time.c.
  4. * See comments there for proper credits.
  5. */
  6. #include <linux/clocksource.h>
  7. #include <linux/workqueue.h>
  8. #include <linux/cpufreq.h>
  9. #include <linux/jiffies.h>
  10. #include <linux/init.h>
  11. #include <linux/dmi.h>
  12. #include <asm/delay.h>
  13. #include <asm/tsc.h>
  14. #include <asm/io.h>
  15. #include <asm/timer.h>
  16. #include "mach_timer.h"
  17. static int tsc_enabled;
  18. /*
  19. * On some systems the TSC frequency does not
  20. * change with the cpu frequency. So we need
  21. * an extra value to store the TSC freq
  22. */
  23. unsigned int tsc_khz;
  24. int tsc_disable;
  25. #ifdef CONFIG_X86_TSC
  26. static int __init tsc_setup(char *str)
  27. {
  28. printk(KERN_WARNING "notsc: Kernel compiled with CONFIG_X86_TSC, "
  29. "cannot disable TSC.\n");
  30. return 1;
  31. }
  32. #else
  33. /*
  34. * disable flag for tsc. Takes effect by clearing the TSC cpu flag
  35. * in cpu/common.c
  36. */
  37. static int __init tsc_setup(char *str)
  38. {
  39. tsc_disable = 1;
  40. return 1;
  41. }
  42. #endif
  43. __setup("notsc", tsc_setup);
  44. /*
  45. * code to mark and check if the TSC is unstable
  46. * due to cpufreq or due to unsynced TSCs
  47. */
  48. static int tsc_unstable;
  49. static inline int check_tsc_unstable(void)
  50. {
  51. return tsc_unstable;
  52. }
  53. /* Accellerators for sched_clock()
  54. * convert from cycles(64bits) => nanoseconds (64bits)
  55. * basic equation:
  56. * ns = cycles / (freq / ns_per_sec)
  57. * ns = cycles * (ns_per_sec / freq)
  58. * ns = cycles * (10^9 / (cpu_khz * 10^3))
  59. * ns = cycles * (10^6 / cpu_khz)
  60. *
  61. * Then we use scaling math (suggested by george@mvista.com) to get:
  62. * ns = cycles * (10^6 * SC / cpu_khz) / SC
  63. * ns = cycles * cyc2ns_scale / SC
  64. *
  65. * And since SC is a constant power of two, we can convert the div
  66. * into a shift.
  67. *
  68. * We can use khz divisor instead of mhz to keep a better percision, since
  69. * cyc2ns_scale is limited to 10^6 * 2^10, which fits in 32 bits.
  70. * (mathieu.desnoyers@polymtl.ca)
  71. *
  72. * -johnstul@us.ibm.com "math is hard, lets go shopping!"
  73. */
  74. static unsigned long cyc2ns_scale __read_mostly;
  75. #define CYC2NS_SCALE_FACTOR 10 /* 2^10, carefully chosen */
  76. static inline void set_cyc2ns_scale(unsigned long cpu_khz)
  77. {
  78. cyc2ns_scale = (1000000 << CYC2NS_SCALE_FACTOR)/cpu_khz;
  79. }
  80. static inline unsigned long long cycles_2_ns(unsigned long long cyc)
  81. {
  82. return (cyc * cyc2ns_scale) >> CYC2NS_SCALE_FACTOR;
  83. }
  84. /*
  85. * Scheduler clock - returns current time in nanosec units.
  86. */
  87. unsigned long long sched_clock(void)
  88. {
  89. unsigned long long this_offset;
  90. /*
  91. * Fall back to jiffies if there's no TSC available:
  92. */
  93. if (unlikely(!tsc_enabled))
  94. /* No locking but a rare wrong value is not a big deal: */
  95. return (jiffies_64 - INITIAL_JIFFIES) * (1000000000 / HZ);
  96. /* read the Time Stamp Counter: */
  97. get_scheduled_cycles(this_offset);
  98. /* return the value in ns */
  99. return cycles_2_ns(this_offset);
  100. }
  101. unsigned long native_calculate_cpu_khz(void)
  102. {
  103. unsigned long long start, end;
  104. unsigned long count;
  105. u64 delta64;
  106. int i;
  107. unsigned long flags;
  108. local_irq_save(flags);
  109. /* run 3 times to ensure the cache is warm */
  110. for (i = 0; i < 3; i++) {
  111. mach_prepare_counter();
  112. rdtscll(start);
  113. mach_countup(&count);
  114. rdtscll(end);
  115. }
  116. /*
  117. * Error: ECTCNEVERSET
  118. * The CTC wasn't reliable: we got a hit on the very first read,
  119. * or the CPU was so fast/slow that the quotient wouldn't fit in
  120. * 32 bits..
  121. */
  122. if (count <= 1)
  123. goto err;
  124. delta64 = end - start;
  125. /* cpu freq too fast: */
  126. if (delta64 > (1ULL<<32))
  127. goto err;
  128. /* cpu freq too slow: */
  129. if (delta64 <= CALIBRATE_TIME_MSEC)
  130. goto err;
  131. delta64 += CALIBRATE_TIME_MSEC/2; /* round for do_div */
  132. do_div(delta64,CALIBRATE_TIME_MSEC);
  133. local_irq_restore(flags);
  134. return (unsigned long)delta64;
  135. err:
  136. local_irq_restore(flags);
  137. return 0;
  138. }
  139. int recalibrate_cpu_khz(void)
  140. {
  141. #ifndef CONFIG_SMP
  142. unsigned long cpu_khz_old = cpu_khz;
  143. if (cpu_has_tsc) {
  144. cpu_khz = calculate_cpu_khz();
  145. tsc_khz = cpu_khz;
  146. cpu_data[0].loops_per_jiffy =
  147. cpufreq_scale(cpu_data[0].loops_per_jiffy,
  148. cpu_khz_old, cpu_khz);
  149. return 0;
  150. } else
  151. return -ENODEV;
  152. #else
  153. return -ENODEV;
  154. #endif
  155. }
  156. EXPORT_SYMBOL(recalibrate_cpu_khz);
  157. #ifdef CONFIG_CPU_FREQ
  158. /*
  159. * if the CPU frequency is scaled, TSC-based delays will need a different
  160. * loops_per_jiffy value to function properly.
  161. */
  162. static unsigned int ref_freq = 0;
  163. static unsigned long loops_per_jiffy_ref = 0;
  164. static unsigned long cpu_khz_ref = 0;
  165. static int
  166. time_cpufreq_notifier(struct notifier_block *nb, unsigned long val, void *data)
  167. {
  168. struct cpufreq_freqs *freq = data;
  169. if (!ref_freq) {
  170. if (!freq->old){
  171. ref_freq = freq->new;
  172. return 0;
  173. }
  174. ref_freq = freq->old;
  175. loops_per_jiffy_ref = cpu_data[freq->cpu].loops_per_jiffy;
  176. cpu_khz_ref = cpu_khz;
  177. }
  178. if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) ||
  179. (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) ||
  180. (val == CPUFREQ_RESUMECHANGE)) {
  181. if (!(freq->flags & CPUFREQ_CONST_LOOPS))
  182. cpu_data[freq->cpu].loops_per_jiffy =
  183. cpufreq_scale(loops_per_jiffy_ref,
  184. ref_freq, freq->new);
  185. if (cpu_khz) {
  186. if (num_online_cpus() == 1)
  187. cpu_khz = cpufreq_scale(cpu_khz_ref,
  188. ref_freq, freq->new);
  189. if (!(freq->flags & CPUFREQ_CONST_LOOPS)) {
  190. tsc_khz = cpu_khz;
  191. set_cyc2ns_scale(cpu_khz);
  192. /*
  193. * TSC based sched_clock turns
  194. * to junk w/ cpufreq
  195. */
  196. mark_tsc_unstable("cpufreq changes");
  197. }
  198. }
  199. }
  200. return 0;
  201. }
  202. static struct notifier_block time_cpufreq_notifier_block = {
  203. .notifier_call = time_cpufreq_notifier
  204. };
  205. static int __init cpufreq_tsc(void)
  206. {
  207. return cpufreq_register_notifier(&time_cpufreq_notifier_block,
  208. CPUFREQ_TRANSITION_NOTIFIER);
  209. }
  210. core_initcall(cpufreq_tsc);
  211. #endif
  212. /* clock source code */
  213. static unsigned long current_tsc_khz = 0;
  214. static cycle_t read_tsc(void)
  215. {
  216. cycle_t ret;
  217. rdtscll(ret);
  218. return ret;
  219. }
  220. static struct clocksource clocksource_tsc = {
  221. .name = "tsc",
  222. .rating = 300,
  223. .read = read_tsc,
  224. .mask = CLOCKSOURCE_MASK(64),
  225. .mult = 0, /* to be set */
  226. .shift = 22,
  227. .flags = CLOCK_SOURCE_IS_CONTINUOUS |
  228. CLOCK_SOURCE_MUST_VERIFY,
  229. };
  230. void mark_tsc_unstable(char *reason)
  231. {
  232. if (!tsc_unstable) {
  233. tsc_unstable = 1;
  234. tsc_enabled = 0;
  235. printk("Marking TSC unstable due to: %s.\n", reason);
  236. /* Can be called before registration */
  237. if (clocksource_tsc.mult)
  238. clocksource_change_rating(&clocksource_tsc, 0);
  239. else
  240. clocksource_tsc.rating = 0;
  241. }
  242. }
  243. EXPORT_SYMBOL_GPL(mark_tsc_unstable);
  244. static int __init dmi_mark_tsc_unstable(struct dmi_system_id *d)
  245. {
  246. printk(KERN_NOTICE "%s detected: marking TSC unstable.\n",
  247. d->ident);
  248. tsc_unstable = 1;
  249. return 0;
  250. }
  251. /* List of systems that have known TSC problems */
  252. static struct dmi_system_id __initdata bad_tsc_dmi_table[] = {
  253. {
  254. .callback = dmi_mark_tsc_unstable,
  255. .ident = "IBM Thinkpad 380XD",
  256. .matches = {
  257. DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
  258. DMI_MATCH(DMI_BOARD_NAME, "2635FA0"),
  259. },
  260. },
  261. {}
  262. };
  263. /*
  264. * Make an educated guess if the TSC is trustworthy and synchronized
  265. * over all CPUs.
  266. */
  267. __cpuinit int unsynchronized_tsc(void)
  268. {
  269. if (!cpu_has_tsc || tsc_unstable)
  270. return 1;
  271. /*
  272. * Intel systems are normally all synchronized.
  273. * Exceptions must mark TSC as unstable:
  274. */
  275. if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) {
  276. /* assume multi socket systems are not synchronized: */
  277. if (num_possible_cpus() > 1)
  278. tsc_unstable = 1;
  279. }
  280. return tsc_unstable;
  281. }
  282. /*
  283. * Geode_LX - the OLPC CPU has a possibly a very reliable TSC
  284. */
  285. #ifdef CONFIG_MGEODE_LX
  286. /* RTSC counts during suspend */
  287. #define RTSC_SUSP 0x100
  288. static void __init check_geode_tsc_reliable(void)
  289. {
  290. unsigned long val;
  291. rdmsrl(MSR_GEODE_BUSCONT_CONF0, val);
  292. if ((val & RTSC_SUSP))
  293. clocksource_tsc.flags &= ~CLOCK_SOURCE_MUST_VERIFY;
  294. }
  295. #else
  296. static inline void check_geode_tsc_reliable(void) { }
  297. #endif
  298. void __init tsc_init(void)
  299. {
  300. if (!cpu_has_tsc || tsc_disable)
  301. goto out_no_tsc;
  302. cpu_khz = calculate_cpu_khz();
  303. tsc_khz = cpu_khz;
  304. if (!cpu_khz)
  305. goto out_no_tsc;
  306. printk("Detected %lu.%03lu MHz processor.\n",
  307. (unsigned long)cpu_khz / 1000,
  308. (unsigned long)cpu_khz % 1000);
  309. set_cyc2ns_scale(cpu_khz);
  310. use_tsc_delay();
  311. /* Check and install the TSC clocksource */
  312. dmi_check_system(bad_tsc_dmi_table);
  313. unsynchronized_tsc();
  314. check_geode_tsc_reliable();
  315. current_tsc_khz = tsc_khz;
  316. clocksource_tsc.mult = clocksource_khz2mult(current_tsc_khz,
  317. clocksource_tsc.shift);
  318. /* lower the rating if we already know its unstable: */
  319. if (check_tsc_unstable()) {
  320. clocksource_tsc.rating = 0;
  321. clocksource_tsc.flags &= ~CLOCK_SOURCE_IS_CONTINUOUS;
  322. } else
  323. tsc_enabled = 1;
  324. clocksource_register(&clocksource_tsc);
  325. return;
  326. out_no_tsc:
  327. /*
  328. * Set the tsc_disable flag if there's no TSC support, this
  329. * makes it a fast flag for the kernel to see whether it
  330. * should be using the TSC.
  331. */
  332. tsc_disable = 1;
  333. }