acpi-cpufreq.c 20 KB

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  1. /*
  2. * acpi-cpufreq.c - ACPI Processor P-States Driver ($Revision: 1.4 $)
  3. *
  4. * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
  5. * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
  6. * Copyright (C) 2002 - 2004 Dominik Brodowski <linux@brodo.de>
  7. * Copyright (C) 2006 Denis Sadykov <denis.m.sadykov@intel.com>
  8. *
  9. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or (at
  14. * your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful, but
  17. * WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  19. * General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License along
  22. * with this program; if not, write to the Free Software Foundation, Inc.,
  23. * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  24. *
  25. * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  26. */
  27. #include <linux/kernel.h>
  28. #include <linux/module.h>
  29. #include <linux/init.h>
  30. #include <linux/smp.h>
  31. #include <linux/sched.h>
  32. #include <linux/cpufreq.h>
  33. #include <linux/compiler.h>
  34. #include <linux/dmi.h>
  35. #include <linux/acpi.h>
  36. #include <acpi/processor.h>
  37. #include <asm/io.h>
  38. #include <asm/msr.h>
  39. #include <asm/processor.h>
  40. #include <asm/cpufeature.h>
  41. #include <asm/delay.h>
  42. #include <asm/uaccess.h>
  43. #define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "acpi-cpufreq", msg)
  44. MODULE_AUTHOR("Paul Diefenbaugh, Dominik Brodowski");
  45. MODULE_DESCRIPTION("ACPI Processor P-States Driver");
  46. MODULE_LICENSE("GPL");
  47. enum {
  48. UNDEFINED_CAPABLE = 0,
  49. SYSTEM_INTEL_MSR_CAPABLE,
  50. SYSTEM_IO_CAPABLE,
  51. };
  52. #define INTEL_MSR_RANGE (0xffff)
  53. #define CPUID_6_ECX_APERFMPERF_CAPABILITY (0x1)
  54. struct acpi_cpufreq_data {
  55. struct acpi_processor_performance *acpi_data;
  56. struct cpufreq_frequency_table *freq_table;
  57. unsigned int max_freq;
  58. unsigned int resume;
  59. unsigned int cpu_feature;
  60. };
  61. static struct acpi_cpufreq_data *drv_data[NR_CPUS];
  62. static struct acpi_processor_performance *acpi_perf_data[NR_CPUS];
  63. static struct cpufreq_driver acpi_cpufreq_driver;
  64. static unsigned int acpi_pstate_strict;
  65. static int check_est_cpu(unsigned int cpuid)
  66. {
  67. struct cpuinfo_x86 *cpu = &cpu_data[cpuid];
  68. if (cpu->x86_vendor != X86_VENDOR_INTEL ||
  69. !cpu_has(cpu, X86_FEATURE_EST))
  70. return 0;
  71. return 1;
  72. }
  73. static unsigned extract_io(u32 value, struct acpi_cpufreq_data *data)
  74. {
  75. struct acpi_processor_performance *perf;
  76. int i;
  77. perf = data->acpi_data;
  78. for (i=0; i<perf->state_count; i++) {
  79. if (value == perf->states[i].status)
  80. return data->freq_table[i].frequency;
  81. }
  82. return 0;
  83. }
  84. static unsigned extract_msr(u32 msr, struct acpi_cpufreq_data *data)
  85. {
  86. int i;
  87. struct acpi_processor_performance *perf;
  88. msr &= INTEL_MSR_RANGE;
  89. perf = data->acpi_data;
  90. for (i=0; data->freq_table[i].frequency != CPUFREQ_TABLE_END; i++) {
  91. if (msr == perf->states[data->freq_table[i].index].status)
  92. return data->freq_table[i].frequency;
  93. }
  94. return data->freq_table[0].frequency;
  95. }
  96. static unsigned extract_freq(u32 val, struct acpi_cpufreq_data *data)
  97. {
  98. switch (data->cpu_feature) {
  99. case SYSTEM_INTEL_MSR_CAPABLE:
  100. return extract_msr(val, data);
  101. case SYSTEM_IO_CAPABLE:
  102. return extract_io(val, data);
  103. default:
  104. return 0;
  105. }
  106. }
  107. struct msr_addr {
  108. u32 reg;
  109. };
  110. struct io_addr {
  111. u16 port;
  112. u8 bit_width;
  113. };
  114. typedef union {
  115. struct msr_addr msr;
  116. struct io_addr io;
  117. } drv_addr_union;
  118. struct drv_cmd {
  119. unsigned int type;
  120. cpumask_t mask;
  121. drv_addr_union addr;
  122. u32 val;
  123. };
  124. static void do_drv_read(struct drv_cmd *cmd)
  125. {
  126. u32 h;
  127. switch (cmd->type) {
  128. case SYSTEM_INTEL_MSR_CAPABLE:
  129. rdmsr(cmd->addr.msr.reg, cmd->val, h);
  130. break;
  131. case SYSTEM_IO_CAPABLE:
  132. acpi_os_read_port((acpi_io_address)cmd->addr.io.port,
  133. &cmd->val,
  134. (u32)cmd->addr.io.bit_width);
  135. break;
  136. default:
  137. break;
  138. }
  139. }
  140. static void do_drv_write(struct drv_cmd *cmd)
  141. {
  142. u32 h = 0;
  143. switch (cmd->type) {
  144. case SYSTEM_INTEL_MSR_CAPABLE:
  145. wrmsr(cmd->addr.msr.reg, cmd->val, h);
  146. break;
  147. case SYSTEM_IO_CAPABLE:
  148. acpi_os_write_port((acpi_io_address)cmd->addr.io.port,
  149. cmd->val,
  150. (u32)cmd->addr.io.bit_width);
  151. break;
  152. default:
  153. break;
  154. }
  155. }
  156. static void drv_read(struct drv_cmd *cmd)
  157. {
  158. cpumask_t saved_mask = current->cpus_allowed;
  159. cmd->val = 0;
  160. set_cpus_allowed(current, cmd->mask);
  161. do_drv_read(cmd);
  162. set_cpus_allowed(current, saved_mask);
  163. }
  164. static void drv_write(struct drv_cmd *cmd)
  165. {
  166. cpumask_t saved_mask = current->cpus_allowed;
  167. unsigned int i;
  168. for_each_cpu_mask(i, cmd->mask) {
  169. set_cpus_allowed(current, cpumask_of_cpu(i));
  170. do_drv_write(cmd);
  171. }
  172. set_cpus_allowed(current, saved_mask);
  173. return;
  174. }
  175. static u32 get_cur_val(cpumask_t mask)
  176. {
  177. struct acpi_processor_performance *perf;
  178. struct drv_cmd cmd;
  179. if (unlikely(cpus_empty(mask)))
  180. return 0;
  181. switch (drv_data[first_cpu(mask)]->cpu_feature) {
  182. case SYSTEM_INTEL_MSR_CAPABLE:
  183. cmd.type = SYSTEM_INTEL_MSR_CAPABLE;
  184. cmd.addr.msr.reg = MSR_IA32_PERF_STATUS;
  185. break;
  186. case SYSTEM_IO_CAPABLE:
  187. cmd.type = SYSTEM_IO_CAPABLE;
  188. perf = drv_data[first_cpu(mask)]->acpi_data;
  189. cmd.addr.io.port = perf->control_register.address;
  190. cmd.addr.io.bit_width = perf->control_register.bit_width;
  191. break;
  192. default:
  193. return 0;
  194. }
  195. cmd.mask = mask;
  196. drv_read(&cmd);
  197. dprintk("get_cur_val = %u\n", cmd.val);
  198. return cmd.val;
  199. }
  200. /*
  201. * Return the measured active (C0) frequency on this CPU since last call
  202. * to this function.
  203. * Input: cpu number
  204. * Return: Average CPU frequency in terms of max frequency (zero on error)
  205. *
  206. * We use IA32_MPERF and IA32_APERF MSRs to get the measured performance
  207. * over a period of time, while CPU is in C0 state.
  208. * IA32_MPERF counts at the rate of max advertised frequency
  209. * IA32_APERF counts at the rate of actual CPU frequency
  210. * Only IA32_APERF/IA32_MPERF ratio is architecturally defined and
  211. * no meaning should be associated with absolute values of these MSRs.
  212. */
  213. static unsigned int get_measured_perf(unsigned int cpu)
  214. {
  215. union {
  216. struct {
  217. u32 lo;
  218. u32 hi;
  219. } split;
  220. u64 whole;
  221. } aperf_cur, mperf_cur;
  222. cpumask_t saved_mask;
  223. unsigned int perf_percent;
  224. unsigned int retval;
  225. saved_mask = current->cpus_allowed;
  226. set_cpus_allowed(current, cpumask_of_cpu(cpu));
  227. if (get_cpu() != cpu) {
  228. /* We were not able to run on requested processor */
  229. put_cpu();
  230. return 0;
  231. }
  232. rdmsr(MSR_IA32_APERF, aperf_cur.split.lo, aperf_cur.split.hi);
  233. rdmsr(MSR_IA32_MPERF, mperf_cur.split.lo, mperf_cur.split.hi);
  234. wrmsr(MSR_IA32_APERF, 0,0);
  235. wrmsr(MSR_IA32_MPERF, 0,0);
  236. #ifdef __i386__
  237. /*
  238. * We dont want to do 64 bit divide with 32 bit kernel
  239. * Get an approximate value. Return failure in case we cannot get
  240. * an approximate value.
  241. */
  242. if (unlikely(aperf_cur.split.hi || mperf_cur.split.hi)) {
  243. int shift_count;
  244. u32 h;
  245. h = max_t(u32, aperf_cur.split.hi, mperf_cur.split.hi);
  246. shift_count = fls(h);
  247. aperf_cur.whole >>= shift_count;
  248. mperf_cur.whole >>= shift_count;
  249. }
  250. if (((unsigned long)(-1) / 100) < aperf_cur.split.lo) {
  251. int shift_count = 7;
  252. aperf_cur.split.lo >>= shift_count;
  253. mperf_cur.split.lo >>= shift_count;
  254. }
  255. if (aperf_cur.split.lo && mperf_cur.split.lo)
  256. perf_percent = (aperf_cur.split.lo * 100) / mperf_cur.split.lo;
  257. else
  258. perf_percent = 0;
  259. #else
  260. if (unlikely(((unsigned long)(-1) / 100) < aperf_cur.whole)) {
  261. int shift_count = 7;
  262. aperf_cur.whole >>= shift_count;
  263. mperf_cur.whole >>= shift_count;
  264. }
  265. if (aperf_cur.whole && mperf_cur.whole)
  266. perf_percent = (aperf_cur.whole * 100) / mperf_cur.whole;
  267. else
  268. perf_percent = 0;
  269. #endif
  270. retval = drv_data[cpu]->max_freq * perf_percent / 100;
  271. put_cpu();
  272. set_cpus_allowed(current, saved_mask);
  273. dprintk("cpu %d: performance percent %d\n", cpu, perf_percent);
  274. return retval;
  275. }
  276. static unsigned int get_cur_freq_on_cpu(unsigned int cpu)
  277. {
  278. struct acpi_cpufreq_data *data = drv_data[cpu];
  279. unsigned int freq;
  280. dprintk("get_cur_freq_on_cpu (%d)\n", cpu);
  281. if (unlikely(data == NULL ||
  282. data->acpi_data == NULL || data->freq_table == NULL)) {
  283. return 0;
  284. }
  285. freq = extract_freq(get_cur_val(cpumask_of_cpu(cpu)), data);
  286. dprintk("cur freq = %u\n", freq);
  287. return freq;
  288. }
  289. static unsigned int check_freqs(cpumask_t mask, unsigned int freq,
  290. struct acpi_cpufreq_data *data)
  291. {
  292. unsigned int cur_freq;
  293. unsigned int i;
  294. for (i=0; i<100; i++) {
  295. cur_freq = extract_freq(get_cur_val(mask), data);
  296. if (cur_freq == freq)
  297. return 1;
  298. udelay(10);
  299. }
  300. return 0;
  301. }
  302. static int acpi_cpufreq_target(struct cpufreq_policy *policy,
  303. unsigned int target_freq, unsigned int relation)
  304. {
  305. struct acpi_cpufreq_data *data = drv_data[policy->cpu];
  306. struct acpi_processor_performance *perf;
  307. struct cpufreq_freqs freqs;
  308. cpumask_t online_policy_cpus;
  309. struct drv_cmd cmd;
  310. unsigned int msr;
  311. unsigned int next_state = 0; /* Index into freq_table */
  312. unsigned int next_perf_state = 0; /* Index into perf table */
  313. unsigned int i;
  314. int result = 0;
  315. dprintk("acpi_cpufreq_target %d (%d)\n", target_freq, policy->cpu);
  316. if (unlikely(data == NULL ||
  317. data->acpi_data == NULL || data->freq_table == NULL)) {
  318. return -ENODEV;
  319. }
  320. perf = data->acpi_data;
  321. result = cpufreq_frequency_table_target(policy,
  322. data->freq_table,
  323. target_freq,
  324. relation, &next_state);
  325. if (unlikely(result))
  326. return -ENODEV;
  327. #ifdef CONFIG_HOTPLUG_CPU
  328. /* cpufreq holds the hotplug lock, so we are safe from here on */
  329. cpus_and(online_policy_cpus, cpu_online_map, policy->cpus);
  330. #else
  331. online_policy_cpus = policy->cpus;
  332. #endif
  333. next_perf_state = data->freq_table[next_state].index;
  334. if (perf->state == next_perf_state) {
  335. if (unlikely(data->resume)) {
  336. dprintk("Called after resume, resetting to P%d\n",
  337. next_perf_state);
  338. data->resume = 0;
  339. } else {
  340. dprintk("Already at target state (P%d)\n",
  341. next_perf_state);
  342. return 0;
  343. }
  344. }
  345. switch (data->cpu_feature) {
  346. case SYSTEM_INTEL_MSR_CAPABLE:
  347. cmd.type = SYSTEM_INTEL_MSR_CAPABLE;
  348. cmd.addr.msr.reg = MSR_IA32_PERF_CTL;
  349. msr =
  350. (u32) perf->states[next_perf_state].
  351. control & INTEL_MSR_RANGE;
  352. cmd.val = get_cur_val(online_policy_cpus);
  353. cmd.val = (cmd.val & ~INTEL_MSR_RANGE) | msr;
  354. break;
  355. case SYSTEM_IO_CAPABLE:
  356. cmd.type = SYSTEM_IO_CAPABLE;
  357. cmd.addr.io.port = perf->control_register.address;
  358. cmd.addr.io.bit_width = perf->control_register.bit_width;
  359. cmd.val = (u32) perf->states[next_perf_state].control;
  360. break;
  361. default:
  362. return -ENODEV;
  363. }
  364. cpus_clear(cmd.mask);
  365. if (policy->shared_type != CPUFREQ_SHARED_TYPE_ANY)
  366. cmd.mask = online_policy_cpus;
  367. else
  368. cpu_set(policy->cpu, cmd.mask);
  369. freqs.old = perf->states[perf->state].core_frequency * 1000;
  370. freqs.new = data->freq_table[next_state].frequency;
  371. for_each_cpu_mask(i, cmd.mask) {
  372. freqs.cpu = i;
  373. cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
  374. }
  375. drv_write(&cmd);
  376. if (acpi_pstate_strict) {
  377. if (!check_freqs(cmd.mask, freqs.new, data)) {
  378. dprintk("acpi_cpufreq_target failed (%d)\n",
  379. policy->cpu);
  380. return -EAGAIN;
  381. }
  382. }
  383. for_each_cpu_mask(i, cmd.mask) {
  384. freqs.cpu = i;
  385. cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
  386. }
  387. perf->state = next_perf_state;
  388. return result;
  389. }
  390. static int acpi_cpufreq_verify(struct cpufreq_policy *policy)
  391. {
  392. struct acpi_cpufreq_data *data = drv_data[policy->cpu];
  393. dprintk("acpi_cpufreq_verify\n");
  394. return cpufreq_frequency_table_verify(policy, data->freq_table);
  395. }
  396. static unsigned long
  397. acpi_cpufreq_guess_freq(struct acpi_cpufreq_data *data, unsigned int cpu)
  398. {
  399. struct acpi_processor_performance *perf = data->acpi_data;
  400. if (cpu_khz) {
  401. /* search the closest match to cpu_khz */
  402. unsigned int i;
  403. unsigned long freq;
  404. unsigned long freqn = perf->states[0].core_frequency * 1000;
  405. for (i=0; i<(perf->state_count-1); i++) {
  406. freq = freqn;
  407. freqn = perf->states[i+1].core_frequency * 1000;
  408. if ((2 * cpu_khz) > (freqn + freq)) {
  409. perf->state = i;
  410. return freq;
  411. }
  412. }
  413. perf->state = perf->state_count-1;
  414. return freqn;
  415. } else {
  416. /* assume CPU is at P0... */
  417. perf->state = 0;
  418. return perf->states[0].core_frequency * 1000;
  419. }
  420. }
  421. /*
  422. * acpi_cpufreq_early_init - initialize ACPI P-States library
  423. *
  424. * Initialize the ACPI P-States library (drivers/acpi/processor_perflib.c)
  425. * in order to determine correct frequency and voltage pairings. We can
  426. * do _PDC and _PSD and find out the processor dependency for the
  427. * actual init that will happen later...
  428. */
  429. static int acpi_cpufreq_early_init(void)
  430. {
  431. struct acpi_processor_performance *data;
  432. cpumask_t covered;
  433. unsigned int i, j;
  434. dprintk("acpi_cpufreq_early_init\n");
  435. for_each_possible_cpu(i) {
  436. data = kzalloc(sizeof(struct acpi_processor_performance),
  437. GFP_KERNEL);
  438. if (!data) {
  439. for_each_cpu_mask(j, covered) {
  440. kfree(acpi_perf_data[j]);
  441. acpi_perf_data[j] = NULL;
  442. }
  443. return -ENOMEM;
  444. }
  445. acpi_perf_data[i] = data;
  446. cpu_set(i, covered);
  447. }
  448. /* Do initialization in ACPI core */
  449. acpi_processor_preregister_performance(acpi_perf_data);
  450. return 0;
  451. }
  452. #ifdef CONFIG_SMP
  453. /*
  454. * Some BIOSes do SW_ANY coordination internally, either set it up in hw
  455. * or do it in BIOS firmware and won't inform about it to OS. If not
  456. * detected, this has a side effect of making CPU run at a different speed
  457. * than OS intended it to run at. Detect it and handle it cleanly.
  458. */
  459. static int bios_with_sw_any_bug;
  460. static int sw_any_bug_found(struct dmi_system_id *d)
  461. {
  462. bios_with_sw_any_bug = 1;
  463. return 0;
  464. }
  465. static struct dmi_system_id sw_any_bug_dmi_table[] = {
  466. {
  467. .callback = sw_any_bug_found,
  468. .ident = "Supermicro Server X6DLP",
  469. .matches = {
  470. DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
  471. DMI_MATCH(DMI_BIOS_VERSION, "080010"),
  472. DMI_MATCH(DMI_PRODUCT_NAME, "X6DLP"),
  473. },
  474. },
  475. { }
  476. };
  477. #endif
  478. static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy)
  479. {
  480. unsigned int i;
  481. unsigned int valid_states = 0;
  482. unsigned int cpu = policy->cpu;
  483. struct acpi_cpufreq_data *data;
  484. unsigned int result = 0;
  485. struct cpuinfo_x86 *c = &cpu_data[policy->cpu];
  486. struct acpi_processor_performance *perf;
  487. dprintk("acpi_cpufreq_cpu_init\n");
  488. if (!acpi_perf_data[cpu])
  489. return -ENODEV;
  490. data = kzalloc(sizeof(struct acpi_cpufreq_data), GFP_KERNEL);
  491. if (!data)
  492. return -ENOMEM;
  493. data->acpi_data = acpi_perf_data[cpu];
  494. drv_data[cpu] = data;
  495. if (cpu_has(c, X86_FEATURE_CONSTANT_TSC))
  496. acpi_cpufreq_driver.flags |= CPUFREQ_CONST_LOOPS;
  497. result = acpi_processor_register_performance(data->acpi_data, cpu);
  498. if (result)
  499. goto err_free;
  500. perf = data->acpi_data;
  501. policy->shared_type = perf->shared_type;
  502. /*
  503. * Will let policy->cpus know about dependency only when software
  504. * coordination is required.
  505. */
  506. if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL ||
  507. policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) {
  508. policy->cpus = perf->shared_cpu_map;
  509. }
  510. #ifdef CONFIG_SMP
  511. dmi_check_system(sw_any_bug_dmi_table);
  512. if (bios_with_sw_any_bug && cpus_weight(policy->cpus) == 1) {
  513. policy->shared_type = CPUFREQ_SHARED_TYPE_ALL;
  514. policy->cpus = cpu_core_map[cpu];
  515. }
  516. #endif
  517. /* capability check */
  518. if (perf->state_count <= 1) {
  519. dprintk("No P-States\n");
  520. result = -ENODEV;
  521. goto err_unreg;
  522. }
  523. if (perf->control_register.space_id != perf->status_register.space_id) {
  524. result = -ENODEV;
  525. goto err_unreg;
  526. }
  527. switch (perf->control_register.space_id) {
  528. case ACPI_ADR_SPACE_SYSTEM_IO:
  529. dprintk("SYSTEM IO addr space\n");
  530. data->cpu_feature = SYSTEM_IO_CAPABLE;
  531. break;
  532. case ACPI_ADR_SPACE_FIXED_HARDWARE:
  533. dprintk("HARDWARE addr space\n");
  534. if (!check_est_cpu(cpu)) {
  535. result = -ENODEV;
  536. goto err_unreg;
  537. }
  538. data->cpu_feature = SYSTEM_INTEL_MSR_CAPABLE;
  539. break;
  540. default:
  541. dprintk("Unknown addr space %d\n",
  542. (u32) (perf->control_register.space_id));
  543. result = -ENODEV;
  544. goto err_unreg;
  545. }
  546. data->freq_table = kmalloc(sizeof(struct cpufreq_frequency_table) *
  547. (perf->state_count+1), GFP_KERNEL);
  548. if (!data->freq_table) {
  549. result = -ENOMEM;
  550. goto err_unreg;
  551. }
  552. /* detect transition latency */
  553. policy->cpuinfo.transition_latency = 0;
  554. for (i=0; i<perf->state_count; i++) {
  555. if ((perf->states[i].transition_latency * 1000) >
  556. policy->cpuinfo.transition_latency)
  557. policy->cpuinfo.transition_latency =
  558. perf->states[i].transition_latency * 1000;
  559. }
  560. policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
  561. data->max_freq = perf->states[0].core_frequency * 1000;
  562. /* table init */
  563. for (i=0; i<perf->state_count; i++) {
  564. if (i>0 && perf->states[i].core_frequency ==
  565. perf->states[i-1].core_frequency)
  566. continue;
  567. data->freq_table[valid_states].index = i;
  568. data->freq_table[valid_states].frequency =
  569. perf->states[i].core_frequency * 1000;
  570. valid_states++;
  571. }
  572. data->freq_table[valid_states].frequency = CPUFREQ_TABLE_END;
  573. perf->state = 0;
  574. result = cpufreq_frequency_table_cpuinfo(policy, data->freq_table);
  575. if (result)
  576. goto err_freqfree;
  577. switch (perf->control_register.space_id) {
  578. case ACPI_ADR_SPACE_SYSTEM_IO:
  579. /* Current speed is unknown and not detectable by IO port */
  580. policy->cur = acpi_cpufreq_guess_freq(data, policy->cpu);
  581. break;
  582. case ACPI_ADR_SPACE_FIXED_HARDWARE:
  583. acpi_cpufreq_driver.get = get_cur_freq_on_cpu;
  584. policy->cur = get_cur_freq_on_cpu(cpu);
  585. break;
  586. default:
  587. break;
  588. }
  589. /* notify BIOS that we exist */
  590. acpi_processor_notify_smm(THIS_MODULE);
  591. /* Check for APERF/MPERF support in hardware */
  592. if (c->x86_vendor == X86_VENDOR_INTEL && c->cpuid_level >= 6) {
  593. unsigned int ecx;
  594. ecx = cpuid_ecx(6);
  595. if (ecx & CPUID_6_ECX_APERFMPERF_CAPABILITY)
  596. acpi_cpufreq_driver.getavg = get_measured_perf;
  597. }
  598. dprintk("CPU%u - ACPI performance management activated.\n", cpu);
  599. for (i = 0; i < perf->state_count; i++)
  600. dprintk(" %cP%d: %d MHz, %d mW, %d uS\n",
  601. (i == perf->state ? '*' : ' '), i,
  602. (u32) perf->states[i].core_frequency,
  603. (u32) perf->states[i].power,
  604. (u32) perf->states[i].transition_latency);
  605. cpufreq_frequency_table_get_attr(data->freq_table, policy->cpu);
  606. /*
  607. * the first call to ->target() should result in us actually
  608. * writing something to the appropriate registers.
  609. */
  610. data->resume = 1;
  611. return result;
  612. err_freqfree:
  613. kfree(data->freq_table);
  614. err_unreg:
  615. acpi_processor_unregister_performance(perf, cpu);
  616. err_free:
  617. kfree(data);
  618. drv_data[cpu] = NULL;
  619. return result;
  620. }
  621. static int acpi_cpufreq_cpu_exit(struct cpufreq_policy *policy)
  622. {
  623. struct acpi_cpufreq_data *data = drv_data[policy->cpu];
  624. dprintk("acpi_cpufreq_cpu_exit\n");
  625. if (data) {
  626. cpufreq_frequency_table_put_attr(policy->cpu);
  627. drv_data[policy->cpu] = NULL;
  628. acpi_processor_unregister_performance(data->acpi_data,
  629. policy->cpu);
  630. kfree(data);
  631. }
  632. return 0;
  633. }
  634. static int acpi_cpufreq_resume(struct cpufreq_policy *policy)
  635. {
  636. struct acpi_cpufreq_data *data = drv_data[policy->cpu];
  637. dprintk("acpi_cpufreq_resume\n");
  638. data->resume = 1;
  639. return 0;
  640. }
  641. static struct freq_attr *acpi_cpufreq_attr[] = {
  642. &cpufreq_freq_attr_scaling_available_freqs,
  643. NULL,
  644. };
  645. static struct cpufreq_driver acpi_cpufreq_driver = {
  646. .verify = acpi_cpufreq_verify,
  647. .target = acpi_cpufreq_target,
  648. .init = acpi_cpufreq_cpu_init,
  649. .exit = acpi_cpufreq_cpu_exit,
  650. .resume = acpi_cpufreq_resume,
  651. .name = "acpi-cpufreq",
  652. .owner = THIS_MODULE,
  653. .attr = acpi_cpufreq_attr,
  654. };
  655. static int __init acpi_cpufreq_init(void)
  656. {
  657. dprintk("acpi_cpufreq_init\n");
  658. acpi_cpufreq_early_init();
  659. return cpufreq_register_driver(&acpi_cpufreq_driver);
  660. }
  661. static void __exit acpi_cpufreq_exit(void)
  662. {
  663. unsigned int i;
  664. dprintk("acpi_cpufreq_exit\n");
  665. cpufreq_unregister_driver(&acpi_cpufreq_driver);
  666. for_each_possible_cpu(i) {
  667. kfree(acpi_perf_data[i]);
  668. acpi_perf_data[i] = NULL;
  669. }
  670. return;
  671. }
  672. module_param(acpi_pstate_strict, uint, 0644);
  673. MODULE_PARM_DESC(acpi_pstate_strict,
  674. "value 0 or non-zero. non-zero -> strict ACPI checks are "
  675. "performed during frequency changes.");
  676. late_initcall(acpi_cpufreq_init);
  677. module_exit(acpi_cpufreq_exit);
  678. MODULE_ALIAS("acpi");