Kconfig.cpu 10 KB

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  1. # Put here option for CPU selection and depending optimization
  2. if !X86_ELAN
  3. choice
  4. prompt "Processor family"
  5. default M686
  6. config M386
  7. bool "386"
  8. depends on !UML
  9. ---help---
  10. This is the processor type of your CPU. This information is used for
  11. optimizing purposes. In order to compile a kernel that can run on
  12. all x86 CPU types (albeit not optimally fast), you can specify
  13. "386" here.
  14. The kernel will not necessarily run on earlier architectures than
  15. the one you have chosen, e.g. a Pentium optimized kernel will run on
  16. a PPro, but not necessarily on a i486.
  17. Here are the settings recommended for greatest speed:
  18. - "386" for the AMD/Cyrix/Intel 386DX/DXL/SL/SLC/SX, Cyrix/TI
  19. 486DLC/DLC2, UMC 486SX-S and NexGen Nx586. Only "386" kernels
  20. will run on a 386 class machine.
  21. - "486" for the AMD/Cyrix/IBM/Intel 486DX/DX2/DX4 or
  22. SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or U5S.
  23. - "586" for generic Pentium CPUs lacking the TSC
  24. (time stamp counter) register.
  25. - "Pentium-Classic" for the Intel Pentium.
  26. - "Pentium-MMX" for the Intel Pentium MMX.
  27. - "Pentium-Pro" for the Intel Pentium Pro.
  28. - "Pentium-II" for the Intel Pentium II or pre-Coppermine Celeron.
  29. - "Pentium-III" for the Intel Pentium III or Coppermine Celeron.
  30. - "Pentium-4" for the Intel Pentium 4 or P4-based Celeron.
  31. - "K6" for the AMD K6, K6-II and K6-III (aka K6-3D).
  32. - "Athlon" for the AMD K7 family (Athlon/Duron/Thunderbird).
  33. - "Crusoe" for the Transmeta Crusoe series.
  34. - "Efficeon" for the Transmeta Efficeon series.
  35. - "Winchip-C6" for original IDT Winchip.
  36. - "Winchip-2" for IDT Winchip 2.
  37. - "Winchip-2A" for IDT Winchips with 3dNow! capabilities.
  38. - "GeodeGX1" for Geode GX1 (Cyrix MediaGX).
  39. - "Geode GX/LX" For AMD Geode GX and LX processors.
  40. - "CyrixIII/VIA C3" for VIA Cyrix III or VIA C3.
  41. - "VIA C3-2" for VIA C3-2 "Nehemiah" (model 9 and above).
  42. - "VIA C7" for VIA C7.
  43. If you don't know what to do, choose "386".
  44. config M486
  45. bool "486"
  46. help
  47. Select this for a 486 series processor, either Intel or one of the
  48. compatible processors from AMD, Cyrix, IBM, or Intel. Includes DX,
  49. DX2, and DX4 variants; also SL/SLC/SLC2/SLC3/SX/SX2 and UMC U5D or
  50. U5S.
  51. config M586
  52. bool "586/K5/5x86/6x86/6x86MX"
  53. help
  54. Select this for an 586 or 686 series processor such as the AMD K5,
  55. the Cyrix 5x86, 6x86 and 6x86MX. This choice does not
  56. assume the RDTSC (Read Time Stamp Counter) instruction.
  57. config M586TSC
  58. bool "Pentium-Classic"
  59. help
  60. Select this for a Pentium Classic processor with the RDTSC (Read
  61. Time Stamp Counter) instruction for benchmarking.
  62. config M586MMX
  63. bool "Pentium-MMX"
  64. help
  65. Select this for a Pentium with the MMX graphics/multimedia
  66. extended instructions.
  67. config M686
  68. bool "Pentium-Pro"
  69. help
  70. Select this for Intel Pentium Pro chips. This enables the use of
  71. Pentium Pro extended instructions, and disables the init-time guard
  72. against the f00f bug found in earlier Pentiums.
  73. config MPENTIUMII
  74. bool "Pentium-II/Celeron(pre-Coppermine)"
  75. help
  76. Select this for Intel chips based on the Pentium-II and
  77. pre-Coppermine Celeron core. This option enables an unaligned
  78. copy optimization, compiles the kernel with optimization flags
  79. tailored for the chip, and applies any applicable Pentium Pro
  80. optimizations.
  81. config MPENTIUMIII
  82. bool "Pentium-III/Celeron(Coppermine)/Pentium-III Xeon"
  83. help
  84. Select this for Intel chips based on the Pentium-III and
  85. Celeron-Coppermine core. This option enables use of some
  86. extended prefetch instructions in addition to the Pentium II
  87. extensions.
  88. config MPENTIUMM
  89. bool "Pentium M"
  90. help
  91. Select this for Intel Pentium M (not Pentium-4 M)
  92. notebook chips.
  93. config MCORE2
  94. bool "Core 2/newer Xeon"
  95. help
  96. Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and 53xx)
  97. CPUs. You can distinguish newer from older Xeons by the CPU family
  98. in /proc/cpuinfo. Newer ones have 6.
  99. config MPENTIUM4
  100. bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/older Xeon"
  101. help
  102. Select this for Intel Pentium 4 chips. This includes the
  103. Pentium 4, P4-based Celeron and Xeon, and Pentium-4 M
  104. (not Pentium M) chips. This option enables compile flags
  105. optimized for the chip, uses the correct cache shift, and
  106. applies any applicable Pentium III optimizations.
  107. config MK6
  108. bool "K6/K6-II/K6-III"
  109. help
  110. Select this for an AMD K6-family processor. Enables use of
  111. some extended instructions, and passes appropriate optimization
  112. flags to GCC.
  113. config MK7
  114. bool "Athlon/Duron/K7"
  115. help
  116. Select this for an AMD Athlon K7-family processor. Enables use of
  117. some extended instructions, and passes appropriate optimization
  118. flags to GCC.
  119. config MK8
  120. bool "Opteron/Athlon64/Hammer/K8"
  121. help
  122. Select this for an AMD Opteron or Athlon64 Hammer-family processor. Enables
  123. use of some extended instructions, and passes appropriate optimization
  124. flags to GCC.
  125. config MCRUSOE
  126. bool "Crusoe"
  127. help
  128. Select this for a Transmeta Crusoe processor. Treats the processor
  129. like a 586 with TSC, and sets some GCC optimization flags (like a
  130. Pentium Pro with no alignment requirements).
  131. config MEFFICEON
  132. bool "Efficeon"
  133. help
  134. Select this for a Transmeta Efficeon processor.
  135. config MWINCHIPC6
  136. bool "Winchip-C6"
  137. help
  138. Select this for an IDT Winchip C6 chip. Linux and GCC
  139. treat this chip as a 586TSC with some extended instructions
  140. and alignment requirements.
  141. config MWINCHIP2
  142. bool "Winchip-2"
  143. help
  144. Select this for an IDT Winchip-2. Linux and GCC
  145. treat this chip as a 586TSC with some extended instructions
  146. and alignment requirements.
  147. config MWINCHIP3D
  148. bool "Winchip-2A/Winchip-3"
  149. help
  150. Select this for an IDT Winchip-2A or 3. Linux and GCC
  151. treat this chip as a 586TSC with some extended instructions
  152. and alignment requirements. Also enable out of order memory
  153. stores for this CPU, which can increase performance of some
  154. operations.
  155. config MGEODEGX1
  156. bool "GeodeGX1"
  157. help
  158. Select this for a Geode GX1 (Cyrix MediaGX) chip.
  159. config MGEODE_LX
  160. bool "Geode GX/LX"
  161. help
  162. Select this for AMD Geode GX and LX processors.
  163. config MCYRIXIII
  164. bool "CyrixIII/VIA-C3"
  165. help
  166. Select this for a Cyrix III or C3 chip. Presently Linux and GCC
  167. treat this chip as a generic 586. Whilst the CPU is 686 class,
  168. it lacks the cmov extension which gcc assumes is present when
  169. generating 686 code.
  170. Note that Nehemiah (Model 9) and above will not boot with this
  171. kernel due to them lacking the 3DNow! instructions used in earlier
  172. incarnations of the CPU.
  173. config MVIAC3_2
  174. bool "VIA C3-2 (Nehemiah)"
  175. help
  176. Select this for a VIA C3 "Nehemiah". Selecting this enables usage
  177. of SSE and tells gcc to treat the CPU as a 686.
  178. Note, this kernel will not boot on older (pre model 9) C3s.
  179. config MVIAC7
  180. bool "VIA C7"
  181. help
  182. Select this for a VIA C7. Selecting this uses the correct cache
  183. shift and tells gcc to treat the CPU as a 686.
  184. endchoice
  185. config X86_GENERIC
  186. bool "Generic x86 support"
  187. help
  188. Instead of just including optimizations for the selected
  189. x86 variant (e.g. PII, Crusoe or Athlon), include some more
  190. generic optimizations as well. This will make the kernel
  191. perform better on x86 CPUs other than that selected.
  192. This is really intended for distributors who need more
  193. generic optimizations.
  194. endif
  195. #
  196. # Define implied options from the CPU selection here
  197. #
  198. config X86_CMPXCHG
  199. bool
  200. depends on !M386
  201. default y
  202. config X86_L1_CACHE_SHIFT
  203. int
  204. default "7" if MPENTIUM4 || X86_GENERIC
  205. default "4" if X86_ELAN || M486 || M386 || MGEODEGX1
  206. default "5" if MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCRUSOE || MEFFICEON || MCYRIXIII || MK6 || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || M586 || MVIAC3_2 || MGEODE_LX
  207. default "6" if MK7 || MK8 || MPENTIUMM || MCORE2 || MVIAC7
  208. config X86_XADD
  209. bool
  210. depends on !M386
  211. default y
  212. config RWSEM_GENERIC_SPINLOCK
  213. bool
  214. depends on !X86_XADD
  215. default y
  216. config RWSEM_XCHGADD_ALGORITHM
  217. bool
  218. depends on X86_XADD
  219. default y
  220. config ARCH_HAS_ILOG2_U32
  221. bool
  222. default n
  223. config ARCH_HAS_ILOG2_U64
  224. bool
  225. default n
  226. config GENERIC_CALIBRATE_DELAY
  227. bool
  228. default y
  229. config X86_PPRO_FENCE
  230. bool
  231. depends on M686 || M586MMX || M586TSC || M586 || M486 || M386 || MGEODEGX1
  232. default y
  233. config X86_F00F_BUG
  234. bool
  235. depends on M586MMX || M586TSC || M586 || M486 || M386
  236. default y
  237. config X86_WP_WORKS_OK
  238. bool
  239. depends on !M386
  240. default y
  241. config X86_INVLPG
  242. bool
  243. depends on !M386
  244. default y
  245. config X86_BSWAP
  246. bool
  247. depends on !M386
  248. default y
  249. config X86_POPAD_OK
  250. bool
  251. depends on !M386
  252. default y
  253. config X86_CMPXCHG64
  254. bool
  255. depends on !M386 && !M486
  256. default y
  257. config X86_ALIGNMENT_16
  258. bool
  259. depends on MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCYRIXIII || X86_ELAN || MK6 || M586MMX || M586TSC || M586 || M486 || MVIAC3_2 || MGEODEGX1
  260. default y
  261. config X86_GOOD_APIC
  262. bool
  263. depends on MK7 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || MK8 || MEFFICEON || MCORE2 || MVIAC7
  264. default y
  265. config X86_INTEL_USERCOPY
  266. bool
  267. depends on MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M586MMX || X86_GENERIC || MK8 || MK7 || MEFFICEON || MCORE2
  268. default y
  269. config X86_USE_PPRO_CHECKSUM
  270. bool
  271. depends on MWINCHIP3D || MWINCHIP2 || MWINCHIPC6 || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MK8 || MVIAC3_2 || MEFFICEON || MGEODE_LX || MCORE2
  272. default y
  273. config X86_USE_3DNOW
  274. bool
  275. depends on (MCYRIXIII || MK7 || MGEODE_LX) && !UML
  276. default y
  277. config X86_OOSTORE
  278. bool
  279. depends on (MWINCHIP3D || MWINCHIP2 || MWINCHIPC6) && MTRR
  280. default y
  281. config X86_TSC
  282. bool
  283. depends on (MWINCHIP3D || MWINCHIP2 || MCRUSOE || MEFFICEON || MCYRIXIII || MK7 || MK6 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || M586MMX || M586TSC || MK8 || MVIAC3_2 || MVIAC7 || MGEODEGX1 || MGEODE_LX || MCORE2) && !X86_NUMAQ
  284. default y
  285. # this should be set for all -march=.. options where the compiler
  286. # generates cmov.
  287. config X86_CMOV
  288. bool
  289. depends on (MK7 || MPENTIUM4 || MPENTIUMM || MPENTIUMIII || MPENTIUMII || M686 || MVIAC3_2 || MVIAC7)
  290. default y
  291. config X86_MINIMUM_CPU_MODEL
  292. int
  293. default "4" if X86_XADD || X86_CMPXCHG || X86_BSWAP
  294. default "0"