pnav10.c 13 KB

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  1. /*
  2. * File: arch/blackfin/mach-bf537/boards/stamp.c
  3. * Based on: arch/blackfin/mach-bf533/boards/ezkit.c
  4. * Author: Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Created:
  7. * Description:
  8. *
  9. * Modified:
  10. * Copyright 2005 National ICT Australia (NICTA)
  11. * Copyright 2004-2006 Analog Devices Inc.
  12. *
  13. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License as published by
  17. * the Free Software Foundation; either version 2 of the License, or
  18. * (at your option) any later version.
  19. *
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, see the file COPYING, or write
  27. * to the Free Software Foundation, Inc.,
  28. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  29. */
  30. #include <linux/device.h>
  31. #include <linux/platform_device.h>
  32. #include <linux/mtd/mtd.h>
  33. #include <linux/mtd/partitions.h>
  34. #include <linux/spi/spi.h>
  35. #include <linux/spi/flash.h>
  36. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  37. #include <linux/usb_isp1362.h>
  38. #endif
  39. #include <asm/irq.h>
  40. #include <asm/bfin5xx_spi.h>
  41. #include <linux/usb_sl811.h>
  42. #include <linux/spi/ad7877.h>
  43. /*
  44. * Name the Board for the /proc/cpuinfo
  45. */
  46. char *bfin_board_name = "PNAV-1.0";
  47. /*
  48. * Driver needs to know address, irq and flag pin.
  49. */
  50. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  51. static struct resource bfin_pcmcia_cf_resources[] = {
  52. {
  53. .start = 0x20310000, /* IO PORT */
  54. .end = 0x20312000,
  55. .flags = IORESOURCE_MEM,
  56. },{
  57. .start = 0x20311000, /* Attribute Memeory */
  58. .end = 0x20311FFF,
  59. .flags = IORESOURCE_MEM,
  60. },{
  61. .start = IRQ_PF4,
  62. .end = IRQ_PF4,
  63. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  64. },{
  65. .start = 6, /* Card Detect PF6 */
  66. .end = 6,
  67. .flags = IORESOURCE_IRQ,
  68. },
  69. };
  70. static struct platform_device bfin_pcmcia_cf_device = {
  71. .name = "bfin_cf_pcmcia",
  72. .id = -1,
  73. .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
  74. .resource = bfin_pcmcia_cf_resources,
  75. };
  76. #endif
  77. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  78. static struct platform_device rtc_device = {
  79. .name = "rtc-bfin",
  80. .id = -1,
  81. };
  82. #endif
  83. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  84. static struct resource smc91x_resources[] = {
  85. {
  86. .name = "smc91x-regs",
  87. .start = 0x20300300,
  88. .end = 0x20300300 + 16,
  89. .flags = IORESOURCE_MEM,
  90. },{
  91. .start = IRQ_PF7,
  92. .end = IRQ_PF7,
  93. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  94. },
  95. };
  96. static struct platform_device smc91x_device = {
  97. .name = "smc91x",
  98. .id = 0,
  99. .num_resources = ARRAY_SIZE(smc91x_resources),
  100. .resource = smc91x_resources,
  101. };
  102. #endif
  103. #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
  104. static struct resource sl811_hcd_resources[] = {
  105. {
  106. .start = 0x20340000,
  107. .end = 0x20340000,
  108. .flags = IORESOURCE_MEM,
  109. },{
  110. .start = 0x20340004,
  111. .end = 0x20340004,
  112. .flags = IORESOURCE_MEM,
  113. },{
  114. .start = CONFIG_USB_SL811_BFIN_IRQ,
  115. .end = CONFIG_USB_SL811_BFIN_IRQ,
  116. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  117. },
  118. };
  119. #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
  120. void sl811_port_power(struct device *dev, int is_on)
  121. {
  122. unsigned short mask = (1 << CONFIG_USB_SL811_BFIN_GPIO_VBUS);
  123. bfin_write_PORT_FER(bfin_read_PORT_FER() & ~mask);
  124. bfin_write_FIO_DIR(bfin_read_FIO_DIR() | mask);
  125. if (is_on)
  126. bfin_write_FIO_FLAG_S(mask);
  127. else
  128. bfin_write_FIO_FLAG_C(mask);
  129. }
  130. #endif
  131. static struct sl811_platform_data sl811_priv = {
  132. .potpg = 10,
  133. .power = 250, /* == 500mA */
  134. #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
  135. .port_power = &sl811_port_power,
  136. #endif
  137. };
  138. static struct platform_device sl811_hcd_device = {
  139. .name = "sl811-hcd",
  140. .id = 0,
  141. .dev = {
  142. .platform_data = &sl811_priv,
  143. },
  144. .num_resources = ARRAY_SIZE(sl811_hcd_resources),
  145. .resource = sl811_hcd_resources,
  146. };
  147. #endif
  148. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  149. static struct resource isp1362_hcd_resources[] = {
  150. {
  151. .start = 0x20360000,
  152. .end = 0x20360000,
  153. .flags = IORESOURCE_MEM,
  154. },{
  155. .start = 0x20360004,
  156. .end = 0x20360004,
  157. .flags = IORESOURCE_MEM,
  158. },{
  159. .start = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
  160. .end = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
  161. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  162. },
  163. };
  164. static struct isp1362_platform_data isp1362_priv = {
  165. .sel15Kres = 1,
  166. .clknotstop = 0,
  167. .oc_enable = 0,
  168. .int_act_high = 0,
  169. .int_edge_triggered = 0,
  170. .remote_wakeup_connected = 0,
  171. .no_power_switching = 1,
  172. .power_switching_mode = 0,
  173. };
  174. static struct platform_device isp1362_hcd_device = {
  175. .name = "isp1362-hcd",
  176. .id = 0,
  177. .dev = {
  178. .platform_data = &isp1362_priv,
  179. },
  180. .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
  181. .resource = isp1362_hcd_resources,
  182. };
  183. #endif
  184. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  185. static struct platform_device bfin_mac_device = {
  186. .name = "bfin_mac",
  187. };
  188. #endif
  189. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  190. static struct resource net2272_bfin_resources[] = {
  191. {
  192. .start = 0x20300000,
  193. .end = 0x20300000 + 0x100,
  194. .flags = IORESOURCE_MEM,
  195. },{
  196. .start = IRQ_PF7,
  197. .end = IRQ_PF7,
  198. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  199. },
  200. };
  201. static struct platform_device net2272_bfin_device = {
  202. .name = "net2272",
  203. .id = -1,
  204. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  205. .resource = net2272_bfin_resources,
  206. };
  207. #endif
  208. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  209. /* all SPI peripherals info goes here */
  210. #if defined(CONFIG_MTD_M25P80) \
  211. || defined(CONFIG_MTD_M25P80_MODULE)
  212. static struct mtd_partition bfin_spi_flash_partitions[] = {
  213. {
  214. .name = "bootloader",
  215. .size = 0x00020000,
  216. .offset = 0,
  217. .mask_flags = MTD_CAP_ROM
  218. },{
  219. .name = "kernel",
  220. .size = 0xe0000,
  221. .offset = 0x20000
  222. },{
  223. .name = "file system",
  224. .size = 0x700000,
  225. .offset = 0x00100000,
  226. }
  227. };
  228. static struct flash_platform_data bfin_spi_flash_data = {
  229. .name = "m25p80",
  230. .parts = bfin_spi_flash_partitions,
  231. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  232. .type = "m25p64",
  233. };
  234. /* SPI flash chip (m25p64) */
  235. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  236. .enable_dma = 0, /* use dma transfer with this chip*/
  237. .bits_per_word = 8,
  238. };
  239. #endif
  240. #if defined(CONFIG_SPI_ADC_BF533) \
  241. || defined(CONFIG_SPI_ADC_BF533_MODULE)
  242. /* SPI ADC chip */
  243. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  244. .enable_dma = 1, /* use dma transfer with this chip*/
  245. .bits_per_word = 16,
  246. };
  247. #endif
  248. #if defined(CONFIG_SND_BLACKFIN_AD1836) \
  249. || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  250. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  251. .enable_dma = 0,
  252. .bits_per_word = 16,
  253. };
  254. #endif
  255. #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
  256. static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
  257. .enable_dma = 0,
  258. .bits_per_word = 16,
  259. };
  260. #endif
  261. #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
  262. static struct bfin5xx_spi_chip spi_mmc_chip_info = {
  263. .enable_dma = 1,
  264. .bits_per_word = 8,
  265. };
  266. #endif
  267. #if defined(CONFIG_PBX)
  268. static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
  269. .ctl_reg = 0x4, /* send zero */
  270. .enable_dma = 0,
  271. .bits_per_word = 8,
  272. .cs_change_per_word = 1,
  273. };
  274. #endif
  275. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  276. static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
  277. .cs_change_per_word = 1,
  278. .enable_dma = 0,
  279. .bits_per_word = 16,
  280. };
  281. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  282. .model = 7877,
  283. .vref_delay_usecs = 50, /* internal, no capacitor */
  284. .x_plate_ohms = 419,
  285. .y_plate_ohms = 486,
  286. .pressure_max = 1000,
  287. .pressure_min = 0,
  288. .stopacq_polarity = 1,
  289. .first_conversion_delay = 3,
  290. .acquisition_time = 1,
  291. .averaging = 1,
  292. .pen_down_acc_interval = 1,
  293. };
  294. #endif
  295. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  296. #if defined(CONFIG_MTD_M25P80) \
  297. || defined(CONFIG_MTD_M25P80_MODULE)
  298. {
  299. /* the modalias must be the same as spi device driver name */
  300. .modalias = "m25p80", /* Name of spi_driver for this device */
  301. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  302. .bus_num = 1, /* Framework bus number */
  303. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  304. .platform_data = &bfin_spi_flash_data,
  305. .controller_data = &spi_flash_chip_info,
  306. .mode = SPI_MODE_3,
  307. },
  308. #endif
  309. #if defined(CONFIG_SPI_ADC_BF533) \
  310. || defined(CONFIG_SPI_ADC_BF533_MODULE)
  311. {
  312. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  313. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  314. .bus_num = 1, /* Framework bus number */
  315. .chip_select = 1, /* Framework chip select. */
  316. .platform_data = NULL, /* No spi_driver specific config */
  317. .controller_data = &spi_adc_chip_info,
  318. },
  319. #endif
  320. #if defined(CONFIG_SND_BLACKFIN_AD1836) \
  321. || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  322. {
  323. .modalias = "ad1836-spi",
  324. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  325. .bus_num = 1,
  326. .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
  327. .controller_data = &ad1836_spi_chip_info,
  328. },
  329. #endif
  330. #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
  331. {
  332. .modalias = "ad9960-spi",
  333. .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
  334. .bus_num = 1,
  335. .chip_select = 1,
  336. .controller_data = &ad9960_spi_chip_info,
  337. },
  338. #endif
  339. #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
  340. {
  341. .modalias = "spi_mmc_dummy",
  342. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  343. .bus_num = 1,
  344. .chip_select = 7,
  345. .platform_data = NULL,
  346. .controller_data = &spi_mmc_chip_info,
  347. .mode = SPI_MODE_3,
  348. },
  349. {
  350. .modalias = "spi_mmc",
  351. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  352. .bus_num = 1,
  353. .chip_select = CONFIG_SPI_MMC_CS_CHAN,
  354. .platform_data = NULL,
  355. .controller_data = &spi_mmc_chip_info,
  356. .mode = SPI_MODE_3,
  357. },
  358. #endif
  359. #if defined(CONFIG_PBX)
  360. {
  361. .modalias = "fxs-spi",
  362. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  363. .bus_num = 1,
  364. .chip_select = 3,
  365. .controller_data= &spi_si3xxx_chip_info,
  366. .mode = SPI_MODE_3,
  367. },
  368. {
  369. .modalias = "fxo-spi",
  370. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  371. .bus_num = 1,
  372. .chip_select = 2,
  373. .controller_data= &spi_si3xxx_chip_info,
  374. .mode = SPI_MODE_3,
  375. },
  376. #endif
  377. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  378. {
  379. .modalias = "ad7877",
  380. .platform_data = &bfin_ad7877_ts_info,
  381. .irq = IRQ_PF2,
  382. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  383. .bus_num = 1,
  384. .chip_select = 5,
  385. .controller_data = &spi_ad7877_chip_info,
  386. },
  387. #endif
  388. };
  389. /* SPI controller data */
  390. static struct bfin5xx_spi_master spi_bfin_master_info = {
  391. .num_chipselect = 8,
  392. .enable_dma = 1, /* master has the ability to do dma transfer */
  393. };
  394. static struct platform_device spi_bfin_master_device = {
  395. .name = "bfin-spi-master",
  396. .id = 1, /* Bus number */
  397. .dev = {
  398. .platform_data = &spi_bfin_master_info, /* Passed to driver */
  399. },
  400. };
  401. #endif /* spi master and devices */
  402. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  403. static struct platform_device bfin_fb_device = {
  404. .name = "bf537-fb",
  405. };
  406. #endif
  407. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  408. static struct resource bfin_uart_resources[] = {
  409. {
  410. .start = 0xFFC00400,
  411. .end = 0xFFC004FF,
  412. .flags = IORESOURCE_MEM,
  413. },{
  414. .start = 0xFFC02000,
  415. .end = 0xFFC020FF,
  416. .flags = IORESOURCE_MEM,
  417. },
  418. };
  419. static struct platform_device bfin_uart_device = {
  420. .name = "bfin-uart",
  421. .id = 1,
  422. .num_resources = ARRAY_SIZE(bfin_uart_resources),
  423. .resource = bfin_uart_resources,
  424. };
  425. #endif
  426. static struct platform_device *stamp_devices[] __initdata = {
  427. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  428. &bfin_pcmcia_cf_device,
  429. #endif
  430. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  431. &rtc_device,
  432. #endif
  433. #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
  434. &sl811_hcd_device,
  435. #endif
  436. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  437. &isp1362_hcd_device,
  438. #endif
  439. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  440. &smc91x_device,
  441. #endif
  442. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  443. &bfin_mac_device,
  444. #endif
  445. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  446. &net2272_bfin_device,
  447. #endif
  448. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  449. &spi_bfin_master_device,
  450. #endif
  451. #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
  452. &bfin_fb_device,
  453. #endif
  454. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  455. &bfin_uart_device,
  456. #endif
  457. };
  458. static int __init stamp_init(void)
  459. {
  460. printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
  461. platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
  462. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  463. spi_register_board_info(bfin_spi_board_info,
  464. ARRAY_SIZE(bfin_spi_board_info));
  465. #endif
  466. return 0;
  467. }
  468. arch_initcall(stamp_init);