s3c2412.c 4.6 KB

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  1. /* linux/arch/arm/mach-s3c2412/s3c2412.c
  2. *
  3. * Copyright (c) 2006 Simtec Electronics
  4. * Ben Dooks <ben@simtec.co.uk>
  5. *
  6. * http://armlinux.simtec.co.uk/.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/types.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/list.h>
  16. #include <linux/timer.h>
  17. #include <linux/init.h>
  18. #include <linux/sysdev.h>
  19. #include <linux/serial_core.h>
  20. #include <linux/platform_device.h>
  21. #include <asm/mach/arch.h>
  22. #include <asm/mach/map.h>
  23. #include <asm/mach/irq.h>
  24. #include <asm/hardware.h>
  25. #include <asm/proc-fns.h>
  26. #include <asm/io.h>
  27. #include <asm/irq.h>
  28. #include <asm/arch/idle.h>
  29. #include <asm/arch/regs-clock.h>
  30. #include <asm/arch/regs-serial.h>
  31. #include <asm/arch/regs-power.h>
  32. #include <asm/arch/regs-gpio.h>
  33. #include <asm/arch/regs-gpioj.h>
  34. #include <asm/arch/regs-dsc.h>
  35. #include <asm/arch/regs-spi.h>
  36. #include <asm/plat-s3c24xx/s3c2412.h>
  37. #include <asm/plat-s3c24xx/cpu.h>
  38. #include <asm/plat-s3c24xx/devs.h>
  39. #include <asm/plat-s3c24xx/clock.h>
  40. #include <asm/plat-s3c24xx/pm.h>
  41. #ifndef CONFIG_CPU_S3C2412_ONLY
  42. void __iomem *s3c24xx_va_gpio2 = S3C24XX_VA_GPIO;
  43. static inline void s3c2412_init_gpio2(void)
  44. {
  45. s3c24xx_va_gpio2 = S3C24XX_VA_GPIO + 0x10;
  46. }
  47. #else
  48. #define s3c2412_init_gpio2() do { } while(0)
  49. #endif
  50. /* Initial IO mappings */
  51. static struct map_desc s3c2412_iodesc[] __initdata = {
  52. IODESC_ENT(CLKPWR),
  53. IODESC_ENT(LCD),
  54. IODESC_ENT(TIMER),
  55. IODESC_ENT(WATCHDOG),
  56. };
  57. /* uart registration process */
  58. void __init s3c2412_init_uarts(struct s3c2410_uartcfg *cfg, int no)
  59. {
  60. s3c24xx_init_uartdevs("s3c2412-uart", s3c2410_uart_resources, cfg, no);
  61. /* rename devices that are s3c2412/s3c2413 specific */
  62. s3c_device_sdi.name = "s3c2412-sdi";
  63. s3c_device_lcd.name = "s3c2412-lcd";
  64. s3c_device_nand.name = "s3c2412-nand";
  65. /* spi channel related changes, s3c2412/13 specific */
  66. s3c_device_spi0.name = "s3c2412-spi";
  67. s3c_device_spi0.resource[0].end = S3C24XX_PA_SPI + 0x24;
  68. s3c_device_spi1.name = "s3c2412-spi";
  69. s3c_device_spi1.resource[0].start = S3C24XX_PA_SPI + S3C2412_SPI1;
  70. s3c_device_spi1.resource[0].end = S3C24XX_PA_SPI + S3C2412_SPI1 + 0x24;
  71. }
  72. /* s3c2412_idle
  73. *
  74. * use the standard idle call by ensuring the idle mode
  75. * in power config, then issuing the idle co-processor
  76. * instruction
  77. */
  78. static void s3c2412_idle(void)
  79. {
  80. unsigned long tmp;
  81. /* ensure our idle mode is to go to idle */
  82. tmp = __raw_readl(S3C2412_PWRCFG);
  83. tmp &= ~S3C2412_PWRCFG_STANDBYWFI_MASK;
  84. tmp |= S3C2412_PWRCFG_STANDBYWFI_IDLE;
  85. __raw_writel(tmp, S3C2412_PWRCFG);
  86. cpu_do_idle();
  87. }
  88. /* s3c2412_map_io
  89. *
  90. * register the standard cpu IO areas, and any passed in from the
  91. * machine specific initialisation.
  92. */
  93. void __init s3c2412_map_io(struct map_desc *mach_desc, int mach_size)
  94. {
  95. /* move base of IO */
  96. s3c2412_init_gpio2();
  97. /* set our idle function */
  98. s3c24xx_idle = s3c2412_idle;
  99. /* register our io-tables */
  100. iotable_init(s3c2412_iodesc, ARRAY_SIZE(s3c2412_iodesc));
  101. iotable_init(mach_desc, mach_size);
  102. }
  103. void __init s3c2412_init_clocks(int xtal)
  104. {
  105. unsigned long tmp;
  106. unsigned long fclk;
  107. unsigned long hclk;
  108. unsigned long pclk;
  109. /* now we've got our machine bits initialised, work out what
  110. * clocks we've got */
  111. fclk = s3c2410_get_pll(__raw_readl(S3C2410_MPLLCON), xtal*2);
  112. tmp = __raw_readl(S3C2410_CLKDIVN);
  113. /* work out clock scalings */
  114. hclk = fclk / ((tmp & S3C2412_CLKDIVN_HDIVN_MASK) + 1);
  115. hclk /= ((tmp & S3C2421_CLKDIVN_ARMDIVN) ? 2 : 1);
  116. pclk = hclk / ((tmp & S3C2412_CLKDIVN_PDIVN) ? 2 : 1);
  117. /* print brieft summary of clocks, etc */
  118. printk("S3C2412: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
  119. print_mhz(fclk), print_mhz(hclk), print_mhz(pclk));
  120. /* initialise the clocks here, to allow other things like the
  121. * console to use them
  122. */
  123. s3c24xx_setup_clocks(xtal, fclk, hclk, pclk);
  124. s3c2412_baseclk_add();
  125. }
  126. /* need to register class before we actually register the device, and
  127. * we also need to ensure that it has been initialised before any of the
  128. * drivers even try to use it (even if not on an s3c2412 based system)
  129. * as a driver which may support both 2410 and 2440 may try and use it.
  130. */
  131. struct sysdev_class s3c2412_sysclass = {
  132. set_kset_name("s3c2412-core"),
  133. };
  134. static int __init s3c2412_core_init(void)
  135. {
  136. return sysdev_class_register(&s3c2412_sysclass);
  137. }
  138. core_initcall(s3c2412_core_init);
  139. static struct sys_device s3c2412_sysdev = {
  140. .cls = &s3c2412_sysclass,
  141. };
  142. int __init s3c2412_init(void)
  143. {
  144. printk("S3C2412: Initialising architecture\n");
  145. return sysdev_register(&s3c2412_sysdev);
  146. }