trizeps4.c 12 KB

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  1. /*
  2. * linux/arch/arm/mach-pxa/trizeps4.c
  3. *
  4. * Support for the Keith und Koep Trizeps4 Module Platform.
  5. *
  6. * Author: Jürgen Schindele
  7. * Created: 20 02, 2006
  8. * Copyright: Jürgen Schindele
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/init.h>
  15. #include <linux/kernel.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/sysdev.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/sched.h>
  20. #include <linux/bitops.h>
  21. #include <linux/fb.h>
  22. #include <linux/ioport.h>
  23. #include <linux/delay.h>
  24. #include <linux/serial_8250.h>
  25. #include <linux/mtd/mtd.h>
  26. #include <linux/mtd/physmap.h>
  27. #include <linux/mtd/partitions.h>
  28. #include <asm/types.h>
  29. #include <asm/setup.h>
  30. #include <asm/memory.h>
  31. #include <asm/mach-types.h>
  32. #include <asm/hardware.h>
  33. #include <asm/irq.h>
  34. #include <asm/sizes.h>
  35. #include <asm/mach/arch.h>
  36. #include <asm/mach/map.h>
  37. #include <asm/mach/irq.h>
  38. #include <asm/mach/flash.h>
  39. #include <asm/arch/pxa-regs.h>
  40. #include <asm/arch/trizeps4.h>
  41. #include <asm/arch/audio.h>
  42. #include <asm/arch/pxafb.h>
  43. #include <asm/arch/mmc.h>
  44. #include <asm/arch/irda.h>
  45. #include <asm/arch/ohci.h>
  46. #include "generic.h"
  47. /********************************************************************************************
  48. * ONBOARD FLASH
  49. ********************************************************************************************/
  50. static struct mtd_partition trizeps4_partitions[] = {
  51. {
  52. .name = "Bootloader",
  53. .offset = 0x00000000,
  54. .size = 0x00040000,
  55. .mask_flags = MTD_WRITEABLE /* force read-only */
  56. },{
  57. .name = "Backup",
  58. .offset = 0x00040000,
  59. .size = 0x00040000,
  60. },{
  61. .name = "Image",
  62. .offset = 0x00080000,
  63. .size = 0x01080000,
  64. },{
  65. .name = "IPSM",
  66. .offset = 0x01100000,
  67. .size = 0x00e00000,
  68. },{
  69. .name = "Registry",
  70. .offset = 0x01f00000,
  71. .size = MTDPART_SIZ_FULL,
  72. }
  73. };
  74. static struct physmap_flash_data trizeps4_flash_data[] = {
  75. {
  76. .width = 4, /* bankwidth in bytes */
  77. .parts = trizeps4_partitions,
  78. .nr_parts = ARRAY_SIZE(trizeps4_partitions)
  79. }
  80. };
  81. static struct resource flash_resource = {
  82. .start = PXA_CS0_PHYS,
  83. .end = PXA_CS0_PHYS + SZ_32M - 1,
  84. .flags = IORESOURCE_MEM,
  85. };
  86. static struct platform_device flash_device = {
  87. .name = "physmap-flash",
  88. .id = 0,
  89. .dev = {
  90. .platform_data = trizeps4_flash_data,
  91. },
  92. .resource = &flash_resource,
  93. .num_resources = 1,
  94. };
  95. /********************************************************************************************
  96. * DAVICOM DM9000 Ethernet
  97. ********************************************************************************************/
  98. static struct resource dm9000_resources[] = {
  99. [0] = {
  100. .start = TRIZEPS4_ETH_PHYS+0x300,
  101. .end = TRIZEPS4_ETH_PHYS+0x400-1,
  102. .flags = IORESOURCE_MEM,
  103. },
  104. [1] = {
  105. .start = TRIZEPS4_ETH_PHYS+0x8300,
  106. .end = TRIZEPS4_ETH_PHYS+0x8400-1,
  107. .flags = IORESOURCE_MEM,
  108. },
  109. [2] = {
  110. .start = TRIZEPS4_ETH_IRQ,
  111. .end = TRIZEPS4_ETH_IRQ,
  112. .flags = (IORESOURCE_IRQ | IRQT_RISING),
  113. },
  114. };
  115. static struct platform_device dm9000_device = {
  116. .name = "dm9000",
  117. .id = -1,
  118. .num_resources = ARRAY_SIZE(dm9000_resources),
  119. .resource = dm9000_resources,
  120. };
  121. /********************************************************************************************
  122. * PXA270 serial ports
  123. ********************************************************************************************/
  124. static struct plat_serial8250_port tri_serial_ports[] = {
  125. #ifdef CONFIG_SERIAL_PXA
  126. /* this uses the own PXA driver */
  127. {
  128. 0,
  129. },
  130. #else
  131. /* this uses the generic 8520 driver */
  132. [0] = {
  133. .membase = (void *)&FFUART,
  134. .irq = IRQ_FFUART,
  135. .flags = UPF_BOOT_AUTOCONF,
  136. .iotype = UPIO_MEM32,
  137. .regshift = 2,
  138. .uartclk = (921600*16),
  139. },
  140. [1] = {
  141. .membase = (void *)&BTUART,
  142. .irq = IRQ_BTUART,
  143. .flags = UPF_BOOT_AUTOCONF,
  144. .iotype = UPIO_MEM32,
  145. .regshift = 2,
  146. .uartclk = (921600*16),
  147. },
  148. {
  149. 0,
  150. },
  151. #endif
  152. };
  153. static struct platform_device uart_devices = {
  154. .name = "serial8250",
  155. .id = 0,
  156. .dev = {
  157. .platform_data = tri_serial_ports,
  158. },
  159. .num_resources = 0,
  160. .resource = NULL,
  161. };
  162. /********************************************************************************************
  163. * PXA270 ac97 sound codec
  164. ********************************************************************************************/
  165. static struct platform_device ac97_audio_device = {
  166. .name = "pxa2xx-ac97",
  167. .id = -1,
  168. };
  169. static struct platform_device * trizeps4_devices[] __initdata = {
  170. &flash_device,
  171. &uart_devices,
  172. &dm9000_device,
  173. &ac97_audio_device,
  174. };
  175. #ifdef CONFIG_MACH_TRIZEPS4_CONXS
  176. static short trizeps_conxs_bcr;
  177. /* PCCARD power switching supports only 3,3V */
  178. void board_pcmcia_power(int power)
  179. {
  180. if (power) {
  181. /* switch power on, put in reset and enable buffers */
  182. trizeps_conxs_bcr |= power;
  183. trizeps_conxs_bcr |= ConXS_BCR_CF_RESET;
  184. trizeps_conxs_bcr &= ~(ConXS_BCR_CF_BUF_EN);
  185. ConXS_BCR = trizeps_conxs_bcr;
  186. /* wait a little */
  187. udelay(2000);
  188. /* take reset away */
  189. trizeps_conxs_bcr &= ~(ConXS_BCR_CF_RESET);
  190. ConXS_BCR = trizeps_conxs_bcr;
  191. udelay(2000);
  192. } else {
  193. /* put in reset */
  194. trizeps_conxs_bcr |= ConXS_BCR_CF_RESET;
  195. ConXS_BCR = trizeps_conxs_bcr;
  196. udelay(1000);
  197. /* switch power off */
  198. trizeps_conxs_bcr &= ~(0xf);
  199. ConXS_BCR = trizeps_conxs_bcr;
  200. }
  201. pr_debug("%s: o%s 0x%x\n", __FUNCTION__, power ? "n": "ff", trizeps_conxs_bcr);
  202. }
  203. /* backlight power switching for LCD panel */
  204. static void board_backlight_power(int on)
  205. {
  206. if (on) {
  207. trizeps_conxs_bcr |= ConXS_BCR_L_DISP;
  208. } else {
  209. trizeps_conxs_bcr &= ~ConXS_BCR_L_DISP;
  210. }
  211. pr_debug("%s: o%s 0x%x\n", __FUNCTION__, on ? "n" : "ff", trizeps_conxs_bcr);
  212. ConXS_BCR = trizeps_conxs_bcr;
  213. }
  214. /* Powersupply for MMC/SD cardslot */
  215. static void board_mci_power(struct device *dev, unsigned int vdd)
  216. {
  217. struct pxamci_platform_data* p_d = dev->platform_data;
  218. if (( 1 << vdd) & p_d->ocr_mask) {
  219. pr_debug("%s: on\n", __FUNCTION__);
  220. /* FIXME fill in values here */
  221. } else {
  222. pr_debug("%s: off\n", __FUNCTION__);
  223. /* FIXME fill in values here */
  224. }
  225. }
  226. static short trizeps_conxs_ircr;
  227. /* Switch modes and Power for IRDA receiver */
  228. static void board_irda_mode(struct device *dev, int mode)
  229. {
  230. unsigned long flags;
  231. local_irq_save(flags);
  232. if (mode & IR_SIRMODE) {
  233. /* Slow mode */
  234. trizeps_conxs_ircr &= ~ConXS_IRCR_MODE;
  235. } else if (mode & IR_FIRMODE) {
  236. /* Fast mode */
  237. trizeps_conxs_ircr |= ConXS_IRCR_MODE;
  238. }
  239. if (mode & IR_OFF) {
  240. trizeps_conxs_ircr |= ConXS_IRCR_SD;
  241. } else {
  242. trizeps_conxs_ircr &= ~ConXS_IRCR_SD;
  243. }
  244. /* FIXME write values to register */
  245. local_irq_restore(flags);
  246. }
  247. #else
  248. /* for other baseboards define dummies */
  249. void board_pcmcia_power(int power) {;}
  250. #define board_backlight_power NULL
  251. #define board_mci_power NULL
  252. #define board_irda_mode NULL
  253. #endif /* CONFIG_MACH_TRIZEPS4_CONXS */
  254. EXPORT_SYMBOL(board_pcmcia_power);
  255. static int trizeps4_mci_init(struct device *dev, irq_handler_t mci_detect_int, void *data)
  256. {
  257. int err;
  258. /* setup GPIO for PXA27x MMC controller */
  259. pxa_gpio_mode(GPIO32_MMCCLK_MD);
  260. pxa_gpio_mode(GPIO112_MMCCMD_MD);
  261. pxa_gpio_mode(GPIO92_MMCDAT0_MD);
  262. pxa_gpio_mode(GPIO109_MMCDAT1_MD);
  263. pxa_gpio_mode(GPIO110_MMCDAT2_MD);
  264. pxa_gpio_mode(GPIO111_MMCDAT3_MD);
  265. pxa_gpio_mode(GPIO_MMC_DET | GPIO_IN);
  266. err = request_irq(TRIZEPS4_MMC_IRQ, mci_detect_int,
  267. IRQF_DISABLED | IRQF_TRIGGER_RISING,
  268. "MMC card detect", data);
  269. if (err) {
  270. printk(KERN_ERR "trizeps4_mci_init: MMC/SD: can't request MMC card detect IRQ\n");
  271. return -1;
  272. }
  273. return 0;
  274. }
  275. static void trizeps4_mci_exit(struct device *dev, void *data)
  276. {
  277. free_irq(TRIZEPS4_MMC_IRQ, data);
  278. }
  279. static struct pxamci_platform_data trizeps4_mci_platform_data = {
  280. .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
  281. .init = trizeps4_mci_init,
  282. .exit = trizeps4_mci_exit,
  283. .setpower = board_mci_power,
  284. };
  285. static struct pxaficp_platform_data trizeps4_ficp_platform_data = {
  286. .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF,
  287. .transceiver_mode = board_irda_mode,
  288. };
  289. static int trizeps4_ohci_init(struct device *dev)
  290. {
  291. /* setup Port1 GPIO pin. */
  292. pxa_gpio_mode( 88 | GPIO_ALT_FN_1_IN); /* USBHPWR1 */
  293. pxa_gpio_mode( 89 | GPIO_ALT_FN_2_OUT); /* USBHPEN1 */
  294. /* Set the Power Control Polarity Low and Power Sense
  295. Polarity Low to active low. */
  296. UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
  297. ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE);
  298. return 0;
  299. }
  300. static void trizeps4_ohci_exit(struct device *dev)
  301. {
  302. ;
  303. }
  304. static struct pxaohci_platform_data trizeps4_ohci_platform_data = {
  305. .port_mode = PMM_PERPORT_MODE,
  306. .init = trizeps4_ohci_init,
  307. .exit = trizeps4_ohci_exit,
  308. };
  309. static struct map_desc trizeps4_io_desc[] __initdata = {
  310. { /* ConXS CFSR */
  311. .virtual = TRIZEPS4_CFSR_VIRT,
  312. .pfn = __phys_to_pfn(TRIZEPS4_CFSR_PHYS),
  313. .length = 0x00001000,
  314. .type = MT_DEVICE
  315. },
  316. { /* ConXS BCR */
  317. .virtual = TRIZEPS4_BOCR_VIRT,
  318. .pfn = __phys_to_pfn(TRIZEPS4_BOCR_PHYS),
  319. .length = 0x00001000,
  320. .type = MT_DEVICE
  321. },
  322. { /* ConXS IRCR */
  323. .virtual = TRIZEPS4_IRCR_VIRT,
  324. .pfn = __phys_to_pfn(TRIZEPS4_IRCR_PHYS),
  325. .length = 0x00001000,
  326. .type = MT_DEVICE
  327. },
  328. { /* ConXS DCR */
  329. .virtual = TRIZEPS4_DICR_VIRT,
  330. .pfn = __phys_to_pfn(TRIZEPS4_DICR_PHYS),
  331. .length = 0x00001000,
  332. .type = MT_DEVICE
  333. },
  334. { /* ConXS UPSR */
  335. .virtual = TRIZEPS4_UPSR_VIRT,
  336. .pfn = __phys_to_pfn(TRIZEPS4_UPSR_PHYS),
  337. .length = 0x00001000,
  338. .type = MT_DEVICE
  339. }
  340. };
  341. static struct pxafb_mode_info sharp_lcd_mode = {
  342. .pixclock = 78000,
  343. .xres = 640,
  344. .yres = 480,
  345. .bpp = 8,
  346. .hsync_len = 4,
  347. .left_margin = 4,
  348. .right_margin = 4,
  349. .vsync_len = 2,
  350. .upper_margin = 0,
  351. .lower_margin = 0,
  352. .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
  353. .cmap_greyscale = 0,
  354. };
  355. static struct pxafb_mach_info sharp_lcd = {
  356. .modes = &sharp_lcd_mode,
  357. .num_modes = 1,
  358. .cmap_inverse = 0,
  359. .cmap_static = 0,
  360. .lccr0 = LCCR0_Color | LCCR0_Pas | LCCR0_Dual,
  361. .lccr3 = 0x0340ff02,
  362. .pxafb_backlight_power = board_backlight_power,
  363. };
  364. static struct pxafb_mode_info toshiba_lcd_mode = {
  365. .pixclock = 39720,
  366. .xres = 640,
  367. .yres = 480,
  368. .bpp = 8,
  369. .hsync_len = 63,
  370. .left_margin = 12,
  371. .right_margin = 12,
  372. .vsync_len = 4,
  373. .upper_margin = 32,
  374. .lower_margin = 10,
  375. .sync = 0,
  376. .cmap_greyscale = 0,
  377. };
  378. static struct pxafb_mach_info toshiba_lcd = {
  379. .modes = &toshiba_lcd_mode,
  380. .num_modes = 1,
  381. .cmap_inverse = 0,
  382. .cmap_static = 0,
  383. .lccr0 = LCCR0_Color | LCCR0_Act,
  384. .lccr3 = 0x03400002,
  385. .pxafb_backlight_power = board_backlight_power,
  386. };
  387. static void __init trizeps4_init(void)
  388. {
  389. platform_add_devices(trizeps4_devices, ARRAY_SIZE(trizeps4_devices));
  390. /* set_pxa_fb_info(&sharp_lcd); */
  391. set_pxa_fb_info(&toshiba_lcd);
  392. pxa_set_mci_info(&trizeps4_mci_platform_data);
  393. pxa_set_ficp_info(&trizeps4_ficp_platform_data);
  394. pxa_set_ohci_info(&trizeps4_ohci_platform_data);
  395. }
  396. static void __init trizeps4_map_io(void)
  397. {
  398. pxa_map_io();
  399. iotable_init(trizeps4_io_desc, ARRAY_SIZE(trizeps4_io_desc));
  400. /* for DiskOnChip */
  401. pxa_gpio_mode(GPIO15_nCS_1_MD);
  402. /* for off-module PIC on ConXS board */
  403. pxa_gpio_mode(GPIO_PIC | GPIO_IN);
  404. /* UCB1400 irq */
  405. pxa_gpio_mode(GPIO_UCB1400 | GPIO_IN);
  406. /* for DM9000 LAN */
  407. pxa_gpio_mode(GPIO78_nCS_2_MD);
  408. pxa_gpio_mode(GPIO_DM9000 | GPIO_IN);
  409. /* for PCMCIA device */
  410. pxa_gpio_mode(GPIO_PCD | GPIO_IN);
  411. pxa_gpio_mode(GPIO_PRDY | GPIO_IN);
  412. /* for I2C adapter */
  413. pxa_gpio_mode(GPIO117_I2CSCL_MD);
  414. pxa_gpio_mode(GPIO118_I2CSDA_MD);
  415. /* MMC_DET s.o. */
  416. pxa_gpio_mode(GPIO_MMC_DET | GPIO_IN);
  417. /* whats that for ??? */
  418. pxa_gpio_mode(GPIO79_nCS_3_MD);
  419. #ifdef CONFIG_LEDS
  420. pxa_gpio_mode( GPIO_SYS_BUSY_LED | GPIO_OUT); /* LED1 */
  421. pxa_gpio_mode( GPIO_HEARTBEAT_LED | GPIO_OUT); /* LED2 */
  422. #endif
  423. #ifdef CONFIG_MACH_TRIZEPS4_CONXS
  424. #ifdef CONFIG_IDE_PXA_CF
  425. /* if boot direct from compact flash dont disable power */
  426. trizeps_conxs_bcr = 0x0009;
  427. #else
  428. /* this is the reset value */
  429. trizeps_conxs_bcr = 0x00A0;
  430. #endif
  431. ConXS_BCR = trizeps_conxs_bcr;
  432. #endif
  433. PWER = 0x00000002;
  434. PFER = 0x00000000;
  435. PRER = 0x00000002;
  436. PGSR0 = 0x0158C000;
  437. PGSR1 = 0x00FF0080;
  438. PGSR2 = 0x0001C004;
  439. /* Stop 3.6MHz and drive HIGH to PCMCIA and CS */
  440. PCFR |= PCFR_OPDE;
  441. }
  442. MACHINE_START(TRIZEPS4, "Keith und Koep Trizeps IV module")
  443. /* MAINTAINER("Jürgen Schindele") */
  444. .phys_io = 0x40000000,
  445. .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
  446. .boot_params = TRIZEPS4_SDRAM_BASE + 0x100,
  447. .init_machine = trizeps4_init,
  448. .map_io = trizeps4_map_io,
  449. .init_irq = pxa_init_irq,
  450. .timer = &pxa_timer,
  451. MACHINE_END