4965.c 60 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17. *
  18. * The full GNU General Public License is included in this distribution in the
  19. * file called LICENSE.
  20. *
  21. * Contact Information:
  22. * Intel Linux Wireless <ilw@linux.intel.com>
  23. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24. *
  25. *****************************************************************************/
  26. #include <linux/kernel.h>
  27. #include <linux/module.h>
  28. #include <linux/init.h>
  29. #include <linux/pci.h>
  30. #include <linux/dma-mapping.h>
  31. #include <linux/delay.h>
  32. #include <linux/sched.h>
  33. #include <linux/skbuff.h>
  34. #include <linux/netdevice.h>
  35. #include <net/mac80211.h>
  36. #include <linux/etherdevice.h>
  37. #include <asm/unaligned.h>
  38. #include "iwl-eeprom.h"
  39. #include "iwl-dev.h"
  40. #include "iwl-core.h"
  41. #include "iwl-io.h"
  42. #include "iwl-helpers.h"
  43. #include "iwl-4965-calib.h"
  44. #include "iwl-sta.h"
  45. #include "iwl-4965.h"
  46. #include "iwl-4965-debugfs.h"
  47. /* Send led command */
  48. static int
  49. il4965_send_led_cmd(struct il_priv *il, struct il_led_cmd *led_cmd)
  50. {
  51. struct il_host_cmd cmd = {
  52. .id = REPLY_LEDS_CMD,
  53. .len = sizeof(struct il_led_cmd),
  54. .data = led_cmd,
  55. .flags = CMD_ASYNC,
  56. .callback = NULL,
  57. };
  58. u32 reg;
  59. reg = _il_rd(il, CSR_LED_REG);
  60. if (reg != (reg & CSR_LED_BSM_CTRL_MSK))
  61. _il_wr(il, CSR_LED_REG, reg & CSR_LED_BSM_CTRL_MSK);
  62. return il_send_cmd(il, &cmd);
  63. }
  64. /* Set led register off */
  65. void il4965_led_enable(struct il_priv *il)
  66. {
  67. _il_wr(il, CSR_LED_REG, CSR_LED_REG_TRUN_ON);
  68. }
  69. const struct il_led_ops il4965_led_ops = {
  70. .cmd = il4965_send_led_cmd,
  71. };
  72. static int il4965_send_tx_power(struct il_priv *il);
  73. static int il4965_hw_get_temperature(struct il_priv *il);
  74. /* Highest firmware API version supported */
  75. #define IL4965_UCODE_API_MAX 2
  76. /* Lowest firmware API version supported */
  77. #define IL4965_UCODE_API_MIN 2
  78. #define IL4965_FW_PRE "iwlwifi-4965-"
  79. #define _IL4965_MODULE_FIRMWARE(api) IL4965_FW_PRE #api ".ucode"
  80. #define IL4965_MODULE_FIRMWARE(api) _IL4965_MODULE_FIRMWARE(api)
  81. /* check contents of special bootstrap uCode SRAM */
  82. static int il4965_verify_bsm(struct il_priv *il)
  83. {
  84. __le32 *image = il->ucode_boot.v_addr;
  85. u32 len = il->ucode_boot.len;
  86. u32 reg;
  87. u32 val;
  88. D_INFO("Begin verify bsm\n");
  89. /* verify BSM SRAM contents */
  90. val = il_rd_prph(il, BSM_WR_DWCOUNT_REG);
  91. for (reg = BSM_SRAM_LOWER_BOUND;
  92. reg < BSM_SRAM_LOWER_BOUND + len;
  93. reg += sizeof(u32), image++) {
  94. val = il_rd_prph(il, reg);
  95. if (val != le32_to_cpu(*image)) {
  96. IL_ERR("BSM uCode verification failed at "
  97. "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
  98. BSM_SRAM_LOWER_BOUND,
  99. reg - BSM_SRAM_LOWER_BOUND, len,
  100. val, le32_to_cpu(*image));
  101. return -EIO;
  102. }
  103. }
  104. D_INFO("BSM bootstrap uCode image OK\n");
  105. return 0;
  106. }
  107. /**
  108. * il4965_load_bsm - Load bootstrap instructions
  109. *
  110. * BSM operation:
  111. *
  112. * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
  113. * in special SRAM that does not power down during RFKILL. When powering back
  114. * up after power-saving sleeps (or during initial uCode load), the BSM loads
  115. * the bootstrap program into the on-board processor, and starts it.
  116. *
  117. * The bootstrap program loads (via DMA) instructions and data for a new
  118. * program from host DRAM locations indicated by the host driver in the
  119. * BSM_DRAM_* registers. Once the new program is loaded, it starts
  120. * automatically.
  121. *
  122. * When initializing the NIC, the host driver points the BSM to the
  123. * "initialize" uCode image. This uCode sets up some internal data, then
  124. * notifies host via "initialize alive" that it is complete.
  125. *
  126. * The host then replaces the BSM_DRAM_* pointer values to point to the
  127. * normal runtime uCode instructions and a backup uCode data cache buffer
  128. * (filled initially with starting data values for the on-board processor),
  129. * then triggers the "initialize" uCode to load and launch the runtime uCode,
  130. * which begins normal operation.
  131. *
  132. * When doing a power-save shutdown, runtime uCode saves data SRAM into
  133. * the backup data cache in DRAM before SRAM is powered down.
  134. *
  135. * When powering back up, the BSM loads the bootstrap program. This reloads
  136. * the runtime uCode instructions and the backup data cache into SRAM,
  137. * and re-launches the runtime uCode from where it left off.
  138. */
  139. static int il4965_load_bsm(struct il_priv *il)
  140. {
  141. __le32 *image = il->ucode_boot.v_addr;
  142. u32 len = il->ucode_boot.len;
  143. dma_addr_t pinst;
  144. dma_addr_t pdata;
  145. u32 inst_len;
  146. u32 data_len;
  147. int i;
  148. u32 done;
  149. u32 reg_offset;
  150. int ret;
  151. D_INFO("Begin load bsm\n");
  152. il->ucode_type = UCODE_RT;
  153. /* make sure bootstrap program is no larger than BSM's SRAM size */
  154. if (len > IL49_MAX_BSM_SIZE)
  155. return -EINVAL;
  156. /* Tell bootstrap uCode where to find the "Initialize" uCode
  157. * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
  158. * NOTE: il_init_alive_start() will replace these values,
  159. * after the "initialize" uCode has run, to point to
  160. * runtime/protocol instructions and backup data cache.
  161. */
  162. pinst = il->ucode_init.p_addr >> 4;
  163. pdata = il->ucode_init_data.p_addr >> 4;
  164. inst_len = il->ucode_init.len;
  165. data_len = il->ucode_init_data.len;
  166. il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst);
  167. il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata);
  168. il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
  169. il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
  170. /* Fill BSM memory with bootstrap instructions */
  171. for (reg_offset = BSM_SRAM_LOWER_BOUND;
  172. reg_offset < BSM_SRAM_LOWER_BOUND + len;
  173. reg_offset += sizeof(u32), image++)
  174. _il_wr_prph(il, reg_offset, le32_to_cpu(*image));
  175. ret = il4965_verify_bsm(il);
  176. if (ret)
  177. return ret;
  178. /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
  179. il_wr_prph(il, BSM_WR_MEM_SRC_REG, 0x0);
  180. il_wr_prph(il,
  181. BSM_WR_MEM_DST_REG, IL49_RTC_INST_LOWER_BOUND);
  182. il_wr_prph(il, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
  183. /* Load bootstrap code into instruction SRAM now,
  184. * to prepare to load "initialize" uCode */
  185. il_wr_prph(il, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
  186. /* Wait for load of bootstrap uCode to finish */
  187. for (i = 0; i < 100; i++) {
  188. done = il_rd_prph(il, BSM_WR_CTRL_REG);
  189. if (!(done & BSM_WR_CTRL_REG_BIT_START))
  190. break;
  191. udelay(10);
  192. }
  193. if (i < 100)
  194. D_INFO("BSM write complete, poll %d iterations\n", i);
  195. else {
  196. IL_ERR("BSM write did not complete!\n");
  197. return -EIO;
  198. }
  199. /* Enable future boot loads whenever power management unit triggers it
  200. * (e.g. when powering back up after power-save shutdown) */
  201. il_wr_prph(il,
  202. BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
  203. return 0;
  204. }
  205. /**
  206. * il4965_set_ucode_ptrs - Set uCode address location
  207. *
  208. * Tell initialization uCode where to find runtime uCode.
  209. *
  210. * BSM registers initially contain pointers to initialization uCode.
  211. * We need to replace them to load runtime uCode inst and data,
  212. * and to save runtime data when powering down.
  213. */
  214. static int il4965_set_ucode_ptrs(struct il_priv *il)
  215. {
  216. dma_addr_t pinst;
  217. dma_addr_t pdata;
  218. int ret = 0;
  219. /* bits 35:4 for 4965 */
  220. pinst = il->ucode_code.p_addr >> 4;
  221. pdata = il->ucode_data_backup.p_addr >> 4;
  222. /* Tell bootstrap uCode where to find image to load */
  223. il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst);
  224. il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata);
  225. il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG,
  226. il->ucode_data.len);
  227. /* Inst byte count must be last to set up, bit 31 signals uCode
  228. * that all new ptr/size info is in place */
  229. il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG,
  230. il->ucode_code.len | BSM_DRAM_INST_LOAD);
  231. D_INFO("Runtime uCode pointers are set.\n");
  232. return ret;
  233. }
  234. /**
  235. * il4965_init_alive_start - Called after REPLY_ALIVE notification received
  236. *
  237. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  238. *
  239. * The 4965 "initialize" ALIVE reply contains calibration data for:
  240. * Voltage, temperature, and MIMO tx gain correction, now stored in il
  241. * (3945 does not contain this data).
  242. *
  243. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  244. */
  245. static void il4965_init_alive_start(struct il_priv *il)
  246. {
  247. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  248. * This is a paranoid check, because we would not have gotten the
  249. * "initialize" alive if code weren't properly loaded. */
  250. if (il4965_verify_ucode(il)) {
  251. /* Runtime instruction load was bad;
  252. * take it all the way back down so we can try again */
  253. D_INFO("Bad \"initialize\" uCode load.\n");
  254. goto restart;
  255. }
  256. /* Calculate temperature */
  257. il->temperature = il4965_hw_get_temperature(il);
  258. /* Send pointers to protocol/runtime uCode image ... init code will
  259. * load and launch runtime uCode, which will send us another "Alive"
  260. * notification. */
  261. D_INFO("Initialization Alive received.\n");
  262. if (il4965_set_ucode_ptrs(il)) {
  263. /* Runtime instruction load won't happen;
  264. * take it all the way back down so we can try again */
  265. D_INFO("Couldn't set up uCode pointers.\n");
  266. goto restart;
  267. }
  268. return;
  269. restart:
  270. queue_work(il->workqueue, &il->restart);
  271. }
  272. static bool iw4965_is_ht40_channel(__le32 rxon_flags)
  273. {
  274. int chan_mod = le32_to_cpu(rxon_flags & RXON_FLG_CHANNEL_MODE_MSK)
  275. >> RXON_FLG_CHANNEL_MODE_POS;
  276. return (chan_mod == CHANNEL_MODE_PURE_40 ||
  277. chan_mod == CHANNEL_MODE_MIXED);
  278. }
  279. static void il4965_nic_config(struct il_priv *il)
  280. {
  281. unsigned long flags;
  282. u16 radio_cfg;
  283. spin_lock_irqsave(&il->lock, flags);
  284. radio_cfg = il_eeprom_query16(il, EEPROM_RADIO_CONFIG);
  285. /* write radio config values to register */
  286. if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX)
  287. il_set_bit(il, CSR_HW_IF_CONFIG_REG,
  288. EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
  289. EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
  290. EEPROM_RF_CFG_DASH_MSK(radio_cfg));
  291. /* set CSR_HW_CONFIG_REG for uCode use */
  292. il_set_bit(il, CSR_HW_IF_CONFIG_REG,
  293. CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
  294. CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
  295. il->calib_info = (struct il_eeprom_calib_info *)
  296. il_eeprom_query_addr(il,
  297. EEPROM_4965_CALIB_TXPOWER_OFFSET);
  298. spin_unlock_irqrestore(&il->lock, flags);
  299. }
  300. /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
  301. * Called after every association, but this runs only once!
  302. * ... once chain noise is calibrated the first time, it's good forever. */
  303. static void il4965_chain_noise_reset(struct il_priv *il)
  304. {
  305. struct il_chain_noise_data *data = &(il->chain_noise_data);
  306. if (data->state == IL_CHAIN_NOISE_ALIVE &&
  307. il_is_any_associated(il)) {
  308. struct il_calib_diff_gain_cmd cmd;
  309. /* clear data for chain noise calibration algorithm */
  310. data->chain_noise_a = 0;
  311. data->chain_noise_b = 0;
  312. data->chain_noise_c = 0;
  313. data->chain_signal_a = 0;
  314. data->chain_signal_b = 0;
  315. data->chain_signal_c = 0;
  316. data->beacon_count = 0;
  317. memset(&cmd, 0, sizeof(cmd));
  318. cmd.hdr.op_code = IL_PHY_CALIBRATE_DIFF_GAIN_CMD;
  319. cmd.diff_gain_a = 0;
  320. cmd.diff_gain_b = 0;
  321. cmd.diff_gain_c = 0;
  322. if (il_send_cmd_pdu(il, REPLY_PHY_CALIBRATION_CMD,
  323. sizeof(cmd), &cmd))
  324. IL_ERR(
  325. "Could not send REPLY_PHY_CALIBRATION_CMD\n");
  326. data->state = IL_CHAIN_NOISE_ACCUMULATE;
  327. D_CALIB("Run chain_noise_calibrate\n");
  328. }
  329. }
  330. static struct il_sensitivity_ranges il4965_sensitivity = {
  331. .min_nrg_cck = 97,
  332. .max_nrg_cck = 0, /* not used, set to 0 */
  333. .auto_corr_min_ofdm = 85,
  334. .auto_corr_min_ofdm_mrc = 170,
  335. .auto_corr_min_ofdm_x1 = 105,
  336. .auto_corr_min_ofdm_mrc_x1 = 220,
  337. .auto_corr_max_ofdm = 120,
  338. .auto_corr_max_ofdm_mrc = 210,
  339. .auto_corr_max_ofdm_x1 = 140,
  340. .auto_corr_max_ofdm_mrc_x1 = 270,
  341. .auto_corr_min_cck = 125,
  342. .auto_corr_max_cck = 200,
  343. .auto_corr_min_cck_mrc = 200,
  344. .auto_corr_max_cck_mrc = 400,
  345. .nrg_th_cck = 100,
  346. .nrg_th_ofdm = 100,
  347. .barker_corr_th_min = 190,
  348. .barker_corr_th_min_mrc = 390,
  349. .nrg_th_cca = 62,
  350. };
  351. static void il4965_set_ct_threshold(struct il_priv *il)
  352. {
  353. /* want Kelvin */
  354. il->hw_params.ct_kill_threshold =
  355. CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD_LEGACY);
  356. }
  357. /**
  358. * il4965_hw_set_hw_params
  359. *
  360. * Called when initializing driver
  361. */
  362. static int il4965_hw_set_hw_params(struct il_priv *il)
  363. {
  364. if (il->cfg->mod_params->num_of_queues >= IL_MIN_NUM_QUEUES &&
  365. il->cfg->mod_params->num_of_queues <= IL49_NUM_QUEUES)
  366. il->cfg->base_params->num_of_queues =
  367. il->cfg->mod_params->num_of_queues;
  368. il->hw_params.max_txq_num = il->cfg->base_params->num_of_queues;
  369. il->hw_params.dma_chnl_num = FH49_TCSR_CHNL_NUM;
  370. il->hw_params.scd_bc_tbls_size =
  371. il->cfg->base_params->num_of_queues *
  372. sizeof(struct il4965_scd_bc_tbl);
  373. il->hw_params.tfd_size = sizeof(struct il_tfd);
  374. il->hw_params.max_stations = IL4965_STATION_COUNT;
  375. il->ctx.bcast_sta_id = IL4965_BROADCAST_ID;
  376. il->hw_params.max_data_size = IL49_RTC_DATA_SIZE;
  377. il->hw_params.max_inst_size = IL49_RTC_INST_SIZE;
  378. il->hw_params.max_bsm_size = BSM_SRAM_SIZE;
  379. il->hw_params.ht40_channel = BIT(IEEE80211_BAND_5GHZ);
  380. il->hw_params.rx_wrt_ptr_reg = FH_RSCSR_CHNL0_WPTR;
  381. il->hw_params.tx_chains_num = il4965_num_of_ant(il->cfg->valid_tx_ant);
  382. il->hw_params.rx_chains_num = il4965_num_of_ant(il->cfg->valid_rx_ant);
  383. il->hw_params.valid_tx_ant = il->cfg->valid_tx_ant;
  384. il->hw_params.valid_rx_ant = il->cfg->valid_rx_ant;
  385. il4965_set_ct_threshold(il);
  386. il->hw_params.sens = &il4965_sensitivity;
  387. il->hw_params.beacon_time_tsf_bits = IL4965_EXT_BEACON_TIME_POS;
  388. return 0;
  389. }
  390. static s32 il4965_math_div_round(s32 num, s32 denom, s32 *res)
  391. {
  392. s32 sign = 1;
  393. if (num < 0) {
  394. sign = -sign;
  395. num = -num;
  396. }
  397. if (denom < 0) {
  398. sign = -sign;
  399. denom = -denom;
  400. }
  401. *res = 1;
  402. *res = ((num * 2 + denom) / (denom * 2)) * sign;
  403. return 1;
  404. }
  405. /**
  406. * il4965_get_voltage_compensation - Power supply voltage comp for txpower
  407. *
  408. * Determines power supply voltage compensation for txpower calculations.
  409. * Returns number of 1/2-dB steps to subtract from gain table idx,
  410. * to compensate for difference between power supply voltage during
  411. * factory measurements, vs. current power supply voltage.
  412. *
  413. * Voltage indication is higher for lower voltage.
  414. * Lower voltage requires more gain (lower gain table idx).
  415. */
  416. static s32 il4965_get_voltage_compensation(s32 eeprom_voltage,
  417. s32 current_voltage)
  418. {
  419. s32 comp = 0;
  420. if (TX_POWER_IL_ILLEGAL_VOLTAGE == eeprom_voltage ||
  421. TX_POWER_IL_ILLEGAL_VOLTAGE == current_voltage)
  422. return 0;
  423. il4965_math_div_round(current_voltage - eeprom_voltage,
  424. TX_POWER_IL_VOLTAGE_CODES_PER_03V, &comp);
  425. if (current_voltage > eeprom_voltage)
  426. comp *= 2;
  427. if ((comp < -2) || (comp > 2))
  428. comp = 0;
  429. return comp;
  430. }
  431. static s32 il4965_get_tx_atten_grp(u16 channel)
  432. {
  433. if (channel >= CALIB_IL_TX_ATTEN_GR5_FCH &&
  434. channel <= CALIB_IL_TX_ATTEN_GR5_LCH)
  435. return CALIB_CH_GROUP_5;
  436. if (channel >= CALIB_IL_TX_ATTEN_GR1_FCH &&
  437. channel <= CALIB_IL_TX_ATTEN_GR1_LCH)
  438. return CALIB_CH_GROUP_1;
  439. if (channel >= CALIB_IL_TX_ATTEN_GR2_FCH &&
  440. channel <= CALIB_IL_TX_ATTEN_GR2_LCH)
  441. return CALIB_CH_GROUP_2;
  442. if (channel >= CALIB_IL_TX_ATTEN_GR3_FCH &&
  443. channel <= CALIB_IL_TX_ATTEN_GR3_LCH)
  444. return CALIB_CH_GROUP_3;
  445. if (channel >= CALIB_IL_TX_ATTEN_GR4_FCH &&
  446. channel <= CALIB_IL_TX_ATTEN_GR4_LCH)
  447. return CALIB_CH_GROUP_4;
  448. return -EINVAL;
  449. }
  450. static u32 il4965_get_sub_band(const struct il_priv *il, u32 channel)
  451. {
  452. s32 b = -1;
  453. for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
  454. if (il->calib_info->band_info[b].ch_from == 0)
  455. continue;
  456. if (channel >= il->calib_info->band_info[b].ch_from &&
  457. channel <= il->calib_info->band_info[b].ch_to)
  458. break;
  459. }
  460. return b;
  461. }
  462. static s32 il4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
  463. {
  464. s32 val;
  465. if (x2 == x1)
  466. return y1;
  467. else {
  468. il4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
  469. return val + y2;
  470. }
  471. }
  472. /**
  473. * il4965_interpolate_chan - Interpolate factory measurements for one channel
  474. *
  475. * Interpolates factory measurements from the two sample channels within a
  476. * sub-band, to apply to channel of interest. Interpolation is proportional to
  477. * differences in channel frequencies, which is proportional to differences
  478. * in channel number.
  479. */
  480. static int il4965_interpolate_chan(struct il_priv *il, u32 channel,
  481. struct il_eeprom_calib_ch_info *chan_info)
  482. {
  483. s32 s = -1;
  484. u32 c;
  485. u32 m;
  486. const struct il_eeprom_calib_measure *m1;
  487. const struct il_eeprom_calib_measure *m2;
  488. struct il_eeprom_calib_measure *omeas;
  489. u32 ch_i1;
  490. u32 ch_i2;
  491. s = il4965_get_sub_band(il, channel);
  492. if (s >= EEPROM_TX_POWER_BANDS) {
  493. IL_ERR("Tx Power can not find channel %d\n", channel);
  494. return -1;
  495. }
  496. ch_i1 = il->calib_info->band_info[s].ch1.ch_num;
  497. ch_i2 = il->calib_info->band_info[s].ch2.ch_num;
  498. chan_info->ch_num = (u8) channel;
  499. D_TXPOWER("channel %d subband %d factory cal ch %d & %d\n",
  500. channel, s, ch_i1, ch_i2);
  501. for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
  502. for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
  503. m1 = &(il->calib_info->band_info[s].ch1.
  504. measurements[c][m]);
  505. m2 = &(il->calib_info->band_info[s].ch2.
  506. measurements[c][m]);
  507. omeas = &(chan_info->measurements[c][m]);
  508. omeas->actual_pow =
  509. (u8) il4965_interpolate_value(channel, ch_i1,
  510. m1->actual_pow,
  511. ch_i2,
  512. m2->actual_pow);
  513. omeas->gain_idx =
  514. (u8) il4965_interpolate_value(channel, ch_i1,
  515. m1->gain_idx, ch_i2,
  516. m2->gain_idx);
  517. omeas->temperature =
  518. (u8) il4965_interpolate_value(channel, ch_i1,
  519. m1->temperature,
  520. ch_i2,
  521. m2->temperature);
  522. omeas->pa_det =
  523. (s8) il4965_interpolate_value(channel, ch_i1,
  524. m1->pa_det, ch_i2,
  525. m2->pa_det);
  526. D_TXPOWER(
  527. "chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
  528. m1->actual_pow, m2->actual_pow, omeas->actual_pow);
  529. D_TXPOWER(
  530. "chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
  531. m1->gain_idx, m2->gain_idx, omeas->gain_idx);
  532. D_TXPOWER(
  533. "chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
  534. m1->pa_det, m2->pa_det, omeas->pa_det);
  535. D_TXPOWER(
  536. "chain %d meas %d T1=%d T2=%d T=%d\n", c, m,
  537. m1->temperature, m2->temperature,
  538. omeas->temperature);
  539. }
  540. }
  541. return 0;
  542. }
  543. /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
  544. * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
  545. static s32 back_off_table[] = {
  546. 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
  547. 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
  548. 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
  549. 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
  550. 10 /* CCK */
  551. };
  552. /* Thermal compensation values for txpower for various frequency ranges ...
  553. * ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
  554. static struct il4965_txpower_comp_entry {
  555. s32 degrees_per_05db_a;
  556. s32 degrees_per_05db_a_denom;
  557. } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
  558. {9, 2}, /* group 0 5.2, ch 34-43 */
  559. {4, 1}, /* group 1 5.2, ch 44-70 */
  560. {4, 1}, /* group 2 5.2, ch 71-124 */
  561. {4, 1}, /* group 3 5.2, ch 125-200 */
  562. {3, 1} /* group 4 2.4, ch all */
  563. };
  564. static s32 get_min_power_idx(s32 rate_power_idx, u32 band)
  565. {
  566. if (!band) {
  567. if ((rate_power_idx & 7) <= 4)
  568. return MIN_TX_GAIN_IDX_52GHZ_EXT;
  569. }
  570. return MIN_TX_GAIN_IDX;
  571. }
  572. struct gain_entry {
  573. u8 dsp;
  574. u8 radio;
  575. };
  576. static const struct gain_entry gain_table[2][108] = {
  577. /* 5.2GHz power gain idx table */
  578. {
  579. {123, 0x3F}, /* highest txpower */
  580. {117, 0x3F},
  581. {110, 0x3F},
  582. {104, 0x3F},
  583. {98, 0x3F},
  584. {110, 0x3E},
  585. {104, 0x3E},
  586. {98, 0x3E},
  587. {110, 0x3D},
  588. {104, 0x3D},
  589. {98, 0x3D},
  590. {110, 0x3C},
  591. {104, 0x3C},
  592. {98, 0x3C},
  593. {110, 0x3B},
  594. {104, 0x3B},
  595. {98, 0x3B},
  596. {110, 0x3A},
  597. {104, 0x3A},
  598. {98, 0x3A},
  599. {110, 0x39},
  600. {104, 0x39},
  601. {98, 0x39},
  602. {110, 0x38},
  603. {104, 0x38},
  604. {98, 0x38},
  605. {110, 0x37},
  606. {104, 0x37},
  607. {98, 0x37},
  608. {110, 0x36},
  609. {104, 0x36},
  610. {98, 0x36},
  611. {110, 0x35},
  612. {104, 0x35},
  613. {98, 0x35},
  614. {110, 0x34},
  615. {104, 0x34},
  616. {98, 0x34},
  617. {110, 0x33},
  618. {104, 0x33},
  619. {98, 0x33},
  620. {110, 0x32},
  621. {104, 0x32},
  622. {98, 0x32},
  623. {110, 0x31},
  624. {104, 0x31},
  625. {98, 0x31},
  626. {110, 0x30},
  627. {104, 0x30},
  628. {98, 0x30},
  629. {110, 0x25},
  630. {104, 0x25},
  631. {98, 0x25},
  632. {110, 0x24},
  633. {104, 0x24},
  634. {98, 0x24},
  635. {110, 0x23},
  636. {104, 0x23},
  637. {98, 0x23},
  638. {110, 0x22},
  639. {104, 0x18},
  640. {98, 0x18},
  641. {110, 0x17},
  642. {104, 0x17},
  643. {98, 0x17},
  644. {110, 0x16},
  645. {104, 0x16},
  646. {98, 0x16},
  647. {110, 0x15},
  648. {104, 0x15},
  649. {98, 0x15},
  650. {110, 0x14},
  651. {104, 0x14},
  652. {98, 0x14},
  653. {110, 0x13},
  654. {104, 0x13},
  655. {98, 0x13},
  656. {110, 0x12},
  657. {104, 0x08},
  658. {98, 0x08},
  659. {110, 0x07},
  660. {104, 0x07},
  661. {98, 0x07},
  662. {110, 0x06},
  663. {104, 0x06},
  664. {98, 0x06},
  665. {110, 0x05},
  666. {104, 0x05},
  667. {98, 0x05},
  668. {110, 0x04},
  669. {104, 0x04},
  670. {98, 0x04},
  671. {110, 0x03},
  672. {104, 0x03},
  673. {98, 0x03},
  674. {110, 0x02},
  675. {104, 0x02},
  676. {98, 0x02},
  677. {110, 0x01},
  678. {104, 0x01},
  679. {98, 0x01},
  680. {110, 0x00},
  681. {104, 0x00},
  682. {98, 0x00},
  683. {93, 0x00},
  684. {88, 0x00},
  685. {83, 0x00},
  686. {78, 0x00},
  687. },
  688. /* 2.4GHz power gain idx table */
  689. {
  690. {110, 0x3f}, /* highest txpower */
  691. {104, 0x3f},
  692. {98, 0x3f},
  693. {110, 0x3e},
  694. {104, 0x3e},
  695. {98, 0x3e},
  696. {110, 0x3d},
  697. {104, 0x3d},
  698. {98, 0x3d},
  699. {110, 0x3c},
  700. {104, 0x3c},
  701. {98, 0x3c},
  702. {110, 0x3b},
  703. {104, 0x3b},
  704. {98, 0x3b},
  705. {110, 0x3a},
  706. {104, 0x3a},
  707. {98, 0x3a},
  708. {110, 0x39},
  709. {104, 0x39},
  710. {98, 0x39},
  711. {110, 0x38},
  712. {104, 0x38},
  713. {98, 0x38},
  714. {110, 0x37},
  715. {104, 0x37},
  716. {98, 0x37},
  717. {110, 0x36},
  718. {104, 0x36},
  719. {98, 0x36},
  720. {110, 0x35},
  721. {104, 0x35},
  722. {98, 0x35},
  723. {110, 0x34},
  724. {104, 0x34},
  725. {98, 0x34},
  726. {110, 0x33},
  727. {104, 0x33},
  728. {98, 0x33},
  729. {110, 0x32},
  730. {104, 0x32},
  731. {98, 0x32},
  732. {110, 0x31},
  733. {104, 0x31},
  734. {98, 0x31},
  735. {110, 0x30},
  736. {104, 0x30},
  737. {98, 0x30},
  738. {110, 0x6},
  739. {104, 0x6},
  740. {98, 0x6},
  741. {110, 0x5},
  742. {104, 0x5},
  743. {98, 0x5},
  744. {110, 0x4},
  745. {104, 0x4},
  746. {98, 0x4},
  747. {110, 0x3},
  748. {104, 0x3},
  749. {98, 0x3},
  750. {110, 0x2},
  751. {104, 0x2},
  752. {98, 0x2},
  753. {110, 0x1},
  754. {104, 0x1},
  755. {98, 0x1},
  756. {110, 0x0},
  757. {104, 0x0},
  758. {98, 0x0},
  759. {97, 0},
  760. {96, 0},
  761. {95, 0},
  762. {94, 0},
  763. {93, 0},
  764. {92, 0},
  765. {91, 0},
  766. {90, 0},
  767. {89, 0},
  768. {88, 0},
  769. {87, 0},
  770. {86, 0},
  771. {85, 0},
  772. {84, 0},
  773. {83, 0},
  774. {82, 0},
  775. {81, 0},
  776. {80, 0},
  777. {79, 0},
  778. {78, 0},
  779. {77, 0},
  780. {76, 0},
  781. {75, 0},
  782. {74, 0},
  783. {73, 0},
  784. {72, 0},
  785. {71, 0},
  786. {70, 0},
  787. {69, 0},
  788. {68, 0},
  789. {67, 0},
  790. {66, 0},
  791. {65, 0},
  792. {64, 0},
  793. {63, 0},
  794. {62, 0},
  795. {61, 0},
  796. {60, 0},
  797. {59, 0},
  798. }
  799. };
  800. static int il4965_fill_txpower_tbl(struct il_priv *il, u8 band, u16 channel,
  801. u8 is_ht40, u8 ctrl_chan_high,
  802. struct il4965_tx_power_db *tx_power_tbl)
  803. {
  804. u8 saturation_power;
  805. s32 target_power;
  806. s32 user_target_power;
  807. s32 power_limit;
  808. s32 current_temp;
  809. s32 reg_limit;
  810. s32 current_regulatory;
  811. s32 txatten_grp = CALIB_CH_GROUP_MAX;
  812. int i;
  813. int c;
  814. const struct il_channel_info *ch_info = NULL;
  815. struct il_eeprom_calib_ch_info ch_eeprom_info;
  816. const struct il_eeprom_calib_measure *measurement;
  817. s16 voltage;
  818. s32 init_voltage;
  819. s32 voltage_compensation;
  820. s32 degrees_per_05db_num;
  821. s32 degrees_per_05db_denom;
  822. s32 factory_temp;
  823. s32 temperature_comp[2];
  824. s32 factory_gain_idx[2];
  825. s32 factory_actual_pwr[2];
  826. s32 power_idx;
  827. /* tx_power_user_lmt is in dBm, convert to half-dBm (half-dB units
  828. * are used for idxing into txpower table) */
  829. user_target_power = 2 * il->tx_power_user_lmt;
  830. /* Get current (RXON) channel, band, width */
  831. D_TXPOWER("chan %d band %d is_ht40 %d\n", channel, band,
  832. is_ht40);
  833. ch_info = il_get_channel_info(il, il->band, channel);
  834. if (!il_is_channel_valid(ch_info))
  835. return -EINVAL;
  836. /* get txatten group, used to select 1) thermal txpower adjustment
  837. * and 2) mimo txpower balance between Tx chains. */
  838. txatten_grp = il4965_get_tx_atten_grp(channel);
  839. if (txatten_grp < 0) {
  840. IL_ERR("Can't find txatten group for channel %d.\n",
  841. channel);
  842. return txatten_grp;
  843. }
  844. D_TXPOWER("channel %d belongs to txatten group %d\n",
  845. channel, txatten_grp);
  846. if (is_ht40) {
  847. if (ctrl_chan_high)
  848. channel -= 2;
  849. else
  850. channel += 2;
  851. }
  852. /* hardware txpower limits ...
  853. * saturation (clipping distortion) txpowers are in half-dBm */
  854. if (band)
  855. saturation_power = il->calib_info->saturation_power24;
  856. else
  857. saturation_power = il->calib_info->saturation_power52;
  858. if (saturation_power < IL_TX_POWER_SATURATION_MIN ||
  859. saturation_power > IL_TX_POWER_SATURATION_MAX) {
  860. if (band)
  861. saturation_power = IL_TX_POWER_DEFAULT_SATURATION_24;
  862. else
  863. saturation_power = IL_TX_POWER_DEFAULT_SATURATION_52;
  864. }
  865. /* regulatory txpower limits ... reg_limit values are in half-dBm,
  866. * max_power_avg values are in dBm, convert * 2 */
  867. if (is_ht40)
  868. reg_limit = ch_info->ht40_max_power_avg * 2;
  869. else
  870. reg_limit = ch_info->max_power_avg * 2;
  871. if ((reg_limit < IL_TX_POWER_REGULATORY_MIN) ||
  872. (reg_limit > IL_TX_POWER_REGULATORY_MAX)) {
  873. if (band)
  874. reg_limit = IL_TX_POWER_DEFAULT_REGULATORY_24;
  875. else
  876. reg_limit = IL_TX_POWER_DEFAULT_REGULATORY_52;
  877. }
  878. /* Interpolate txpower calibration values for this channel,
  879. * based on factory calibration tests on spaced channels. */
  880. il4965_interpolate_chan(il, channel, &ch_eeprom_info);
  881. /* calculate tx gain adjustment based on power supply voltage */
  882. voltage = le16_to_cpu(il->calib_info->voltage);
  883. init_voltage = (s32)le32_to_cpu(il->card_alive_init.voltage);
  884. voltage_compensation =
  885. il4965_get_voltage_compensation(voltage, init_voltage);
  886. D_TXPOWER("curr volt %d eeprom volt %d volt comp %d\n",
  887. init_voltage,
  888. voltage, voltage_compensation);
  889. /* get current temperature (Celsius) */
  890. current_temp = max(il->temperature, IL_TX_POWER_TEMPERATURE_MIN);
  891. current_temp = min(il->temperature, IL_TX_POWER_TEMPERATURE_MAX);
  892. current_temp = KELVIN_TO_CELSIUS(current_temp);
  893. /* select thermal txpower adjustment params, based on channel group
  894. * (same frequency group used for mimo txatten adjustment) */
  895. degrees_per_05db_num =
  896. tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
  897. degrees_per_05db_denom =
  898. tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
  899. /* get per-chain txpower values from factory measurements */
  900. for (c = 0; c < 2; c++) {
  901. measurement = &ch_eeprom_info.measurements[c][1];
  902. /* txgain adjustment (in half-dB steps) based on difference
  903. * between factory and current temperature */
  904. factory_temp = measurement->temperature;
  905. il4965_math_div_round((current_temp - factory_temp) *
  906. degrees_per_05db_denom,
  907. degrees_per_05db_num,
  908. &temperature_comp[c]);
  909. factory_gain_idx[c] = measurement->gain_idx;
  910. factory_actual_pwr[c] = measurement->actual_pow;
  911. D_TXPOWER("chain = %d\n", c);
  912. D_TXPOWER("fctry tmp %d, "
  913. "curr tmp %d, comp %d steps\n",
  914. factory_temp, current_temp,
  915. temperature_comp[c]);
  916. D_TXPOWER("fctry idx %d, fctry pwr %d\n",
  917. factory_gain_idx[c],
  918. factory_actual_pwr[c]);
  919. }
  920. /* for each of 33 bit-rates (including 1 for CCK) */
  921. for (i = 0; i < POWER_TBL_NUM_ENTRIES; i++) {
  922. u8 is_mimo_rate;
  923. union il4965_tx_power_dual_stream tx_power;
  924. /* for mimo, reduce each chain's txpower by half
  925. * (3dB, 6 steps), so total output power is regulatory
  926. * compliant. */
  927. if (i & 0x8) {
  928. current_regulatory = reg_limit -
  929. IL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
  930. is_mimo_rate = 1;
  931. } else {
  932. current_regulatory = reg_limit;
  933. is_mimo_rate = 0;
  934. }
  935. /* find txpower limit, either hardware or regulatory */
  936. power_limit = saturation_power - back_off_table[i];
  937. if (power_limit > current_regulatory)
  938. power_limit = current_regulatory;
  939. /* reduce user's txpower request if necessary
  940. * for this rate on this channel */
  941. target_power = user_target_power;
  942. if (target_power > power_limit)
  943. target_power = power_limit;
  944. D_TXPOWER("rate %d sat %d reg %d usr %d tgt %d\n",
  945. i, saturation_power - back_off_table[i],
  946. current_regulatory, user_target_power,
  947. target_power);
  948. /* for each of 2 Tx chains (radio transmitters) */
  949. for (c = 0; c < 2; c++) {
  950. s32 atten_value;
  951. if (is_mimo_rate)
  952. atten_value =
  953. (s32)le32_to_cpu(il->card_alive_init.
  954. tx_atten[txatten_grp][c]);
  955. else
  956. atten_value = 0;
  957. /* calculate idx; higher idx means lower txpower */
  958. power_idx = (u8) (factory_gain_idx[c] -
  959. (target_power -
  960. factory_actual_pwr[c]) -
  961. temperature_comp[c] -
  962. voltage_compensation +
  963. atten_value);
  964. /* D_TXPOWER("calculated txpower idx %d\n",
  965. power_idx); */
  966. if (power_idx < get_min_power_idx(i, band))
  967. power_idx = get_min_power_idx(i, band);
  968. /* adjust 5 GHz idx to support negative idxes */
  969. if (!band)
  970. power_idx += 9;
  971. /* CCK, rate 32, reduce txpower for CCK */
  972. if (i == POWER_TBL_CCK_ENTRY)
  973. power_idx +=
  974. IL_TX_POWER_CCK_COMPENSATION_C_STEP;
  975. /* stay within the table! */
  976. if (power_idx > 107) {
  977. IL_WARN("txpower idx %d > 107\n",
  978. power_idx);
  979. power_idx = 107;
  980. }
  981. if (power_idx < 0) {
  982. IL_WARN("txpower idx %d < 0\n",
  983. power_idx);
  984. power_idx = 0;
  985. }
  986. /* fill txpower command for this rate/chain */
  987. tx_power.s.radio_tx_gain[c] =
  988. gain_table[band][power_idx].radio;
  989. tx_power.s.dsp_predis_atten[c] =
  990. gain_table[band][power_idx].dsp;
  991. D_TXPOWER("chain %d mimo %d idx %d "
  992. "gain 0x%02x dsp %d\n",
  993. c, atten_value, power_idx,
  994. tx_power.s.radio_tx_gain[c],
  995. tx_power.s.dsp_predis_atten[c]);
  996. } /* for each chain */
  997. tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
  998. } /* for each rate */
  999. return 0;
  1000. }
  1001. /**
  1002. * il4965_send_tx_power - Configure the TXPOWER level user limit
  1003. *
  1004. * Uses the active RXON for channel, band, and characteristics (ht40, high)
  1005. * The power limit is taken from il->tx_power_user_lmt.
  1006. */
  1007. static int il4965_send_tx_power(struct il_priv *il)
  1008. {
  1009. struct il4965_txpowertable_cmd cmd = { 0 };
  1010. int ret;
  1011. u8 band = 0;
  1012. bool is_ht40 = false;
  1013. u8 ctrl_chan_high = 0;
  1014. struct il_rxon_context *ctx = &il->ctx;
  1015. if (WARN_ONCE(test_bit(STATUS_SCAN_HW, &il->status),
  1016. "TX Power requested while scanning!\n"))
  1017. return -EAGAIN;
  1018. band = il->band == IEEE80211_BAND_2GHZ;
  1019. is_ht40 = iw4965_is_ht40_channel(ctx->active.flags);
  1020. if (is_ht40 && (ctx->active.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
  1021. ctrl_chan_high = 1;
  1022. cmd.band = band;
  1023. cmd.channel = ctx->active.channel;
  1024. ret = il4965_fill_txpower_tbl(il, band,
  1025. le16_to_cpu(ctx->active.channel),
  1026. is_ht40, ctrl_chan_high, &cmd.tx_power);
  1027. if (ret)
  1028. goto out;
  1029. ret = il_send_cmd_pdu(il,
  1030. REPLY_TX_PWR_TBL_CMD, sizeof(cmd), &cmd);
  1031. out:
  1032. return ret;
  1033. }
  1034. static int il4965_send_rxon_assoc(struct il_priv *il,
  1035. struct il_rxon_context *ctx)
  1036. {
  1037. int ret = 0;
  1038. struct il4965_rxon_assoc_cmd rxon_assoc;
  1039. const struct il_rxon_cmd *rxon1 = &ctx->staging;
  1040. const struct il_rxon_cmd *rxon2 = &ctx->active;
  1041. if (rxon1->flags == rxon2->flags &&
  1042. rxon1->filter_flags == rxon2->filter_flags &&
  1043. rxon1->cck_basic_rates == rxon2->cck_basic_rates &&
  1044. rxon1->ofdm_ht_single_stream_basic_rates ==
  1045. rxon2->ofdm_ht_single_stream_basic_rates &&
  1046. rxon1->ofdm_ht_dual_stream_basic_rates ==
  1047. rxon2->ofdm_ht_dual_stream_basic_rates &&
  1048. rxon1->rx_chain == rxon2->rx_chain &&
  1049. rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates) {
  1050. D_INFO("Using current RXON_ASSOC. Not resending.\n");
  1051. return 0;
  1052. }
  1053. rxon_assoc.flags = ctx->staging.flags;
  1054. rxon_assoc.filter_flags = ctx->staging.filter_flags;
  1055. rxon_assoc.ofdm_basic_rates = ctx->staging.ofdm_basic_rates;
  1056. rxon_assoc.cck_basic_rates = ctx->staging.cck_basic_rates;
  1057. rxon_assoc.reserved = 0;
  1058. rxon_assoc.ofdm_ht_single_stream_basic_rates =
  1059. ctx->staging.ofdm_ht_single_stream_basic_rates;
  1060. rxon_assoc.ofdm_ht_dual_stream_basic_rates =
  1061. ctx->staging.ofdm_ht_dual_stream_basic_rates;
  1062. rxon_assoc.rx_chain_select_flags = ctx->staging.rx_chain;
  1063. ret = il_send_cmd_pdu_async(il, REPLY_RXON_ASSOC,
  1064. sizeof(rxon_assoc), &rxon_assoc, NULL);
  1065. return ret;
  1066. }
  1067. static int il4965_commit_rxon(struct il_priv *il, struct il_rxon_context *ctx)
  1068. {
  1069. /* cast away the const for active_rxon in this function */
  1070. struct il_rxon_cmd *active_rxon = (void *)&ctx->active;
  1071. int ret;
  1072. bool new_assoc =
  1073. !!(ctx->staging.filter_flags & RXON_FILTER_ASSOC_MSK);
  1074. if (!il_is_alive(il))
  1075. return -EBUSY;
  1076. if (!ctx->is_active)
  1077. return 0;
  1078. /* always get timestamp with Rx frame */
  1079. ctx->staging.flags |= RXON_FLG_TSF2HOST_MSK;
  1080. ret = il_check_rxon_cmd(il, ctx);
  1081. if (ret) {
  1082. IL_ERR("Invalid RXON configuration. Not committing.\n");
  1083. return -EINVAL;
  1084. }
  1085. /*
  1086. * receive commit_rxon request
  1087. * abort any previous channel switch if still in process
  1088. */
  1089. if (test_bit(STATUS_CHANNEL_SWITCH_PENDING, &il->status) &&
  1090. il->switch_channel != ctx->staging.channel) {
  1091. D_11H("abort channel switch on %d\n",
  1092. le16_to_cpu(il->switch_channel));
  1093. il_chswitch_done(il, false);
  1094. }
  1095. /* If we don't need to send a full RXON, we can use
  1096. * il_rxon_assoc_cmd which is used to reconfigure filter
  1097. * and other flags for the current radio configuration. */
  1098. if (!il_full_rxon_required(il, ctx)) {
  1099. ret = il_send_rxon_assoc(il, ctx);
  1100. if (ret) {
  1101. IL_ERR("Error setting RXON_ASSOC (%d)\n", ret);
  1102. return ret;
  1103. }
  1104. memcpy(active_rxon, &ctx->staging, sizeof(*active_rxon));
  1105. il_print_rx_config_cmd(il, ctx);
  1106. /*
  1107. * We do not commit tx power settings while channel changing,
  1108. * do it now if tx power changed.
  1109. */
  1110. il_set_tx_power(il, il->tx_power_next, false);
  1111. return 0;
  1112. }
  1113. /* If we are currently associated and the new config requires
  1114. * an RXON_ASSOC and the new config wants the associated mask enabled,
  1115. * we must clear the associated from the active configuration
  1116. * before we apply the new config */
  1117. if (il_is_associated_ctx(ctx) && new_assoc) {
  1118. D_INFO("Toggling associated bit on current RXON\n");
  1119. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  1120. ret = il_send_cmd_pdu(il, ctx->rxon_cmd,
  1121. sizeof(struct il_rxon_cmd),
  1122. active_rxon);
  1123. /* If the mask clearing failed then we set
  1124. * active_rxon back to what it was previously */
  1125. if (ret) {
  1126. active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
  1127. IL_ERR("Error clearing ASSOC_MSK (%d)\n", ret);
  1128. return ret;
  1129. }
  1130. il_clear_ucode_stations(il, ctx);
  1131. il_restore_stations(il, ctx);
  1132. ret = il4965_restore_default_wep_keys(il, ctx);
  1133. if (ret) {
  1134. IL_ERR("Failed to restore WEP keys (%d)\n", ret);
  1135. return ret;
  1136. }
  1137. }
  1138. D_INFO("Sending RXON\n"
  1139. "* with%s RXON_FILTER_ASSOC_MSK\n"
  1140. "* channel = %d\n"
  1141. "* bssid = %pM\n",
  1142. (new_assoc ? "" : "out"),
  1143. le16_to_cpu(ctx->staging.channel),
  1144. ctx->staging.bssid_addr);
  1145. il_set_rxon_hwcrypto(il, ctx,
  1146. !il->cfg->mod_params->sw_crypto);
  1147. /* Apply the new configuration
  1148. * RXON unassoc clears the station table in uCode so restoration of
  1149. * stations is needed after it (the RXON command) completes
  1150. */
  1151. if (!new_assoc) {
  1152. ret = il_send_cmd_pdu(il, ctx->rxon_cmd,
  1153. sizeof(struct il_rxon_cmd), &ctx->staging);
  1154. if (ret) {
  1155. IL_ERR("Error setting new RXON (%d)\n", ret);
  1156. return ret;
  1157. }
  1158. D_INFO("Return from !new_assoc RXON.\n");
  1159. memcpy(active_rxon, &ctx->staging, sizeof(*active_rxon));
  1160. il_clear_ucode_stations(il, ctx);
  1161. il_restore_stations(il, ctx);
  1162. ret = il4965_restore_default_wep_keys(il, ctx);
  1163. if (ret) {
  1164. IL_ERR("Failed to restore WEP keys (%d)\n", ret);
  1165. return ret;
  1166. }
  1167. }
  1168. if (new_assoc) {
  1169. il->start_calib = 0;
  1170. /* Apply the new configuration
  1171. * RXON assoc doesn't clear the station table in uCode,
  1172. */
  1173. ret = il_send_cmd_pdu(il, ctx->rxon_cmd,
  1174. sizeof(struct il_rxon_cmd), &ctx->staging);
  1175. if (ret) {
  1176. IL_ERR("Error setting new RXON (%d)\n", ret);
  1177. return ret;
  1178. }
  1179. memcpy(active_rxon, &ctx->staging, sizeof(*active_rxon));
  1180. }
  1181. il_print_rx_config_cmd(il, ctx);
  1182. il4965_init_sensitivity(il);
  1183. /* If we issue a new RXON command which required a tune then we must
  1184. * send a new TXPOWER command or we won't be able to Tx any frames */
  1185. ret = il_set_tx_power(il, il->tx_power_next, true);
  1186. if (ret) {
  1187. IL_ERR("Error sending TX power (%d)\n", ret);
  1188. return ret;
  1189. }
  1190. return 0;
  1191. }
  1192. static int il4965_hw_channel_switch(struct il_priv *il,
  1193. struct ieee80211_channel_switch *ch_switch)
  1194. {
  1195. struct il_rxon_context *ctx = &il->ctx;
  1196. int rc;
  1197. u8 band = 0;
  1198. bool is_ht40 = false;
  1199. u8 ctrl_chan_high = 0;
  1200. struct il4965_channel_switch_cmd cmd;
  1201. const struct il_channel_info *ch_info;
  1202. u32 switch_time_in_usec, ucode_switch_time;
  1203. u16 ch;
  1204. u32 tsf_low;
  1205. u8 switch_count;
  1206. u16 beacon_interval = le16_to_cpu(ctx->timing.beacon_interval);
  1207. struct ieee80211_vif *vif = ctx->vif;
  1208. band = il->band == IEEE80211_BAND_2GHZ;
  1209. is_ht40 = iw4965_is_ht40_channel(ctx->staging.flags);
  1210. if (is_ht40 &&
  1211. (ctx->staging.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
  1212. ctrl_chan_high = 1;
  1213. cmd.band = band;
  1214. cmd.expect_beacon = 0;
  1215. ch = ch_switch->channel->hw_value;
  1216. cmd.channel = cpu_to_le16(ch);
  1217. cmd.rxon_flags = ctx->staging.flags;
  1218. cmd.rxon_filter_flags = ctx->staging.filter_flags;
  1219. switch_count = ch_switch->count;
  1220. tsf_low = ch_switch->timestamp & 0x0ffffffff;
  1221. /*
  1222. * calculate the ucode channel switch time
  1223. * adding TSF as one of the factor for when to switch
  1224. */
  1225. if (il->ucode_beacon_time > tsf_low && beacon_interval) {
  1226. if (switch_count > ((il->ucode_beacon_time - tsf_low) /
  1227. beacon_interval)) {
  1228. switch_count -= (il->ucode_beacon_time -
  1229. tsf_low) / beacon_interval;
  1230. } else
  1231. switch_count = 0;
  1232. }
  1233. if (switch_count <= 1)
  1234. cmd.switch_time = cpu_to_le32(il->ucode_beacon_time);
  1235. else {
  1236. switch_time_in_usec =
  1237. vif->bss_conf.beacon_int * switch_count * TIME_UNIT;
  1238. ucode_switch_time = il_usecs_to_beacons(il,
  1239. switch_time_in_usec,
  1240. beacon_interval);
  1241. cmd.switch_time = il_add_beacon_time(il,
  1242. il->ucode_beacon_time,
  1243. ucode_switch_time,
  1244. beacon_interval);
  1245. }
  1246. D_11H("uCode time for the switch is 0x%x\n",
  1247. cmd.switch_time);
  1248. ch_info = il_get_channel_info(il, il->band, ch);
  1249. if (ch_info)
  1250. cmd.expect_beacon = il_is_channel_radar(ch_info);
  1251. else {
  1252. IL_ERR("invalid channel switch from %u to %u\n",
  1253. ctx->active.channel, ch);
  1254. return -EFAULT;
  1255. }
  1256. rc = il4965_fill_txpower_tbl(il, band, ch, is_ht40,
  1257. ctrl_chan_high, &cmd.tx_power);
  1258. if (rc) {
  1259. D_11H("error:%d fill txpower_tbl\n", rc);
  1260. return rc;
  1261. }
  1262. return il_send_cmd_pdu(il,
  1263. REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
  1264. }
  1265. /**
  1266. * il4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
  1267. */
  1268. static void il4965_txq_update_byte_cnt_tbl(struct il_priv *il,
  1269. struct il_tx_queue *txq,
  1270. u16 byte_cnt)
  1271. {
  1272. struct il4965_scd_bc_tbl *scd_bc_tbl = il->scd_bc_tbls.addr;
  1273. int txq_id = txq->q.id;
  1274. int write_ptr = txq->q.write_ptr;
  1275. int len = byte_cnt + IL_TX_CRC_SIZE + IL_TX_DELIMITER_SIZE;
  1276. __le16 bc_ent;
  1277. WARN_ON(len > 0xFFF || write_ptr >= TFD_QUEUE_SIZE_MAX);
  1278. bc_ent = cpu_to_le16(len & 0xFFF);
  1279. /* Set up byte count within first 256 entries */
  1280. scd_bc_tbl[txq_id].tfd_offset[write_ptr] = bc_ent;
  1281. /* If within first 64 entries, duplicate at end */
  1282. if (write_ptr < TFD_QUEUE_SIZE_BC_DUP)
  1283. scd_bc_tbl[txq_id].
  1284. tfd_offset[TFD_QUEUE_SIZE_MAX + write_ptr] = bc_ent;
  1285. }
  1286. /**
  1287. * il4965_hw_get_temperature - return the calibrated temperature (in Kelvin)
  1288. * @stats: Provides the temperature reading from the uCode
  1289. *
  1290. * A return of <0 indicates bogus data in the stats
  1291. */
  1292. static int il4965_hw_get_temperature(struct il_priv *il)
  1293. {
  1294. s32 temperature;
  1295. s32 vt;
  1296. s32 R1, R2, R3;
  1297. u32 R4;
  1298. if (test_bit(STATUS_TEMPERATURE, &il->status) &&
  1299. (il->_4965.stats.flag &
  1300. STATISTICS_REPLY_FLG_HT40_MODE_MSK)) {
  1301. D_TEMP("Running HT40 temperature calibration\n");
  1302. R1 = (s32)le32_to_cpu(il->card_alive_init.therm_r1[1]);
  1303. R2 = (s32)le32_to_cpu(il->card_alive_init.therm_r2[1]);
  1304. R3 = (s32)le32_to_cpu(il->card_alive_init.therm_r3[1]);
  1305. R4 = le32_to_cpu(il->card_alive_init.therm_r4[1]);
  1306. } else {
  1307. D_TEMP("Running temperature calibration\n");
  1308. R1 = (s32)le32_to_cpu(il->card_alive_init.therm_r1[0]);
  1309. R2 = (s32)le32_to_cpu(il->card_alive_init.therm_r2[0]);
  1310. R3 = (s32)le32_to_cpu(il->card_alive_init.therm_r3[0]);
  1311. R4 = le32_to_cpu(il->card_alive_init.therm_r4[0]);
  1312. }
  1313. /*
  1314. * Temperature is only 23 bits, so sign extend out to 32.
  1315. *
  1316. * NOTE If we haven't received a stats notification yet
  1317. * with an updated temperature, use R4 provided to us in the
  1318. * "initialize" ALIVE response.
  1319. */
  1320. if (!test_bit(STATUS_TEMPERATURE, &il->status))
  1321. vt = sign_extend32(R4, 23);
  1322. else
  1323. vt = sign_extend32(le32_to_cpu(il->_4965.stats.
  1324. general.common.temperature), 23);
  1325. D_TEMP("Calib values R[1-3]: %d %d %d R4: %d\n", R1, R2, R3, vt);
  1326. if (R3 == R1) {
  1327. IL_ERR("Calibration conflict R1 == R3\n");
  1328. return -1;
  1329. }
  1330. /* Calculate temperature in degrees Kelvin, adjust by 97%.
  1331. * Add offset to center the adjustment around 0 degrees Centigrade. */
  1332. temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
  1333. temperature /= (R3 - R1);
  1334. temperature = (temperature * 97) / 100 + TEMPERATURE_CALIB_KELVIN_OFFSET;
  1335. D_TEMP("Calibrated temperature: %dK, %dC\n",
  1336. temperature, KELVIN_TO_CELSIUS(temperature));
  1337. return temperature;
  1338. }
  1339. /* Adjust Txpower only if temperature variance is greater than threshold. */
  1340. #define IL_TEMPERATURE_THRESHOLD 3
  1341. /**
  1342. * il4965_is_temp_calib_needed - determines if new calibration is needed
  1343. *
  1344. * If the temperature changed has changed sufficiently, then a recalibration
  1345. * is needed.
  1346. *
  1347. * Assumes caller will replace il->last_temperature once calibration
  1348. * executed.
  1349. */
  1350. static int il4965_is_temp_calib_needed(struct il_priv *il)
  1351. {
  1352. int temp_diff;
  1353. if (!test_bit(STATUS_STATISTICS, &il->status)) {
  1354. D_TEMP("Temperature not updated -- no stats.\n");
  1355. return 0;
  1356. }
  1357. temp_diff = il->temperature - il->last_temperature;
  1358. /* get absolute value */
  1359. if (temp_diff < 0) {
  1360. D_POWER("Getting cooler, delta %d\n", temp_diff);
  1361. temp_diff = -temp_diff;
  1362. } else if (temp_diff == 0)
  1363. D_POWER("Temperature unchanged\n");
  1364. else
  1365. D_POWER("Getting warmer, delta %d\n", temp_diff);
  1366. if (temp_diff < IL_TEMPERATURE_THRESHOLD) {
  1367. D_POWER(" => thermal txpower calib not needed\n");
  1368. return 0;
  1369. }
  1370. D_POWER(" => thermal txpower calib needed\n");
  1371. return 1;
  1372. }
  1373. static void il4965_temperature_calib(struct il_priv *il)
  1374. {
  1375. s32 temp;
  1376. temp = il4965_hw_get_temperature(il);
  1377. if (IL_TX_POWER_TEMPERATURE_OUT_OF_RANGE(temp))
  1378. return;
  1379. if (il->temperature != temp) {
  1380. if (il->temperature)
  1381. D_TEMP("Temperature changed "
  1382. "from %dC to %dC\n",
  1383. KELVIN_TO_CELSIUS(il->temperature),
  1384. KELVIN_TO_CELSIUS(temp));
  1385. else
  1386. D_TEMP("Temperature "
  1387. "initialized to %dC\n",
  1388. KELVIN_TO_CELSIUS(temp));
  1389. }
  1390. il->temperature = temp;
  1391. set_bit(STATUS_TEMPERATURE, &il->status);
  1392. if (!il->disable_tx_power_cal &&
  1393. unlikely(!test_bit(STATUS_SCANNING, &il->status)) &&
  1394. il4965_is_temp_calib_needed(il))
  1395. queue_work(il->workqueue, &il->txpower_work);
  1396. }
  1397. static u16 il4965_get_hcmd_size(u8 cmd_id, u16 len)
  1398. {
  1399. switch (cmd_id) {
  1400. case REPLY_RXON:
  1401. return (u16) sizeof(struct il4965_rxon_cmd);
  1402. default:
  1403. return len;
  1404. }
  1405. }
  1406. static u16 il4965_build_addsta_hcmd(const struct il_addsta_cmd *cmd,
  1407. u8 *data)
  1408. {
  1409. struct il4965_addsta_cmd *addsta = (struct il4965_addsta_cmd *)data;
  1410. addsta->mode = cmd->mode;
  1411. memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
  1412. memcpy(&addsta->key, &cmd->key, sizeof(struct il4965_keyinfo));
  1413. addsta->station_flags = cmd->station_flags;
  1414. addsta->station_flags_msk = cmd->station_flags_msk;
  1415. addsta->tid_disable_tx = cmd->tid_disable_tx;
  1416. addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
  1417. addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
  1418. addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
  1419. addsta->sleep_tx_count = cmd->sleep_tx_count;
  1420. addsta->reserved1 = cpu_to_le16(0);
  1421. addsta->reserved2 = cpu_to_le16(0);
  1422. return (u16)sizeof(struct il4965_addsta_cmd);
  1423. }
  1424. static inline u32 il4965_get_scd_ssn(struct il4965_tx_resp *tx_resp)
  1425. {
  1426. return le32_to_cpup(&tx_resp->u.status + tx_resp->frame_count) & MAX_SN;
  1427. }
  1428. /**
  1429. * il4965_tx_status_reply_tx - Handle Tx response for frames in aggregation queue
  1430. */
  1431. static int il4965_tx_status_reply_tx(struct il_priv *il,
  1432. struct il_ht_agg *agg,
  1433. struct il4965_tx_resp *tx_resp,
  1434. int txq_id, u16 start_idx)
  1435. {
  1436. u16 status;
  1437. struct agg_tx_status *frame_status = tx_resp->u.agg_status;
  1438. struct ieee80211_tx_info *info = NULL;
  1439. struct ieee80211_hdr *hdr = NULL;
  1440. u32 rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  1441. int i, sh, idx;
  1442. u16 seq;
  1443. if (agg->wait_for_ba)
  1444. D_TX_REPLY("got tx response w/o block-ack\n");
  1445. agg->frame_count = tx_resp->frame_count;
  1446. agg->start_idx = start_idx;
  1447. agg->rate_n_flags = rate_n_flags;
  1448. agg->bitmap = 0;
  1449. /* num frames attempted by Tx command */
  1450. if (agg->frame_count == 1) {
  1451. /* Only one frame was attempted; no block-ack will arrive */
  1452. status = le16_to_cpu(frame_status[0].status);
  1453. idx = start_idx;
  1454. D_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
  1455. agg->frame_count, agg->start_idx, idx);
  1456. info = IEEE80211_SKB_CB(il->txq[txq_id].txb[idx].skb);
  1457. info->status.rates[0].count = tx_resp->failure_frame + 1;
  1458. info->flags &= ~IEEE80211_TX_CTL_AMPDU;
  1459. info->flags |= il4965_tx_status_to_mac80211(status);
  1460. il4965_hwrate_to_tx_control(il, rate_n_flags, info);
  1461. D_TX_REPLY("1 Frame 0x%x failure :%d\n",
  1462. status & 0xff, tx_resp->failure_frame);
  1463. D_TX_REPLY("Rate Info rate_n_flags=%x\n", rate_n_flags);
  1464. agg->wait_for_ba = 0;
  1465. } else {
  1466. /* Two or more frames were attempted; expect block-ack */
  1467. u64 bitmap = 0;
  1468. int start = agg->start_idx;
  1469. /* Construct bit-map of pending frames within Tx win */
  1470. for (i = 0; i < agg->frame_count; i++) {
  1471. u16 sc;
  1472. status = le16_to_cpu(frame_status[i].status);
  1473. seq = le16_to_cpu(frame_status[i].sequence);
  1474. idx = SEQ_TO_IDX(seq);
  1475. txq_id = SEQ_TO_QUEUE(seq);
  1476. if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
  1477. AGG_TX_STATE_ABORT_MSK))
  1478. continue;
  1479. D_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
  1480. agg->frame_count, txq_id, idx);
  1481. hdr = il_tx_queue_get_hdr(il, txq_id, idx);
  1482. if (!hdr) {
  1483. IL_ERR(
  1484. "BUG_ON idx doesn't point to valid skb"
  1485. " idx=%d, txq_id=%d\n", idx, txq_id);
  1486. return -1;
  1487. }
  1488. sc = le16_to_cpu(hdr->seq_ctrl);
  1489. if (idx != (SEQ_TO_SN(sc) & 0xff)) {
  1490. IL_ERR(
  1491. "BUG_ON idx doesn't match seq control"
  1492. " idx=%d, seq_idx=%d, seq=%d\n",
  1493. idx, SEQ_TO_SN(sc), hdr->seq_ctrl);
  1494. return -1;
  1495. }
  1496. D_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
  1497. i, idx, SEQ_TO_SN(sc));
  1498. sh = idx - start;
  1499. if (sh > 64) {
  1500. sh = (start - idx) + 0xff;
  1501. bitmap = bitmap << sh;
  1502. sh = 0;
  1503. start = idx;
  1504. } else if (sh < -64)
  1505. sh = 0xff - (start - idx);
  1506. else if (sh < 0) {
  1507. sh = start - idx;
  1508. start = idx;
  1509. bitmap = bitmap << sh;
  1510. sh = 0;
  1511. }
  1512. bitmap |= 1ULL << sh;
  1513. D_TX_REPLY("start=%d bitmap=0x%llx\n",
  1514. start, (unsigned long long)bitmap);
  1515. }
  1516. agg->bitmap = bitmap;
  1517. agg->start_idx = start;
  1518. D_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
  1519. agg->frame_count, agg->start_idx,
  1520. (unsigned long long)agg->bitmap);
  1521. if (bitmap)
  1522. agg->wait_for_ba = 1;
  1523. }
  1524. return 0;
  1525. }
  1526. static u8 il4965_find_station(struct il_priv *il, const u8 *addr)
  1527. {
  1528. int i;
  1529. int start = 0;
  1530. int ret = IL_INVALID_STATION;
  1531. unsigned long flags;
  1532. if ((il->iw_mode == NL80211_IFTYPE_ADHOC))
  1533. start = IL_STA_ID;
  1534. if (is_broadcast_ether_addr(addr))
  1535. return il->ctx.bcast_sta_id;
  1536. spin_lock_irqsave(&il->sta_lock, flags);
  1537. for (i = start; i < il->hw_params.max_stations; i++)
  1538. if (il->stations[i].used &&
  1539. (!compare_ether_addr(il->stations[i].sta.sta.addr,
  1540. addr))) {
  1541. ret = i;
  1542. goto out;
  1543. }
  1544. D_ASSOC("can not find STA %pM total %d\n",
  1545. addr, il->num_stations);
  1546. out:
  1547. /*
  1548. * It may be possible that more commands interacting with stations
  1549. * arrive before we completed processing the adding of
  1550. * station
  1551. */
  1552. if (ret != IL_INVALID_STATION &&
  1553. (!(il->stations[ret].used & IL_STA_UCODE_ACTIVE) ||
  1554. ((il->stations[ret].used & IL_STA_UCODE_ACTIVE) &&
  1555. (il->stations[ret].used & IL_STA_UCODE_INPROGRESS)))) {
  1556. IL_ERR("Requested station info for sta %d before ready.\n",
  1557. ret);
  1558. ret = IL_INVALID_STATION;
  1559. }
  1560. spin_unlock_irqrestore(&il->sta_lock, flags);
  1561. return ret;
  1562. }
  1563. static int il4965_get_ra_sta_id(struct il_priv *il, struct ieee80211_hdr *hdr)
  1564. {
  1565. if (il->iw_mode == NL80211_IFTYPE_STATION) {
  1566. return IL_AP_ID;
  1567. } else {
  1568. u8 *da = ieee80211_get_DA(hdr);
  1569. return il4965_find_station(il, da);
  1570. }
  1571. }
  1572. /**
  1573. * il4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
  1574. */
  1575. static void il4965_rx_reply_tx(struct il_priv *il,
  1576. struct il_rx_buf *rxb)
  1577. {
  1578. struct il_rx_pkt *pkt = rxb_addr(rxb);
  1579. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  1580. int txq_id = SEQ_TO_QUEUE(sequence);
  1581. int idx = SEQ_TO_IDX(sequence);
  1582. struct il_tx_queue *txq = &il->txq[txq_id];
  1583. struct ieee80211_hdr *hdr;
  1584. struct ieee80211_tx_info *info;
  1585. struct il4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
  1586. u32 status = le32_to_cpu(tx_resp->u.status);
  1587. int uninitialized_var(tid);
  1588. int sta_id;
  1589. int freed;
  1590. u8 *qc = NULL;
  1591. unsigned long flags;
  1592. if (idx >= txq->q.n_bd || il_queue_used(&txq->q, idx) == 0) {
  1593. IL_ERR("Read idx for DMA queue txq_id (%d) idx %d "
  1594. "is out of range [0-%d] %d %d\n", txq_id,
  1595. idx, txq->q.n_bd, txq->q.write_ptr,
  1596. txq->q.read_ptr);
  1597. return;
  1598. }
  1599. txq->time_stamp = jiffies;
  1600. info = IEEE80211_SKB_CB(txq->txb[txq->q.read_ptr].skb);
  1601. memset(&info->status, 0, sizeof(info->status));
  1602. hdr = il_tx_queue_get_hdr(il, txq_id, idx);
  1603. if (ieee80211_is_data_qos(hdr->frame_control)) {
  1604. qc = ieee80211_get_qos_ctl(hdr);
  1605. tid = qc[0] & 0xf;
  1606. }
  1607. sta_id = il4965_get_ra_sta_id(il, hdr);
  1608. if (txq->sched_retry && unlikely(sta_id == IL_INVALID_STATION)) {
  1609. IL_ERR("Station not known\n");
  1610. return;
  1611. }
  1612. spin_lock_irqsave(&il->sta_lock, flags);
  1613. if (txq->sched_retry) {
  1614. const u32 scd_ssn = il4965_get_scd_ssn(tx_resp);
  1615. struct il_ht_agg *agg = NULL;
  1616. WARN_ON(!qc);
  1617. agg = &il->stations[sta_id].tid[tid].agg;
  1618. il4965_tx_status_reply_tx(il, agg, tx_resp, txq_id, idx);
  1619. /* check if BAR is needed */
  1620. if ((tx_resp->frame_count == 1) && !il4965_is_tx_success(status))
  1621. info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
  1622. if (txq->q.read_ptr != (scd_ssn & 0xff)) {
  1623. idx = il_queue_dec_wrap(scd_ssn & 0xff,
  1624. txq->q.n_bd);
  1625. D_TX_REPLY("Retry scheduler reclaim scd_ssn "
  1626. "%d idx %d\n", scd_ssn , idx);
  1627. freed = il4965_tx_queue_reclaim(il, txq_id, idx);
  1628. if (qc)
  1629. il4965_free_tfds_in_queue(il, sta_id,
  1630. tid, freed);
  1631. if (il->mac80211_registered &&
  1632. il_queue_space(&txq->q) > txq->q.low_mark &&
  1633. agg->state != IL_EMPTYING_HW_QUEUE_DELBA)
  1634. il_wake_queue(il, txq);
  1635. }
  1636. } else {
  1637. info->status.rates[0].count = tx_resp->failure_frame + 1;
  1638. info->flags |= il4965_tx_status_to_mac80211(status);
  1639. il4965_hwrate_to_tx_control(il,
  1640. le32_to_cpu(tx_resp->rate_n_flags),
  1641. info);
  1642. D_TX_REPLY("TXQ %d status %s (0x%08x) "
  1643. "rate_n_flags 0x%x retries %d\n",
  1644. txq_id,
  1645. il4965_get_tx_fail_reason(status), status,
  1646. le32_to_cpu(tx_resp->rate_n_flags),
  1647. tx_resp->failure_frame);
  1648. freed = il4965_tx_queue_reclaim(il, txq_id, idx);
  1649. if (qc && likely(sta_id != IL_INVALID_STATION))
  1650. il4965_free_tfds_in_queue(il, sta_id, tid, freed);
  1651. else if (sta_id == IL_INVALID_STATION)
  1652. D_TX_REPLY("Station not known\n");
  1653. if (il->mac80211_registered &&
  1654. il_queue_space(&txq->q) > txq->q.low_mark)
  1655. il_wake_queue(il, txq);
  1656. }
  1657. if (qc && likely(sta_id != IL_INVALID_STATION))
  1658. il4965_txq_check_empty(il, sta_id, tid, txq_id);
  1659. il4965_check_abort_status(il, tx_resp->frame_count, status);
  1660. spin_unlock_irqrestore(&il->sta_lock, flags);
  1661. }
  1662. static void il4965_rx_beacon_notif(struct il_priv *il,
  1663. struct il_rx_buf *rxb)
  1664. {
  1665. struct il_rx_pkt *pkt = rxb_addr(rxb);
  1666. struct il4965_beacon_notif *beacon = (void *)pkt->u.raw;
  1667. u8 rate __maybe_unused =
  1668. il4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
  1669. D_RX("beacon status %#x, retries:%d ibssmgr:%d "
  1670. "tsf:0x%.8x%.8x rate:%d\n",
  1671. le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
  1672. beacon->beacon_notify_hdr.failure_frame,
  1673. le32_to_cpu(beacon->ibss_mgr_status),
  1674. le32_to_cpu(beacon->high_tsf),
  1675. le32_to_cpu(beacon->low_tsf), rate);
  1676. il->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
  1677. }
  1678. /* Set up 4965-specific Rx frame reply handlers */
  1679. static void il4965_rx_handler_setup(struct il_priv *il)
  1680. {
  1681. /* Legacy Rx frames */
  1682. il->rx_handlers[REPLY_RX] = il4965_rx_reply_rx;
  1683. /* Tx response */
  1684. il->rx_handlers[REPLY_TX] = il4965_rx_reply_tx;
  1685. il->rx_handlers[BEACON_NOTIFICATION] = il4965_rx_beacon_notif;
  1686. }
  1687. static struct il_hcmd_ops il4965_hcmd = {
  1688. .rxon_assoc = il4965_send_rxon_assoc,
  1689. .commit_rxon = il4965_commit_rxon,
  1690. .set_rxon_chain = il4965_set_rxon_chain,
  1691. };
  1692. static void il4965_post_scan(struct il_priv *il)
  1693. {
  1694. struct il_rxon_context *ctx = &il->ctx;
  1695. /*
  1696. * Since setting the RXON may have been deferred while
  1697. * performing the scan, fire one off if needed
  1698. */
  1699. if (memcmp(&ctx->staging, &ctx->active, sizeof(ctx->staging)))
  1700. il_commit_rxon(il, ctx);
  1701. }
  1702. static void il4965_post_associate(struct il_priv *il)
  1703. {
  1704. struct il_rxon_context *ctx = &il->ctx;
  1705. struct ieee80211_vif *vif = ctx->vif;
  1706. struct ieee80211_conf *conf = NULL;
  1707. int ret = 0;
  1708. if (!vif || !il->is_open)
  1709. return;
  1710. if (test_bit(STATUS_EXIT_PENDING, &il->status))
  1711. return;
  1712. il_scan_cancel_timeout(il, 200);
  1713. conf = il_ieee80211_get_hw_conf(il->hw);
  1714. ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  1715. il_commit_rxon(il, ctx);
  1716. ret = il_send_rxon_timing(il, ctx);
  1717. if (ret)
  1718. IL_WARN("RXON timing - "
  1719. "Attempting to continue.\n");
  1720. ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
  1721. il_set_rxon_ht(il, &il->current_ht_config);
  1722. if (il->cfg->ops->hcmd->set_rxon_chain)
  1723. il->cfg->ops->hcmd->set_rxon_chain(il, ctx);
  1724. ctx->staging.assoc_id = cpu_to_le16(vif->bss_conf.aid);
  1725. D_ASSOC("assoc id %d beacon interval %d\n",
  1726. vif->bss_conf.aid, vif->bss_conf.beacon_int);
  1727. if (vif->bss_conf.use_short_preamble)
  1728. ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  1729. else
  1730. ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  1731. if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) {
  1732. if (vif->bss_conf.use_short_slot)
  1733. ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
  1734. else
  1735. ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  1736. }
  1737. il_commit_rxon(il, ctx);
  1738. D_ASSOC("Associated as %d to: %pM\n",
  1739. vif->bss_conf.aid, ctx->active.bssid_addr);
  1740. switch (vif->type) {
  1741. case NL80211_IFTYPE_STATION:
  1742. break;
  1743. case NL80211_IFTYPE_ADHOC:
  1744. il4965_send_beacon_cmd(il);
  1745. break;
  1746. default:
  1747. IL_ERR("%s Should not be called in %d mode\n",
  1748. __func__, vif->type);
  1749. break;
  1750. }
  1751. /* the chain noise calibration will enabled PM upon completion
  1752. * If chain noise has already been run, then we need to enable
  1753. * power management here */
  1754. if (il->chain_noise_data.state == IL_CHAIN_NOISE_DONE)
  1755. il_power_update_mode(il, false);
  1756. /* Enable Rx differential gain and sensitivity calibrations */
  1757. il4965_chain_noise_reset(il);
  1758. il->start_calib = 1;
  1759. }
  1760. static void il4965_config_ap(struct il_priv *il)
  1761. {
  1762. struct il_rxon_context *ctx = &il->ctx;
  1763. struct ieee80211_vif *vif = ctx->vif;
  1764. int ret = 0;
  1765. lockdep_assert_held(&il->mutex);
  1766. if (test_bit(STATUS_EXIT_PENDING, &il->status))
  1767. return;
  1768. /* The following should be done only at AP bring up */
  1769. if (!il_is_associated_ctx(ctx)) {
  1770. /* RXON - unassoc (to set timing command) */
  1771. ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  1772. il_commit_rxon(il, ctx);
  1773. /* RXON Timing */
  1774. ret = il_send_rxon_timing(il, ctx);
  1775. if (ret)
  1776. IL_WARN("RXON timing failed - "
  1777. "Attempting to continue.\n");
  1778. /* AP has all antennas */
  1779. il->chain_noise_data.active_chains =
  1780. il->hw_params.valid_rx_ant;
  1781. il_set_rxon_ht(il, &il->current_ht_config);
  1782. if (il->cfg->ops->hcmd->set_rxon_chain)
  1783. il->cfg->ops->hcmd->set_rxon_chain(il, ctx);
  1784. ctx->staging.assoc_id = 0;
  1785. if (vif->bss_conf.use_short_preamble)
  1786. ctx->staging.flags |=
  1787. RXON_FLG_SHORT_PREAMBLE_MSK;
  1788. else
  1789. ctx->staging.flags &=
  1790. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  1791. if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) {
  1792. if (vif->bss_conf.use_short_slot)
  1793. ctx->staging.flags |=
  1794. RXON_FLG_SHORT_SLOT_MSK;
  1795. else
  1796. ctx->staging.flags &=
  1797. ~RXON_FLG_SHORT_SLOT_MSK;
  1798. }
  1799. /* need to send beacon cmd before committing assoc RXON! */
  1800. il4965_send_beacon_cmd(il);
  1801. /* restore RXON assoc */
  1802. ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
  1803. il_commit_rxon(il, ctx);
  1804. }
  1805. il4965_send_beacon_cmd(il);
  1806. }
  1807. static struct il_hcmd_utils_ops il4965_hcmd_utils = {
  1808. .get_hcmd_size = il4965_get_hcmd_size,
  1809. .build_addsta_hcmd = il4965_build_addsta_hcmd,
  1810. .request_scan = il4965_request_scan,
  1811. .post_scan = il4965_post_scan,
  1812. };
  1813. static struct il_lib_ops il4965_lib = {
  1814. .set_hw_params = il4965_hw_set_hw_params,
  1815. .txq_update_byte_cnt_tbl = il4965_txq_update_byte_cnt_tbl,
  1816. .txq_attach_buf_to_tfd = il4965_hw_txq_attach_buf_to_tfd,
  1817. .txq_free_tfd = il4965_hw_txq_free_tfd,
  1818. .txq_init = il4965_hw_tx_queue_init,
  1819. .rx_handler_setup = il4965_rx_handler_setup,
  1820. .is_valid_rtc_data_addr = il4965_hw_valid_rtc_data_addr,
  1821. .init_alive_start = il4965_init_alive_start,
  1822. .load_ucode = il4965_load_bsm,
  1823. .dump_nic_error_log = il4965_dump_nic_error_log,
  1824. .dump_fh = il4965_dump_fh,
  1825. .set_channel_switch = il4965_hw_channel_switch,
  1826. .apm_ops = {
  1827. .init = il_apm_init,
  1828. .config = il4965_nic_config,
  1829. },
  1830. .eeprom_ops = {
  1831. .regulatory_bands = {
  1832. EEPROM_REGULATORY_BAND_1_CHANNELS,
  1833. EEPROM_REGULATORY_BAND_2_CHANNELS,
  1834. EEPROM_REGULATORY_BAND_3_CHANNELS,
  1835. EEPROM_REGULATORY_BAND_4_CHANNELS,
  1836. EEPROM_REGULATORY_BAND_5_CHANNELS,
  1837. EEPROM_4965_REGULATORY_BAND_24_HT40_CHANNELS,
  1838. EEPROM_4965_REGULATORY_BAND_52_HT40_CHANNELS
  1839. },
  1840. .acquire_semaphore = il4965_eeprom_acquire_semaphore,
  1841. .release_semaphore = il4965_eeprom_release_semaphore,
  1842. },
  1843. .send_tx_power = il4965_send_tx_power,
  1844. .update_chain_flags = il4965_update_chain_flags,
  1845. .temp_ops = {
  1846. .temperature = il4965_temperature_calib,
  1847. },
  1848. .debugfs_ops = {
  1849. .rx_stats_read = il4965_ucode_rx_stats_read,
  1850. .tx_stats_read = il4965_ucode_tx_stats_read,
  1851. .general_stats_read = il4965_ucode_general_stats_read,
  1852. },
  1853. };
  1854. static const struct il_legacy_ops il4965_legacy_ops = {
  1855. .post_associate = il4965_post_associate,
  1856. .config_ap = il4965_config_ap,
  1857. .manage_ibss_station = il4965_manage_ibss_station,
  1858. .update_bcast_stations = il4965_update_bcast_stations,
  1859. };
  1860. struct ieee80211_ops il4965_hw_ops = {
  1861. .tx = il4965_mac_tx,
  1862. .start = il4965_mac_start,
  1863. .stop = il4965_mac_stop,
  1864. .add_interface = il_mac_add_interface,
  1865. .remove_interface = il_mac_remove_interface,
  1866. .change_interface = il_mac_change_interface,
  1867. .config = il_mac_config,
  1868. .configure_filter = il4965_configure_filter,
  1869. .set_key = il4965_mac_set_key,
  1870. .update_tkip_key = il4965_mac_update_tkip_key,
  1871. .conf_tx = il_mac_conf_tx,
  1872. .reset_tsf = il_mac_reset_tsf,
  1873. .bss_info_changed = il_mac_bss_info_changed,
  1874. .ampdu_action = il4965_mac_ampdu_action,
  1875. .hw_scan = il_mac_hw_scan,
  1876. .sta_add = il4965_mac_sta_add,
  1877. .sta_remove = il_mac_sta_remove,
  1878. .channel_switch = il4965_mac_channel_switch,
  1879. .tx_last_beacon = il_mac_tx_last_beacon,
  1880. };
  1881. static const struct il_ops il4965_ops = {
  1882. .lib = &il4965_lib,
  1883. .hcmd = &il4965_hcmd,
  1884. .utils = &il4965_hcmd_utils,
  1885. .led = &il4965_led_ops,
  1886. .legacy = &il4965_legacy_ops,
  1887. .ieee80211_ops = &il4965_hw_ops,
  1888. };
  1889. static struct il_base_params il4965_base_params = {
  1890. .eeprom_size = IL4965_EEPROM_IMG_SIZE,
  1891. .num_of_queues = IL49_NUM_QUEUES,
  1892. .num_of_ampdu_queues = IL49_NUM_AMPDU_QUEUES,
  1893. .pll_cfg_val = 0,
  1894. .set_l0s = true,
  1895. .use_bsm = true,
  1896. .led_compensation = 61,
  1897. .chain_noise_num_beacons = IL4965_CAL_NUM_BEACONS,
  1898. .wd_timeout = IL_DEF_WD_TIMEOUT,
  1899. .temperature_kelvin = true,
  1900. .ucode_tracing = true,
  1901. .sensitivity_calib_by_driver = true,
  1902. .chain_noise_calib_by_driver = true,
  1903. };
  1904. struct il_cfg il4965_cfg = {
  1905. .name = "Intel(R) Wireless WiFi Link 4965AGN",
  1906. .fw_name_pre = IL4965_FW_PRE,
  1907. .ucode_api_max = IL4965_UCODE_API_MAX,
  1908. .ucode_api_min = IL4965_UCODE_API_MIN,
  1909. .sku = IL_SKU_A|IL_SKU_G|IL_SKU_N,
  1910. .valid_tx_ant = ANT_AB,
  1911. .valid_rx_ant = ANT_ABC,
  1912. .eeprom_ver = EEPROM_4965_EEPROM_VERSION,
  1913. .eeprom_calib_ver = EEPROM_4965_TX_POWER_VERSION,
  1914. .ops = &il4965_ops,
  1915. .mod_params = &il4965_mod_params,
  1916. .base_params = &il4965_base_params,
  1917. .led_mode = IL_LED_BLINK,
  1918. /*
  1919. * Force use of chains B and C for scan RX on 5 GHz band
  1920. * because the device has off-channel reception on chain A.
  1921. */
  1922. .scan_rx_antennas[IEEE80211_BAND_5GHZ] = ANT_BC,
  1923. };
  1924. /* Module firmware */
  1925. MODULE_FIRMWARE(IL4965_MODULE_FIRMWARE(IL4965_UCODE_API_MAX));