soc-cache.c 34 KB

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  1. /*
  2. * soc-cache.c -- ASoC register cache helpers
  3. *
  4. * Copyright 2009 Wolfson Microelectronics PLC.
  5. *
  6. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the
  10. * Free Software Foundation; either version 2 of the License, or (at your
  11. * option) any later version.
  12. */
  13. #include <linux/i2c.h>
  14. #include <linux/spi/spi.h>
  15. #include <sound/soc.h>
  16. #include <linux/lzo.h>
  17. #include <linux/bitmap.h>
  18. #include <linux/rbtree.h>
  19. #include <trace/events/asoc.h>
  20. #if defined(CONFIG_SPI_MASTER)
  21. static int do_spi_write(void *control_data, const void *msg,
  22. int len)
  23. {
  24. struct spi_device *spi = control_data;
  25. struct spi_transfer t;
  26. struct spi_message m;
  27. if (len <= 0)
  28. return 0;
  29. spi_message_init(&m);
  30. memset(&t, 0, sizeof t);
  31. t.tx_buf = msg;
  32. t.len = len;
  33. spi_message_add_tail(&t, &m);
  34. spi_sync(spi, &m);
  35. return len;
  36. }
  37. #endif
  38. static int do_hw_write(struct snd_soc_codec *codec, unsigned int reg,
  39. unsigned int value, const void *data, int len)
  40. {
  41. int ret;
  42. if (!snd_soc_codec_volatile_register(codec, reg) &&
  43. reg < codec->driver->reg_cache_size &&
  44. !codec->cache_bypass) {
  45. ret = snd_soc_cache_write(codec, reg, value);
  46. if (ret < 0)
  47. return -1;
  48. }
  49. if (codec->cache_only) {
  50. codec->cache_sync = 1;
  51. return 0;
  52. }
  53. ret = codec->hw_write(codec->control_data, data, len);
  54. if (ret == len)
  55. return 0;
  56. if (ret < 0)
  57. return ret;
  58. else
  59. return -EIO;
  60. }
  61. static unsigned int do_hw_read(struct snd_soc_codec *codec, unsigned int reg)
  62. {
  63. int ret;
  64. unsigned int val;
  65. if (reg >= codec->driver->reg_cache_size ||
  66. snd_soc_codec_volatile_register(codec, reg) ||
  67. codec->cache_bypass) {
  68. if (codec->cache_only)
  69. return -1;
  70. BUG_ON(!codec->hw_read);
  71. return codec->hw_read(codec, reg);
  72. }
  73. ret = snd_soc_cache_read(codec, reg, &val);
  74. if (ret < 0)
  75. return -1;
  76. return val;
  77. }
  78. static unsigned int snd_soc_4_12_read(struct snd_soc_codec *codec,
  79. unsigned int reg)
  80. {
  81. return do_hw_read(codec, reg);
  82. }
  83. static int snd_soc_4_12_write(struct snd_soc_codec *codec, unsigned int reg,
  84. unsigned int value)
  85. {
  86. u8 data[2];
  87. data[0] = (reg << 4) | ((value >> 8) & 0x000f);
  88. data[1] = value & 0x00ff;
  89. return do_hw_write(codec, reg, value, data, 2);
  90. }
  91. #if defined(CONFIG_SPI_MASTER)
  92. static int snd_soc_4_12_spi_write(void *control_data, const char *data,
  93. int len)
  94. {
  95. u8 msg[2];
  96. msg[0] = data[1];
  97. msg[1] = data[0];
  98. return do_spi_write(control_data, msg, len);
  99. }
  100. #else
  101. #define snd_soc_4_12_spi_write NULL
  102. #endif
  103. static unsigned int snd_soc_7_9_read(struct snd_soc_codec *codec,
  104. unsigned int reg)
  105. {
  106. return do_hw_read(codec, reg);
  107. }
  108. static int snd_soc_7_9_write(struct snd_soc_codec *codec, unsigned int reg,
  109. unsigned int value)
  110. {
  111. u8 data[2];
  112. data[0] = (reg << 1) | ((value >> 8) & 0x0001);
  113. data[1] = value & 0x00ff;
  114. return do_hw_write(codec, reg, value, data, 2);
  115. }
  116. #if defined(CONFIG_SPI_MASTER)
  117. static int snd_soc_7_9_spi_write(void *control_data, const char *data,
  118. int len)
  119. {
  120. u8 msg[2];
  121. msg[0] = data[0];
  122. msg[1] = data[1];
  123. return do_spi_write(control_data, msg, len);
  124. }
  125. #else
  126. #define snd_soc_7_9_spi_write NULL
  127. #endif
  128. static int snd_soc_8_8_write(struct snd_soc_codec *codec, unsigned int reg,
  129. unsigned int value)
  130. {
  131. u8 data[2];
  132. reg &= 0xff;
  133. data[0] = reg;
  134. data[1] = value & 0xff;
  135. return do_hw_write(codec, reg, value, data, 2);
  136. }
  137. static unsigned int snd_soc_8_8_read(struct snd_soc_codec *codec,
  138. unsigned int reg)
  139. {
  140. return do_hw_read(codec, reg);
  141. }
  142. #if defined(CONFIG_SPI_MASTER)
  143. static int snd_soc_8_8_spi_write(void *control_data, const char *data,
  144. int len)
  145. {
  146. u8 msg[2];
  147. msg[0] = data[0];
  148. msg[1] = data[1];
  149. return do_spi_write(control_data, msg, len);
  150. }
  151. #else
  152. #define snd_soc_8_8_spi_write NULL
  153. #endif
  154. static int snd_soc_8_16_write(struct snd_soc_codec *codec, unsigned int reg,
  155. unsigned int value)
  156. {
  157. u8 data[3];
  158. data[0] = reg;
  159. data[1] = (value >> 8) & 0xff;
  160. data[2] = value & 0xff;
  161. return do_hw_write(codec, reg, value, data, 3);
  162. }
  163. static unsigned int snd_soc_8_16_read(struct snd_soc_codec *codec,
  164. unsigned int reg)
  165. {
  166. return do_hw_read(codec, reg);
  167. }
  168. #if defined(CONFIG_SPI_MASTER)
  169. static int snd_soc_8_16_spi_write(void *control_data, const char *data,
  170. int len)
  171. {
  172. u8 msg[3];
  173. msg[0] = data[0];
  174. msg[1] = data[1];
  175. msg[2] = data[2];
  176. return do_spi_write(control_data, msg, len);
  177. }
  178. #else
  179. #define snd_soc_8_16_spi_write NULL
  180. #endif
  181. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  182. static unsigned int do_i2c_read(struct snd_soc_codec *codec,
  183. void *reg, int reglen,
  184. void *data, int datalen)
  185. {
  186. struct i2c_msg xfer[2];
  187. int ret;
  188. struct i2c_client *client = codec->control_data;
  189. /* Write register */
  190. xfer[0].addr = client->addr;
  191. xfer[0].flags = 0;
  192. xfer[0].len = reglen;
  193. xfer[0].buf = reg;
  194. /* Read data */
  195. xfer[1].addr = client->addr;
  196. xfer[1].flags = I2C_M_RD;
  197. xfer[1].len = datalen;
  198. xfer[1].buf = data;
  199. ret = i2c_transfer(client->adapter, xfer, 2);
  200. dev_err(&client->dev, "i2c_transfer() returned %d\n", ret);
  201. if (ret == 2)
  202. return 0;
  203. else if (ret < 0)
  204. return ret;
  205. else
  206. return -EIO;
  207. }
  208. #endif
  209. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  210. static unsigned int snd_soc_8_8_read_i2c(struct snd_soc_codec *codec,
  211. unsigned int r)
  212. {
  213. u8 reg = r;
  214. u8 data;
  215. int ret;
  216. ret = do_i2c_read(codec, &reg, 1, &data, 1);
  217. if (ret < 0)
  218. return 0;
  219. return data;
  220. }
  221. #else
  222. #define snd_soc_8_8_read_i2c NULL
  223. #endif
  224. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  225. static unsigned int snd_soc_8_16_read_i2c(struct snd_soc_codec *codec,
  226. unsigned int r)
  227. {
  228. u8 reg = r;
  229. u16 data;
  230. int ret;
  231. ret = do_i2c_read(codec, &reg, 1, &data, 2);
  232. if (ret < 0)
  233. return 0;
  234. return (data >> 8) | ((data & 0xff) << 8);
  235. }
  236. #else
  237. #define snd_soc_8_16_read_i2c NULL
  238. #endif
  239. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  240. static unsigned int snd_soc_16_8_read_i2c(struct snd_soc_codec *codec,
  241. unsigned int r)
  242. {
  243. u16 reg = r;
  244. u8 data;
  245. int ret;
  246. ret = do_i2c_read(codec, &reg, 2, &data, 1);
  247. if (ret < 0)
  248. return 0;
  249. return data;
  250. }
  251. #else
  252. #define snd_soc_16_8_read_i2c NULL
  253. #endif
  254. static unsigned int snd_soc_16_8_read(struct snd_soc_codec *codec,
  255. unsigned int reg)
  256. {
  257. return do_hw_read(codec, reg);
  258. }
  259. static int snd_soc_16_8_write(struct snd_soc_codec *codec, unsigned int reg,
  260. unsigned int value)
  261. {
  262. u8 data[3];
  263. data[0] = (reg >> 8) & 0xff;
  264. data[1] = reg & 0xff;
  265. data[2] = value;
  266. reg &= 0xff;
  267. return do_hw_write(codec, reg, value, data, 3);
  268. }
  269. #if defined(CONFIG_SPI_MASTER)
  270. static int snd_soc_16_8_spi_write(void *control_data, const char *data,
  271. int len)
  272. {
  273. u8 msg[3];
  274. msg[0] = data[0];
  275. msg[1] = data[1];
  276. msg[2] = data[2];
  277. return do_spi_write(control_data, msg, len);
  278. }
  279. #else
  280. #define snd_soc_16_8_spi_write NULL
  281. #endif
  282. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  283. static unsigned int snd_soc_16_16_read_i2c(struct snd_soc_codec *codec,
  284. unsigned int r)
  285. {
  286. u16 reg = cpu_to_be16(r);
  287. u16 data;
  288. int ret;
  289. ret = do_i2c_read(codec, &reg, 2, &data, 2);
  290. if (ret < 0)
  291. return 0;
  292. return be16_to_cpu(data);
  293. }
  294. #else
  295. #define snd_soc_16_16_read_i2c NULL
  296. #endif
  297. static unsigned int snd_soc_16_16_read(struct snd_soc_codec *codec,
  298. unsigned int reg)
  299. {
  300. return do_hw_read(codec, reg);
  301. }
  302. static int snd_soc_16_16_write(struct snd_soc_codec *codec, unsigned int reg,
  303. unsigned int value)
  304. {
  305. u8 data[4];
  306. data[0] = (reg >> 8) & 0xff;
  307. data[1] = reg & 0xff;
  308. data[2] = (value >> 8) & 0xff;
  309. data[3] = value & 0xff;
  310. return do_hw_write(codec, reg, value, data, 4);
  311. }
  312. #if defined(CONFIG_SPI_MASTER)
  313. static int snd_soc_16_16_spi_write(void *control_data, const char *data,
  314. int len)
  315. {
  316. u8 msg[4];
  317. msg[0] = data[0];
  318. msg[1] = data[1];
  319. msg[2] = data[2];
  320. msg[3] = data[3];
  321. return do_spi_write(control_data, msg, len);
  322. }
  323. #else
  324. #define snd_soc_16_16_spi_write NULL
  325. #endif
  326. /* Primitive bulk write support for soc-cache. The data pointed to by `data' needs
  327. * to already be in the form the hardware expects including any leading register specific
  328. * data. Any data written through this function will not go through the cache as it
  329. * only handles writing to volatile or out of bounds registers.
  330. */
  331. static int snd_soc_hw_bulk_write_raw(struct snd_soc_codec *codec, unsigned int reg,
  332. const void *data, size_t len)
  333. {
  334. int ret;
  335. /* Ensure that the base register is volatile. Subsequently
  336. * any other register that is touched by this routine should be
  337. * volatile as well to ensure that we don't get out of sync with
  338. * the cache.
  339. */
  340. if (!snd_soc_codec_volatile_register(codec, reg)
  341. && reg < codec->driver->reg_cache_size)
  342. return -EINVAL;
  343. switch (codec->control_type) {
  344. case SND_SOC_I2C:
  345. ret = i2c_master_send(codec->control_data, data, len);
  346. break;
  347. case SND_SOC_SPI:
  348. ret = do_spi_write(codec->control_data, data, len);
  349. break;
  350. default:
  351. BUG();
  352. }
  353. if (ret == len)
  354. return 0;
  355. if (ret < 0)
  356. return ret;
  357. else
  358. return -EIO;
  359. }
  360. static struct {
  361. int addr_bits;
  362. int data_bits;
  363. int (*write)(struct snd_soc_codec *codec, unsigned int, unsigned int);
  364. int (*spi_write)(void *, const char *, int);
  365. unsigned int (*read)(struct snd_soc_codec *, unsigned int);
  366. unsigned int (*i2c_read)(struct snd_soc_codec *, unsigned int);
  367. } io_types[] = {
  368. {
  369. .addr_bits = 4, .data_bits = 12,
  370. .write = snd_soc_4_12_write, .read = snd_soc_4_12_read,
  371. .spi_write = snd_soc_4_12_spi_write,
  372. },
  373. {
  374. .addr_bits = 7, .data_bits = 9,
  375. .write = snd_soc_7_9_write, .read = snd_soc_7_9_read,
  376. .spi_write = snd_soc_7_9_spi_write,
  377. },
  378. {
  379. .addr_bits = 8, .data_bits = 8,
  380. .write = snd_soc_8_8_write, .read = snd_soc_8_8_read,
  381. .i2c_read = snd_soc_8_8_read_i2c,
  382. .spi_write = snd_soc_8_8_spi_write,
  383. },
  384. {
  385. .addr_bits = 8, .data_bits = 16,
  386. .write = snd_soc_8_16_write, .read = snd_soc_8_16_read,
  387. .i2c_read = snd_soc_8_16_read_i2c,
  388. .spi_write = snd_soc_8_16_spi_write,
  389. },
  390. {
  391. .addr_bits = 16, .data_bits = 8,
  392. .write = snd_soc_16_8_write, .read = snd_soc_16_8_read,
  393. .i2c_read = snd_soc_16_8_read_i2c,
  394. .spi_write = snd_soc_16_8_spi_write,
  395. },
  396. {
  397. .addr_bits = 16, .data_bits = 16,
  398. .write = snd_soc_16_16_write, .read = snd_soc_16_16_read,
  399. .i2c_read = snd_soc_16_16_read_i2c,
  400. .spi_write = snd_soc_16_16_spi_write,
  401. },
  402. };
  403. /**
  404. * snd_soc_codec_set_cache_io: Set up standard I/O functions.
  405. *
  406. * @codec: CODEC to configure.
  407. * @type: Type of cache.
  408. * @addr_bits: Number of bits of register address data.
  409. * @data_bits: Number of bits of data per register.
  410. * @control: Control bus used.
  411. *
  412. * Register formats are frequently shared between many I2C and SPI
  413. * devices. In order to promote code reuse the ASoC core provides
  414. * some standard implementations of CODEC read and write operations
  415. * which can be set up using this function.
  416. *
  417. * The caller is responsible for allocating and initialising the
  418. * actual cache.
  419. *
  420. * Note that at present this code cannot be used by CODECs with
  421. * volatile registers.
  422. */
  423. int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec,
  424. int addr_bits, int data_bits,
  425. enum snd_soc_control_type control)
  426. {
  427. int i;
  428. for (i = 0; i < ARRAY_SIZE(io_types); i++)
  429. if (io_types[i].addr_bits == addr_bits &&
  430. io_types[i].data_bits == data_bits)
  431. break;
  432. if (i == ARRAY_SIZE(io_types)) {
  433. printk(KERN_ERR
  434. "No I/O functions for %d bit address %d bit data\n",
  435. addr_bits, data_bits);
  436. return -EINVAL;
  437. }
  438. codec->write = io_types[i].write;
  439. codec->read = io_types[i].read;
  440. codec->bulk_write_raw = snd_soc_hw_bulk_write_raw;
  441. switch (control) {
  442. case SND_SOC_CUSTOM:
  443. break;
  444. case SND_SOC_I2C:
  445. #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
  446. codec->hw_write = (hw_write_t)i2c_master_send;
  447. #endif
  448. if (io_types[i].i2c_read)
  449. codec->hw_read = io_types[i].i2c_read;
  450. codec->control_data = container_of(codec->dev,
  451. struct i2c_client,
  452. dev);
  453. break;
  454. case SND_SOC_SPI:
  455. if (io_types[i].spi_write)
  456. codec->hw_write = io_types[i].spi_write;
  457. codec->control_data = container_of(codec->dev,
  458. struct spi_device,
  459. dev);
  460. break;
  461. }
  462. return 0;
  463. }
  464. EXPORT_SYMBOL_GPL(snd_soc_codec_set_cache_io);
  465. static bool snd_soc_set_cache_val(void *base, unsigned int idx,
  466. unsigned int val, unsigned int word_size)
  467. {
  468. switch (word_size) {
  469. case 1: {
  470. u8 *cache = base;
  471. if (cache[idx] == val)
  472. return true;
  473. cache[idx] = val;
  474. break;
  475. }
  476. case 2: {
  477. u16 *cache = base;
  478. if (cache[idx] == val)
  479. return true;
  480. cache[idx] = val;
  481. break;
  482. }
  483. default:
  484. BUG();
  485. }
  486. return false;
  487. }
  488. static unsigned int snd_soc_get_cache_val(const void *base, unsigned int idx,
  489. unsigned int word_size)
  490. {
  491. switch (word_size) {
  492. case 1: {
  493. const u8 *cache = base;
  494. return cache[idx];
  495. }
  496. case 2: {
  497. const u16 *cache = base;
  498. return cache[idx];
  499. }
  500. default:
  501. BUG();
  502. }
  503. /* unreachable */
  504. return -1;
  505. }
  506. struct snd_soc_rbtree_node {
  507. struct rb_node node;
  508. unsigned int reg;
  509. unsigned int value;
  510. unsigned int defval;
  511. } __attribute__ ((packed));
  512. struct snd_soc_rbtree_ctx {
  513. struct rb_root root;
  514. };
  515. static struct snd_soc_rbtree_node *snd_soc_rbtree_lookup(
  516. struct rb_root *root, unsigned int reg)
  517. {
  518. struct rb_node *node;
  519. struct snd_soc_rbtree_node *rbnode;
  520. node = root->rb_node;
  521. while (node) {
  522. rbnode = container_of(node, struct snd_soc_rbtree_node, node);
  523. if (rbnode->reg < reg)
  524. node = node->rb_left;
  525. else if (rbnode->reg > reg)
  526. node = node->rb_right;
  527. else
  528. return rbnode;
  529. }
  530. return NULL;
  531. }
  532. static int snd_soc_rbtree_insert(struct rb_root *root,
  533. struct snd_soc_rbtree_node *rbnode)
  534. {
  535. struct rb_node **new, *parent;
  536. struct snd_soc_rbtree_node *rbnode_tmp;
  537. parent = NULL;
  538. new = &root->rb_node;
  539. while (*new) {
  540. rbnode_tmp = container_of(*new, struct snd_soc_rbtree_node,
  541. node);
  542. parent = *new;
  543. if (rbnode_tmp->reg < rbnode->reg)
  544. new = &((*new)->rb_left);
  545. else if (rbnode_tmp->reg > rbnode->reg)
  546. new = &((*new)->rb_right);
  547. else
  548. return 0;
  549. }
  550. /* insert the node into the rbtree */
  551. rb_link_node(&rbnode->node, parent, new);
  552. rb_insert_color(&rbnode->node, root);
  553. return 1;
  554. }
  555. static int snd_soc_rbtree_cache_sync(struct snd_soc_codec *codec)
  556. {
  557. struct snd_soc_rbtree_ctx *rbtree_ctx;
  558. struct rb_node *node;
  559. struct snd_soc_rbtree_node *rbnode;
  560. unsigned int val;
  561. int ret;
  562. rbtree_ctx = codec->reg_cache;
  563. for (node = rb_first(&rbtree_ctx->root); node; node = rb_next(node)) {
  564. rbnode = rb_entry(node, struct snd_soc_rbtree_node, node);
  565. if (rbnode->value == rbnode->defval)
  566. continue;
  567. ret = snd_soc_cache_read(codec, rbnode->reg, &val);
  568. if (ret)
  569. return ret;
  570. codec->cache_bypass = 1;
  571. ret = snd_soc_write(codec, rbnode->reg, val);
  572. codec->cache_bypass = 0;
  573. if (ret)
  574. return ret;
  575. dev_dbg(codec->dev, "Synced register %#x, value = %#x\n",
  576. rbnode->reg, val);
  577. }
  578. return 0;
  579. }
  580. static int snd_soc_rbtree_cache_write(struct snd_soc_codec *codec,
  581. unsigned int reg, unsigned int value)
  582. {
  583. struct snd_soc_rbtree_ctx *rbtree_ctx;
  584. struct snd_soc_rbtree_node *rbnode;
  585. rbtree_ctx = codec->reg_cache;
  586. rbnode = snd_soc_rbtree_lookup(&rbtree_ctx->root, reg);
  587. if (rbnode) {
  588. if (rbnode->value == value)
  589. return 0;
  590. rbnode->value = value;
  591. } else {
  592. /* bail out early, no need to create the rbnode yet */
  593. if (!value)
  594. return 0;
  595. /*
  596. * for uninitialized registers whose value is changed
  597. * from the default zero, create an rbnode and insert
  598. * it into the tree.
  599. */
  600. rbnode = kzalloc(sizeof *rbnode, GFP_KERNEL);
  601. if (!rbnode)
  602. return -ENOMEM;
  603. rbnode->reg = reg;
  604. rbnode->value = value;
  605. snd_soc_rbtree_insert(&rbtree_ctx->root, rbnode);
  606. }
  607. return 0;
  608. }
  609. static int snd_soc_rbtree_cache_read(struct snd_soc_codec *codec,
  610. unsigned int reg, unsigned int *value)
  611. {
  612. struct snd_soc_rbtree_ctx *rbtree_ctx;
  613. struct snd_soc_rbtree_node *rbnode;
  614. rbtree_ctx = codec->reg_cache;
  615. rbnode = snd_soc_rbtree_lookup(&rbtree_ctx->root, reg);
  616. if (rbnode) {
  617. *value = rbnode->value;
  618. } else {
  619. /* uninitialized registers default to 0 */
  620. *value = 0;
  621. }
  622. return 0;
  623. }
  624. static int snd_soc_rbtree_cache_exit(struct snd_soc_codec *codec)
  625. {
  626. struct rb_node *next;
  627. struct snd_soc_rbtree_ctx *rbtree_ctx;
  628. struct snd_soc_rbtree_node *rbtree_node;
  629. /* if we've already been called then just return */
  630. rbtree_ctx = codec->reg_cache;
  631. if (!rbtree_ctx)
  632. return 0;
  633. /* free up the rbtree */
  634. next = rb_first(&rbtree_ctx->root);
  635. while (next) {
  636. rbtree_node = rb_entry(next, struct snd_soc_rbtree_node, node);
  637. next = rb_next(&rbtree_node->node);
  638. rb_erase(&rbtree_node->node, &rbtree_ctx->root);
  639. kfree(rbtree_node);
  640. }
  641. /* release the resources */
  642. kfree(codec->reg_cache);
  643. codec->reg_cache = NULL;
  644. return 0;
  645. }
  646. static int snd_soc_rbtree_cache_init(struct snd_soc_codec *codec)
  647. {
  648. struct snd_soc_rbtree_node *rbtree_node;
  649. struct snd_soc_rbtree_ctx *rbtree_ctx;
  650. unsigned int val;
  651. unsigned int word_size;
  652. int i;
  653. int ret;
  654. codec->reg_cache = kmalloc(sizeof *rbtree_ctx, GFP_KERNEL);
  655. if (!codec->reg_cache)
  656. return -ENOMEM;
  657. rbtree_ctx = codec->reg_cache;
  658. rbtree_ctx->root = RB_ROOT;
  659. if (!codec->reg_def_copy)
  660. return 0;
  661. /*
  662. * populate the rbtree with the initialized registers. All other
  663. * registers will be inserted when they are first modified.
  664. */
  665. word_size = codec->driver->reg_word_size;
  666. for (i = 0; i < codec->driver->reg_cache_size; ++i) {
  667. val = snd_soc_get_cache_val(codec->reg_def_copy, i, word_size);
  668. if (!val)
  669. continue;
  670. rbtree_node = kzalloc(sizeof *rbtree_node, GFP_KERNEL);
  671. if (!rbtree_node) {
  672. ret = -ENOMEM;
  673. snd_soc_cache_exit(codec);
  674. break;
  675. }
  676. rbtree_node->reg = i;
  677. rbtree_node->value = val;
  678. rbtree_node->defval = val;
  679. snd_soc_rbtree_insert(&rbtree_ctx->root, rbtree_node);
  680. }
  681. return 0;
  682. }
  683. #ifdef CONFIG_SND_SOC_CACHE_LZO
  684. struct snd_soc_lzo_ctx {
  685. void *wmem;
  686. void *dst;
  687. const void *src;
  688. size_t src_len;
  689. size_t dst_len;
  690. size_t decompressed_size;
  691. unsigned long *sync_bmp;
  692. int sync_bmp_nbits;
  693. };
  694. #define LZO_BLOCK_NUM 8
  695. static int snd_soc_lzo_block_count(void)
  696. {
  697. return LZO_BLOCK_NUM;
  698. }
  699. static int snd_soc_lzo_prepare(struct snd_soc_lzo_ctx *lzo_ctx)
  700. {
  701. lzo_ctx->wmem = kmalloc(LZO1X_MEM_COMPRESS, GFP_KERNEL);
  702. if (!lzo_ctx->wmem)
  703. return -ENOMEM;
  704. return 0;
  705. }
  706. static int snd_soc_lzo_compress(struct snd_soc_lzo_ctx *lzo_ctx)
  707. {
  708. size_t compress_size;
  709. int ret;
  710. ret = lzo1x_1_compress(lzo_ctx->src, lzo_ctx->src_len,
  711. lzo_ctx->dst, &compress_size, lzo_ctx->wmem);
  712. if (ret != LZO_E_OK || compress_size > lzo_ctx->dst_len)
  713. return -EINVAL;
  714. lzo_ctx->dst_len = compress_size;
  715. return 0;
  716. }
  717. static int snd_soc_lzo_decompress(struct snd_soc_lzo_ctx *lzo_ctx)
  718. {
  719. size_t dst_len;
  720. int ret;
  721. dst_len = lzo_ctx->dst_len;
  722. ret = lzo1x_decompress_safe(lzo_ctx->src, lzo_ctx->src_len,
  723. lzo_ctx->dst, &dst_len);
  724. if (ret != LZO_E_OK || dst_len != lzo_ctx->dst_len)
  725. return -EINVAL;
  726. return 0;
  727. }
  728. static int snd_soc_lzo_compress_cache_block(struct snd_soc_codec *codec,
  729. struct snd_soc_lzo_ctx *lzo_ctx)
  730. {
  731. int ret;
  732. lzo_ctx->dst_len = lzo1x_worst_compress(PAGE_SIZE);
  733. lzo_ctx->dst = kmalloc(lzo_ctx->dst_len, GFP_KERNEL);
  734. if (!lzo_ctx->dst) {
  735. lzo_ctx->dst_len = 0;
  736. return -ENOMEM;
  737. }
  738. ret = snd_soc_lzo_compress(lzo_ctx);
  739. if (ret < 0)
  740. return ret;
  741. return 0;
  742. }
  743. static int snd_soc_lzo_decompress_cache_block(struct snd_soc_codec *codec,
  744. struct snd_soc_lzo_ctx *lzo_ctx)
  745. {
  746. int ret;
  747. lzo_ctx->dst_len = lzo_ctx->decompressed_size;
  748. lzo_ctx->dst = kmalloc(lzo_ctx->dst_len, GFP_KERNEL);
  749. if (!lzo_ctx->dst) {
  750. lzo_ctx->dst_len = 0;
  751. return -ENOMEM;
  752. }
  753. ret = snd_soc_lzo_decompress(lzo_ctx);
  754. if (ret < 0)
  755. return ret;
  756. return 0;
  757. }
  758. static inline int snd_soc_lzo_get_blkindex(struct snd_soc_codec *codec,
  759. unsigned int reg)
  760. {
  761. const struct snd_soc_codec_driver *codec_drv;
  762. codec_drv = codec->driver;
  763. return (reg * codec_drv->reg_word_size) /
  764. DIV_ROUND_UP(codec->reg_size, snd_soc_lzo_block_count());
  765. }
  766. static inline int snd_soc_lzo_get_blkpos(struct snd_soc_codec *codec,
  767. unsigned int reg)
  768. {
  769. const struct snd_soc_codec_driver *codec_drv;
  770. codec_drv = codec->driver;
  771. return reg % (DIV_ROUND_UP(codec->reg_size, snd_soc_lzo_block_count()) /
  772. codec_drv->reg_word_size);
  773. }
  774. static inline int snd_soc_lzo_get_blksize(struct snd_soc_codec *codec)
  775. {
  776. const struct snd_soc_codec_driver *codec_drv;
  777. codec_drv = codec->driver;
  778. return DIV_ROUND_UP(codec->reg_size, snd_soc_lzo_block_count());
  779. }
  780. static int snd_soc_lzo_cache_sync(struct snd_soc_codec *codec)
  781. {
  782. struct snd_soc_lzo_ctx **lzo_blocks;
  783. unsigned int val;
  784. int i;
  785. int ret;
  786. lzo_blocks = codec->reg_cache;
  787. for_each_set_bit(i, lzo_blocks[0]->sync_bmp, lzo_blocks[0]->sync_bmp_nbits) {
  788. ret = snd_soc_cache_read(codec, i, &val);
  789. if (ret)
  790. return ret;
  791. codec->cache_bypass = 1;
  792. ret = snd_soc_write(codec, i, val);
  793. codec->cache_bypass = 0;
  794. if (ret)
  795. return ret;
  796. dev_dbg(codec->dev, "Synced register %#x, value = %#x\n",
  797. i, val);
  798. }
  799. return 0;
  800. }
  801. static int snd_soc_lzo_cache_write(struct snd_soc_codec *codec,
  802. unsigned int reg, unsigned int value)
  803. {
  804. struct snd_soc_lzo_ctx *lzo_block, **lzo_blocks;
  805. int ret, blkindex, blkpos;
  806. size_t blksize, tmp_dst_len;
  807. void *tmp_dst;
  808. /* index of the compressed lzo block */
  809. blkindex = snd_soc_lzo_get_blkindex(codec, reg);
  810. /* register index within the decompressed block */
  811. blkpos = snd_soc_lzo_get_blkpos(codec, reg);
  812. /* size of the compressed block */
  813. blksize = snd_soc_lzo_get_blksize(codec);
  814. lzo_blocks = codec->reg_cache;
  815. lzo_block = lzo_blocks[blkindex];
  816. /* save the pointer and length of the compressed block */
  817. tmp_dst = lzo_block->dst;
  818. tmp_dst_len = lzo_block->dst_len;
  819. /* prepare the source to be the compressed block */
  820. lzo_block->src = lzo_block->dst;
  821. lzo_block->src_len = lzo_block->dst_len;
  822. /* decompress the block */
  823. ret = snd_soc_lzo_decompress_cache_block(codec, lzo_block);
  824. if (ret < 0) {
  825. kfree(lzo_block->dst);
  826. goto out;
  827. }
  828. /* write the new value to the cache */
  829. if (snd_soc_set_cache_val(lzo_block->dst, blkpos, value,
  830. codec->driver->reg_word_size)) {
  831. kfree(lzo_block->dst);
  832. goto out;
  833. }
  834. /* prepare the source to be the decompressed block */
  835. lzo_block->src = lzo_block->dst;
  836. lzo_block->src_len = lzo_block->dst_len;
  837. /* compress the block */
  838. ret = snd_soc_lzo_compress_cache_block(codec, lzo_block);
  839. if (ret < 0) {
  840. kfree(lzo_block->dst);
  841. kfree(lzo_block->src);
  842. goto out;
  843. }
  844. /* set the bit so we know we have to sync this register */
  845. set_bit(reg, lzo_block->sync_bmp);
  846. kfree(tmp_dst);
  847. kfree(lzo_block->src);
  848. return 0;
  849. out:
  850. lzo_block->dst = tmp_dst;
  851. lzo_block->dst_len = tmp_dst_len;
  852. return ret;
  853. }
  854. static int snd_soc_lzo_cache_read(struct snd_soc_codec *codec,
  855. unsigned int reg, unsigned int *value)
  856. {
  857. struct snd_soc_lzo_ctx *lzo_block, **lzo_blocks;
  858. int ret, blkindex, blkpos;
  859. size_t blksize, tmp_dst_len;
  860. void *tmp_dst;
  861. *value = 0;
  862. /* index of the compressed lzo block */
  863. blkindex = snd_soc_lzo_get_blkindex(codec, reg);
  864. /* register index within the decompressed block */
  865. blkpos = snd_soc_lzo_get_blkpos(codec, reg);
  866. /* size of the compressed block */
  867. blksize = snd_soc_lzo_get_blksize(codec);
  868. lzo_blocks = codec->reg_cache;
  869. lzo_block = lzo_blocks[blkindex];
  870. /* save the pointer and length of the compressed block */
  871. tmp_dst = lzo_block->dst;
  872. tmp_dst_len = lzo_block->dst_len;
  873. /* prepare the source to be the compressed block */
  874. lzo_block->src = lzo_block->dst;
  875. lzo_block->src_len = lzo_block->dst_len;
  876. /* decompress the block */
  877. ret = snd_soc_lzo_decompress_cache_block(codec, lzo_block);
  878. if (ret >= 0)
  879. /* fetch the value from the cache */
  880. *value = snd_soc_get_cache_val(lzo_block->dst, blkpos,
  881. codec->driver->reg_word_size);
  882. kfree(lzo_block->dst);
  883. /* restore the pointer and length of the compressed block */
  884. lzo_block->dst = tmp_dst;
  885. lzo_block->dst_len = tmp_dst_len;
  886. return 0;
  887. }
  888. static int snd_soc_lzo_cache_exit(struct snd_soc_codec *codec)
  889. {
  890. struct snd_soc_lzo_ctx **lzo_blocks;
  891. int i, blkcount;
  892. lzo_blocks = codec->reg_cache;
  893. if (!lzo_blocks)
  894. return 0;
  895. blkcount = snd_soc_lzo_block_count();
  896. /*
  897. * the pointer to the bitmap used for syncing the cache
  898. * is shared amongst all lzo_blocks. Ensure it is freed
  899. * only once.
  900. */
  901. if (lzo_blocks[0])
  902. kfree(lzo_blocks[0]->sync_bmp);
  903. for (i = 0; i < blkcount; ++i) {
  904. if (lzo_blocks[i]) {
  905. kfree(lzo_blocks[i]->wmem);
  906. kfree(lzo_blocks[i]->dst);
  907. }
  908. /* each lzo_block is a pointer returned by kmalloc or NULL */
  909. kfree(lzo_blocks[i]);
  910. }
  911. kfree(lzo_blocks);
  912. codec->reg_cache = NULL;
  913. return 0;
  914. }
  915. static int snd_soc_lzo_cache_init(struct snd_soc_codec *codec)
  916. {
  917. struct snd_soc_lzo_ctx **lzo_blocks;
  918. size_t bmp_size;
  919. const struct snd_soc_codec_driver *codec_drv;
  920. int ret, tofree, i, blksize, blkcount;
  921. const char *p, *end;
  922. unsigned long *sync_bmp;
  923. ret = 0;
  924. codec_drv = codec->driver;
  925. /*
  926. * If we have not been given a default register cache
  927. * then allocate a dummy zero-ed out region, compress it
  928. * and remember to free it afterwards.
  929. */
  930. tofree = 0;
  931. if (!codec->reg_def_copy)
  932. tofree = 1;
  933. if (!codec->reg_def_copy) {
  934. codec->reg_def_copy = kzalloc(codec->reg_size, GFP_KERNEL);
  935. if (!codec->reg_def_copy)
  936. return -ENOMEM;
  937. }
  938. blkcount = snd_soc_lzo_block_count();
  939. codec->reg_cache = kzalloc(blkcount * sizeof *lzo_blocks,
  940. GFP_KERNEL);
  941. if (!codec->reg_cache) {
  942. ret = -ENOMEM;
  943. goto err_tofree;
  944. }
  945. lzo_blocks = codec->reg_cache;
  946. /*
  947. * allocate a bitmap to be used when syncing the cache with
  948. * the hardware. Each time a register is modified, the corresponding
  949. * bit is set in the bitmap, so we know that we have to sync
  950. * that register.
  951. */
  952. bmp_size = codec_drv->reg_cache_size;
  953. sync_bmp = kmalloc(BITS_TO_LONGS(bmp_size) * sizeof(long),
  954. GFP_KERNEL);
  955. if (!sync_bmp) {
  956. ret = -ENOMEM;
  957. goto err;
  958. }
  959. bitmap_zero(sync_bmp, bmp_size);
  960. /* allocate the lzo blocks and initialize them */
  961. for (i = 0; i < blkcount; ++i) {
  962. lzo_blocks[i] = kzalloc(sizeof **lzo_blocks,
  963. GFP_KERNEL);
  964. if (!lzo_blocks[i]) {
  965. kfree(sync_bmp);
  966. ret = -ENOMEM;
  967. goto err;
  968. }
  969. lzo_blocks[i]->sync_bmp = sync_bmp;
  970. lzo_blocks[i]->sync_bmp_nbits = bmp_size;
  971. /* alloc the working space for the compressed block */
  972. ret = snd_soc_lzo_prepare(lzo_blocks[i]);
  973. if (ret < 0)
  974. goto err;
  975. }
  976. blksize = snd_soc_lzo_get_blksize(codec);
  977. p = codec->reg_def_copy;
  978. end = codec->reg_def_copy + codec->reg_size;
  979. /* compress the register map and fill the lzo blocks */
  980. for (i = 0; i < blkcount; ++i, p += blksize) {
  981. lzo_blocks[i]->src = p;
  982. if (p + blksize > end)
  983. lzo_blocks[i]->src_len = end - p;
  984. else
  985. lzo_blocks[i]->src_len = blksize;
  986. ret = snd_soc_lzo_compress_cache_block(codec,
  987. lzo_blocks[i]);
  988. if (ret < 0)
  989. goto err;
  990. lzo_blocks[i]->decompressed_size =
  991. lzo_blocks[i]->src_len;
  992. }
  993. if (tofree) {
  994. kfree(codec->reg_def_copy);
  995. codec->reg_def_copy = NULL;
  996. }
  997. return 0;
  998. err:
  999. snd_soc_cache_exit(codec);
  1000. err_tofree:
  1001. if (tofree) {
  1002. kfree(codec->reg_def_copy);
  1003. codec->reg_def_copy = NULL;
  1004. }
  1005. return ret;
  1006. }
  1007. #endif
  1008. static int snd_soc_flat_cache_sync(struct snd_soc_codec *codec)
  1009. {
  1010. int i;
  1011. int ret;
  1012. const struct snd_soc_codec_driver *codec_drv;
  1013. unsigned int val;
  1014. codec_drv = codec->driver;
  1015. for (i = 0; i < codec_drv->reg_cache_size; ++i) {
  1016. ret = snd_soc_cache_read(codec, i, &val);
  1017. if (ret)
  1018. return ret;
  1019. if (codec->reg_def_copy)
  1020. if (snd_soc_get_cache_val(codec->reg_def_copy,
  1021. i, codec_drv->reg_word_size) == val)
  1022. continue;
  1023. ret = snd_soc_write(codec, i, val);
  1024. if (ret)
  1025. return ret;
  1026. dev_dbg(codec->dev, "Synced register %#x, value = %#x\n",
  1027. i, val);
  1028. }
  1029. return 0;
  1030. }
  1031. static int snd_soc_flat_cache_write(struct snd_soc_codec *codec,
  1032. unsigned int reg, unsigned int value)
  1033. {
  1034. snd_soc_set_cache_val(codec->reg_cache, reg, value,
  1035. codec->driver->reg_word_size);
  1036. return 0;
  1037. }
  1038. static int snd_soc_flat_cache_read(struct snd_soc_codec *codec,
  1039. unsigned int reg, unsigned int *value)
  1040. {
  1041. *value = snd_soc_get_cache_val(codec->reg_cache, reg,
  1042. codec->driver->reg_word_size);
  1043. return 0;
  1044. }
  1045. static int snd_soc_flat_cache_exit(struct snd_soc_codec *codec)
  1046. {
  1047. if (!codec->reg_cache)
  1048. return 0;
  1049. kfree(codec->reg_cache);
  1050. codec->reg_cache = NULL;
  1051. return 0;
  1052. }
  1053. static int snd_soc_flat_cache_init(struct snd_soc_codec *codec)
  1054. {
  1055. const struct snd_soc_codec_driver *codec_drv;
  1056. codec_drv = codec->driver;
  1057. if (codec->reg_def_copy)
  1058. codec->reg_cache = kmemdup(codec->reg_def_copy,
  1059. codec->reg_size, GFP_KERNEL);
  1060. else
  1061. codec->reg_cache = kzalloc(codec->reg_size, GFP_KERNEL);
  1062. if (!codec->reg_cache)
  1063. return -ENOMEM;
  1064. return 0;
  1065. }
  1066. /* an array of all supported compression types */
  1067. static const struct snd_soc_cache_ops cache_types[] = {
  1068. /* Flat *must* be the first entry for fallback */
  1069. {
  1070. .id = SND_SOC_FLAT_COMPRESSION,
  1071. .name = "flat",
  1072. .init = snd_soc_flat_cache_init,
  1073. .exit = snd_soc_flat_cache_exit,
  1074. .read = snd_soc_flat_cache_read,
  1075. .write = snd_soc_flat_cache_write,
  1076. .sync = snd_soc_flat_cache_sync
  1077. },
  1078. #ifdef CONFIG_SND_SOC_CACHE_LZO
  1079. {
  1080. .id = SND_SOC_LZO_COMPRESSION,
  1081. .name = "LZO",
  1082. .init = snd_soc_lzo_cache_init,
  1083. .exit = snd_soc_lzo_cache_exit,
  1084. .read = snd_soc_lzo_cache_read,
  1085. .write = snd_soc_lzo_cache_write,
  1086. .sync = snd_soc_lzo_cache_sync
  1087. },
  1088. #endif
  1089. {
  1090. .id = SND_SOC_RBTREE_COMPRESSION,
  1091. .name = "rbtree",
  1092. .init = snd_soc_rbtree_cache_init,
  1093. .exit = snd_soc_rbtree_cache_exit,
  1094. .read = snd_soc_rbtree_cache_read,
  1095. .write = snd_soc_rbtree_cache_write,
  1096. .sync = snd_soc_rbtree_cache_sync
  1097. }
  1098. };
  1099. int snd_soc_cache_init(struct snd_soc_codec *codec)
  1100. {
  1101. int i;
  1102. for (i = 0; i < ARRAY_SIZE(cache_types); ++i)
  1103. if (cache_types[i].id == codec->compress_type)
  1104. break;
  1105. /* Fall back to flat compression */
  1106. if (i == ARRAY_SIZE(cache_types)) {
  1107. dev_warn(codec->dev, "Could not match compress type: %d\n",
  1108. codec->compress_type);
  1109. i = 0;
  1110. }
  1111. mutex_init(&codec->cache_rw_mutex);
  1112. codec->cache_ops = &cache_types[i];
  1113. if (codec->cache_ops->init) {
  1114. if (codec->cache_ops->name)
  1115. dev_dbg(codec->dev, "Initializing %s cache for %s codec\n",
  1116. codec->cache_ops->name, codec->name);
  1117. return codec->cache_ops->init(codec);
  1118. }
  1119. return -ENOSYS;
  1120. }
  1121. /*
  1122. * NOTE: keep in mind that this function might be called
  1123. * multiple times.
  1124. */
  1125. int snd_soc_cache_exit(struct snd_soc_codec *codec)
  1126. {
  1127. if (codec->cache_ops && codec->cache_ops->exit) {
  1128. if (codec->cache_ops->name)
  1129. dev_dbg(codec->dev, "Destroying %s cache for %s codec\n",
  1130. codec->cache_ops->name, codec->name);
  1131. return codec->cache_ops->exit(codec);
  1132. }
  1133. return -ENOSYS;
  1134. }
  1135. /**
  1136. * snd_soc_cache_read: Fetch the value of a given register from the cache.
  1137. *
  1138. * @codec: CODEC to configure.
  1139. * @reg: The register index.
  1140. * @value: The value to be returned.
  1141. */
  1142. int snd_soc_cache_read(struct snd_soc_codec *codec,
  1143. unsigned int reg, unsigned int *value)
  1144. {
  1145. int ret;
  1146. mutex_lock(&codec->cache_rw_mutex);
  1147. if (value && codec->cache_ops && codec->cache_ops->read) {
  1148. ret = codec->cache_ops->read(codec, reg, value);
  1149. mutex_unlock(&codec->cache_rw_mutex);
  1150. return ret;
  1151. }
  1152. mutex_unlock(&codec->cache_rw_mutex);
  1153. return -ENOSYS;
  1154. }
  1155. EXPORT_SYMBOL_GPL(snd_soc_cache_read);
  1156. /**
  1157. * snd_soc_cache_write: Set the value of a given register in the cache.
  1158. *
  1159. * @codec: CODEC to configure.
  1160. * @reg: The register index.
  1161. * @value: The new register value.
  1162. */
  1163. int snd_soc_cache_write(struct snd_soc_codec *codec,
  1164. unsigned int reg, unsigned int value)
  1165. {
  1166. int ret;
  1167. mutex_lock(&codec->cache_rw_mutex);
  1168. if (codec->cache_ops && codec->cache_ops->write) {
  1169. ret = codec->cache_ops->write(codec, reg, value);
  1170. mutex_unlock(&codec->cache_rw_mutex);
  1171. return ret;
  1172. }
  1173. mutex_unlock(&codec->cache_rw_mutex);
  1174. return -ENOSYS;
  1175. }
  1176. EXPORT_SYMBOL_GPL(snd_soc_cache_write);
  1177. /**
  1178. * snd_soc_cache_sync: Sync the register cache with the hardware.
  1179. *
  1180. * @codec: CODEC to configure.
  1181. *
  1182. * Any registers that should not be synced should be marked as
  1183. * volatile. In general drivers can choose not to use the provided
  1184. * syncing functionality if they so require.
  1185. */
  1186. int snd_soc_cache_sync(struct snd_soc_codec *codec)
  1187. {
  1188. int ret;
  1189. const char *name;
  1190. if (!codec->cache_sync) {
  1191. return 0;
  1192. }
  1193. if (!codec->cache_ops || !codec->cache_ops->sync)
  1194. return -ENOSYS;
  1195. if (codec->cache_ops->name)
  1196. name = codec->cache_ops->name;
  1197. else
  1198. name = "unknown";
  1199. if (codec->cache_ops->name)
  1200. dev_dbg(codec->dev, "Syncing %s cache for %s codec\n",
  1201. codec->cache_ops->name, codec->name);
  1202. trace_snd_soc_cache_sync(codec, name, "start");
  1203. ret = codec->cache_ops->sync(codec);
  1204. if (!ret)
  1205. codec->cache_sync = 0;
  1206. trace_snd_soc_cache_sync(codec, name, "end");
  1207. return ret;
  1208. }
  1209. EXPORT_SYMBOL_GPL(snd_soc_cache_sync);
  1210. static int snd_soc_get_reg_access_index(struct snd_soc_codec *codec,
  1211. unsigned int reg)
  1212. {
  1213. const struct snd_soc_codec_driver *codec_drv;
  1214. unsigned int min, max, index;
  1215. codec_drv = codec->driver;
  1216. min = 0;
  1217. max = codec_drv->reg_access_size - 1;
  1218. do {
  1219. index = (min + max) / 2;
  1220. if (codec_drv->reg_access_default[index].reg == reg)
  1221. return index;
  1222. if (codec_drv->reg_access_default[index].reg < reg)
  1223. min = index + 1;
  1224. else
  1225. max = index;
  1226. } while (min <= max);
  1227. return -1;
  1228. }
  1229. int snd_soc_default_volatile_register(struct snd_soc_codec *codec,
  1230. unsigned int reg)
  1231. {
  1232. int index;
  1233. if (reg >= codec->driver->reg_cache_size)
  1234. return 1;
  1235. index = snd_soc_get_reg_access_index(codec, reg);
  1236. if (index < 0)
  1237. return 0;
  1238. return codec->driver->reg_access_default[index].vol;
  1239. }
  1240. EXPORT_SYMBOL_GPL(snd_soc_default_volatile_register);
  1241. int snd_soc_default_readable_register(struct snd_soc_codec *codec,
  1242. unsigned int reg)
  1243. {
  1244. int index;
  1245. if (reg >= codec->driver->reg_cache_size)
  1246. return 1;
  1247. index = snd_soc_get_reg_access_index(codec, reg);
  1248. if (index < 0)
  1249. return 0;
  1250. return codec->driver->reg_access_default[index].read;
  1251. }
  1252. EXPORT_SYMBOL_GPL(snd_soc_default_readable_register);
  1253. int snd_soc_default_writable_register(struct snd_soc_codec *codec,
  1254. unsigned int reg)
  1255. {
  1256. int index;
  1257. if (reg >= codec->driver->reg_cache_size)
  1258. return 1;
  1259. index = snd_soc_get_reg_access_index(codec, reg);
  1260. if (index < 0)
  1261. return 0;
  1262. return codec->driver->reg_access_default[index].write;
  1263. }
  1264. EXPORT_SYMBOL_GPL(snd_soc_default_writable_register);