am33xx.dtsi 17 KB

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  1. /*
  2. * Device Tree Source for AM33XX SoC
  3. *
  4. * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
  5. *
  6. * This file is licensed under the terms of the GNU General Public License
  7. * version 2. This program is licensed "as is" without any warranty of any
  8. * kind, whether express or implied.
  9. */
  10. #include <dt-bindings/gpio/gpio.h>
  11. #include <dt-bindings/pinctrl/am33xx.h>
  12. #include "skeleton.dtsi"
  13. / {
  14. compatible = "ti,am33xx";
  15. interrupt-parent = <&intc>;
  16. aliases {
  17. i2c0 = &i2c0;
  18. i2c1 = &i2c1;
  19. i2c2 = &i2c2;
  20. serial0 = &uart0;
  21. serial1 = &uart1;
  22. serial2 = &uart2;
  23. serial3 = &uart3;
  24. serial4 = &uart4;
  25. serial5 = &uart5;
  26. d_can0 = &dcan0;
  27. d_can1 = &dcan1;
  28. usb0 = &usb0;
  29. usb1 = &usb1;
  30. phy0 = &usb0_phy;
  31. phy1 = &usb1_phy;
  32. ethernet0 = &cpsw_emac0;
  33. ethernet1 = &cpsw_emac1;
  34. };
  35. cpus {
  36. #address-cells = <1>;
  37. #size-cells = <0>;
  38. cpu@0 {
  39. compatible = "arm,cortex-a8";
  40. device_type = "cpu";
  41. reg = <0>;
  42. /*
  43. * To consider voltage drop between PMIC and SoC,
  44. * tolerance value is reduced to 2% from 4% and
  45. * voltage value is increased as a precaution.
  46. */
  47. operating-points = <
  48. /* kHz uV */
  49. 720000 1285000
  50. 600000 1225000
  51. 500000 1125000
  52. 275000 1125000
  53. >;
  54. voltage-tolerance = <2>; /* 2 percentage */
  55. clock-latency = <300000>; /* From omap-cpufreq driver */
  56. };
  57. };
  58. pmu {
  59. compatible = "arm,cortex-a8-pmu";
  60. interrupts = <3>;
  61. };
  62. /*
  63. * The soc node represents the soc top level view. It is uses for IPs
  64. * that are not memory mapped in the MPU view or for the MPU itself.
  65. */
  66. soc {
  67. compatible = "ti,omap-infra";
  68. mpu {
  69. compatible = "ti,omap3-mpu";
  70. ti,hwmods = "mpu";
  71. };
  72. };
  73. am33xx_pinmux: pinmux@44e10800 {
  74. compatible = "pinctrl-single";
  75. reg = <0x44e10800 0x0238>;
  76. #address-cells = <1>;
  77. #size-cells = <0>;
  78. pinctrl-single,register-width = <32>;
  79. pinctrl-single,function-mask = <0x7f>;
  80. };
  81. /*
  82. * XXX: Use a flat representation of the AM33XX interconnect.
  83. * The real AM33XX interconnect network is quite complex.Since
  84. * that will not bring real advantage to represent that in DT
  85. * for the moment, just use a fake OCP bus entry to represent
  86. * the whole bus hierarchy.
  87. */
  88. ocp {
  89. compatible = "simple-bus";
  90. #address-cells = <1>;
  91. #size-cells = <1>;
  92. ranges;
  93. ti,hwmods = "l3_main";
  94. intc: interrupt-controller@48200000 {
  95. compatible = "ti,omap2-intc";
  96. interrupt-controller;
  97. #interrupt-cells = <1>;
  98. ti,intc-size = <128>;
  99. reg = <0x48200000 0x1000>;
  100. };
  101. edma: edma@49000000 {
  102. compatible = "ti,edma3";
  103. ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
  104. reg = <0x49000000 0x10000>,
  105. <0x44e10f90 0x10>;
  106. interrupts = <12 13 14>;
  107. #dma-cells = <1>;
  108. dma-channels = <64>;
  109. ti,edma-regions = <4>;
  110. ti,edma-slots = <256>;
  111. };
  112. gpio0: gpio@44e07000 {
  113. compatible = "ti,omap4-gpio";
  114. ti,hwmods = "gpio1";
  115. gpio-controller;
  116. #gpio-cells = <2>;
  117. interrupt-controller;
  118. #interrupt-cells = <2>;
  119. reg = <0x44e07000 0x1000>;
  120. interrupts = <96>;
  121. };
  122. gpio1: gpio@4804c000 {
  123. compatible = "ti,omap4-gpio";
  124. ti,hwmods = "gpio2";
  125. gpio-controller;
  126. #gpio-cells = <2>;
  127. interrupt-controller;
  128. #interrupt-cells = <2>;
  129. reg = <0x4804c000 0x1000>;
  130. interrupts = <98>;
  131. };
  132. gpio2: gpio@481ac000 {
  133. compatible = "ti,omap4-gpio";
  134. ti,hwmods = "gpio3";
  135. gpio-controller;
  136. #gpio-cells = <2>;
  137. interrupt-controller;
  138. #interrupt-cells = <2>;
  139. reg = <0x481ac000 0x1000>;
  140. interrupts = <32>;
  141. };
  142. gpio3: gpio@481ae000 {
  143. compatible = "ti,omap4-gpio";
  144. ti,hwmods = "gpio4";
  145. gpio-controller;
  146. #gpio-cells = <2>;
  147. interrupt-controller;
  148. #interrupt-cells = <2>;
  149. reg = <0x481ae000 0x1000>;
  150. interrupts = <62>;
  151. };
  152. uart0: serial@44e09000 {
  153. compatible = "ti,omap3-uart";
  154. ti,hwmods = "uart1";
  155. clock-frequency = <48000000>;
  156. reg = <0x44e09000 0x2000>;
  157. interrupts = <72>;
  158. status = "disabled";
  159. };
  160. uart1: serial@48022000 {
  161. compatible = "ti,omap3-uart";
  162. ti,hwmods = "uart2";
  163. clock-frequency = <48000000>;
  164. reg = <0x48022000 0x2000>;
  165. interrupts = <73>;
  166. status = "disabled";
  167. };
  168. uart2: serial@48024000 {
  169. compatible = "ti,omap3-uart";
  170. ti,hwmods = "uart3";
  171. clock-frequency = <48000000>;
  172. reg = <0x48024000 0x2000>;
  173. interrupts = <74>;
  174. status = "disabled";
  175. };
  176. uart3: serial@481a6000 {
  177. compatible = "ti,omap3-uart";
  178. ti,hwmods = "uart4";
  179. clock-frequency = <48000000>;
  180. reg = <0x481a6000 0x2000>;
  181. interrupts = <44>;
  182. status = "disabled";
  183. };
  184. uart4: serial@481a8000 {
  185. compatible = "ti,omap3-uart";
  186. ti,hwmods = "uart5";
  187. clock-frequency = <48000000>;
  188. reg = <0x481a8000 0x2000>;
  189. interrupts = <45>;
  190. status = "disabled";
  191. };
  192. uart5: serial@481aa000 {
  193. compatible = "ti,omap3-uart";
  194. ti,hwmods = "uart6";
  195. clock-frequency = <48000000>;
  196. reg = <0x481aa000 0x2000>;
  197. interrupts = <46>;
  198. status = "disabled";
  199. };
  200. i2c0: i2c@44e0b000 {
  201. compatible = "ti,omap4-i2c";
  202. #address-cells = <1>;
  203. #size-cells = <0>;
  204. ti,hwmods = "i2c1";
  205. reg = <0x44e0b000 0x1000>;
  206. interrupts = <70>;
  207. status = "disabled";
  208. };
  209. i2c1: i2c@4802a000 {
  210. compatible = "ti,omap4-i2c";
  211. #address-cells = <1>;
  212. #size-cells = <0>;
  213. ti,hwmods = "i2c2";
  214. reg = <0x4802a000 0x1000>;
  215. interrupts = <71>;
  216. status = "disabled";
  217. };
  218. i2c2: i2c@4819c000 {
  219. compatible = "ti,omap4-i2c";
  220. #address-cells = <1>;
  221. #size-cells = <0>;
  222. ti,hwmods = "i2c3";
  223. reg = <0x4819c000 0x1000>;
  224. interrupts = <30>;
  225. status = "disabled";
  226. };
  227. mmc1: mmc@48060000 {
  228. compatible = "ti,omap4-hsmmc";
  229. ti,hwmods = "mmc1";
  230. ti,dual-volt;
  231. ti,needs-special-reset;
  232. ti,needs-special-hs-handling;
  233. dmas = <&edma 24
  234. &edma 25>;
  235. dma-names = "tx", "rx";
  236. interrupts = <64>;
  237. interrupt-parent = <&intc>;
  238. reg = <0x48060000 0x1000>;
  239. status = "disabled";
  240. };
  241. mmc2: mmc@481d8000 {
  242. compatible = "ti,omap4-hsmmc";
  243. ti,hwmods = "mmc2";
  244. ti,needs-special-reset;
  245. dmas = <&edma 2
  246. &edma 3>;
  247. dma-names = "tx", "rx";
  248. interrupts = <28>;
  249. interrupt-parent = <&intc>;
  250. reg = <0x481d8000 0x1000>;
  251. status = "disabled";
  252. };
  253. mmc3: mmc@47810000 {
  254. compatible = "ti,omap4-hsmmc";
  255. ti,hwmods = "mmc3";
  256. ti,needs-special-reset;
  257. interrupts = <29>;
  258. interrupt-parent = <&intc>;
  259. reg = <0x47810000 0x1000>;
  260. status = "disabled";
  261. };
  262. wdt2: wdt@44e35000 {
  263. compatible = "ti,omap3-wdt";
  264. ti,hwmods = "wd_timer2";
  265. reg = <0x44e35000 0x1000>;
  266. interrupts = <91>;
  267. };
  268. dcan0: d_can@481cc000 {
  269. compatible = "bosch,d_can";
  270. ti,hwmods = "d_can0";
  271. reg = <0x481cc000 0x2000
  272. 0x44e10644 0x4>;
  273. interrupts = <52>;
  274. status = "disabled";
  275. };
  276. dcan1: d_can@481d0000 {
  277. compatible = "bosch,d_can";
  278. ti,hwmods = "d_can1";
  279. reg = <0x481d0000 0x2000
  280. 0x44e10644 0x4>;
  281. interrupts = <55>;
  282. status = "disabled";
  283. };
  284. timer1: timer@44e31000 {
  285. compatible = "ti,am335x-timer-1ms";
  286. reg = <0x44e31000 0x400>;
  287. interrupts = <67>;
  288. ti,hwmods = "timer1";
  289. ti,timer-alwon;
  290. };
  291. timer2: timer@48040000 {
  292. compatible = "ti,am335x-timer";
  293. reg = <0x48040000 0x400>;
  294. interrupts = <68>;
  295. ti,hwmods = "timer2";
  296. };
  297. timer3: timer@48042000 {
  298. compatible = "ti,am335x-timer";
  299. reg = <0x48042000 0x400>;
  300. interrupts = <69>;
  301. ti,hwmods = "timer3";
  302. };
  303. timer4: timer@48044000 {
  304. compatible = "ti,am335x-timer";
  305. reg = <0x48044000 0x400>;
  306. interrupts = <92>;
  307. ti,hwmods = "timer4";
  308. ti,timer-pwm;
  309. };
  310. timer5: timer@48046000 {
  311. compatible = "ti,am335x-timer";
  312. reg = <0x48046000 0x400>;
  313. interrupts = <93>;
  314. ti,hwmods = "timer5";
  315. ti,timer-pwm;
  316. };
  317. timer6: timer@48048000 {
  318. compatible = "ti,am335x-timer";
  319. reg = <0x48048000 0x400>;
  320. interrupts = <94>;
  321. ti,hwmods = "timer6";
  322. ti,timer-pwm;
  323. };
  324. timer7: timer@4804a000 {
  325. compatible = "ti,am335x-timer";
  326. reg = <0x4804a000 0x400>;
  327. interrupts = <95>;
  328. ti,hwmods = "timer7";
  329. ti,timer-pwm;
  330. };
  331. rtc@44e3e000 {
  332. compatible = "ti,da830-rtc";
  333. reg = <0x44e3e000 0x1000>;
  334. interrupts = <75
  335. 76>;
  336. ti,hwmods = "rtc";
  337. };
  338. spi0: spi@48030000 {
  339. compatible = "ti,omap4-mcspi";
  340. #address-cells = <1>;
  341. #size-cells = <0>;
  342. reg = <0x48030000 0x400>;
  343. interrupts = <65>;
  344. ti,spi-num-cs = <2>;
  345. ti,hwmods = "spi0";
  346. dmas = <&edma 16
  347. &edma 17
  348. &edma 18
  349. &edma 19>;
  350. dma-names = "tx0", "rx0", "tx1", "rx1";
  351. status = "disabled";
  352. };
  353. spi1: spi@481a0000 {
  354. compatible = "ti,omap4-mcspi";
  355. #address-cells = <1>;
  356. #size-cells = <0>;
  357. reg = <0x481a0000 0x400>;
  358. interrupts = <125>;
  359. ti,spi-num-cs = <2>;
  360. ti,hwmods = "spi1";
  361. dmas = <&edma 42
  362. &edma 43
  363. &edma 44
  364. &edma 45>;
  365. dma-names = "tx0", "rx0", "tx1", "rx1";
  366. status = "disabled";
  367. };
  368. usb: usb@47400000 {
  369. compatible = "ti,am33xx-usb";
  370. reg = <0x47400000 0x1000>;
  371. ranges;
  372. #address-cells = <1>;
  373. #size-cells = <1>;
  374. ti,hwmods = "usb_otg_hs";
  375. status = "disabled";
  376. ctrl_mod: control@44e10000 {
  377. compatible = "ti,am335x-usb-ctrl-module";
  378. reg = <0x44e10620 0x10
  379. 0x44e10648 0x4>;
  380. reg-names = "phy_ctrl", "wakeup";
  381. status = "disabled";
  382. };
  383. usb0_phy: usb-phy@47401300 {
  384. compatible = "ti,am335x-usb-phy";
  385. reg = <0x47401300 0x100>;
  386. reg-names = "phy";
  387. status = "disabled";
  388. ti,ctrl_mod = <&ctrl_mod>;
  389. };
  390. usb0: usb@47401000 {
  391. compatible = "ti,musb-am33xx";
  392. status = "disabled";
  393. reg = <0x47401400 0x400
  394. 0x47401000 0x200>;
  395. reg-names = "mc", "control";
  396. interrupts = <18>;
  397. interrupt-names = "mc";
  398. dr_mode = "otg";
  399. mentor,multipoint = <1>;
  400. mentor,num-eps = <16>;
  401. mentor,ram-bits = <12>;
  402. mentor,power = <500>;
  403. phys = <&usb0_phy>;
  404. dmas = <&cppi41dma 0 0 &cppi41dma 1 0
  405. &cppi41dma 2 0 &cppi41dma 3 0
  406. &cppi41dma 4 0 &cppi41dma 5 0
  407. &cppi41dma 6 0 &cppi41dma 7 0
  408. &cppi41dma 8 0 &cppi41dma 9 0
  409. &cppi41dma 10 0 &cppi41dma 11 0
  410. &cppi41dma 12 0 &cppi41dma 13 0
  411. &cppi41dma 14 0 &cppi41dma 0 1
  412. &cppi41dma 1 1 &cppi41dma 2 1
  413. &cppi41dma 3 1 &cppi41dma 4 1
  414. &cppi41dma 5 1 &cppi41dma 6 1
  415. &cppi41dma 7 1 &cppi41dma 8 1
  416. &cppi41dma 9 1 &cppi41dma 10 1
  417. &cppi41dma 11 1 &cppi41dma 12 1
  418. &cppi41dma 13 1 &cppi41dma 14 1>;
  419. dma-names =
  420. "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
  421. "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
  422. "rx14", "rx15",
  423. "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
  424. "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
  425. "tx14", "tx15";
  426. };
  427. usb1_phy: usb-phy@47401b00 {
  428. compatible = "ti,am335x-usb-phy";
  429. reg = <0x47401b00 0x100>;
  430. reg-names = "phy";
  431. status = "disabled";
  432. ti,ctrl_mod = <&ctrl_mod>;
  433. };
  434. usb1: usb@47401800 {
  435. compatible = "ti,musb-am33xx";
  436. status = "disabled";
  437. reg = <0x47401c00 0x400
  438. 0x47401800 0x200>;
  439. reg-names = "mc", "control";
  440. interrupts = <19>;
  441. interrupt-names = "mc";
  442. dr_mode = "otg";
  443. mentor,multipoint = <1>;
  444. mentor,num-eps = <16>;
  445. mentor,ram-bits = <12>;
  446. mentor,power = <500>;
  447. phys = <&usb1_phy>;
  448. dmas = <&cppi41dma 15 0 &cppi41dma 16 0
  449. &cppi41dma 17 0 &cppi41dma 18 0
  450. &cppi41dma 19 0 &cppi41dma 20 0
  451. &cppi41dma 21 0 &cppi41dma 22 0
  452. &cppi41dma 23 0 &cppi41dma 24 0
  453. &cppi41dma 25 0 &cppi41dma 26 0
  454. &cppi41dma 27 0 &cppi41dma 28 0
  455. &cppi41dma 29 0 &cppi41dma 15 1
  456. &cppi41dma 16 1 &cppi41dma 17 1
  457. &cppi41dma 18 1 &cppi41dma 19 1
  458. &cppi41dma 20 1 &cppi41dma 21 1
  459. &cppi41dma 22 1 &cppi41dma 23 1
  460. &cppi41dma 24 1 &cppi41dma 25 1
  461. &cppi41dma 26 1 &cppi41dma 27 1
  462. &cppi41dma 28 1 &cppi41dma 29 1>;
  463. dma-names =
  464. "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
  465. "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
  466. "rx14", "rx15",
  467. "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
  468. "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
  469. "tx14", "tx15";
  470. };
  471. cppi41dma: dma-controller@07402000 {
  472. compatible = "ti,am3359-cppi41";
  473. reg = <0x47400000 0x1000
  474. 0x47402000 0x1000
  475. 0x47403000 0x1000
  476. 0x47404000 0x4000>;
  477. reg-names = "glue", "controller", "scheduler", "queuemgr";
  478. interrupts = <17>;
  479. interrupt-names = "glue";
  480. #dma-cells = <2>;
  481. #dma-channels = <30>;
  482. #dma-requests = <256>;
  483. status = "disabled";
  484. };
  485. };
  486. epwmss0: epwmss@48300000 {
  487. compatible = "ti,am33xx-pwmss";
  488. reg = <0x48300000 0x10>;
  489. ti,hwmods = "epwmss0";
  490. #address-cells = <1>;
  491. #size-cells = <1>;
  492. status = "disabled";
  493. ranges = <0x48300100 0x48300100 0x80 /* ECAP */
  494. 0x48300180 0x48300180 0x80 /* EQEP */
  495. 0x48300200 0x48300200 0x80>; /* EHRPWM */
  496. ecap0: ecap@48300100 {
  497. compatible = "ti,am33xx-ecap";
  498. #pwm-cells = <3>;
  499. reg = <0x48300100 0x80>;
  500. ti,hwmods = "ecap0";
  501. status = "disabled";
  502. };
  503. ehrpwm0: ehrpwm@48300200 {
  504. compatible = "ti,am33xx-ehrpwm";
  505. #pwm-cells = <3>;
  506. reg = <0x48300200 0x80>;
  507. ti,hwmods = "ehrpwm0";
  508. status = "disabled";
  509. };
  510. };
  511. epwmss1: epwmss@48302000 {
  512. compatible = "ti,am33xx-pwmss";
  513. reg = <0x48302000 0x10>;
  514. ti,hwmods = "epwmss1";
  515. #address-cells = <1>;
  516. #size-cells = <1>;
  517. status = "disabled";
  518. ranges = <0x48302100 0x48302100 0x80 /* ECAP */
  519. 0x48302180 0x48302180 0x80 /* EQEP */
  520. 0x48302200 0x48302200 0x80>; /* EHRPWM */
  521. ecap1: ecap@48302100 {
  522. compatible = "ti,am33xx-ecap";
  523. #pwm-cells = <3>;
  524. reg = <0x48302100 0x80>;
  525. ti,hwmods = "ecap1";
  526. status = "disabled";
  527. };
  528. ehrpwm1: ehrpwm@48302200 {
  529. compatible = "ti,am33xx-ehrpwm";
  530. #pwm-cells = <3>;
  531. reg = <0x48302200 0x80>;
  532. ti,hwmods = "ehrpwm1";
  533. status = "disabled";
  534. };
  535. };
  536. epwmss2: epwmss@48304000 {
  537. compatible = "ti,am33xx-pwmss";
  538. reg = <0x48304000 0x10>;
  539. ti,hwmods = "epwmss2";
  540. #address-cells = <1>;
  541. #size-cells = <1>;
  542. status = "disabled";
  543. ranges = <0x48304100 0x48304100 0x80 /* ECAP */
  544. 0x48304180 0x48304180 0x80 /* EQEP */
  545. 0x48304200 0x48304200 0x80>; /* EHRPWM */
  546. ecap2: ecap@48304100 {
  547. compatible = "ti,am33xx-ecap";
  548. #pwm-cells = <3>;
  549. reg = <0x48304100 0x80>;
  550. ti,hwmods = "ecap2";
  551. status = "disabled";
  552. };
  553. ehrpwm2: ehrpwm@48304200 {
  554. compatible = "ti,am33xx-ehrpwm";
  555. #pwm-cells = <3>;
  556. reg = <0x48304200 0x80>;
  557. ti,hwmods = "ehrpwm2";
  558. status = "disabled";
  559. };
  560. };
  561. mac: ethernet@4a100000 {
  562. compatible = "ti,cpsw";
  563. ti,hwmods = "cpgmac0";
  564. cpdma_channels = <8>;
  565. ale_entries = <1024>;
  566. bd_ram_size = <0x2000>;
  567. no_bd_ram = <0>;
  568. rx_descs = <64>;
  569. mac_control = <0x20>;
  570. slaves = <2>;
  571. active_slave = <0>;
  572. cpts_clock_mult = <0x80000000>;
  573. cpts_clock_shift = <29>;
  574. reg = <0x4a100000 0x800
  575. 0x4a101200 0x100>;
  576. #address-cells = <1>;
  577. #size-cells = <1>;
  578. interrupt-parent = <&intc>;
  579. /*
  580. * c0_rx_thresh_pend
  581. * c0_rx_pend
  582. * c0_tx_pend
  583. * c0_misc_pend
  584. */
  585. interrupts = <40 41 42 43>;
  586. ranges;
  587. davinci_mdio: mdio@4a101000 {
  588. compatible = "ti,davinci_mdio";
  589. #address-cells = <1>;
  590. #size-cells = <0>;
  591. ti,hwmods = "davinci_mdio";
  592. bus_freq = <1000000>;
  593. reg = <0x4a101000 0x100>;
  594. };
  595. cpsw_emac0: slave@4a100200 {
  596. /* Filled in by U-Boot */
  597. mac-address = [ 00 00 00 00 00 00 ];
  598. };
  599. cpsw_emac1: slave@4a100300 {
  600. /* Filled in by U-Boot */
  601. mac-address = [ 00 00 00 00 00 00 ];
  602. };
  603. };
  604. ocmcram: ocmcram@40300000 {
  605. compatible = "ti,am3352-ocmcram";
  606. reg = <0x40300000 0x10000>;
  607. ti,hwmods = "ocmcram";
  608. };
  609. wkup_m3: wkup_m3@44d00000 {
  610. compatible = "ti,am3353-wkup-m3";
  611. reg = <0x44d00000 0x4000 /* M3 UMEM */
  612. 0x44d80000 0x2000>; /* M3 DMEM */
  613. ti,hwmods = "wkup_m3";
  614. ti,no-reset-on-init;
  615. };
  616. elm: elm@48080000 {
  617. compatible = "ti,am3352-elm";
  618. reg = <0x48080000 0x2000>;
  619. interrupts = <4>;
  620. ti,hwmods = "elm";
  621. status = "disabled";
  622. };
  623. lcdc: lcdc@4830e000 {
  624. compatible = "ti,am33xx-tilcdc";
  625. reg = <0x4830e000 0x1000>;
  626. interrupt-parent = <&intc>;
  627. interrupts = <36>;
  628. ti,hwmods = "lcdc";
  629. status = "disabled";
  630. };
  631. tscadc: tscadc@44e0d000 {
  632. compatible = "ti,am3359-tscadc";
  633. reg = <0x44e0d000 0x1000>;
  634. interrupt-parent = <&intc>;
  635. interrupts = <16>;
  636. ti,hwmods = "adc_tsc";
  637. status = "disabled";
  638. tsc {
  639. compatible = "ti,am3359-tsc";
  640. };
  641. am335x_adc: adc {
  642. #io-channel-cells = <1>;
  643. compatible = "ti,am3359-adc";
  644. };
  645. };
  646. gpmc: gpmc@50000000 {
  647. compatible = "ti,am3352-gpmc";
  648. ti,hwmods = "gpmc";
  649. ti,no-idle-on-init;
  650. reg = <0x50000000 0x2000>;
  651. interrupts = <100>;
  652. gpmc,num-cs = <7>;
  653. gpmc,num-waitpins = <2>;
  654. #address-cells = <2>;
  655. #size-cells = <1>;
  656. status = "disabled";
  657. };
  658. sham: sham@53100000 {
  659. compatible = "ti,omap4-sham";
  660. ti,hwmods = "sham";
  661. reg = <0x53100000 0x200>;
  662. interrupts = <109>;
  663. dmas = <&edma 36>;
  664. dma-names = "rx";
  665. };
  666. aes: aes@53500000 {
  667. compatible = "ti,omap4-aes";
  668. ti,hwmods = "aes";
  669. reg = <0x53500000 0xa0>;
  670. interrupts = <103>;
  671. dmas = <&edma 6>,
  672. <&edma 5>;
  673. dma-names = "tx", "rx";
  674. };
  675. mcasp0: mcasp@48038000 {
  676. compatible = "ti,am33xx-mcasp-audio";
  677. ti,hwmods = "mcasp0";
  678. reg = <0x48038000 0x2000>,
  679. <0x46000000 0x400000>;
  680. reg-names = "mpu", "dat";
  681. interrupts = <80>, <81>;
  682. interrupts-names = "tx", "rx";
  683. status = "disabled";
  684. dmas = <&edma 8>,
  685. <&edma 9>;
  686. dma-names = "tx", "rx";
  687. };
  688. mcasp1: mcasp@4803C000 {
  689. compatible = "ti,am33xx-mcasp-audio";
  690. ti,hwmods = "mcasp1";
  691. reg = <0x4803C000 0x2000>,
  692. <0x46400000 0x400000>;
  693. reg-names = "mpu", "dat";
  694. interrupts = <82>, <83>;
  695. interrupts-names = "tx", "rx";
  696. status = "disabled";
  697. dmas = <&edma 10>,
  698. <&edma 11>;
  699. dma-names = "tx", "rx";
  700. };
  701. };
  702. };