synclink_cs.c 116 KB

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  1. /*
  2. * linux/drivers/char/pcmcia/synclink_cs.c
  3. *
  4. * $Id: synclink_cs.c,v 4.34 2005/09/08 13:20:54 paulkf Exp $
  5. *
  6. * Device driver for Microgate SyncLink PC Card
  7. * multiprotocol serial adapter.
  8. *
  9. * written by Paul Fulghum for Microgate Corporation
  10. * paulkf@microgate.com
  11. *
  12. * Microgate and SyncLink are trademarks of Microgate Corporation
  13. *
  14. * This code is released under the GNU General Public License (GPL)
  15. *
  16. * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  17. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  18. * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  19. * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
  20. * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  21. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  22. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  24. * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  25. * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
  26. * OF THE POSSIBILITY OF SUCH DAMAGE.
  27. */
  28. #define VERSION(ver,rel,seq) (((ver)<<16) | ((rel)<<8) | (seq))
  29. #if defined(__i386__)
  30. # define BREAKPOINT() asm(" int $3");
  31. #else
  32. # define BREAKPOINT() { }
  33. #endif
  34. #define MAX_DEVICE_COUNT 4
  35. #include <linux/config.h>
  36. #include <linux/module.h>
  37. #include <linux/errno.h>
  38. #include <linux/signal.h>
  39. #include <linux/sched.h>
  40. #include <linux/timer.h>
  41. #include <linux/time.h>
  42. #include <linux/interrupt.h>
  43. #include <linux/pci.h>
  44. #include <linux/tty.h>
  45. #include <linux/tty_flip.h>
  46. #include <linux/serial.h>
  47. #include <linux/major.h>
  48. #include <linux/string.h>
  49. #include <linux/fcntl.h>
  50. #include <linux/ptrace.h>
  51. #include <linux/ioport.h>
  52. #include <linux/mm.h>
  53. #include <linux/slab.h>
  54. #include <linux/netdevice.h>
  55. #include <linux/vmalloc.h>
  56. #include <linux/init.h>
  57. #include <asm/serial.h>
  58. #include <linux/delay.h>
  59. #include <linux/ioctl.h>
  60. #include <asm/system.h>
  61. #include <asm/io.h>
  62. #include <asm/irq.h>
  63. #include <asm/dma.h>
  64. #include <linux/bitops.h>
  65. #include <asm/types.h>
  66. #include <linux/termios.h>
  67. #include <linux/workqueue.h>
  68. #include <linux/hdlc.h>
  69. #include <pcmcia/cs_types.h>
  70. #include <pcmcia/cs.h>
  71. #include <pcmcia/cistpl.h>
  72. #include <pcmcia/cisreg.h>
  73. #include <pcmcia/ds.h>
  74. #ifdef CONFIG_HDLC_MODULE
  75. #define CONFIG_HDLC 1
  76. #endif
  77. #define GET_USER(error,value,addr) error = get_user(value,addr)
  78. #define COPY_FROM_USER(error,dest,src,size) error = copy_from_user(dest,src,size) ? -EFAULT : 0
  79. #define PUT_USER(error,value,addr) error = put_user(value,addr)
  80. #define COPY_TO_USER(error,dest,src,size) error = copy_to_user(dest,src,size) ? -EFAULT : 0
  81. #include <asm/uaccess.h>
  82. #include "linux/synclink.h"
  83. static MGSL_PARAMS default_params = {
  84. MGSL_MODE_HDLC, /* unsigned long mode */
  85. 0, /* unsigned char loopback; */
  86. HDLC_FLAG_UNDERRUN_ABORT15, /* unsigned short flags; */
  87. HDLC_ENCODING_NRZI_SPACE, /* unsigned char encoding; */
  88. 0, /* unsigned long clock_speed; */
  89. 0xff, /* unsigned char addr_filter; */
  90. HDLC_CRC_16_CCITT, /* unsigned short crc_type; */
  91. HDLC_PREAMBLE_LENGTH_8BITS, /* unsigned char preamble_length; */
  92. HDLC_PREAMBLE_PATTERN_NONE, /* unsigned char preamble; */
  93. 9600, /* unsigned long data_rate; */
  94. 8, /* unsigned char data_bits; */
  95. 1, /* unsigned char stop_bits; */
  96. ASYNC_PARITY_NONE /* unsigned char parity; */
  97. };
  98. typedef struct
  99. {
  100. int count;
  101. unsigned char status;
  102. char data[1];
  103. } RXBUF;
  104. /* The queue of BH actions to be performed */
  105. #define BH_RECEIVE 1
  106. #define BH_TRANSMIT 2
  107. #define BH_STATUS 4
  108. #define IO_PIN_SHUTDOWN_LIMIT 100
  109. #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
  110. struct _input_signal_events {
  111. int ri_up;
  112. int ri_down;
  113. int dsr_up;
  114. int dsr_down;
  115. int dcd_up;
  116. int dcd_down;
  117. int cts_up;
  118. int cts_down;
  119. };
  120. /*
  121. * Device instance data structure
  122. */
  123. typedef struct _mgslpc_info {
  124. void *if_ptr; /* General purpose pointer (used by SPPP) */
  125. int magic;
  126. int flags;
  127. int count; /* count of opens */
  128. int line;
  129. unsigned short close_delay;
  130. unsigned short closing_wait; /* time to wait before closing */
  131. struct mgsl_icount icount;
  132. struct tty_struct *tty;
  133. int timeout;
  134. int x_char; /* xon/xoff character */
  135. int blocked_open; /* # of blocked opens */
  136. unsigned char read_status_mask;
  137. unsigned char ignore_status_mask;
  138. unsigned char *tx_buf;
  139. int tx_put;
  140. int tx_get;
  141. int tx_count;
  142. /* circular list of fixed length rx buffers */
  143. unsigned char *rx_buf; /* memory allocated for all rx buffers */
  144. int rx_buf_total_size; /* size of memory allocated for rx buffers */
  145. int rx_put; /* index of next empty rx buffer */
  146. int rx_get; /* index of next full rx buffer */
  147. int rx_buf_size; /* size in bytes of single rx buffer */
  148. int rx_buf_count; /* total number of rx buffers */
  149. int rx_frame_count; /* number of full rx buffers */
  150. wait_queue_head_t open_wait;
  151. wait_queue_head_t close_wait;
  152. wait_queue_head_t status_event_wait_q;
  153. wait_queue_head_t event_wait_q;
  154. struct timer_list tx_timer; /* HDLC transmit timeout timer */
  155. struct _mgslpc_info *next_device; /* device list link */
  156. unsigned short imra_value;
  157. unsigned short imrb_value;
  158. unsigned char pim_value;
  159. spinlock_t lock;
  160. struct work_struct task; /* task structure for scheduling bh */
  161. u32 max_frame_size;
  162. u32 pending_bh;
  163. int bh_running;
  164. int bh_requested;
  165. int dcd_chkcount; /* check counts to prevent */
  166. int cts_chkcount; /* too many IRQs if a signal */
  167. int dsr_chkcount; /* is floating */
  168. int ri_chkcount;
  169. int rx_enabled;
  170. int rx_overflow;
  171. int tx_enabled;
  172. int tx_active;
  173. int tx_aborting;
  174. u32 idle_mode;
  175. int if_mode; /* serial interface selection (RS-232, v.35 etc) */
  176. char device_name[25]; /* device instance name */
  177. unsigned int io_base; /* base I/O address of adapter */
  178. unsigned int irq_level;
  179. MGSL_PARAMS params; /* communications parameters */
  180. unsigned char serial_signals; /* current serial signal states */
  181. char irq_occurred; /* for diagnostics use */
  182. char testing_irq;
  183. unsigned int init_error; /* startup error (DIAGS) */
  184. char flag_buf[MAX_ASYNC_BUFFER_SIZE];
  185. BOOLEAN drop_rts_on_tx_done;
  186. struct _input_signal_events input_signal_events;
  187. /* PCMCIA support */
  188. struct pcmcia_device *p_dev;
  189. dev_node_t node;
  190. int stop;
  191. /* SPPP/Cisco HDLC device parts */
  192. int netcount;
  193. int dosyncppp;
  194. spinlock_t netlock;
  195. #ifdef CONFIG_HDLC
  196. struct net_device *netdev;
  197. #endif
  198. } MGSLPC_INFO;
  199. #define MGSLPC_MAGIC 0x5402
  200. /*
  201. * The size of the serial xmit buffer is 1 page, or 4096 bytes
  202. */
  203. #define TXBUFSIZE 4096
  204. #define CHA 0x00 /* channel A offset */
  205. #define CHB 0x40 /* channel B offset */
  206. /*
  207. * FIXME: PPC has PVR defined in asm/reg.h. For now we just undef it.
  208. */
  209. #undef PVR
  210. #define RXFIFO 0
  211. #define TXFIFO 0
  212. #define STAR 0x20
  213. #define CMDR 0x20
  214. #define RSTA 0x21
  215. #define PRE 0x21
  216. #define MODE 0x22
  217. #define TIMR 0x23
  218. #define XAD1 0x24
  219. #define XAD2 0x25
  220. #define RAH1 0x26
  221. #define RAH2 0x27
  222. #define DAFO 0x27
  223. #define RAL1 0x28
  224. #define RFC 0x28
  225. #define RHCR 0x29
  226. #define RAL2 0x29
  227. #define RBCL 0x2a
  228. #define XBCL 0x2a
  229. #define RBCH 0x2b
  230. #define XBCH 0x2b
  231. #define CCR0 0x2c
  232. #define CCR1 0x2d
  233. #define CCR2 0x2e
  234. #define CCR3 0x2f
  235. #define VSTR 0x34
  236. #define BGR 0x34
  237. #define RLCR 0x35
  238. #define AML 0x36
  239. #define AMH 0x37
  240. #define GIS 0x38
  241. #define IVA 0x38
  242. #define IPC 0x39
  243. #define ISR 0x3a
  244. #define IMR 0x3a
  245. #define PVR 0x3c
  246. #define PIS 0x3d
  247. #define PIM 0x3d
  248. #define PCR 0x3e
  249. #define CCR4 0x3f
  250. // IMR/ISR
  251. #define IRQ_BREAK_ON BIT15 // rx break detected
  252. #define IRQ_DATAOVERRUN BIT14 // receive data overflow
  253. #define IRQ_ALLSENT BIT13 // all sent
  254. #define IRQ_UNDERRUN BIT12 // transmit data underrun
  255. #define IRQ_TIMER BIT11 // timer interrupt
  256. #define IRQ_CTS BIT10 // CTS status change
  257. #define IRQ_TXREPEAT BIT9 // tx message repeat
  258. #define IRQ_TXFIFO BIT8 // transmit pool ready
  259. #define IRQ_RXEOM BIT7 // receive message end
  260. #define IRQ_EXITHUNT BIT6 // receive frame start
  261. #define IRQ_RXTIME BIT6 // rx char timeout
  262. #define IRQ_DCD BIT2 // carrier detect status change
  263. #define IRQ_OVERRUN BIT1 // receive frame overflow
  264. #define IRQ_RXFIFO BIT0 // receive pool full
  265. // STAR
  266. #define XFW BIT6 // transmit FIFO write enable
  267. #define CEC BIT2 // command executing
  268. #define CTS BIT1 // CTS state
  269. #define PVR_DTR BIT0
  270. #define PVR_DSR BIT1
  271. #define PVR_RI BIT2
  272. #define PVR_AUTOCTS BIT3
  273. #define PVR_RS232 0x20 /* 0010b */
  274. #define PVR_V35 0xe0 /* 1110b */
  275. #define PVR_RS422 0x40 /* 0100b */
  276. /* Register access functions */
  277. #define write_reg(info, reg, val) outb((val),(info)->io_base + (reg))
  278. #define read_reg(info, reg) inb((info)->io_base + (reg))
  279. #define read_reg16(info, reg) inw((info)->io_base + (reg))
  280. #define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg))
  281. #define set_reg_bits(info, reg, mask) \
  282. write_reg(info, (reg), \
  283. (unsigned char) (read_reg(info, (reg)) | (mask)))
  284. #define clear_reg_bits(info, reg, mask) \
  285. write_reg(info, (reg), \
  286. (unsigned char) (read_reg(info, (reg)) & ~(mask)))
  287. /*
  288. * interrupt enable/disable routines
  289. */
  290. static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
  291. {
  292. if (channel == CHA) {
  293. info->imra_value |= mask;
  294. write_reg16(info, CHA + IMR, info->imra_value);
  295. } else {
  296. info->imrb_value |= mask;
  297. write_reg16(info, CHB + IMR, info->imrb_value);
  298. }
  299. }
  300. static void irq_enable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
  301. {
  302. if (channel == CHA) {
  303. info->imra_value &= ~mask;
  304. write_reg16(info, CHA + IMR, info->imra_value);
  305. } else {
  306. info->imrb_value &= ~mask;
  307. write_reg16(info, CHB + IMR, info->imrb_value);
  308. }
  309. }
  310. #define port_irq_disable(info, mask) \
  311. { info->pim_value |= (mask); write_reg(info, PIM, info->pim_value); }
  312. #define port_irq_enable(info, mask) \
  313. { info->pim_value &= ~(mask); write_reg(info, PIM, info->pim_value); }
  314. static void rx_start(MGSLPC_INFO *info);
  315. static void rx_stop(MGSLPC_INFO *info);
  316. static void tx_start(MGSLPC_INFO *info);
  317. static void tx_stop(MGSLPC_INFO *info);
  318. static void tx_set_idle(MGSLPC_INFO *info);
  319. static void get_signals(MGSLPC_INFO *info);
  320. static void set_signals(MGSLPC_INFO *info);
  321. static void reset_device(MGSLPC_INFO *info);
  322. static void hdlc_mode(MGSLPC_INFO *info);
  323. static void async_mode(MGSLPC_INFO *info);
  324. static void tx_timeout(unsigned long context);
  325. static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg);
  326. #ifdef CONFIG_HDLC
  327. #define dev_to_port(D) (dev_to_hdlc(D)->priv)
  328. static void hdlcdev_tx_done(MGSLPC_INFO *info);
  329. static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size);
  330. static int hdlcdev_init(MGSLPC_INFO *info);
  331. static void hdlcdev_exit(MGSLPC_INFO *info);
  332. #endif
  333. static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit);
  334. static BOOLEAN register_test(MGSLPC_INFO *info);
  335. static BOOLEAN irq_test(MGSLPC_INFO *info);
  336. static int adapter_test(MGSLPC_INFO *info);
  337. static int claim_resources(MGSLPC_INFO *info);
  338. static void release_resources(MGSLPC_INFO *info);
  339. static void mgslpc_add_device(MGSLPC_INFO *info);
  340. static void mgslpc_remove_device(MGSLPC_INFO *info);
  341. static int rx_get_frame(MGSLPC_INFO *info);
  342. static void rx_reset_buffers(MGSLPC_INFO *info);
  343. static int rx_alloc_buffers(MGSLPC_INFO *info);
  344. static void rx_free_buffers(MGSLPC_INFO *info);
  345. static irqreturn_t mgslpc_isr(int irq, void *dev_id, struct pt_regs * regs);
  346. /*
  347. * Bottom half interrupt handlers
  348. */
  349. static void bh_handler(void* Context);
  350. static void bh_transmit(MGSLPC_INFO *info);
  351. static void bh_status(MGSLPC_INFO *info);
  352. /*
  353. * ioctl handlers
  354. */
  355. static int tiocmget(struct tty_struct *tty, struct file *file);
  356. static int tiocmset(struct tty_struct *tty, struct file *file,
  357. unsigned int set, unsigned int clear);
  358. static int get_stats(MGSLPC_INFO *info, struct mgsl_icount __user *user_icount);
  359. static int get_params(MGSLPC_INFO *info, MGSL_PARAMS __user *user_params);
  360. static int set_params(MGSLPC_INFO *info, MGSL_PARAMS __user *new_params);
  361. static int get_txidle(MGSLPC_INFO *info, int __user *idle_mode);
  362. static int set_txidle(MGSLPC_INFO *info, int idle_mode);
  363. static int set_txenable(MGSLPC_INFO *info, int enable);
  364. static int tx_abort(MGSLPC_INFO *info);
  365. static int set_rxenable(MGSLPC_INFO *info, int enable);
  366. static int wait_events(MGSLPC_INFO *info, int __user *mask);
  367. static MGSLPC_INFO *mgslpc_device_list = NULL;
  368. static int mgslpc_device_count = 0;
  369. /*
  370. * Set this param to non-zero to load eax with the
  371. * .text section address and breakpoint on module load.
  372. * This is useful for use with gdb and add-symbol-file command.
  373. */
  374. static int break_on_load=0;
  375. /*
  376. * Driver major number, defaults to zero to get auto
  377. * assigned major number. May be forced as module parameter.
  378. */
  379. static int ttymajor=0;
  380. static int debug_level = 0;
  381. static int maxframe[MAX_DEVICE_COUNT] = {0,};
  382. static int dosyncppp[MAX_DEVICE_COUNT] = {1,1,1,1};
  383. module_param(break_on_load, bool, 0);
  384. module_param(ttymajor, int, 0);
  385. module_param(debug_level, int, 0);
  386. module_param_array(maxframe, int, NULL, 0);
  387. module_param_array(dosyncppp, int, NULL, 0);
  388. MODULE_LICENSE("GPL");
  389. static char *driver_name = "SyncLink PC Card driver";
  390. static char *driver_version = "$Revision: 4.34 $";
  391. static struct tty_driver *serial_driver;
  392. /* number of characters left in xmit buffer before we ask for more */
  393. #define WAKEUP_CHARS 256
  394. static void mgslpc_change_params(MGSLPC_INFO *info);
  395. static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout);
  396. /* PCMCIA prototypes */
  397. static void mgslpc_config(struct pcmcia_device *link);
  398. static void mgslpc_release(u_long arg);
  399. static void mgslpc_detach(struct pcmcia_device *p_dev);
  400. /*
  401. * 1st function defined in .text section. Calling this function in
  402. * init_module() followed by a breakpoint allows a remote debugger
  403. * (gdb) to get the .text address for the add-symbol-file command.
  404. * This allows remote debugging of dynamically loadable modules.
  405. */
  406. static void* mgslpc_get_text_ptr(void)
  407. {
  408. return mgslpc_get_text_ptr;
  409. }
  410. /**
  411. * line discipline callback wrappers
  412. *
  413. * The wrappers maintain line discipline references
  414. * while calling into the line discipline.
  415. *
  416. * ldisc_flush_buffer - flush line discipline receive buffers
  417. * ldisc_receive_buf - pass receive data to line discipline
  418. */
  419. static void ldisc_flush_buffer(struct tty_struct *tty)
  420. {
  421. struct tty_ldisc *ld = tty_ldisc_ref(tty);
  422. if (ld) {
  423. if (ld->flush_buffer)
  424. ld->flush_buffer(tty);
  425. tty_ldisc_deref(ld);
  426. }
  427. }
  428. static void ldisc_receive_buf(struct tty_struct *tty,
  429. const __u8 *data, char *flags, int count)
  430. {
  431. struct tty_ldisc *ld;
  432. if (!tty)
  433. return;
  434. ld = tty_ldisc_ref(tty);
  435. if (ld) {
  436. if (ld->receive_buf)
  437. ld->receive_buf(tty, data, flags, count);
  438. tty_ldisc_deref(ld);
  439. }
  440. }
  441. static int mgslpc_attach(struct pcmcia_device *link)
  442. {
  443. MGSLPC_INFO *info;
  444. if (debug_level >= DEBUG_LEVEL_INFO)
  445. printk("mgslpc_attach\n");
  446. info = (MGSLPC_INFO *)kmalloc(sizeof(MGSLPC_INFO), GFP_KERNEL);
  447. if (!info) {
  448. printk("Error can't allocate device instance data\n");
  449. return -ENOMEM;
  450. }
  451. memset(info, 0, sizeof(MGSLPC_INFO));
  452. info->magic = MGSLPC_MAGIC;
  453. INIT_WORK(&info->task, bh_handler, info);
  454. info->max_frame_size = 4096;
  455. info->close_delay = 5*HZ/10;
  456. info->closing_wait = 30*HZ;
  457. init_waitqueue_head(&info->open_wait);
  458. init_waitqueue_head(&info->close_wait);
  459. init_waitqueue_head(&info->status_event_wait_q);
  460. init_waitqueue_head(&info->event_wait_q);
  461. spin_lock_init(&info->lock);
  462. spin_lock_init(&info->netlock);
  463. memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
  464. info->idle_mode = HDLC_TXIDLE_FLAGS;
  465. info->imra_value = 0xffff;
  466. info->imrb_value = 0xffff;
  467. info->pim_value = 0xff;
  468. info->p_dev = link;
  469. link->priv = info;
  470. /* Initialize the struct pcmcia_device structure */
  471. /* Interrupt setup */
  472. link->irq.Attributes = IRQ_TYPE_EXCLUSIVE;
  473. link->irq.IRQInfo1 = IRQ_LEVEL_ID;
  474. link->irq.Handler = NULL;
  475. link->conf.Attributes = 0;
  476. link->conf.IntType = INT_MEMORY_AND_IO;
  477. link->state |= DEV_PRESENT | DEV_CONFIG_PENDING;
  478. mgslpc_config(link);
  479. mgslpc_add_device(info);
  480. return 0;
  481. }
  482. /* Card has been inserted.
  483. */
  484. #define CS_CHECK(fn, ret) \
  485. do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
  486. static void mgslpc_config(struct pcmcia_device *link)
  487. {
  488. MGSLPC_INFO *info = link->priv;
  489. tuple_t tuple;
  490. cisparse_t parse;
  491. int last_fn, last_ret;
  492. u_char buf[64];
  493. cistpl_cftable_entry_t dflt = { 0 };
  494. cistpl_cftable_entry_t *cfg;
  495. if (debug_level >= DEBUG_LEVEL_INFO)
  496. printk("mgslpc_config(0x%p)\n", link);
  497. /* read CONFIG tuple to find its configuration registers */
  498. tuple.DesiredTuple = CISTPL_CONFIG;
  499. tuple.Attributes = 0;
  500. tuple.TupleData = buf;
  501. tuple.TupleDataMax = sizeof(buf);
  502. tuple.TupleOffset = 0;
  503. CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(link, &tuple));
  504. CS_CHECK(GetTupleData, pcmcia_get_tuple_data(link, &tuple));
  505. CS_CHECK(ParseTuple, pcmcia_parse_tuple(link, &tuple, &parse));
  506. link->conf.ConfigBase = parse.config.base;
  507. link->conf.Present = parse.config.rmask[0];
  508. /* Configure card */
  509. link->state |= DEV_CONFIG;
  510. /* get CIS configuration entry */
  511. tuple.DesiredTuple = CISTPL_CFTABLE_ENTRY;
  512. CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(link, &tuple));
  513. cfg = &(parse.cftable_entry);
  514. CS_CHECK(GetTupleData, pcmcia_get_tuple_data(link, &tuple));
  515. CS_CHECK(ParseTuple, pcmcia_parse_tuple(link, &tuple, &parse));
  516. if (cfg->flags & CISTPL_CFTABLE_DEFAULT) dflt = *cfg;
  517. if (cfg->index == 0)
  518. goto cs_failed;
  519. link->conf.ConfigIndex = cfg->index;
  520. link->conf.Attributes |= CONF_ENABLE_IRQ;
  521. /* IO window settings */
  522. link->io.NumPorts1 = 0;
  523. if ((cfg->io.nwin > 0) || (dflt.io.nwin > 0)) {
  524. cistpl_io_t *io = (cfg->io.nwin) ? &cfg->io : &dflt.io;
  525. link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
  526. if (!(io->flags & CISTPL_IO_8BIT))
  527. link->io.Attributes1 = IO_DATA_PATH_WIDTH_16;
  528. if (!(io->flags & CISTPL_IO_16BIT))
  529. link->io.Attributes1 = IO_DATA_PATH_WIDTH_8;
  530. link->io.IOAddrLines = io->flags & CISTPL_IO_LINES_MASK;
  531. link->io.BasePort1 = io->win[0].base;
  532. link->io.NumPorts1 = io->win[0].len;
  533. CS_CHECK(RequestIO, pcmcia_request_io(link, &link->io));
  534. }
  535. link->conf.Attributes = CONF_ENABLE_IRQ;
  536. link->conf.IntType = INT_MEMORY_AND_IO;
  537. link->conf.ConfigIndex = 8;
  538. link->conf.Present = PRESENT_OPTION;
  539. link->irq.Attributes |= IRQ_HANDLE_PRESENT;
  540. link->irq.Handler = mgslpc_isr;
  541. link->irq.Instance = info;
  542. CS_CHECK(RequestIRQ, pcmcia_request_irq(link, &link->irq));
  543. CS_CHECK(RequestConfiguration, pcmcia_request_configuration(link, &link->conf));
  544. info->io_base = link->io.BasePort1;
  545. info->irq_level = link->irq.AssignedIRQ;
  546. /* add to linked list of devices */
  547. sprintf(info->node.dev_name, "mgslpc0");
  548. info->node.major = info->node.minor = 0;
  549. link->dev_node = &info->node;
  550. printk(KERN_INFO "%s: index 0x%02x:",
  551. info->node.dev_name, link->conf.ConfigIndex);
  552. if (link->conf.Attributes & CONF_ENABLE_IRQ)
  553. printk(", irq %d", link->irq.AssignedIRQ);
  554. if (link->io.NumPorts1)
  555. printk(", io 0x%04x-0x%04x", link->io.BasePort1,
  556. link->io.BasePort1+link->io.NumPorts1-1);
  557. printk("\n");
  558. link->state &= ~DEV_CONFIG_PENDING;
  559. return;
  560. cs_failed:
  561. cs_error(link, last_fn, last_ret);
  562. mgslpc_release((u_long)link);
  563. }
  564. /* Card has been removed.
  565. * Unregister device and release PCMCIA configuration.
  566. * If device is open, postpone until it is closed.
  567. */
  568. static void mgslpc_release(u_long arg)
  569. {
  570. struct pcmcia_device *link = (struct pcmcia_device *)arg;
  571. if (debug_level >= DEBUG_LEVEL_INFO)
  572. printk("mgslpc_release(0x%p)\n", link);
  573. pcmcia_disable_device(link);
  574. }
  575. static void mgslpc_detach(struct pcmcia_device *link)
  576. {
  577. if (debug_level >= DEBUG_LEVEL_INFO)
  578. printk("mgslpc_detach(0x%p)\n", link);
  579. if (link->state & DEV_CONFIG) {
  580. ((MGSLPC_INFO *)link->priv)->stop = 1;
  581. mgslpc_release((u_long)link);
  582. }
  583. mgslpc_remove_device((MGSLPC_INFO *)link->priv);
  584. }
  585. static int mgslpc_suspend(struct pcmcia_device *link)
  586. {
  587. MGSLPC_INFO *info = link->priv;
  588. info->stop = 1;
  589. return 0;
  590. }
  591. static int mgslpc_resume(struct pcmcia_device *link)
  592. {
  593. MGSLPC_INFO *info = link->priv;
  594. info->stop = 0;
  595. return 0;
  596. }
  597. static inline int mgslpc_paranoia_check(MGSLPC_INFO *info,
  598. char *name, const char *routine)
  599. {
  600. #ifdef MGSLPC_PARANOIA_CHECK
  601. static const char *badmagic =
  602. "Warning: bad magic number for mgsl struct (%s) in %s\n";
  603. static const char *badinfo =
  604. "Warning: null mgslpc_info for (%s) in %s\n";
  605. if (!info) {
  606. printk(badinfo, name, routine);
  607. return 1;
  608. }
  609. if (info->magic != MGSLPC_MAGIC) {
  610. printk(badmagic, name, routine);
  611. return 1;
  612. }
  613. #else
  614. if (!info)
  615. return 1;
  616. #endif
  617. return 0;
  618. }
  619. #define CMD_RXFIFO BIT7 // release current rx FIFO
  620. #define CMD_RXRESET BIT6 // receiver reset
  621. #define CMD_RXFIFO_READ BIT5
  622. #define CMD_START_TIMER BIT4
  623. #define CMD_TXFIFO BIT3 // release current tx FIFO
  624. #define CMD_TXEOM BIT1 // transmit end message
  625. #define CMD_TXRESET BIT0 // transmit reset
  626. static BOOLEAN wait_command_complete(MGSLPC_INFO *info, unsigned char channel)
  627. {
  628. int i = 0;
  629. /* wait for command completion */
  630. while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) {
  631. udelay(1);
  632. if (i++ == 1000)
  633. return FALSE;
  634. }
  635. return TRUE;
  636. }
  637. static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd)
  638. {
  639. wait_command_complete(info, channel);
  640. write_reg(info, (unsigned char) (channel + CMDR), cmd);
  641. }
  642. static void tx_pause(struct tty_struct *tty)
  643. {
  644. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  645. unsigned long flags;
  646. if (mgslpc_paranoia_check(info, tty->name, "tx_pause"))
  647. return;
  648. if (debug_level >= DEBUG_LEVEL_INFO)
  649. printk("tx_pause(%s)\n",info->device_name);
  650. spin_lock_irqsave(&info->lock,flags);
  651. if (info->tx_enabled)
  652. tx_stop(info);
  653. spin_unlock_irqrestore(&info->lock,flags);
  654. }
  655. static void tx_release(struct tty_struct *tty)
  656. {
  657. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  658. unsigned long flags;
  659. if (mgslpc_paranoia_check(info, tty->name, "tx_release"))
  660. return;
  661. if (debug_level >= DEBUG_LEVEL_INFO)
  662. printk("tx_release(%s)\n",info->device_name);
  663. spin_lock_irqsave(&info->lock,flags);
  664. if (!info->tx_enabled)
  665. tx_start(info);
  666. spin_unlock_irqrestore(&info->lock,flags);
  667. }
  668. /* Return next bottom half action to perform.
  669. * or 0 if nothing to do.
  670. */
  671. static int bh_action(MGSLPC_INFO *info)
  672. {
  673. unsigned long flags;
  674. int rc = 0;
  675. spin_lock_irqsave(&info->lock,flags);
  676. if (info->pending_bh & BH_RECEIVE) {
  677. info->pending_bh &= ~BH_RECEIVE;
  678. rc = BH_RECEIVE;
  679. } else if (info->pending_bh & BH_TRANSMIT) {
  680. info->pending_bh &= ~BH_TRANSMIT;
  681. rc = BH_TRANSMIT;
  682. } else if (info->pending_bh & BH_STATUS) {
  683. info->pending_bh &= ~BH_STATUS;
  684. rc = BH_STATUS;
  685. }
  686. if (!rc) {
  687. /* Mark BH routine as complete */
  688. info->bh_running = 0;
  689. info->bh_requested = 0;
  690. }
  691. spin_unlock_irqrestore(&info->lock,flags);
  692. return rc;
  693. }
  694. void bh_handler(void* Context)
  695. {
  696. MGSLPC_INFO *info = (MGSLPC_INFO*)Context;
  697. int action;
  698. if (!info)
  699. return;
  700. if (debug_level >= DEBUG_LEVEL_BH)
  701. printk( "%s(%d):bh_handler(%s) entry\n",
  702. __FILE__,__LINE__,info->device_name);
  703. info->bh_running = 1;
  704. while((action = bh_action(info)) != 0) {
  705. /* Process work item */
  706. if ( debug_level >= DEBUG_LEVEL_BH )
  707. printk( "%s(%d):bh_handler() work item action=%d\n",
  708. __FILE__,__LINE__,action);
  709. switch (action) {
  710. case BH_RECEIVE:
  711. while(rx_get_frame(info));
  712. break;
  713. case BH_TRANSMIT:
  714. bh_transmit(info);
  715. break;
  716. case BH_STATUS:
  717. bh_status(info);
  718. break;
  719. default:
  720. /* unknown work item ID */
  721. printk("Unknown work item ID=%08X!\n", action);
  722. break;
  723. }
  724. }
  725. if (debug_level >= DEBUG_LEVEL_BH)
  726. printk( "%s(%d):bh_handler(%s) exit\n",
  727. __FILE__,__LINE__,info->device_name);
  728. }
  729. void bh_transmit(MGSLPC_INFO *info)
  730. {
  731. struct tty_struct *tty = info->tty;
  732. if (debug_level >= DEBUG_LEVEL_BH)
  733. printk("bh_transmit() entry on %s\n", info->device_name);
  734. if (tty) {
  735. tty_wakeup(tty);
  736. wake_up_interruptible(&tty->write_wait);
  737. }
  738. }
  739. void bh_status(MGSLPC_INFO *info)
  740. {
  741. info->ri_chkcount = 0;
  742. info->dsr_chkcount = 0;
  743. info->dcd_chkcount = 0;
  744. info->cts_chkcount = 0;
  745. }
  746. /* eom: non-zero = end of frame */
  747. static void rx_ready_hdlc(MGSLPC_INFO *info, int eom)
  748. {
  749. unsigned char data[2];
  750. unsigned char fifo_count, read_count, i;
  751. RXBUF *buf = (RXBUF*)(info->rx_buf + (info->rx_put * info->rx_buf_size));
  752. if (debug_level >= DEBUG_LEVEL_ISR)
  753. printk("%s(%d):rx_ready_hdlc(eom=%d)\n",__FILE__,__LINE__,eom);
  754. if (!info->rx_enabled)
  755. return;
  756. if (info->rx_frame_count >= info->rx_buf_count) {
  757. /* no more free buffers */
  758. issue_command(info, CHA, CMD_RXRESET);
  759. info->pending_bh |= BH_RECEIVE;
  760. info->rx_overflow = 1;
  761. info->icount.buf_overrun++;
  762. return;
  763. }
  764. if (eom) {
  765. /* end of frame, get FIFO count from RBCL register */
  766. if (!(fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f)))
  767. fifo_count = 32;
  768. } else
  769. fifo_count = 32;
  770. do {
  771. if (fifo_count == 1) {
  772. read_count = 1;
  773. data[0] = read_reg(info, CHA + RXFIFO);
  774. } else {
  775. read_count = 2;
  776. *((unsigned short *) data) = read_reg16(info, CHA + RXFIFO);
  777. }
  778. fifo_count -= read_count;
  779. if (!fifo_count && eom)
  780. buf->status = data[--read_count];
  781. for (i = 0; i < read_count; i++) {
  782. if (buf->count >= info->max_frame_size) {
  783. /* frame too large, reset receiver and reset current buffer */
  784. issue_command(info, CHA, CMD_RXRESET);
  785. buf->count = 0;
  786. return;
  787. }
  788. *(buf->data + buf->count) = data[i];
  789. buf->count++;
  790. }
  791. } while (fifo_count);
  792. if (eom) {
  793. info->pending_bh |= BH_RECEIVE;
  794. info->rx_frame_count++;
  795. info->rx_put++;
  796. if (info->rx_put >= info->rx_buf_count)
  797. info->rx_put = 0;
  798. }
  799. issue_command(info, CHA, CMD_RXFIFO);
  800. }
  801. static void rx_ready_async(MGSLPC_INFO *info, int tcd)
  802. {
  803. unsigned char data, status, flag;
  804. int fifo_count;
  805. int work = 0;
  806. struct tty_struct *tty = info->tty;
  807. struct mgsl_icount *icount = &info->icount;
  808. if (tcd) {
  809. /* early termination, get FIFO count from RBCL register */
  810. fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
  811. /* Zero fifo count could mean 0 or 32 bytes available.
  812. * If BIT5 of STAR is set then at least 1 byte is available.
  813. */
  814. if (!fifo_count && (read_reg(info,CHA+STAR) & BIT5))
  815. fifo_count = 32;
  816. } else
  817. fifo_count = 32;
  818. tty_buffer_request_room(tty, fifo_count);
  819. /* Flush received async data to receive data buffer. */
  820. while (fifo_count) {
  821. data = read_reg(info, CHA + RXFIFO);
  822. status = read_reg(info, CHA + RXFIFO);
  823. fifo_count -= 2;
  824. icount->rx++;
  825. flag = TTY_NORMAL;
  826. // if no frameing/crc error then save data
  827. // BIT7:parity error
  828. // BIT6:framing error
  829. if (status & (BIT7 + BIT6)) {
  830. if (status & BIT7)
  831. icount->parity++;
  832. else
  833. icount->frame++;
  834. /* discard char if tty control flags say so */
  835. if (status & info->ignore_status_mask)
  836. continue;
  837. status &= info->read_status_mask;
  838. if (status & BIT7)
  839. flag = TTY_PARITY;
  840. else if (status & BIT6)
  841. flag = TTY_FRAME;
  842. }
  843. work += tty_insert_flip_char(tty, data, flag);
  844. }
  845. issue_command(info, CHA, CMD_RXFIFO);
  846. if (debug_level >= DEBUG_LEVEL_ISR) {
  847. printk("%s(%d):rx_ready_async",
  848. __FILE__,__LINE__);
  849. printk("%s(%d):rx=%d brk=%d parity=%d frame=%d overrun=%d\n",
  850. __FILE__,__LINE__,icount->rx,icount->brk,
  851. icount->parity,icount->frame,icount->overrun);
  852. }
  853. if (work)
  854. tty_flip_buffer_push(tty);
  855. }
  856. static void tx_done(MGSLPC_INFO *info)
  857. {
  858. if (!info->tx_active)
  859. return;
  860. info->tx_active = 0;
  861. info->tx_aborting = 0;
  862. if (info->params.mode == MGSL_MODE_ASYNC)
  863. return;
  864. info->tx_count = info->tx_put = info->tx_get = 0;
  865. del_timer(&info->tx_timer);
  866. if (info->drop_rts_on_tx_done) {
  867. get_signals(info);
  868. if (info->serial_signals & SerialSignal_RTS) {
  869. info->serial_signals &= ~SerialSignal_RTS;
  870. set_signals(info);
  871. }
  872. info->drop_rts_on_tx_done = 0;
  873. }
  874. #ifdef CONFIG_HDLC
  875. if (info->netcount)
  876. hdlcdev_tx_done(info);
  877. else
  878. #endif
  879. {
  880. if (info->tty->stopped || info->tty->hw_stopped) {
  881. tx_stop(info);
  882. return;
  883. }
  884. info->pending_bh |= BH_TRANSMIT;
  885. }
  886. }
  887. static void tx_ready(MGSLPC_INFO *info)
  888. {
  889. unsigned char fifo_count = 32;
  890. int c;
  891. if (debug_level >= DEBUG_LEVEL_ISR)
  892. printk("%s(%d):tx_ready(%s)\n", __FILE__,__LINE__,info->device_name);
  893. if (info->params.mode == MGSL_MODE_HDLC) {
  894. if (!info->tx_active)
  895. return;
  896. } else {
  897. if (info->tty->stopped || info->tty->hw_stopped) {
  898. tx_stop(info);
  899. return;
  900. }
  901. if (!info->tx_count)
  902. info->tx_active = 0;
  903. }
  904. if (!info->tx_count)
  905. return;
  906. while (info->tx_count && fifo_count) {
  907. c = min(2, min_t(int, fifo_count, min(info->tx_count, TXBUFSIZE - info->tx_get)));
  908. if (c == 1) {
  909. write_reg(info, CHA + TXFIFO, *(info->tx_buf + info->tx_get));
  910. } else {
  911. write_reg16(info, CHA + TXFIFO,
  912. *((unsigned short*)(info->tx_buf + info->tx_get)));
  913. }
  914. info->tx_count -= c;
  915. info->tx_get = (info->tx_get + c) & (TXBUFSIZE - 1);
  916. fifo_count -= c;
  917. }
  918. if (info->params.mode == MGSL_MODE_ASYNC) {
  919. if (info->tx_count < WAKEUP_CHARS)
  920. info->pending_bh |= BH_TRANSMIT;
  921. issue_command(info, CHA, CMD_TXFIFO);
  922. } else {
  923. if (info->tx_count)
  924. issue_command(info, CHA, CMD_TXFIFO);
  925. else
  926. issue_command(info, CHA, CMD_TXFIFO + CMD_TXEOM);
  927. }
  928. }
  929. static void cts_change(MGSLPC_INFO *info)
  930. {
  931. get_signals(info);
  932. if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  933. irq_disable(info, CHB, IRQ_CTS);
  934. info->icount.cts++;
  935. if (info->serial_signals & SerialSignal_CTS)
  936. info->input_signal_events.cts_up++;
  937. else
  938. info->input_signal_events.cts_down++;
  939. wake_up_interruptible(&info->status_event_wait_q);
  940. wake_up_interruptible(&info->event_wait_q);
  941. if (info->flags & ASYNC_CTS_FLOW) {
  942. if (info->tty->hw_stopped) {
  943. if (info->serial_signals & SerialSignal_CTS) {
  944. if (debug_level >= DEBUG_LEVEL_ISR)
  945. printk("CTS tx start...");
  946. if (info->tty)
  947. info->tty->hw_stopped = 0;
  948. tx_start(info);
  949. info->pending_bh |= BH_TRANSMIT;
  950. return;
  951. }
  952. } else {
  953. if (!(info->serial_signals & SerialSignal_CTS)) {
  954. if (debug_level >= DEBUG_LEVEL_ISR)
  955. printk("CTS tx stop...");
  956. if (info->tty)
  957. info->tty->hw_stopped = 1;
  958. tx_stop(info);
  959. }
  960. }
  961. }
  962. info->pending_bh |= BH_STATUS;
  963. }
  964. static void dcd_change(MGSLPC_INFO *info)
  965. {
  966. get_signals(info);
  967. if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  968. irq_disable(info, CHB, IRQ_DCD);
  969. info->icount.dcd++;
  970. if (info->serial_signals & SerialSignal_DCD) {
  971. info->input_signal_events.dcd_up++;
  972. }
  973. else
  974. info->input_signal_events.dcd_down++;
  975. #ifdef CONFIG_HDLC
  976. if (info->netcount)
  977. hdlc_set_carrier(info->serial_signals & SerialSignal_DCD, info->netdev);
  978. #endif
  979. wake_up_interruptible(&info->status_event_wait_q);
  980. wake_up_interruptible(&info->event_wait_q);
  981. if (info->flags & ASYNC_CHECK_CD) {
  982. if (debug_level >= DEBUG_LEVEL_ISR)
  983. printk("%s CD now %s...", info->device_name,
  984. (info->serial_signals & SerialSignal_DCD) ? "on" : "off");
  985. if (info->serial_signals & SerialSignal_DCD)
  986. wake_up_interruptible(&info->open_wait);
  987. else {
  988. if (debug_level >= DEBUG_LEVEL_ISR)
  989. printk("doing serial hangup...");
  990. if (info->tty)
  991. tty_hangup(info->tty);
  992. }
  993. }
  994. info->pending_bh |= BH_STATUS;
  995. }
  996. static void dsr_change(MGSLPC_INFO *info)
  997. {
  998. get_signals(info);
  999. if ((info->dsr_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  1000. port_irq_disable(info, PVR_DSR);
  1001. info->icount.dsr++;
  1002. if (info->serial_signals & SerialSignal_DSR)
  1003. info->input_signal_events.dsr_up++;
  1004. else
  1005. info->input_signal_events.dsr_down++;
  1006. wake_up_interruptible(&info->status_event_wait_q);
  1007. wake_up_interruptible(&info->event_wait_q);
  1008. info->pending_bh |= BH_STATUS;
  1009. }
  1010. static void ri_change(MGSLPC_INFO *info)
  1011. {
  1012. get_signals(info);
  1013. if ((info->ri_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  1014. port_irq_disable(info, PVR_RI);
  1015. info->icount.rng++;
  1016. if (info->serial_signals & SerialSignal_RI)
  1017. info->input_signal_events.ri_up++;
  1018. else
  1019. info->input_signal_events.ri_down++;
  1020. wake_up_interruptible(&info->status_event_wait_q);
  1021. wake_up_interruptible(&info->event_wait_q);
  1022. info->pending_bh |= BH_STATUS;
  1023. }
  1024. /* Interrupt service routine entry point.
  1025. *
  1026. * Arguments:
  1027. *
  1028. * irq interrupt number that caused interrupt
  1029. * dev_id device ID supplied during interrupt registration
  1030. * regs interrupted processor context
  1031. */
  1032. static irqreturn_t mgslpc_isr(int irq, void *dev_id, struct pt_regs * regs)
  1033. {
  1034. MGSLPC_INFO * info = (MGSLPC_INFO *)dev_id;
  1035. unsigned short isr;
  1036. unsigned char gis, pis;
  1037. int count=0;
  1038. if (debug_level >= DEBUG_LEVEL_ISR)
  1039. printk("mgslpc_isr(%d) entry.\n", irq);
  1040. if (!info)
  1041. return IRQ_NONE;
  1042. if (!(info->p_dev->state & DEV_CONFIG))
  1043. return IRQ_HANDLED;
  1044. spin_lock(&info->lock);
  1045. while ((gis = read_reg(info, CHA + GIS))) {
  1046. if (debug_level >= DEBUG_LEVEL_ISR)
  1047. printk("mgslpc_isr %s gis=%04X\n", info->device_name,gis);
  1048. if ((gis & 0x70) || count > 1000) {
  1049. printk("synclink_cs:hardware failed or ejected\n");
  1050. break;
  1051. }
  1052. count++;
  1053. if (gis & (BIT1 + BIT0)) {
  1054. isr = read_reg16(info, CHB + ISR);
  1055. if (isr & IRQ_DCD)
  1056. dcd_change(info);
  1057. if (isr & IRQ_CTS)
  1058. cts_change(info);
  1059. }
  1060. if (gis & (BIT3 + BIT2))
  1061. {
  1062. isr = read_reg16(info, CHA + ISR);
  1063. if (isr & IRQ_TIMER) {
  1064. info->irq_occurred = 1;
  1065. irq_disable(info, CHA, IRQ_TIMER);
  1066. }
  1067. /* receive IRQs */
  1068. if (isr & IRQ_EXITHUNT) {
  1069. info->icount.exithunt++;
  1070. wake_up_interruptible(&info->event_wait_q);
  1071. }
  1072. if (isr & IRQ_BREAK_ON) {
  1073. info->icount.brk++;
  1074. if (info->flags & ASYNC_SAK)
  1075. do_SAK(info->tty);
  1076. }
  1077. if (isr & IRQ_RXTIME) {
  1078. issue_command(info, CHA, CMD_RXFIFO_READ);
  1079. }
  1080. if (isr & (IRQ_RXEOM + IRQ_RXFIFO)) {
  1081. if (info->params.mode == MGSL_MODE_HDLC)
  1082. rx_ready_hdlc(info, isr & IRQ_RXEOM);
  1083. else
  1084. rx_ready_async(info, isr & IRQ_RXEOM);
  1085. }
  1086. /* transmit IRQs */
  1087. if (isr & IRQ_UNDERRUN) {
  1088. if (info->tx_aborting)
  1089. info->icount.txabort++;
  1090. else
  1091. info->icount.txunder++;
  1092. tx_done(info);
  1093. }
  1094. else if (isr & IRQ_ALLSENT) {
  1095. info->icount.txok++;
  1096. tx_done(info);
  1097. }
  1098. else if (isr & IRQ_TXFIFO)
  1099. tx_ready(info);
  1100. }
  1101. if (gis & BIT7) {
  1102. pis = read_reg(info, CHA + PIS);
  1103. if (pis & BIT1)
  1104. dsr_change(info);
  1105. if (pis & BIT2)
  1106. ri_change(info);
  1107. }
  1108. }
  1109. /* Request bottom half processing if there's something
  1110. * for it to do and the bh is not already running
  1111. */
  1112. if (info->pending_bh && !info->bh_running && !info->bh_requested) {
  1113. if ( debug_level >= DEBUG_LEVEL_ISR )
  1114. printk("%s(%d):%s queueing bh task.\n",
  1115. __FILE__,__LINE__,info->device_name);
  1116. schedule_work(&info->task);
  1117. info->bh_requested = 1;
  1118. }
  1119. spin_unlock(&info->lock);
  1120. if (debug_level >= DEBUG_LEVEL_ISR)
  1121. printk("%s(%d):mgslpc_isr(%d)exit.\n",
  1122. __FILE__,__LINE__,irq);
  1123. return IRQ_HANDLED;
  1124. }
  1125. /* Initialize and start device.
  1126. */
  1127. static int startup(MGSLPC_INFO * info)
  1128. {
  1129. int retval = 0;
  1130. if (debug_level >= DEBUG_LEVEL_INFO)
  1131. printk("%s(%d):startup(%s)\n",__FILE__,__LINE__,info->device_name);
  1132. if (info->flags & ASYNC_INITIALIZED)
  1133. return 0;
  1134. if (!info->tx_buf) {
  1135. /* allocate a page of memory for a transmit buffer */
  1136. info->tx_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL);
  1137. if (!info->tx_buf) {
  1138. printk(KERN_ERR"%s(%d):%s can't allocate transmit buffer\n",
  1139. __FILE__,__LINE__,info->device_name);
  1140. return -ENOMEM;
  1141. }
  1142. }
  1143. info->pending_bh = 0;
  1144. memset(&info->icount, 0, sizeof(info->icount));
  1145. init_timer(&info->tx_timer);
  1146. info->tx_timer.data = (unsigned long)info;
  1147. info->tx_timer.function = tx_timeout;
  1148. /* Allocate and claim adapter resources */
  1149. retval = claim_resources(info);
  1150. /* perform existance check and diagnostics */
  1151. if ( !retval )
  1152. retval = adapter_test(info);
  1153. if ( retval ) {
  1154. if (capable(CAP_SYS_ADMIN) && info->tty)
  1155. set_bit(TTY_IO_ERROR, &info->tty->flags);
  1156. release_resources(info);
  1157. return retval;
  1158. }
  1159. /* program hardware for current parameters */
  1160. mgslpc_change_params(info);
  1161. if (info->tty)
  1162. clear_bit(TTY_IO_ERROR, &info->tty->flags);
  1163. info->flags |= ASYNC_INITIALIZED;
  1164. return 0;
  1165. }
  1166. /* Called by mgslpc_close() and mgslpc_hangup() to shutdown hardware
  1167. */
  1168. static void shutdown(MGSLPC_INFO * info)
  1169. {
  1170. unsigned long flags;
  1171. if (!(info->flags & ASYNC_INITIALIZED))
  1172. return;
  1173. if (debug_level >= DEBUG_LEVEL_INFO)
  1174. printk("%s(%d):mgslpc_shutdown(%s)\n",
  1175. __FILE__,__LINE__, info->device_name );
  1176. /* clear status wait queue because status changes */
  1177. /* can't happen after shutting down the hardware */
  1178. wake_up_interruptible(&info->status_event_wait_q);
  1179. wake_up_interruptible(&info->event_wait_q);
  1180. del_timer(&info->tx_timer);
  1181. if (info->tx_buf) {
  1182. free_page((unsigned long) info->tx_buf);
  1183. info->tx_buf = NULL;
  1184. }
  1185. spin_lock_irqsave(&info->lock,flags);
  1186. rx_stop(info);
  1187. tx_stop(info);
  1188. /* TODO:disable interrupts instead of reset to preserve signal states */
  1189. reset_device(info);
  1190. if (!info->tty || info->tty->termios->c_cflag & HUPCL) {
  1191. info->serial_signals &= ~(SerialSignal_DTR + SerialSignal_RTS);
  1192. set_signals(info);
  1193. }
  1194. spin_unlock_irqrestore(&info->lock,flags);
  1195. release_resources(info);
  1196. if (info->tty)
  1197. set_bit(TTY_IO_ERROR, &info->tty->flags);
  1198. info->flags &= ~ASYNC_INITIALIZED;
  1199. }
  1200. static void mgslpc_program_hw(MGSLPC_INFO *info)
  1201. {
  1202. unsigned long flags;
  1203. spin_lock_irqsave(&info->lock,flags);
  1204. rx_stop(info);
  1205. tx_stop(info);
  1206. info->tx_count = info->tx_put = info->tx_get = 0;
  1207. if (info->params.mode == MGSL_MODE_HDLC || info->netcount)
  1208. hdlc_mode(info);
  1209. else
  1210. async_mode(info);
  1211. set_signals(info);
  1212. info->dcd_chkcount = 0;
  1213. info->cts_chkcount = 0;
  1214. info->ri_chkcount = 0;
  1215. info->dsr_chkcount = 0;
  1216. irq_enable(info, CHB, IRQ_DCD | IRQ_CTS);
  1217. port_irq_enable(info, (unsigned char) PVR_DSR | PVR_RI);
  1218. get_signals(info);
  1219. if (info->netcount || info->tty->termios->c_cflag & CREAD)
  1220. rx_start(info);
  1221. spin_unlock_irqrestore(&info->lock,flags);
  1222. }
  1223. /* Reconfigure adapter based on new parameters
  1224. */
  1225. static void mgslpc_change_params(MGSLPC_INFO *info)
  1226. {
  1227. unsigned cflag;
  1228. int bits_per_char;
  1229. if (!info->tty || !info->tty->termios)
  1230. return;
  1231. if (debug_level >= DEBUG_LEVEL_INFO)
  1232. printk("%s(%d):mgslpc_change_params(%s)\n",
  1233. __FILE__,__LINE__, info->device_name );
  1234. cflag = info->tty->termios->c_cflag;
  1235. /* if B0 rate (hangup) specified then negate DTR and RTS */
  1236. /* otherwise assert DTR and RTS */
  1237. if (cflag & CBAUD)
  1238. info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
  1239. else
  1240. info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
  1241. /* byte size and parity */
  1242. switch (cflag & CSIZE) {
  1243. case CS5: info->params.data_bits = 5; break;
  1244. case CS6: info->params.data_bits = 6; break;
  1245. case CS7: info->params.data_bits = 7; break;
  1246. case CS8: info->params.data_bits = 8; break;
  1247. default: info->params.data_bits = 7; break;
  1248. }
  1249. if (cflag & CSTOPB)
  1250. info->params.stop_bits = 2;
  1251. else
  1252. info->params.stop_bits = 1;
  1253. info->params.parity = ASYNC_PARITY_NONE;
  1254. if (cflag & PARENB) {
  1255. if (cflag & PARODD)
  1256. info->params.parity = ASYNC_PARITY_ODD;
  1257. else
  1258. info->params.parity = ASYNC_PARITY_EVEN;
  1259. #ifdef CMSPAR
  1260. if (cflag & CMSPAR)
  1261. info->params.parity = ASYNC_PARITY_SPACE;
  1262. #endif
  1263. }
  1264. /* calculate number of jiffies to transmit a full
  1265. * FIFO (32 bytes) at specified data rate
  1266. */
  1267. bits_per_char = info->params.data_bits +
  1268. info->params.stop_bits + 1;
  1269. /* if port data rate is set to 460800 or less then
  1270. * allow tty settings to override, otherwise keep the
  1271. * current data rate.
  1272. */
  1273. if (info->params.data_rate <= 460800) {
  1274. info->params.data_rate = tty_get_baud_rate(info->tty);
  1275. }
  1276. if ( info->params.data_rate ) {
  1277. info->timeout = (32*HZ*bits_per_char) /
  1278. info->params.data_rate;
  1279. }
  1280. info->timeout += HZ/50; /* Add .02 seconds of slop */
  1281. if (cflag & CRTSCTS)
  1282. info->flags |= ASYNC_CTS_FLOW;
  1283. else
  1284. info->flags &= ~ASYNC_CTS_FLOW;
  1285. if (cflag & CLOCAL)
  1286. info->flags &= ~ASYNC_CHECK_CD;
  1287. else
  1288. info->flags |= ASYNC_CHECK_CD;
  1289. /* process tty input control flags */
  1290. info->read_status_mask = 0;
  1291. if (I_INPCK(info->tty))
  1292. info->read_status_mask |= BIT7 | BIT6;
  1293. if (I_IGNPAR(info->tty))
  1294. info->ignore_status_mask |= BIT7 | BIT6;
  1295. mgslpc_program_hw(info);
  1296. }
  1297. /* Add a character to the transmit buffer
  1298. */
  1299. static void mgslpc_put_char(struct tty_struct *tty, unsigned char ch)
  1300. {
  1301. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1302. unsigned long flags;
  1303. if (debug_level >= DEBUG_LEVEL_INFO) {
  1304. printk( "%s(%d):mgslpc_put_char(%d) on %s\n",
  1305. __FILE__,__LINE__,ch,info->device_name);
  1306. }
  1307. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_put_char"))
  1308. return;
  1309. if (!tty || !info->tx_buf)
  1310. return;
  1311. spin_lock_irqsave(&info->lock,flags);
  1312. if (info->params.mode == MGSL_MODE_ASYNC || !info->tx_active) {
  1313. if (info->tx_count < TXBUFSIZE - 1) {
  1314. info->tx_buf[info->tx_put++] = ch;
  1315. info->tx_put &= TXBUFSIZE-1;
  1316. info->tx_count++;
  1317. }
  1318. }
  1319. spin_unlock_irqrestore(&info->lock,flags);
  1320. }
  1321. /* Enable transmitter so remaining characters in the
  1322. * transmit buffer are sent.
  1323. */
  1324. static void mgslpc_flush_chars(struct tty_struct *tty)
  1325. {
  1326. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1327. unsigned long flags;
  1328. if (debug_level >= DEBUG_LEVEL_INFO)
  1329. printk( "%s(%d):mgslpc_flush_chars() entry on %s tx_count=%d\n",
  1330. __FILE__,__LINE__,info->device_name,info->tx_count);
  1331. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_chars"))
  1332. return;
  1333. if (info->tx_count <= 0 || tty->stopped ||
  1334. tty->hw_stopped || !info->tx_buf)
  1335. return;
  1336. if (debug_level >= DEBUG_LEVEL_INFO)
  1337. printk( "%s(%d):mgslpc_flush_chars() entry on %s starting transmitter\n",
  1338. __FILE__,__LINE__,info->device_name);
  1339. spin_lock_irqsave(&info->lock,flags);
  1340. if (!info->tx_active)
  1341. tx_start(info);
  1342. spin_unlock_irqrestore(&info->lock,flags);
  1343. }
  1344. /* Send a block of data
  1345. *
  1346. * Arguments:
  1347. *
  1348. * tty pointer to tty information structure
  1349. * buf pointer to buffer containing send data
  1350. * count size of send data in bytes
  1351. *
  1352. * Returns: number of characters written
  1353. */
  1354. static int mgslpc_write(struct tty_struct * tty,
  1355. const unsigned char *buf, int count)
  1356. {
  1357. int c, ret = 0;
  1358. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1359. unsigned long flags;
  1360. if (debug_level >= DEBUG_LEVEL_INFO)
  1361. printk( "%s(%d):mgslpc_write(%s) count=%d\n",
  1362. __FILE__,__LINE__,info->device_name,count);
  1363. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write") ||
  1364. !tty || !info->tx_buf)
  1365. goto cleanup;
  1366. if (info->params.mode == MGSL_MODE_HDLC) {
  1367. if (count > TXBUFSIZE) {
  1368. ret = -EIO;
  1369. goto cleanup;
  1370. }
  1371. if (info->tx_active)
  1372. goto cleanup;
  1373. else if (info->tx_count)
  1374. goto start;
  1375. }
  1376. for (;;) {
  1377. c = min(count,
  1378. min(TXBUFSIZE - info->tx_count - 1,
  1379. TXBUFSIZE - info->tx_put));
  1380. if (c <= 0)
  1381. break;
  1382. memcpy(info->tx_buf + info->tx_put, buf, c);
  1383. spin_lock_irqsave(&info->lock,flags);
  1384. info->tx_put = (info->tx_put + c) & (TXBUFSIZE-1);
  1385. info->tx_count += c;
  1386. spin_unlock_irqrestore(&info->lock,flags);
  1387. buf += c;
  1388. count -= c;
  1389. ret += c;
  1390. }
  1391. start:
  1392. if (info->tx_count && !tty->stopped && !tty->hw_stopped) {
  1393. spin_lock_irqsave(&info->lock,flags);
  1394. if (!info->tx_active)
  1395. tx_start(info);
  1396. spin_unlock_irqrestore(&info->lock,flags);
  1397. }
  1398. cleanup:
  1399. if (debug_level >= DEBUG_LEVEL_INFO)
  1400. printk( "%s(%d):mgslpc_write(%s) returning=%d\n",
  1401. __FILE__,__LINE__,info->device_name,ret);
  1402. return ret;
  1403. }
  1404. /* Return the count of free bytes in transmit buffer
  1405. */
  1406. static int mgslpc_write_room(struct tty_struct *tty)
  1407. {
  1408. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1409. int ret;
  1410. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write_room"))
  1411. return 0;
  1412. if (info->params.mode == MGSL_MODE_HDLC) {
  1413. /* HDLC (frame oriented) mode */
  1414. if (info->tx_active)
  1415. return 0;
  1416. else
  1417. return HDLC_MAX_FRAME_SIZE;
  1418. } else {
  1419. ret = TXBUFSIZE - info->tx_count - 1;
  1420. if (ret < 0)
  1421. ret = 0;
  1422. }
  1423. if (debug_level >= DEBUG_LEVEL_INFO)
  1424. printk("%s(%d):mgslpc_write_room(%s)=%d\n",
  1425. __FILE__,__LINE__, info->device_name, ret);
  1426. return ret;
  1427. }
  1428. /* Return the count of bytes in transmit buffer
  1429. */
  1430. static int mgslpc_chars_in_buffer(struct tty_struct *tty)
  1431. {
  1432. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1433. int rc;
  1434. if (debug_level >= DEBUG_LEVEL_INFO)
  1435. printk("%s(%d):mgslpc_chars_in_buffer(%s)\n",
  1436. __FILE__,__LINE__, info->device_name );
  1437. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_chars_in_buffer"))
  1438. return 0;
  1439. if (info->params.mode == MGSL_MODE_HDLC)
  1440. rc = info->tx_active ? info->max_frame_size : 0;
  1441. else
  1442. rc = info->tx_count;
  1443. if (debug_level >= DEBUG_LEVEL_INFO)
  1444. printk("%s(%d):mgslpc_chars_in_buffer(%s)=%d\n",
  1445. __FILE__,__LINE__, info->device_name, rc);
  1446. return rc;
  1447. }
  1448. /* Discard all data in the send buffer
  1449. */
  1450. static void mgslpc_flush_buffer(struct tty_struct *tty)
  1451. {
  1452. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1453. unsigned long flags;
  1454. if (debug_level >= DEBUG_LEVEL_INFO)
  1455. printk("%s(%d):mgslpc_flush_buffer(%s) entry\n",
  1456. __FILE__,__LINE__, info->device_name );
  1457. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_buffer"))
  1458. return;
  1459. spin_lock_irqsave(&info->lock,flags);
  1460. info->tx_count = info->tx_put = info->tx_get = 0;
  1461. del_timer(&info->tx_timer);
  1462. spin_unlock_irqrestore(&info->lock,flags);
  1463. wake_up_interruptible(&tty->write_wait);
  1464. tty_wakeup(tty);
  1465. }
  1466. /* Send a high-priority XON/XOFF character
  1467. */
  1468. static void mgslpc_send_xchar(struct tty_struct *tty, char ch)
  1469. {
  1470. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1471. unsigned long flags;
  1472. if (debug_level >= DEBUG_LEVEL_INFO)
  1473. printk("%s(%d):mgslpc_send_xchar(%s,%d)\n",
  1474. __FILE__,__LINE__, info->device_name, ch );
  1475. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_send_xchar"))
  1476. return;
  1477. info->x_char = ch;
  1478. if (ch) {
  1479. spin_lock_irqsave(&info->lock,flags);
  1480. if (!info->tx_enabled)
  1481. tx_start(info);
  1482. spin_unlock_irqrestore(&info->lock,flags);
  1483. }
  1484. }
  1485. /* Signal remote device to throttle send data (our receive data)
  1486. */
  1487. static void mgslpc_throttle(struct tty_struct * tty)
  1488. {
  1489. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1490. unsigned long flags;
  1491. if (debug_level >= DEBUG_LEVEL_INFO)
  1492. printk("%s(%d):mgslpc_throttle(%s) entry\n",
  1493. __FILE__,__LINE__, info->device_name );
  1494. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_throttle"))
  1495. return;
  1496. if (I_IXOFF(tty))
  1497. mgslpc_send_xchar(tty, STOP_CHAR(tty));
  1498. if (tty->termios->c_cflag & CRTSCTS) {
  1499. spin_lock_irqsave(&info->lock,flags);
  1500. info->serial_signals &= ~SerialSignal_RTS;
  1501. set_signals(info);
  1502. spin_unlock_irqrestore(&info->lock,flags);
  1503. }
  1504. }
  1505. /* Signal remote device to stop throttling send data (our receive data)
  1506. */
  1507. static void mgslpc_unthrottle(struct tty_struct * tty)
  1508. {
  1509. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1510. unsigned long flags;
  1511. if (debug_level >= DEBUG_LEVEL_INFO)
  1512. printk("%s(%d):mgslpc_unthrottle(%s) entry\n",
  1513. __FILE__,__LINE__, info->device_name );
  1514. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_unthrottle"))
  1515. return;
  1516. if (I_IXOFF(tty)) {
  1517. if (info->x_char)
  1518. info->x_char = 0;
  1519. else
  1520. mgslpc_send_xchar(tty, START_CHAR(tty));
  1521. }
  1522. if (tty->termios->c_cflag & CRTSCTS) {
  1523. spin_lock_irqsave(&info->lock,flags);
  1524. info->serial_signals |= SerialSignal_RTS;
  1525. set_signals(info);
  1526. spin_unlock_irqrestore(&info->lock,flags);
  1527. }
  1528. }
  1529. /* get the current serial statistics
  1530. */
  1531. static int get_stats(MGSLPC_INFO * info, struct mgsl_icount __user *user_icount)
  1532. {
  1533. int err;
  1534. if (debug_level >= DEBUG_LEVEL_INFO)
  1535. printk("get_params(%s)\n", info->device_name);
  1536. if (!user_icount) {
  1537. memset(&info->icount, 0, sizeof(info->icount));
  1538. } else {
  1539. COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount));
  1540. if (err)
  1541. return -EFAULT;
  1542. }
  1543. return 0;
  1544. }
  1545. /* get the current serial parameters
  1546. */
  1547. static int get_params(MGSLPC_INFO * info, MGSL_PARAMS __user *user_params)
  1548. {
  1549. int err;
  1550. if (debug_level >= DEBUG_LEVEL_INFO)
  1551. printk("get_params(%s)\n", info->device_name);
  1552. COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS));
  1553. if (err)
  1554. return -EFAULT;
  1555. return 0;
  1556. }
  1557. /* set the serial parameters
  1558. *
  1559. * Arguments:
  1560. *
  1561. * info pointer to device instance data
  1562. * new_params user buffer containing new serial params
  1563. *
  1564. * Returns: 0 if success, otherwise error code
  1565. */
  1566. static int set_params(MGSLPC_INFO * info, MGSL_PARAMS __user *new_params)
  1567. {
  1568. unsigned long flags;
  1569. MGSL_PARAMS tmp_params;
  1570. int err;
  1571. if (debug_level >= DEBUG_LEVEL_INFO)
  1572. printk("%s(%d):set_params %s\n", __FILE__,__LINE__,
  1573. info->device_name );
  1574. COPY_FROM_USER(err,&tmp_params, new_params, sizeof(MGSL_PARAMS));
  1575. if (err) {
  1576. if ( debug_level >= DEBUG_LEVEL_INFO )
  1577. printk( "%s(%d):set_params(%s) user buffer copy failed\n",
  1578. __FILE__,__LINE__,info->device_name);
  1579. return -EFAULT;
  1580. }
  1581. spin_lock_irqsave(&info->lock,flags);
  1582. memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS));
  1583. spin_unlock_irqrestore(&info->lock,flags);
  1584. mgslpc_change_params(info);
  1585. return 0;
  1586. }
  1587. static int get_txidle(MGSLPC_INFO * info, int __user *idle_mode)
  1588. {
  1589. int err;
  1590. if (debug_level >= DEBUG_LEVEL_INFO)
  1591. printk("get_txidle(%s)=%d\n", info->device_name, info->idle_mode);
  1592. COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int));
  1593. if (err)
  1594. return -EFAULT;
  1595. return 0;
  1596. }
  1597. static int set_txidle(MGSLPC_INFO * info, int idle_mode)
  1598. {
  1599. unsigned long flags;
  1600. if (debug_level >= DEBUG_LEVEL_INFO)
  1601. printk("set_txidle(%s,%d)\n", info->device_name, idle_mode);
  1602. spin_lock_irqsave(&info->lock,flags);
  1603. info->idle_mode = idle_mode;
  1604. tx_set_idle(info);
  1605. spin_unlock_irqrestore(&info->lock,flags);
  1606. return 0;
  1607. }
  1608. static int get_interface(MGSLPC_INFO * info, int __user *if_mode)
  1609. {
  1610. int err;
  1611. if (debug_level >= DEBUG_LEVEL_INFO)
  1612. printk("get_interface(%s)=%d\n", info->device_name, info->if_mode);
  1613. COPY_TO_USER(err,if_mode, &info->if_mode, sizeof(int));
  1614. if (err)
  1615. return -EFAULT;
  1616. return 0;
  1617. }
  1618. static int set_interface(MGSLPC_INFO * info, int if_mode)
  1619. {
  1620. unsigned long flags;
  1621. unsigned char val;
  1622. if (debug_level >= DEBUG_LEVEL_INFO)
  1623. printk("set_interface(%s,%d)\n", info->device_name, if_mode);
  1624. spin_lock_irqsave(&info->lock,flags);
  1625. info->if_mode = if_mode;
  1626. val = read_reg(info, PVR) & 0x0f;
  1627. switch (info->if_mode)
  1628. {
  1629. case MGSL_INTERFACE_RS232: val |= PVR_RS232; break;
  1630. case MGSL_INTERFACE_V35: val |= PVR_V35; break;
  1631. case MGSL_INTERFACE_RS422: val |= PVR_RS422; break;
  1632. }
  1633. write_reg(info, PVR, val);
  1634. spin_unlock_irqrestore(&info->lock,flags);
  1635. return 0;
  1636. }
  1637. static int set_txenable(MGSLPC_INFO * info, int enable)
  1638. {
  1639. unsigned long flags;
  1640. if (debug_level >= DEBUG_LEVEL_INFO)
  1641. printk("set_txenable(%s,%d)\n", info->device_name, enable);
  1642. spin_lock_irqsave(&info->lock,flags);
  1643. if (enable) {
  1644. if (!info->tx_enabled)
  1645. tx_start(info);
  1646. } else {
  1647. if (info->tx_enabled)
  1648. tx_stop(info);
  1649. }
  1650. spin_unlock_irqrestore(&info->lock,flags);
  1651. return 0;
  1652. }
  1653. static int tx_abort(MGSLPC_INFO * info)
  1654. {
  1655. unsigned long flags;
  1656. if (debug_level >= DEBUG_LEVEL_INFO)
  1657. printk("tx_abort(%s)\n", info->device_name);
  1658. spin_lock_irqsave(&info->lock,flags);
  1659. if (info->tx_active && info->tx_count &&
  1660. info->params.mode == MGSL_MODE_HDLC) {
  1661. /* clear data count so FIFO is not filled on next IRQ.
  1662. * This results in underrun and abort transmission.
  1663. */
  1664. info->tx_count = info->tx_put = info->tx_get = 0;
  1665. info->tx_aborting = TRUE;
  1666. }
  1667. spin_unlock_irqrestore(&info->lock,flags);
  1668. return 0;
  1669. }
  1670. static int set_rxenable(MGSLPC_INFO * info, int enable)
  1671. {
  1672. unsigned long flags;
  1673. if (debug_level >= DEBUG_LEVEL_INFO)
  1674. printk("set_rxenable(%s,%d)\n", info->device_name, enable);
  1675. spin_lock_irqsave(&info->lock,flags);
  1676. if (enable) {
  1677. if (!info->rx_enabled)
  1678. rx_start(info);
  1679. } else {
  1680. if (info->rx_enabled)
  1681. rx_stop(info);
  1682. }
  1683. spin_unlock_irqrestore(&info->lock,flags);
  1684. return 0;
  1685. }
  1686. /* wait for specified event to occur
  1687. *
  1688. * Arguments: info pointer to device instance data
  1689. * mask pointer to bitmask of events to wait for
  1690. * Return Value: 0 if successful and bit mask updated with
  1691. * of events triggerred,
  1692. * otherwise error code
  1693. */
  1694. static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr)
  1695. {
  1696. unsigned long flags;
  1697. int s;
  1698. int rc=0;
  1699. struct mgsl_icount cprev, cnow;
  1700. int events;
  1701. int mask;
  1702. struct _input_signal_events oldsigs, newsigs;
  1703. DECLARE_WAITQUEUE(wait, current);
  1704. COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int));
  1705. if (rc)
  1706. return -EFAULT;
  1707. if (debug_level >= DEBUG_LEVEL_INFO)
  1708. printk("wait_events(%s,%d)\n", info->device_name, mask);
  1709. spin_lock_irqsave(&info->lock,flags);
  1710. /* return immediately if state matches requested events */
  1711. get_signals(info);
  1712. s = info->serial_signals;
  1713. events = mask &
  1714. ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) +
  1715. ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) +
  1716. ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) +
  1717. ((s & SerialSignal_RI) ? MgslEvent_RiActive :MgslEvent_RiInactive) );
  1718. if (events) {
  1719. spin_unlock_irqrestore(&info->lock,flags);
  1720. goto exit;
  1721. }
  1722. /* save current irq counts */
  1723. cprev = info->icount;
  1724. oldsigs = info->input_signal_events;
  1725. if ((info->params.mode == MGSL_MODE_HDLC) &&
  1726. (mask & MgslEvent_ExitHuntMode))
  1727. irq_enable(info, CHA, IRQ_EXITHUNT);
  1728. set_current_state(TASK_INTERRUPTIBLE);
  1729. add_wait_queue(&info->event_wait_q, &wait);
  1730. spin_unlock_irqrestore(&info->lock,flags);
  1731. for(;;) {
  1732. schedule();
  1733. if (signal_pending(current)) {
  1734. rc = -ERESTARTSYS;
  1735. break;
  1736. }
  1737. /* get current irq counts */
  1738. spin_lock_irqsave(&info->lock,flags);
  1739. cnow = info->icount;
  1740. newsigs = info->input_signal_events;
  1741. set_current_state(TASK_INTERRUPTIBLE);
  1742. spin_unlock_irqrestore(&info->lock,flags);
  1743. /* if no change, wait aborted for some reason */
  1744. if (newsigs.dsr_up == oldsigs.dsr_up &&
  1745. newsigs.dsr_down == oldsigs.dsr_down &&
  1746. newsigs.dcd_up == oldsigs.dcd_up &&
  1747. newsigs.dcd_down == oldsigs.dcd_down &&
  1748. newsigs.cts_up == oldsigs.cts_up &&
  1749. newsigs.cts_down == oldsigs.cts_down &&
  1750. newsigs.ri_up == oldsigs.ri_up &&
  1751. newsigs.ri_down == oldsigs.ri_down &&
  1752. cnow.exithunt == cprev.exithunt &&
  1753. cnow.rxidle == cprev.rxidle) {
  1754. rc = -EIO;
  1755. break;
  1756. }
  1757. events = mask &
  1758. ( (newsigs.dsr_up != oldsigs.dsr_up ? MgslEvent_DsrActive:0) +
  1759. (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) +
  1760. (newsigs.dcd_up != oldsigs.dcd_up ? MgslEvent_DcdActive:0) +
  1761. (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) +
  1762. (newsigs.cts_up != oldsigs.cts_up ? MgslEvent_CtsActive:0) +
  1763. (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) +
  1764. (newsigs.ri_up != oldsigs.ri_up ? MgslEvent_RiActive:0) +
  1765. (newsigs.ri_down != oldsigs.ri_down ? MgslEvent_RiInactive:0) +
  1766. (cnow.exithunt != cprev.exithunt ? MgslEvent_ExitHuntMode:0) +
  1767. (cnow.rxidle != cprev.rxidle ? MgslEvent_IdleReceived:0) );
  1768. if (events)
  1769. break;
  1770. cprev = cnow;
  1771. oldsigs = newsigs;
  1772. }
  1773. remove_wait_queue(&info->event_wait_q, &wait);
  1774. set_current_state(TASK_RUNNING);
  1775. if (mask & MgslEvent_ExitHuntMode) {
  1776. spin_lock_irqsave(&info->lock,flags);
  1777. if (!waitqueue_active(&info->event_wait_q))
  1778. irq_disable(info, CHA, IRQ_EXITHUNT);
  1779. spin_unlock_irqrestore(&info->lock,flags);
  1780. }
  1781. exit:
  1782. if (rc == 0)
  1783. PUT_USER(rc, events, mask_ptr);
  1784. return rc;
  1785. }
  1786. static int modem_input_wait(MGSLPC_INFO *info,int arg)
  1787. {
  1788. unsigned long flags;
  1789. int rc;
  1790. struct mgsl_icount cprev, cnow;
  1791. DECLARE_WAITQUEUE(wait, current);
  1792. /* save current irq counts */
  1793. spin_lock_irqsave(&info->lock,flags);
  1794. cprev = info->icount;
  1795. add_wait_queue(&info->status_event_wait_q, &wait);
  1796. set_current_state(TASK_INTERRUPTIBLE);
  1797. spin_unlock_irqrestore(&info->lock,flags);
  1798. for(;;) {
  1799. schedule();
  1800. if (signal_pending(current)) {
  1801. rc = -ERESTARTSYS;
  1802. break;
  1803. }
  1804. /* get new irq counts */
  1805. spin_lock_irqsave(&info->lock,flags);
  1806. cnow = info->icount;
  1807. set_current_state(TASK_INTERRUPTIBLE);
  1808. spin_unlock_irqrestore(&info->lock,flags);
  1809. /* if no change, wait aborted for some reason */
  1810. if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
  1811. cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) {
  1812. rc = -EIO;
  1813. break;
  1814. }
  1815. /* check for change in caller specified modem input */
  1816. if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) ||
  1817. (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) ||
  1818. (arg & TIOCM_CD && cnow.dcd != cprev.dcd) ||
  1819. (arg & TIOCM_CTS && cnow.cts != cprev.cts)) {
  1820. rc = 0;
  1821. break;
  1822. }
  1823. cprev = cnow;
  1824. }
  1825. remove_wait_queue(&info->status_event_wait_q, &wait);
  1826. set_current_state(TASK_RUNNING);
  1827. return rc;
  1828. }
  1829. /* return the state of the serial control and status signals
  1830. */
  1831. static int tiocmget(struct tty_struct *tty, struct file *file)
  1832. {
  1833. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1834. unsigned int result;
  1835. unsigned long flags;
  1836. spin_lock_irqsave(&info->lock,flags);
  1837. get_signals(info);
  1838. spin_unlock_irqrestore(&info->lock,flags);
  1839. result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
  1840. ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
  1841. ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
  1842. ((info->serial_signals & SerialSignal_RI) ? TIOCM_RNG:0) +
  1843. ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
  1844. ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0);
  1845. if (debug_level >= DEBUG_LEVEL_INFO)
  1846. printk("%s(%d):%s tiocmget() value=%08X\n",
  1847. __FILE__,__LINE__, info->device_name, result );
  1848. return result;
  1849. }
  1850. /* set modem control signals (DTR/RTS)
  1851. */
  1852. static int tiocmset(struct tty_struct *tty, struct file *file,
  1853. unsigned int set, unsigned int clear)
  1854. {
  1855. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1856. unsigned long flags;
  1857. if (debug_level >= DEBUG_LEVEL_INFO)
  1858. printk("%s(%d):%s tiocmset(%x,%x)\n",
  1859. __FILE__,__LINE__,info->device_name, set, clear);
  1860. if (set & TIOCM_RTS)
  1861. info->serial_signals |= SerialSignal_RTS;
  1862. if (set & TIOCM_DTR)
  1863. info->serial_signals |= SerialSignal_DTR;
  1864. if (clear & TIOCM_RTS)
  1865. info->serial_signals &= ~SerialSignal_RTS;
  1866. if (clear & TIOCM_DTR)
  1867. info->serial_signals &= ~SerialSignal_DTR;
  1868. spin_lock_irqsave(&info->lock,flags);
  1869. set_signals(info);
  1870. spin_unlock_irqrestore(&info->lock,flags);
  1871. return 0;
  1872. }
  1873. /* Set or clear transmit break condition
  1874. *
  1875. * Arguments: tty pointer to tty instance data
  1876. * break_state -1=set break condition, 0=clear
  1877. */
  1878. static void mgslpc_break(struct tty_struct *tty, int break_state)
  1879. {
  1880. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  1881. unsigned long flags;
  1882. if (debug_level >= DEBUG_LEVEL_INFO)
  1883. printk("%s(%d):mgslpc_break(%s,%d)\n",
  1884. __FILE__,__LINE__, info->device_name, break_state);
  1885. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_break"))
  1886. return;
  1887. spin_lock_irqsave(&info->lock,flags);
  1888. if (break_state == -1)
  1889. set_reg_bits(info, CHA+DAFO, BIT6);
  1890. else
  1891. clear_reg_bits(info, CHA+DAFO, BIT6);
  1892. spin_unlock_irqrestore(&info->lock,flags);
  1893. }
  1894. /* Service an IOCTL request
  1895. *
  1896. * Arguments:
  1897. *
  1898. * tty pointer to tty instance data
  1899. * file pointer to associated file object for device
  1900. * cmd IOCTL command code
  1901. * arg command argument/context
  1902. *
  1903. * Return Value: 0 if success, otherwise error code
  1904. */
  1905. static int mgslpc_ioctl(struct tty_struct *tty, struct file * file,
  1906. unsigned int cmd, unsigned long arg)
  1907. {
  1908. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  1909. if (debug_level >= DEBUG_LEVEL_INFO)
  1910. printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__,__LINE__,
  1911. info->device_name, cmd );
  1912. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_ioctl"))
  1913. return -ENODEV;
  1914. if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
  1915. (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
  1916. if (tty->flags & (1 << TTY_IO_ERROR))
  1917. return -EIO;
  1918. }
  1919. return ioctl_common(info, cmd, arg);
  1920. }
  1921. int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg)
  1922. {
  1923. int error;
  1924. struct mgsl_icount cnow; /* kernel counter temps */
  1925. struct serial_icounter_struct __user *p_cuser; /* user space */
  1926. void __user *argp = (void __user *)arg;
  1927. unsigned long flags;
  1928. switch (cmd) {
  1929. case MGSL_IOCGPARAMS:
  1930. return get_params(info, argp);
  1931. case MGSL_IOCSPARAMS:
  1932. return set_params(info, argp);
  1933. case MGSL_IOCGTXIDLE:
  1934. return get_txidle(info, argp);
  1935. case MGSL_IOCSTXIDLE:
  1936. return set_txidle(info, (int)arg);
  1937. case MGSL_IOCGIF:
  1938. return get_interface(info, argp);
  1939. case MGSL_IOCSIF:
  1940. return set_interface(info,(int)arg);
  1941. case MGSL_IOCTXENABLE:
  1942. return set_txenable(info,(int)arg);
  1943. case MGSL_IOCRXENABLE:
  1944. return set_rxenable(info,(int)arg);
  1945. case MGSL_IOCTXABORT:
  1946. return tx_abort(info);
  1947. case MGSL_IOCGSTATS:
  1948. return get_stats(info, argp);
  1949. case MGSL_IOCWAITEVENT:
  1950. return wait_events(info, argp);
  1951. case TIOCMIWAIT:
  1952. return modem_input_wait(info,(int)arg);
  1953. case TIOCGICOUNT:
  1954. spin_lock_irqsave(&info->lock,flags);
  1955. cnow = info->icount;
  1956. spin_unlock_irqrestore(&info->lock,flags);
  1957. p_cuser = argp;
  1958. PUT_USER(error,cnow.cts, &p_cuser->cts);
  1959. if (error) return error;
  1960. PUT_USER(error,cnow.dsr, &p_cuser->dsr);
  1961. if (error) return error;
  1962. PUT_USER(error,cnow.rng, &p_cuser->rng);
  1963. if (error) return error;
  1964. PUT_USER(error,cnow.dcd, &p_cuser->dcd);
  1965. if (error) return error;
  1966. PUT_USER(error,cnow.rx, &p_cuser->rx);
  1967. if (error) return error;
  1968. PUT_USER(error,cnow.tx, &p_cuser->tx);
  1969. if (error) return error;
  1970. PUT_USER(error,cnow.frame, &p_cuser->frame);
  1971. if (error) return error;
  1972. PUT_USER(error,cnow.overrun, &p_cuser->overrun);
  1973. if (error) return error;
  1974. PUT_USER(error,cnow.parity, &p_cuser->parity);
  1975. if (error) return error;
  1976. PUT_USER(error,cnow.brk, &p_cuser->brk);
  1977. if (error) return error;
  1978. PUT_USER(error,cnow.buf_overrun, &p_cuser->buf_overrun);
  1979. if (error) return error;
  1980. return 0;
  1981. default:
  1982. return -ENOIOCTLCMD;
  1983. }
  1984. return 0;
  1985. }
  1986. /* Set new termios settings
  1987. *
  1988. * Arguments:
  1989. *
  1990. * tty pointer to tty structure
  1991. * termios pointer to buffer to hold returned old termios
  1992. */
  1993. static void mgslpc_set_termios(struct tty_struct *tty, struct termios *old_termios)
  1994. {
  1995. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1996. unsigned long flags;
  1997. if (debug_level >= DEBUG_LEVEL_INFO)
  1998. printk("%s(%d):mgslpc_set_termios %s\n", __FILE__,__LINE__,
  1999. tty->driver->name );
  2000. /* just return if nothing has changed */
  2001. if ((tty->termios->c_cflag == old_termios->c_cflag)
  2002. && (RELEVANT_IFLAG(tty->termios->c_iflag)
  2003. == RELEVANT_IFLAG(old_termios->c_iflag)))
  2004. return;
  2005. mgslpc_change_params(info);
  2006. /* Handle transition to B0 status */
  2007. if (old_termios->c_cflag & CBAUD &&
  2008. !(tty->termios->c_cflag & CBAUD)) {
  2009. info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
  2010. spin_lock_irqsave(&info->lock,flags);
  2011. set_signals(info);
  2012. spin_unlock_irqrestore(&info->lock,flags);
  2013. }
  2014. /* Handle transition away from B0 status */
  2015. if (!(old_termios->c_cflag & CBAUD) &&
  2016. tty->termios->c_cflag & CBAUD) {
  2017. info->serial_signals |= SerialSignal_DTR;
  2018. if (!(tty->termios->c_cflag & CRTSCTS) ||
  2019. !test_bit(TTY_THROTTLED, &tty->flags)) {
  2020. info->serial_signals |= SerialSignal_RTS;
  2021. }
  2022. spin_lock_irqsave(&info->lock,flags);
  2023. set_signals(info);
  2024. spin_unlock_irqrestore(&info->lock,flags);
  2025. }
  2026. /* Handle turning off CRTSCTS */
  2027. if (old_termios->c_cflag & CRTSCTS &&
  2028. !(tty->termios->c_cflag & CRTSCTS)) {
  2029. tty->hw_stopped = 0;
  2030. tx_release(tty);
  2031. }
  2032. }
  2033. static void mgslpc_close(struct tty_struct *tty, struct file * filp)
  2034. {
  2035. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  2036. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_close"))
  2037. return;
  2038. if (debug_level >= DEBUG_LEVEL_INFO)
  2039. printk("%s(%d):mgslpc_close(%s) entry, count=%d\n",
  2040. __FILE__,__LINE__, info->device_name, info->count);
  2041. if (!info->count)
  2042. return;
  2043. if (tty_hung_up_p(filp))
  2044. goto cleanup;
  2045. if ((tty->count == 1) && (info->count != 1)) {
  2046. /*
  2047. * tty->count is 1 and the tty structure will be freed.
  2048. * info->count should be one in this case.
  2049. * if it's not, correct it so that the port is shutdown.
  2050. */
  2051. printk("mgslpc_close: bad refcount; tty->count is 1, "
  2052. "info->count is %d\n", info->count);
  2053. info->count = 1;
  2054. }
  2055. info->count--;
  2056. /* if at least one open remaining, leave hardware active */
  2057. if (info->count)
  2058. goto cleanup;
  2059. info->flags |= ASYNC_CLOSING;
  2060. /* set tty->closing to notify line discipline to
  2061. * only process XON/XOFF characters. Only the N_TTY
  2062. * discipline appears to use this (ppp does not).
  2063. */
  2064. tty->closing = 1;
  2065. /* wait for transmit data to clear all layers */
  2066. if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE) {
  2067. if (debug_level >= DEBUG_LEVEL_INFO)
  2068. printk("%s(%d):mgslpc_close(%s) calling tty_wait_until_sent\n",
  2069. __FILE__,__LINE__, info->device_name );
  2070. tty_wait_until_sent(tty, info->closing_wait);
  2071. }
  2072. if (info->flags & ASYNC_INITIALIZED)
  2073. mgslpc_wait_until_sent(tty, info->timeout);
  2074. if (tty->driver->flush_buffer)
  2075. tty->driver->flush_buffer(tty);
  2076. ldisc_flush_buffer(tty);
  2077. shutdown(info);
  2078. tty->closing = 0;
  2079. info->tty = NULL;
  2080. if (info->blocked_open) {
  2081. if (info->close_delay) {
  2082. msleep_interruptible(jiffies_to_msecs(info->close_delay));
  2083. }
  2084. wake_up_interruptible(&info->open_wait);
  2085. }
  2086. info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
  2087. wake_up_interruptible(&info->close_wait);
  2088. cleanup:
  2089. if (debug_level >= DEBUG_LEVEL_INFO)
  2090. printk("%s(%d):mgslpc_close(%s) exit, count=%d\n", __FILE__,__LINE__,
  2091. tty->driver->name, info->count);
  2092. }
  2093. /* Wait until the transmitter is empty.
  2094. */
  2095. static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout)
  2096. {
  2097. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  2098. unsigned long orig_jiffies, char_time;
  2099. if (!info )
  2100. return;
  2101. if (debug_level >= DEBUG_LEVEL_INFO)
  2102. printk("%s(%d):mgslpc_wait_until_sent(%s) entry\n",
  2103. __FILE__,__LINE__, info->device_name );
  2104. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_wait_until_sent"))
  2105. return;
  2106. if (!(info->flags & ASYNC_INITIALIZED))
  2107. goto exit;
  2108. orig_jiffies = jiffies;
  2109. /* Set check interval to 1/5 of estimated time to
  2110. * send a character, and make it at least 1. The check
  2111. * interval should also be less than the timeout.
  2112. * Note: use tight timings here to satisfy the NIST-PCTS.
  2113. */
  2114. if ( info->params.data_rate ) {
  2115. char_time = info->timeout/(32 * 5);
  2116. if (!char_time)
  2117. char_time++;
  2118. } else
  2119. char_time = 1;
  2120. if (timeout)
  2121. char_time = min_t(unsigned long, char_time, timeout);
  2122. if (info->params.mode == MGSL_MODE_HDLC) {
  2123. while (info->tx_active) {
  2124. msleep_interruptible(jiffies_to_msecs(char_time));
  2125. if (signal_pending(current))
  2126. break;
  2127. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  2128. break;
  2129. }
  2130. } else {
  2131. while ((info->tx_count || info->tx_active) &&
  2132. info->tx_enabled) {
  2133. msleep_interruptible(jiffies_to_msecs(char_time));
  2134. if (signal_pending(current))
  2135. break;
  2136. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  2137. break;
  2138. }
  2139. }
  2140. exit:
  2141. if (debug_level >= DEBUG_LEVEL_INFO)
  2142. printk("%s(%d):mgslpc_wait_until_sent(%s) exit\n",
  2143. __FILE__,__LINE__, info->device_name );
  2144. }
  2145. /* Called by tty_hangup() when a hangup is signaled.
  2146. * This is the same as closing all open files for the port.
  2147. */
  2148. static void mgslpc_hangup(struct tty_struct *tty)
  2149. {
  2150. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  2151. if (debug_level >= DEBUG_LEVEL_INFO)
  2152. printk("%s(%d):mgslpc_hangup(%s)\n",
  2153. __FILE__,__LINE__, info->device_name );
  2154. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_hangup"))
  2155. return;
  2156. mgslpc_flush_buffer(tty);
  2157. shutdown(info);
  2158. info->count = 0;
  2159. info->flags &= ~ASYNC_NORMAL_ACTIVE;
  2160. info->tty = NULL;
  2161. wake_up_interruptible(&info->open_wait);
  2162. }
  2163. /* Block the current process until the specified port
  2164. * is ready to be opened.
  2165. */
  2166. static int block_til_ready(struct tty_struct *tty, struct file *filp,
  2167. MGSLPC_INFO *info)
  2168. {
  2169. DECLARE_WAITQUEUE(wait, current);
  2170. int retval;
  2171. int do_clocal = 0, extra_count = 0;
  2172. unsigned long flags;
  2173. if (debug_level >= DEBUG_LEVEL_INFO)
  2174. printk("%s(%d):block_til_ready on %s\n",
  2175. __FILE__,__LINE__, tty->driver->name );
  2176. if (filp->f_flags & O_NONBLOCK || tty->flags & (1 << TTY_IO_ERROR)){
  2177. /* nonblock mode is set or port is not enabled */
  2178. /* just verify that callout device is not active */
  2179. info->flags |= ASYNC_NORMAL_ACTIVE;
  2180. return 0;
  2181. }
  2182. if (tty->termios->c_cflag & CLOCAL)
  2183. do_clocal = 1;
  2184. /* Wait for carrier detect and the line to become
  2185. * free (i.e., not in use by the callout). While we are in
  2186. * this loop, info->count is dropped by one, so that
  2187. * mgslpc_close() knows when to free things. We restore it upon
  2188. * exit, either normal or abnormal.
  2189. */
  2190. retval = 0;
  2191. add_wait_queue(&info->open_wait, &wait);
  2192. if (debug_level >= DEBUG_LEVEL_INFO)
  2193. printk("%s(%d):block_til_ready before block on %s count=%d\n",
  2194. __FILE__,__LINE__, tty->driver->name, info->count );
  2195. spin_lock_irqsave(&info->lock, flags);
  2196. if (!tty_hung_up_p(filp)) {
  2197. extra_count = 1;
  2198. info->count--;
  2199. }
  2200. spin_unlock_irqrestore(&info->lock, flags);
  2201. info->blocked_open++;
  2202. while (1) {
  2203. if ((tty->termios->c_cflag & CBAUD)) {
  2204. spin_lock_irqsave(&info->lock,flags);
  2205. info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
  2206. set_signals(info);
  2207. spin_unlock_irqrestore(&info->lock,flags);
  2208. }
  2209. set_current_state(TASK_INTERRUPTIBLE);
  2210. if (tty_hung_up_p(filp) || !(info->flags & ASYNC_INITIALIZED)){
  2211. retval = (info->flags & ASYNC_HUP_NOTIFY) ?
  2212. -EAGAIN : -ERESTARTSYS;
  2213. break;
  2214. }
  2215. spin_lock_irqsave(&info->lock,flags);
  2216. get_signals(info);
  2217. spin_unlock_irqrestore(&info->lock,flags);
  2218. if (!(info->flags & ASYNC_CLOSING) &&
  2219. (do_clocal || (info->serial_signals & SerialSignal_DCD)) ) {
  2220. break;
  2221. }
  2222. if (signal_pending(current)) {
  2223. retval = -ERESTARTSYS;
  2224. break;
  2225. }
  2226. if (debug_level >= DEBUG_LEVEL_INFO)
  2227. printk("%s(%d):block_til_ready blocking on %s count=%d\n",
  2228. __FILE__,__LINE__, tty->driver->name, info->count );
  2229. schedule();
  2230. }
  2231. set_current_state(TASK_RUNNING);
  2232. remove_wait_queue(&info->open_wait, &wait);
  2233. if (extra_count)
  2234. info->count++;
  2235. info->blocked_open--;
  2236. if (debug_level >= DEBUG_LEVEL_INFO)
  2237. printk("%s(%d):block_til_ready after blocking on %s count=%d\n",
  2238. __FILE__,__LINE__, tty->driver->name, info->count );
  2239. if (!retval)
  2240. info->flags |= ASYNC_NORMAL_ACTIVE;
  2241. return retval;
  2242. }
  2243. static int mgslpc_open(struct tty_struct *tty, struct file * filp)
  2244. {
  2245. MGSLPC_INFO *info;
  2246. int retval, line;
  2247. unsigned long flags;
  2248. /* verify range of specified line number */
  2249. line = tty->index;
  2250. if ((line < 0) || (line >= mgslpc_device_count)) {
  2251. printk("%s(%d):mgslpc_open with invalid line #%d.\n",
  2252. __FILE__,__LINE__,line);
  2253. return -ENODEV;
  2254. }
  2255. /* find the info structure for the specified line */
  2256. info = mgslpc_device_list;
  2257. while(info && info->line != line)
  2258. info = info->next_device;
  2259. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_open"))
  2260. return -ENODEV;
  2261. tty->driver_data = info;
  2262. info->tty = tty;
  2263. if (debug_level >= DEBUG_LEVEL_INFO)
  2264. printk("%s(%d):mgslpc_open(%s), old ref count = %d\n",
  2265. __FILE__,__LINE__,tty->driver->name, info->count);
  2266. /* If port is closing, signal caller to try again */
  2267. if (tty_hung_up_p(filp) || info->flags & ASYNC_CLOSING){
  2268. if (info->flags & ASYNC_CLOSING)
  2269. interruptible_sleep_on(&info->close_wait);
  2270. retval = ((info->flags & ASYNC_HUP_NOTIFY) ?
  2271. -EAGAIN : -ERESTARTSYS);
  2272. goto cleanup;
  2273. }
  2274. info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
  2275. spin_lock_irqsave(&info->netlock, flags);
  2276. if (info->netcount) {
  2277. retval = -EBUSY;
  2278. spin_unlock_irqrestore(&info->netlock, flags);
  2279. goto cleanup;
  2280. }
  2281. info->count++;
  2282. spin_unlock_irqrestore(&info->netlock, flags);
  2283. if (info->count == 1) {
  2284. /* 1st open on this device, init hardware */
  2285. retval = startup(info);
  2286. if (retval < 0)
  2287. goto cleanup;
  2288. }
  2289. retval = block_til_ready(tty, filp, info);
  2290. if (retval) {
  2291. if (debug_level >= DEBUG_LEVEL_INFO)
  2292. printk("%s(%d):block_til_ready(%s) returned %d\n",
  2293. __FILE__,__LINE__, info->device_name, retval);
  2294. goto cleanup;
  2295. }
  2296. if (debug_level >= DEBUG_LEVEL_INFO)
  2297. printk("%s(%d):mgslpc_open(%s) success\n",
  2298. __FILE__,__LINE__, info->device_name);
  2299. retval = 0;
  2300. cleanup:
  2301. if (retval) {
  2302. if (tty->count == 1)
  2303. info->tty = NULL; /* tty layer will release tty struct */
  2304. if(info->count)
  2305. info->count--;
  2306. }
  2307. return retval;
  2308. }
  2309. /*
  2310. * /proc fs routines....
  2311. */
  2312. static inline int line_info(char *buf, MGSLPC_INFO *info)
  2313. {
  2314. char stat_buf[30];
  2315. int ret;
  2316. unsigned long flags;
  2317. ret = sprintf(buf, "%s:io:%04X irq:%d",
  2318. info->device_name, info->io_base, info->irq_level);
  2319. /* output current serial signal states */
  2320. spin_lock_irqsave(&info->lock,flags);
  2321. get_signals(info);
  2322. spin_unlock_irqrestore(&info->lock,flags);
  2323. stat_buf[0] = 0;
  2324. stat_buf[1] = 0;
  2325. if (info->serial_signals & SerialSignal_RTS)
  2326. strcat(stat_buf, "|RTS");
  2327. if (info->serial_signals & SerialSignal_CTS)
  2328. strcat(stat_buf, "|CTS");
  2329. if (info->serial_signals & SerialSignal_DTR)
  2330. strcat(stat_buf, "|DTR");
  2331. if (info->serial_signals & SerialSignal_DSR)
  2332. strcat(stat_buf, "|DSR");
  2333. if (info->serial_signals & SerialSignal_DCD)
  2334. strcat(stat_buf, "|CD");
  2335. if (info->serial_signals & SerialSignal_RI)
  2336. strcat(stat_buf, "|RI");
  2337. if (info->params.mode == MGSL_MODE_HDLC) {
  2338. ret += sprintf(buf+ret, " HDLC txok:%d rxok:%d",
  2339. info->icount.txok, info->icount.rxok);
  2340. if (info->icount.txunder)
  2341. ret += sprintf(buf+ret, " txunder:%d", info->icount.txunder);
  2342. if (info->icount.txabort)
  2343. ret += sprintf(buf+ret, " txabort:%d", info->icount.txabort);
  2344. if (info->icount.rxshort)
  2345. ret += sprintf(buf+ret, " rxshort:%d", info->icount.rxshort);
  2346. if (info->icount.rxlong)
  2347. ret += sprintf(buf+ret, " rxlong:%d", info->icount.rxlong);
  2348. if (info->icount.rxover)
  2349. ret += sprintf(buf+ret, " rxover:%d", info->icount.rxover);
  2350. if (info->icount.rxcrc)
  2351. ret += sprintf(buf+ret, " rxcrc:%d", info->icount.rxcrc);
  2352. } else {
  2353. ret += sprintf(buf+ret, " ASYNC tx:%d rx:%d",
  2354. info->icount.tx, info->icount.rx);
  2355. if (info->icount.frame)
  2356. ret += sprintf(buf+ret, " fe:%d", info->icount.frame);
  2357. if (info->icount.parity)
  2358. ret += sprintf(buf+ret, " pe:%d", info->icount.parity);
  2359. if (info->icount.brk)
  2360. ret += sprintf(buf+ret, " brk:%d", info->icount.brk);
  2361. if (info->icount.overrun)
  2362. ret += sprintf(buf+ret, " oe:%d", info->icount.overrun);
  2363. }
  2364. /* Append serial signal status to end */
  2365. ret += sprintf(buf+ret, " %s\n", stat_buf+1);
  2366. ret += sprintf(buf+ret, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
  2367. info->tx_active,info->bh_requested,info->bh_running,
  2368. info->pending_bh);
  2369. return ret;
  2370. }
  2371. /* Called to print information about devices
  2372. */
  2373. static int mgslpc_read_proc(char *page, char **start, off_t off, int count,
  2374. int *eof, void *data)
  2375. {
  2376. int len = 0, l;
  2377. off_t begin = 0;
  2378. MGSLPC_INFO *info;
  2379. len += sprintf(page, "synclink driver:%s\n", driver_version);
  2380. info = mgslpc_device_list;
  2381. while( info ) {
  2382. l = line_info(page + len, info);
  2383. len += l;
  2384. if (len+begin > off+count)
  2385. goto done;
  2386. if (len+begin < off) {
  2387. begin += len;
  2388. len = 0;
  2389. }
  2390. info = info->next_device;
  2391. }
  2392. *eof = 1;
  2393. done:
  2394. if (off >= len+begin)
  2395. return 0;
  2396. *start = page + (off-begin);
  2397. return ((count < begin+len-off) ? count : begin+len-off);
  2398. }
  2399. int rx_alloc_buffers(MGSLPC_INFO *info)
  2400. {
  2401. /* each buffer has header and data */
  2402. info->rx_buf_size = sizeof(RXBUF) + info->max_frame_size;
  2403. /* calculate total allocation size for 8 buffers */
  2404. info->rx_buf_total_size = info->rx_buf_size * 8;
  2405. /* limit total allocated memory */
  2406. if (info->rx_buf_total_size > 0x10000)
  2407. info->rx_buf_total_size = 0x10000;
  2408. /* calculate number of buffers */
  2409. info->rx_buf_count = info->rx_buf_total_size / info->rx_buf_size;
  2410. info->rx_buf = kmalloc(info->rx_buf_total_size, GFP_KERNEL);
  2411. if (info->rx_buf == NULL)
  2412. return -ENOMEM;
  2413. rx_reset_buffers(info);
  2414. return 0;
  2415. }
  2416. void rx_free_buffers(MGSLPC_INFO *info)
  2417. {
  2418. kfree(info->rx_buf);
  2419. info->rx_buf = NULL;
  2420. }
  2421. int claim_resources(MGSLPC_INFO *info)
  2422. {
  2423. if (rx_alloc_buffers(info) < 0 ) {
  2424. printk( "Cant allocate rx buffer %s\n", info->device_name);
  2425. release_resources(info);
  2426. return -ENODEV;
  2427. }
  2428. return 0;
  2429. }
  2430. void release_resources(MGSLPC_INFO *info)
  2431. {
  2432. if (debug_level >= DEBUG_LEVEL_INFO)
  2433. printk("release_resources(%s)\n", info->device_name);
  2434. rx_free_buffers(info);
  2435. }
  2436. /* Add the specified device instance data structure to the
  2437. * global linked list of devices and increment the device count.
  2438. *
  2439. * Arguments: info pointer to device instance data
  2440. */
  2441. void mgslpc_add_device(MGSLPC_INFO *info)
  2442. {
  2443. info->next_device = NULL;
  2444. info->line = mgslpc_device_count;
  2445. sprintf(info->device_name,"ttySLP%d",info->line);
  2446. if (info->line < MAX_DEVICE_COUNT) {
  2447. if (maxframe[info->line])
  2448. info->max_frame_size = maxframe[info->line];
  2449. info->dosyncppp = dosyncppp[info->line];
  2450. }
  2451. mgslpc_device_count++;
  2452. if (!mgslpc_device_list)
  2453. mgslpc_device_list = info;
  2454. else {
  2455. MGSLPC_INFO *current_dev = mgslpc_device_list;
  2456. while( current_dev->next_device )
  2457. current_dev = current_dev->next_device;
  2458. current_dev->next_device = info;
  2459. }
  2460. if (info->max_frame_size < 4096)
  2461. info->max_frame_size = 4096;
  2462. else if (info->max_frame_size > 65535)
  2463. info->max_frame_size = 65535;
  2464. printk( "SyncLink PC Card %s:IO=%04X IRQ=%d\n",
  2465. info->device_name, info->io_base, info->irq_level);
  2466. #ifdef CONFIG_HDLC
  2467. hdlcdev_init(info);
  2468. #endif
  2469. }
  2470. void mgslpc_remove_device(MGSLPC_INFO *remove_info)
  2471. {
  2472. MGSLPC_INFO *info = mgslpc_device_list;
  2473. MGSLPC_INFO *last = NULL;
  2474. while(info) {
  2475. if (info == remove_info) {
  2476. if (last)
  2477. last->next_device = info->next_device;
  2478. else
  2479. mgslpc_device_list = info->next_device;
  2480. #ifdef CONFIG_HDLC
  2481. hdlcdev_exit(info);
  2482. #endif
  2483. release_resources(info);
  2484. kfree(info);
  2485. mgslpc_device_count--;
  2486. return;
  2487. }
  2488. last = info;
  2489. info = info->next_device;
  2490. }
  2491. }
  2492. static struct pcmcia_device_id mgslpc_ids[] = {
  2493. PCMCIA_DEVICE_MANF_CARD(0x02c5, 0x0050),
  2494. PCMCIA_DEVICE_NULL
  2495. };
  2496. MODULE_DEVICE_TABLE(pcmcia, mgslpc_ids);
  2497. static struct pcmcia_driver mgslpc_driver = {
  2498. .owner = THIS_MODULE,
  2499. .drv = {
  2500. .name = "synclink_cs",
  2501. },
  2502. .probe = mgslpc_attach,
  2503. .remove = mgslpc_detach,
  2504. .id_table = mgslpc_ids,
  2505. .suspend = mgslpc_suspend,
  2506. .resume = mgslpc_resume,
  2507. };
  2508. static struct tty_operations mgslpc_ops = {
  2509. .open = mgslpc_open,
  2510. .close = mgslpc_close,
  2511. .write = mgslpc_write,
  2512. .put_char = mgslpc_put_char,
  2513. .flush_chars = mgslpc_flush_chars,
  2514. .write_room = mgslpc_write_room,
  2515. .chars_in_buffer = mgslpc_chars_in_buffer,
  2516. .flush_buffer = mgslpc_flush_buffer,
  2517. .ioctl = mgslpc_ioctl,
  2518. .throttle = mgslpc_throttle,
  2519. .unthrottle = mgslpc_unthrottle,
  2520. .send_xchar = mgslpc_send_xchar,
  2521. .break_ctl = mgslpc_break,
  2522. .wait_until_sent = mgslpc_wait_until_sent,
  2523. .read_proc = mgslpc_read_proc,
  2524. .set_termios = mgslpc_set_termios,
  2525. .stop = tx_pause,
  2526. .start = tx_release,
  2527. .hangup = mgslpc_hangup,
  2528. .tiocmget = tiocmget,
  2529. .tiocmset = tiocmset,
  2530. };
  2531. static void synclink_cs_cleanup(void)
  2532. {
  2533. int rc;
  2534. printk("Unloading %s: version %s\n", driver_name, driver_version);
  2535. while(mgslpc_device_list)
  2536. mgslpc_remove_device(mgslpc_device_list);
  2537. if (serial_driver) {
  2538. if ((rc = tty_unregister_driver(serial_driver)))
  2539. printk("%s(%d) failed to unregister tty driver err=%d\n",
  2540. __FILE__,__LINE__,rc);
  2541. put_tty_driver(serial_driver);
  2542. }
  2543. pcmcia_unregister_driver(&mgslpc_driver);
  2544. }
  2545. static int __init synclink_cs_init(void)
  2546. {
  2547. int rc;
  2548. if (break_on_load) {
  2549. mgslpc_get_text_ptr();
  2550. BREAKPOINT();
  2551. }
  2552. printk("%s %s\n", driver_name, driver_version);
  2553. if ((rc = pcmcia_register_driver(&mgslpc_driver)) < 0)
  2554. return rc;
  2555. serial_driver = alloc_tty_driver(MAX_DEVICE_COUNT);
  2556. if (!serial_driver) {
  2557. rc = -ENOMEM;
  2558. goto error;
  2559. }
  2560. /* Initialize the tty_driver structure */
  2561. serial_driver->owner = THIS_MODULE;
  2562. serial_driver->driver_name = "synclink_cs";
  2563. serial_driver->name = "ttySLP";
  2564. serial_driver->major = ttymajor;
  2565. serial_driver->minor_start = 64;
  2566. serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
  2567. serial_driver->subtype = SERIAL_TYPE_NORMAL;
  2568. serial_driver->init_termios = tty_std_termios;
  2569. serial_driver->init_termios.c_cflag =
  2570. B9600 | CS8 | CREAD | HUPCL | CLOCAL;
  2571. serial_driver->flags = TTY_DRIVER_REAL_RAW;
  2572. tty_set_operations(serial_driver, &mgslpc_ops);
  2573. if ((rc = tty_register_driver(serial_driver)) < 0) {
  2574. printk("%s(%d):Couldn't register serial driver\n",
  2575. __FILE__,__LINE__);
  2576. put_tty_driver(serial_driver);
  2577. serial_driver = NULL;
  2578. goto error;
  2579. }
  2580. printk("%s %s, tty major#%d\n",
  2581. driver_name, driver_version,
  2582. serial_driver->major);
  2583. return 0;
  2584. error:
  2585. synclink_cs_cleanup();
  2586. return rc;
  2587. }
  2588. static void __exit synclink_cs_exit(void)
  2589. {
  2590. synclink_cs_cleanup();
  2591. }
  2592. module_init(synclink_cs_init);
  2593. module_exit(synclink_cs_exit);
  2594. static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned int rate)
  2595. {
  2596. unsigned int M, N;
  2597. unsigned char val;
  2598. /* note:standard BRG mode is broken in V3.2 chip
  2599. * so enhanced mode is always used
  2600. */
  2601. if (rate) {
  2602. N = 3686400 / rate;
  2603. if (!N)
  2604. N = 1;
  2605. N >>= 1;
  2606. for (M = 1; N > 64 && M < 16; M++)
  2607. N >>= 1;
  2608. N--;
  2609. /* BGR[5..0] = N
  2610. * BGR[9..6] = M
  2611. * BGR[7..0] contained in BGR register
  2612. * BGR[9..8] contained in CCR2[7..6]
  2613. * divisor = (N+1)*2^M
  2614. *
  2615. * Note: M *must* not be zero (causes asymetric duty cycle)
  2616. */
  2617. write_reg(info, (unsigned char) (channel + BGR),
  2618. (unsigned char) ((M << 6) + N));
  2619. val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f;
  2620. val |= ((M << 4) & 0xc0);
  2621. write_reg(info, (unsigned char) (channel + CCR2), val);
  2622. }
  2623. }
  2624. /* Enabled the AUX clock output at the specified frequency.
  2625. */
  2626. static void enable_auxclk(MGSLPC_INFO *info)
  2627. {
  2628. unsigned char val;
  2629. /* MODE
  2630. *
  2631. * 07..06 MDS[1..0] 10 = transparent HDLC mode
  2632. * 05 ADM Address Mode, 0 = no addr recognition
  2633. * 04 TMD Timer Mode, 0 = external
  2634. * 03 RAC Receiver Active, 0 = inactive
  2635. * 02 RTS 0=RTS active during xmit, 1=RTS always active
  2636. * 01 TRS Timer Resolution, 1=512
  2637. * 00 TLP Test Loop, 0 = no loop
  2638. *
  2639. * 1000 0010
  2640. */
  2641. val = 0x82;
  2642. /* channel B RTS is used to enable AUXCLK driver on SP505 */
  2643. if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
  2644. val |= BIT2;
  2645. write_reg(info, CHB + MODE, val);
  2646. /* CCR0
  2647. *
  2648. * 07 PU Power Up, 1=active, 0=power down
  2649. * 06 MCE Master Clock Enable, 1=enabled
  2650. * 05 Reserved, 0
  2651. * 04..02 SC[2..0] Encoding
  2652. * 01..00 SM[1..0] Serial Mode, 00=HDLC
  2653. *
  2654. * 11000000
  2655. */
  2656. write_reg(info, CHB + CCR0, 0xc0);
  2657. /* CCR1
  2658. *
  2659. * 07 SFLG Shared Flag, 0 = disable shared flags
  2660. * 06 GALP Go Active On Loop, 0 = not used
  2661. * 05 GLP Go On Loop, 0 = not used
  2662. * 04 ODS Output Driver Select, 1=TxD is push-pull output
  2663. * 03 ITF Interframe Time Fill, 0=mark, 1=flag
  2664. * 02..00 CM[2..0] Clock Mode
  2665. *
  2666. * 0001 0111
  2667. */
  2668. write_reg(info, CHB + CCR1, 0x17);
  2669. /* CCR2 (Channel B)
  2670. *
  2671. * 07..06 BGR[9..8] Baud rate bits 9..8
  2672. * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
  2673. * 04 SSEL Clock source select, 1=submode b
  2674. * 03 TOE 0=TxCLK is input, 1=TxCLK is output
  2675. * 02 RWX Read/Write Exchange 0=disabled
  2676. * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
  2677. * 00 DIV, data inversion 0=disabled, 1=enabled
  2678. *
  2679. * 0011 1000
  2680. */
  2681. if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
  2682. write_reg(info, CHB + CCR2, 0x38);
  2683. else
  2684. write_reg(info, CHB + CCR2, 0x30);
  2685. /* CCR4
  2686. *
  2687. * 07 MCK4 Master Clock Divide by 4, 1=enabled
  2688. * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
  2689. * 05 TST1 Test Pin, 0=normal operation
  2690. * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
  2691. * 03..02 Reserved, must be 0
  2692. * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
  2693. *
  2694. * 0101 0000
  2695. */
  2696. write_reg(info, CHB + CCR4, 0x50);
  2697. /* if auxclk not enabled, set internal BRG so
  2698. * CTS transitions can be detected (requires TxC)
  2699. */
  2700. if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
  2701. mgslpc_set_rate(info, CHB, info->params.clock_speed);
  2702. else
  2703. mgslpc_set_rate(info, CHB, 921600);
  2704. }
  2705. static void loopback_enable(MGSLPC_INFO *info)
  2706. {
  2707. unsigned char val;
  2708. /* CCR1:02..00 CM[2..0] Clock Mode = 111 (clock mode 7) */
  2709. val = read_reg(info, CHA + CCR1) | (BIT2 + BIT1 + BIT0);
  2710. write_reg(info, CHA + CCR1, val);
  2711. /* CCR2:04 SSEL Clock source select, 1=submode b */
  2712. val = read_reg(info, CHA + CCR2) | (BIT4 + BIT5);
  2713. write_reg(info, CHA + CCR2, val);
  2714. /* set LinkSpeed if available, otherwise default to 2Mbps */
  2715. if (info->params.clock_speed)
  2716. mgslpc_set_rate(info, CHA, info->params.clock_speed);
  2717. else
  2718. mgslpc_set_rate(info, CHA, 1843200);
  2719. /* MODE:00 TLP Test Loop, 1=loopback enabled */
  2720. val = read_reg(info, CHA + MODE) | BIT0;
  2721. write_reg(info, CHA + MODE, val);
  2722. }
  2723. void hdlc_mode(MGSLPC_INFO *info)
  2724. {
  2725. unsigned char val;
  2726. unsigned char clkmode, clksubmode;
  2727. /* disable all interrupts */
  2728. irq_disable(info, CHA, 0xffff);
  2729. irq_disable(info, CHB, 0xffff);
  2730. port_irq_disable(info, 0xff);
  2731. /* assume clock mode 0a, rcv=RxC xmt=TxC */
  2732. clkmode = clksubmode = 0;
  2733. if (info->params.flags & HDLC_FLAG_RXC_DPLL
  2734. && info->params.flags & HDLC_FLAG_TXC_DPLL) {
  2735. /* clock mode 7a, rcv = DPLL, xmt = DPLL */
  2736. clkmode = 7;
  2737. } else if (info->params.flags & HDLC_FLAG_RXC_BRG
  2738. && info->params.flags & HDLC_FLAG_TXC_BRG) {
  2739. /* clock mode 7b, rcv = BRG, xmt = BRG */
  2740. clkmode = 7;
  2741. clksubmode = 1;
  2742. } else if (info->params.flags & HDLC_FLAG_RXC_DPLL) {
  2743. if (info->params.flags & HDLC_FLAG_TXC_BRG) {
  2744. /* clock mode 6b, rcv = DPLL, xmt = BRG/16 */
  2745. clkmode = 6;
  2746. clksubmode = 1;
  2747. } else {
  2748. /* clock mode 6a, rcv = DPLL, xmt = TxC */
  2749. clkmode = 6;
  2750. }
  2751. } else if (info->params.flags & HDLC_FLAG_TXC_BRG) {
  2752. /* clock mode 0b, rcv = RxC, xmt = BRG */
  2753. clksubmode = 1;
  2754. }
  2755. /* MODE
  2756. *
  2757. * 07..06 MDS[1..0] 10 = transparent HDLC mode
  2758. * 05 ADM Address Mode, 0 = no addr recognition
  2759. * 04 TMD Timer Mode, 0 = external
  2760. * 03 RAC Receiver Active, 0 = inactive
  2761. * 02 RTS 0=RTS active during xmit, 1=RTS always active
  2762. * 01 TRS Timer Resolution, 1=512
  2763. * 00 TLP Test Loop, 0 = no loop
  2764. *
  2765. * 1000 0010
  2766. */
  2767. val = 0x82;
  2768. if (info->params.loopback)
  2769. val |= BIT0;
  2770. /* preserve RTS state */
  2771. if (info->serial_signals & SerialSignal_RTS)
  2772. val |= BIT2;
  2773. write_reg(info, CHA + MODE, val);
  2774. /* CCR0
  2775. *
  2776. * 07 PU Power Up, 1=active, 0=power down
  2777. * 06 MCE Master Clock Enable, 1=enabled
  2778. * 05 Reserved, 0
  2779. * 04..02 SC[2..0] Encoding
  2780. * 01..00 SM[1..0] Serial Mode, 00=HDLC
  2781. *
  2782. * 11000000
  2783. */
  2784. val = 0xc0;
  2785. switch (info->params.encoding)
  2786. {
  2787. case HDLC_ENCODING_NRZI:
  2788. val |= BIT3;
  2789. break;
  2790. case HDLC_ENCODING_BIPHASE_SPACE:
  2791. val |= BIT4;
  2792. break; // FM0
  2793. case HDLC_ENCODING_BIPHASE_MARK:
  2794. val |= BIT4 + BIT2;
  2795. break; // FM1
  2796. case HDLC_ENCODING_BIPHASE_LEVEL:
  2797. val |= BIT4 + BIT3;
  2798. break; // Manchester
  2799. }
  2800. write_reg(info, CHA + CCR0, val);
  2801. /* CCR1
  2802. *
  2803. * 07 SFLG Shared Flag, 0 = disable shared flags
  2804. * 06 GALP Go Active On Loop, 0 = not used
  2805. * 05 GLP Go On Loop, 0 = not used
  2806. * 04 ODS Output Driver Select, 1=TxD is push-pull output
  2807. * 03 ITF Interframe Time Fill, 0=mark, 1=flag
  2808. * 02..00 CM[2..0] Clock Mode
  2809. *
  2810. * 0001 0000
  2811. */
  2812. val = 0x10 + clkmode;
  2813. write_reg(info, CHA + CCR1, val);
  2814. /* CCR2
  2815. *
  2816. * 07..06 BGR[9..8] Baud rate bits 9..8
  2817. * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
  2818. * 04 SSEL Clock source select, 1=submode b
  2819. * 03 TOE 0=TxCLK is input, 0=TxCLK is input
  2820. * 02 RWX Read/Write Exchange 0=disabled
  2821. * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
  2822. * 00 DIV, data inversion 0=disabled, 1=enabled
  2823. *
  2824. * 0000 0000
  2825. */
  2826. val = 0x00;
  2827. if (clkmode == 2 || clkmode == 3 || clkmode == 6
  2828. || clkmode == 7 || (clkmode == 0 && clksubmode == 1))
  2829. val |= BIT5;
  2830. if (clksubmode)
  2831. val |= BIT4;
  2832. if (info->params.crc_type == HDLC_CRC_32_CCITT)
  2833. val |= BIT1;
  2834. if (info->params.encoding == HDLC_ENCODING_NRZB)
  2835. val |= BIT0;
  2836. write_reg(info, CHA + CCR2, val);
  2837. /* CCR3
  2838. *
  2839. * 07..06 PRE[1..0] Preamble count 00=1, 01=2, 10=4, 11=8
  2840. * 05 EPT Enable preamble transmission, 1=enabled
  2841. * 04 RADD Receive address pushed to FIFO, 0=disabled
  2842. * 03 CRL CRC Reset Level, 0=FFFF
  2843. * 02 RCRC Rx CRC 0=On 1=Off
  2844. * 01 TCRC Tx CRC 0=On 1=Off
  2845. * 00 PSD DPLL Phase Shift Disable
  2846. *
  2847. * 0000 0000
  2848. */
  2849. val = 0x00;
  2850. if (info->params.crc_type == HDLC_CRC_NONE)
  2851. val |= BIT2 + BIT1;
  2852. if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE)
  2853. val |= BIT5;
  2854. switch (info->params.preamble_length)
  2855. {
  2856. case HDLC_PREAMBLE_LENGTH_16BITS:
  2857. val |= BIT6;
  2858. break;
  2859. case HDLC_PREAMBLE_LENGTH_32BITS:
  2860. val |= BIT6;
  2861. break;
  2862. case HDLC_PREAMBLE_LENGTH_64BITS:
  2863. val |= BIT7 + BIT6;
  2864. break;
  2865. }
  2866. write_reg(info, CHA + CCR3, val);
  2867. /* PRE - Preamble pattern */
  2868. val = 0;
  2869. switch (info->params.preamble)
  2870. {
  2871. case HDLC_PREAMBLE_PATTERN_FLAGS: val = 0x7e; break;
  2872. case HDLC_PREAMBLE_PATTERN_10: val = 0xaa; break;
  2873. case HDLC_PREAMBLE_PATTERN_01: val = 0x55; break;
  2874. case HDLC_PREAMBLE_PATTERN_ONES: val = 0xff; break;
  2875. }
  2876. write_reg(info, CHA + PRE, val);
  2877. /* CCR4
  2878. *
  2879. * 07 MCK4 Master Clock Divide by 4, 1=enabled
  2880. * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
  2881. * 05 TST1 Test Pin, 0=normal operation
  2882. * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
  2883. * 03..02 Reserved, must be 0
  2884. * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
  2885. *
  2886. * 0101 0000
  2887. */
  2888. val = 0x50;
  2889. write_reg(info, CHA + CCR4, val);
  2890. if (info->params.flags & HDLC_FLAG_RXC_DPLL)
  2891. mgslpc_set_rate(info, CHA, info->params.clock_speed * 16);
  2892. else
  2893. mgslpc_set_rate(info, CHA, info->params.clock_speed);
  2894. /* RLCR Receive length check register
  2895. *
  2896. * 7 1=enable receive length check
  2897. * 6..0 Max frame length = (RL + 1) * 32
  2898. */
  2899. write_reg(info, CHA + RLCR, 0);
  2900. /* XBCH Transmit Byte Count High
  2901. *
  2902. * 07 DMA mode, 0 = interrupt driven
  2903. * 06 NRM, 0=ABM (ignored)
  2904. * 05 CAS Carrier Auto Start
  2905. * 04 XC Transmit Continuously (ignored)
  2906. * 03..00 XBC[10..8] Transmit byte count bits 10..8
  2907. *
  2908. * 0000 0000
  2909. */
  2910. val = 0x00;
  2911. if (info->params.flags & HDLC_FLAG_AUTO_DCD)
  2912. val |= BIT5;
  2913. write_reg(info, CHA + XBCH, val);
  2914. enable_auxclk(info);
  2915. if (info->params.loopback || info->testing_irq)
  2916. loopback_enable(info);
  2917. if (info->params.flags & HDLC_FLAG_AUTO_CTS)
  2918. {
  2919. irq_enable(info, CHB, IRQ_CTS);
  2920. /* PVR[3] 1=AUTO CTS active */
  2921. set_reg_bits(info, CHA + PVR, BIT3);
  2922. } else
  2923. clear_reg_bits(info, CHA + PVR, BIT3);
  2924. irq_enable(info, CHA,
  2925. IRQ_RXEOM + IRQ_RXFIFO + IRQ_ALLSENT +
  2926. IRQ_UNDERRUN + IRQ_TXFIFO);
  2927. issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
  2928. wait_command_complete(info, CHA);
  2929. read_reg16(info, CHA + ISR); /* clear pending IRQs */
  2930. /* Master clock mode enabled above to allow reset commands
  2931. * to complete even if no data clocks are present.
  2932. *
  2933. * Disable master clock mode for normal communications because
  2934. * V3.2 of the ESCC2 has a bug that prevents the transmit all sent
  2935. * IRQ when in master clock mode.
  2936. *
  2937. * Leave master clock mode enabled for IRQ test because the
  2938. * timer IRQ used by the test can only happen in master clock mode.
  2939. */
  2940. if (!info->testing_irq)
  2941. clear_reg_bits(info, CHA + CCR0, BIT6);
  2942. tx_set_idle(info);
  2943. tx_stop(info);
  2944. rx_stop(info);
  2945. }
  2946. void rx_stop(MGSLPC_INFO *info)
  2947. {
  2948. if (debug_level >= DEBUG_LEVEL_ISR)
  2949. printk("%s(%d):rx_stop(%s)\n",
  2950. __FILE__,__LINE__, info->device_name );
  2951. /* MODE:03 RAC Receiver Active, 0=inactive */
  2952. clear_reg_bits(info, CHA + MODE, BIT3);
  2953. info->rx_enabled = 0;
  2954. info->rx_overflow = 0;
  2955. }
  2956. void rx_start(MGSLPC_INFO *info)
  2957. {
  2958. if (debug_level >= DEBUG_LEVEL_ISR)
  2959. printk("%s(%d):rx_start(%s)\n",
  2960. __FILE__,__LINE__, info->device_name );
  2961. rx_reset_buffers(info);
  2962. info->rx_enabled = 0;
  2963. info->rx_overflow = 0;
  2964. /* MODE:03 RAC Receiver Active, 1=active */
  2965. set_reg_bits(info, CHA + MODE, BIT3);
  2966. info->rx_enabled = 1;
  2967. }
  2968. void tx_start(MGSLPC_INFO *info)
  2969. {
  2970. if (debug_level >= DEBUG_LEVEL_ISR)
  2971. printk("%s(%d):tx_start(%s)\n",
  2972. __FILE__,__LINE__, info->device_name );
  2973. if (info->tx_count) {
  2974. /* If auto RTS enabled and RTS is inactive, then assert */
  2975. /* RTS and set a flag indicating that the driver should */
  2976. /* negate RTS when the transmission completes. */
  2977. info->drop_rts_on_tx_done = 0;
  2978. if (info->params.flags & HDLC_FLAG_AUTO_RTS) {
  2979. get_signals(info);
  2980. if (!(info->serial_signals & SerialSignal_RTS)) {
  2981. info->serial_signals |= SerialSignal_RTS;
  2982. set_signals(info);
  2983. info->drop_rts_on_tx_done = 1;
  2984. }
  2985. }
  2986. if (info->params.mode == MGSL_MODE_ASYNC) {
  2987. if (!info->tx_active) {
  2988. info->tx_active = 1;
  2989. tx_ready(info);
  2990. }
  2991. } else {
  2992. info->tx_active = 1;
  2993. tx_ready(info);
  2994. info->tx_timer.expires = jiffies + msecs_to_jiffies(5000);
  2995. add_timer(&info->tx_timer);
  2996. }
  2997. }
  2998. if (!info->tx_enabled)
  2999. info->tx_enabled = 1;
  3000. }
  3001. void tx_stop(MGSLPC_INFO *info)
  3002. {
  3003. if (debug_level >= DEBUG_LEVEL_ISR)
  3004. printk("%s(%d):tx_stop(%s)\n",
  3005. __FILE__,__LINE__, info->device_name );
  3006. del_timer(&info->tx_timer);
  3007. info->tx_enabled = 0;
  3008. info->tx_active = 0;
  3009. }
  3010. /* Reset the adapter to a known state and prepare it for further use.
  3011. */
  3012. void reset_device(MGSLPC_INFO *info)
  3013. {
  3014. /* power up both channels (set BIT7) */
  3015. write_reg(info, CHA + CCR0, 0x80);
  3016. write_reg(info, CHB + CCR0, 0x80);
  3017. write_reg(info, CHA + MODE, 0);
  3018. write_reg(info, CHB + MODE, 0);
  3019. /* disable all interrupts */
  3020. irq_disable(info, CHA, 0xffff);
  3021. irq_disable(info, CHB, 0xffff);
  3022. port_irq_disable(info, 0xff);
  3023. /* PCR Port Configuration Register
  3024. *
  3025. * 07..04 DEC[3..0] Serial I/F select outputs
  3026. * 03 output, 1=AUTO CTS control enabled
  3027. * 02 RI Ring Indicator input 0=active
  3028. * 01 DSR input 0=active
  3029. * 00 DTR output 0=active
  3030. *
  3031. * 0000 0110
  3032. */
  3033. write_reg(info, PCR, 0x06);
  3034. /* PVR Port Value Register
  3035. *
  3036. * 07..04 DEC[3..0] Serial I/F select (0000=disabled)
  3037. * 03 AUTO CTS output 1=enabled
  3038. * 02 RI Ring Indicator input
  3039. * 01 DSR input
  3040. * 00 DTR output (1=inactive)
  3041. *
  3042. * 0000 0001
  3043. */
  3044. // write_reg(info, PVR, PVR_DTR);
  3045. /* IPC Interrupt Port Configuration
  3046. *
  3047. * 07 VIS 1=Masked interrupts visible
  3048. * 06..05 Reserved, 0
  3049. * 04..03 SLA Slave address, 00 ignored
  3050. * 02 CASM Cascading Mode, 1=daisy chain
  3051. * 01..00 IC[1..0] Interrupt Config, 01=push-pull output, active low
  3052. *
  3053. * 0000 0101
  3054. */
  3055. write_reg(info, IPC, 0x05);
  3056. }
  3057. void async_mode(MGSLPC_INFO *info)
  3058. {
  3059. unsigned char val;
  3060. /* disable all interrupts */
  3061. irq_disable(info, CHA, 0xffff);
  3062. irq_disable(info, CHB, 0xffff);
  3063. port_irq_disable(info, 0xff);
  3064. /* MODE
  3065. *
  3066. * 07 Reserved, 0
  3067. * 06 FRTS RTS State, 0=active
  3068. * 05 FCTS Flow Control on CTS
  3069. * 04 FLON Flow Control Enable
  3070. * 03 RAC Receiver Active, 0 = inactive
  3071. * 02 RTS 0=Auto RTS, 1=manual RTS
  3072. * 01 TRS Timer Resolution, 1=512
  3073. * 00 TLP Test Loop, 0 = no loop
  3074. *
  3075. * 0000 0110
  3076. */
  3077. val = 0x06;
  3078. if (info->params.loopback)
  3079. val |= BIT0;
  3080. /* preserve RTS state */
  3081. if (!(info->serial_signals & SerialSignal_RTS))
  3082. val |= BIT6;
  3083. write_reg(info, CHA + MODE, val);
  3084. /* CCR0
  3085. *
  3086. * 07 PU Power Up, 1=active, 0=power down
  3087. * 06 MCE Master Clock Enable, 1=enabled
  3088. * 05 Reserved, 0
  3089. * 04..02 SC[2..0] Encoding, 000=NRZ
  3090. * 01..00 SM[1..0] Serial Mode, 11=Async
  3091. *
  3092. * 1000 0011
  3093. */
  3094. write_reg(info, CHA + CCR0, 0x83);
  3095. /* CCR1
  3096. *
  3097. * 07..05 Reserved, 0
  3098. * 04 ODS Output Driver Select, 1=TxD is push-pull output
  3099. * 03 BCR Bit Clock Rate, 1=16x
  3100. * 02..00 CM[2..0] Clock Mode, 111=BRG
  3101. *
  3102. * 0001 1111
  3103. */
  3104. write_reg(info, CHA + CCR1, 0x1f);
  3105. /* CCR2 (channel A)
  3106. *
  3107. * 07..06 BGR[9..8] Baud rate bits 9..8
  3108. * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
  3109. * 04 SSEL Clock source select, 1=submode b
  3110. * 03 TOE 0=TxCLK is input, 0=TxCLK is input
  3111. * 02 RWX Read/Write Exchange 0=disabled
  3112. * 01 Reserved, 0
  3113. * 00 DIV, data inversion 0=disabled, 1=enabled
  3114. *
  3115. * 0001 0000
  3116. */
  3117. write_reg(info, CHA + CCR2, 0x10);
  3118. /* CCR3
  3119. *
  3120. * 07..01 Reserved, 0
  3121. * 00 PSD DPLL Phase Shift Disable
  3122. *
  3123. * 0000 0000
  3124. */
  3125. write_reg(info, CHA + CCR3, 0);
  3126. /* CCR4
  3127. *
  3128. * 07 MCK4 Master Clock Divide by 4, 1=enabled
  3129. * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
  3130. * 05 TST1 Test Pin, 0=normal operation
  3131. * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
  3132. * 03..00 Reserved, must be 0
  3133. *
  3134. * 0101 0000
  3135. */
  3136. write_reg(info, CHA + CCR4, 0x50);
  3137. mgslpc_set_rate(info, CHA, info->params.data_rate * 16);
  3138. /* DAFO Data Format
  3139. *
  3140. * 07 Reserved, 0
  3141. * 06 XBRK transmit break, 0=normal operation
  3142. * 05 Stop bits (0=1, 1=2)
  3143. * 04..03 PAR[1..0] Parity (01=odd, 10=even)
  3144. * 02 PAREN Parity Enable
  3145. * 01..00 CHL[1..0] Character Length (00=8, 01=7)
  3146. *
  3147. */
  3148. val = 0x00;
  3149. if (info->params.data_bits != 8)
  3150. val |= BIT0; /* 7 bits */
  3151. if (info->params.stop_bits != 1)
  3152. val |= BIT5;
  3153. if (info->params.parity != ASYNC_PARITY_NONE)
  3154. {
  3155. val |= BIT2; /* Parity enable */
  3156. if (info->params.parity == ASYNC_PARITY_ODD)
  3157. val |= BIT3;
  3158. else
  3159. val |= BIT4;
  3160. }
  3161. write_reg(info, CHA + DAFO, val);
  3162. /* RFC Rx FIFO Control
  3163. *
  3164. * 07 Reserved, 0
  3165. * 06 DPS, 1=parity bit not stored in data byte
  3166. * 05 DXS, 0=all data stored in FIFO (including XON/XOFF)
  3167. * 04 RFDF Rx FIFO Data Format, 1=status byte stored in FIFO
  3168. * 03..02 RFTH[1..0], rx threshold, 11=16 status + 16 data byte
  3169. * 01 Reserved, 0
  3170. * 00 TCDE Terminate Char Detect Enable, 0=disabled
  3171. *
  3172. * 0101 1100
  3173. */
  3174. write_reg(info, CHA + RFC, 0x5c);
  3175. /* RLCR Receive length check register
  3176. *
  3177. * Max frame length = (RL + 1) * 32
  3178. */
  3179. write_reg(info, CHA + RLCR, 0);
  3180. /* XBCH Transmit Byte Count High
  3181. *
  3182. * 07 DMA mode, 0 = interrupt driven
  3183. * 06 NRM, 0=ABM (ignored)
  3184. * 05 CAS Carrier Auto Start
  3185. * 04 XC Transmit Continuously (ignored)
  3186. * 03..00 XBC[10..8] Transmit byte count bits 10..8
  3187. *
  3188. * 0000 0000
  3189. */
  3190. val = 0x00;
  3191. if (info->params.flags & HDLC_FLAG_AUTO_DCD)
  3192. val |= BIT5;
  3193. write_reg(info, CHA + XBCH, val);
  3194. if (info->params.flags & HDLC_FLAG_AUTO_CTS)
  3195. irq_enable(info, CHA, IRQ_CTS);
  3196. /* MODE:03 RAC Receiver Active, 1=active */
  3197. set_reg_bits(info, CHA + MODE, BIT3);
  3198. enable_auxclk(info);
  3199. if (info->params.flags & HDLC_FLAG_AUTO_CTS) {
  3200. irq_enable(info, CHB, IRQ_CTS);
  3201. /* PVR[3] 1=AUTO CTS active */
  3202. set_reg_bits(info, CHA + PVR, BIT3);
  3203. } else
  3204. clear_reg_bits(info, CHA + PVR, BIT3);
  3205. irq_enable(info, CHA,
  3206. IRQ_RXEOM + IRQ_RXFIFO + IRQ_BREAK_ON + IRQ_RXTIME +
  3207. IRQ_ALLSENT + IRQ_TXFIFO);
  3208. issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
  3209. wait_command_complete(info, CHA);
  3210. read_reg16(info, CHA + ISR); /* clear pending IRQs */
  3211. }
  3212. /* Set the HDLC idle mode for the transmitter.
  3213. */
  3214. void tx_set_idle(MGSLPC_INFO *info)
  3215. {
  3216. /* Note: ESCC2 only supports flags and one idle modes */
  3217. if (info->idle_mode == HDLC_TXIDLE_FLAGS)
  3218. set_reg_bits(info, CHA + CCR1, BIT3);
  3219. else
  3220. clear_reg_bits(info, CHA + CCR1, BIT3);
  3221. }
  3222. /* get state of the V24 status (input) signals.
  3223. */
  3224. void get_signals(MGSLPC_INFO *info)
  3225. {
  3226. unsigned char status = 0;
  3227. /* preserve DTR and RTS */
  3228. info->serial_signals &= SerialSignal_DTR + SerialSignal_RTS;
  3229. if (read_reg(info, CHB + VSTR) & BIT7)
  3230. info->serial_signals |= SerialSignal_DCD;
  3231. if (read_reg(info, CHB + STAR) & BIT1)
  3232. info->serial_signals |= SerialSignal_CTS;
  3233. status = read_reg(info, CHA + PVR);
  3234. if (!(status & PVR_RI))
  3235. info->serial_signals |= SerialSignal_RI;
  3236. if (!(status & PVR_DSR))
  3237. info->serial_signals |= SerialSignal_DSR;
  3238. }
  3239. /* Set the state of DTR and RTS based on contents of
  3240. * serial_signals member of device extension.
  3241. */
  3242. void set_signals(MGSLPC_INFO *info)
  3243. {
  3244. unsigned char val;
  3245. val = read_reg(info, CHA + MODE);
  3246. if (info->params.mode == MGSL_MODE_ASYNC) {
  3247. if (info->serial_signals & SerialSignal_RTS)
  3248. val &= ~BIT6;
  3249. else
  3250. val |= BIT6;
  3251. } else {
  3252. if (info->serial_signals & SerialSignal_RTS)
  3253. val |= BIT2;
  3254. else
  3255. val &= ~BIT2;
  3256. }
  3257. write_reg(info, CHA + MODE, val);
  3258. if (info->serial_signals & SerialSignal_DTR)
  3259. clear_reg_bits(info, CHA + PVR, PVR_DTR);
  3260. else
  3261. set_reg_bits(info, CHA + PVR, PVR_DTR);
  3262. }
  3263. void rx_reset_buffers(MGSLPC_INFO *info)
  3264. {
  3265. RXBUF *buf;
  3266. int i;
  3267. info->rx_put = 0;
  3268. info->rx_get = 0;
  3269. info->rx_frame_count = 0;
  3270. for (i=0 ; i < info->rx_buf_count ; i++) {
  3271. buf = (RXBUF*)(info->rx_buf + (i * info->rx_buf_size));
  3272. buf->status = buf->count = 0;
  3273. }
  3274. }
  3275. /* Attempt to return a received HDLC frame
  3276. * Only frames received without errors are returned.
  3277. *
  3278. * Returns 1 if frame returned, otherwise 0
  3279. */
  3280. int rx_get_frame(MGSLPC_INFO *info)
  3281. {
  3282. unsigned short status;
  3283. RXBUF *buf;
  3284. unsigned int framesize = 0;
  3285. unsigned long flags;
  3286. struct tty_struct *tty = info->tty;
  3287. int return_frame = 0;
  3288. if (info->rx_frame_count == 0)
  3289. return 0;
  3290. buf = (RXBUF*)(info->rx_buf + (info->rx_get * info->rx_buf_size));
  3291. status = buf->status;
  3292. /* 07 VFR 1=valid frame
  3293. * 06 RDO 1=data overrun
  3294. * 05 CRC 1=OK, 0=error
  3295. * 04 RAB 1=frame aborted
  3296. */
  3297. if ((status & 0xf0) != 0xA0) {
  3298. if (!(status & BIT7) || (status & BIT4))
  3299. info->icount.rxabort++;
  3300. else if (status & BIT6)
  3301. info->icount.rxover++;
  3302. else if (!(status & BIT5)) {
  3303. info->icount.rxcrc++;
  3304. if (info->params.crc_type & HDLC_CRC_RETURN_EX)
  3305. return_frame = 1;
  3306. }
  3307. framesize = 0;
  3308. #ifdef CONFIG_HDLC
  3309. {
  3310. struct net_device_stats *stats = hdlc_stats(info->netdev);
  3311. stats->rx_errors++;
  3312. stats->rx_frame_errors++;
  3313. }
  3314. #endif
  3315. } else
  3316. return_frame = 1;
  3317. if (return_frame)
  3318. framesize = buf->count;
  3319. if (debug_level >= DEBUG_LEVEL_BH)
  3320. printk("%s(%d):rx_get_frame(%s) status=%04X size=%d\n",
  3321. __FILE__,__LINE__,info->device_name,status,framesize);
  3322. if (debug_level >= DEBUG_LEVEL_DATA)
  3323. trace_block(info, buf->data, framesize, 0);
  3324. if (framesize) {
  3325. if ((info->params.crc_type & HDLC_CRC_RETURN_EX &&
  3326. framesize+1 > info->max_frame_size) ||
  3327. framesize > info->max_frame_size)
  3328. info->icount.rxlong++;
  3329. else {
  3330. if (status & BIT5)
  3331. info->icount.rxok++;
  3332. if (info->params.crc_type & HDLC_CRC_RETURN_EX) {
  3333. *(buf->data + framesize) = status & BIT5 ? RX_OK:RX_CRC_ERROR;
  3334. ++framesize;
  3335. }
  3336. #ifdef CONFIG_HDLC
  3337. if (info->netcount)
  3338. hdlcdev_rx(info, buf->data, framesize);
  3339. else
  3340. #endif
  3341. ldisc_receive_buf(tty, buf->data, info->flag_buf, framesize);
  3342. }
  3343. }
  3344. spin_lock_irqsave(&info->lock,flags);
  3345. buf->status = buf->count = 0;
  3346. info->rx_frame_count--;
  3347. info->rx_get++;
  3348. if (info->rx_get >= info->rx_buf_count)
  3349. info->rx_get = 0;
  3350. spin_unlock_irqrestore(&info->lock,flags);
  3351. return 1;
  3352. }
  3353. BOOLEAN register_test(MGSLPC_INFO *info)
  3354. {
  3355. static unsigned char patterns[] =
  3356. { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f };
  3357. static unsigned int count = ARRAY_SIZE(patterns);
  3358. unsigned int i;
  3359. BOOLEAN rc = TRUE;
  3360. unsigned long flags;
  3361. spin_lock_irqsave(&info->lock,flags);
  3362. reset_device(info);
  3363. for (i = 0; i < count; i++) {
  3364. write_reg(info, XAD1, patterns[i]);
  3365. write_reg(info, XAD2, patterns[(i + 1) % count]);
  3366. if ((read_reg(info, XAD1) != patterns[i]) ||
  3367. (read_reg(info, XAD2) != patterns[(i + 1) % count])) {
  3368. rc = FALSE;
  3369. break;
  3370. }
  3371. }
  3372. spin_unlock_irqrestore(&info->lock,flags);
  3373. return rc;
  3374. }
  3375. BOOLEAN irq_test(MGSLPC_INFO *info)
  3376. {
  3377. unsigned long end_time;
  3378. unsigned long flags;
  3379. spin_lock_irqsave(&info->lock,flags);
  3380. reset_device(info);
  3381. info->testing_irq = TRUE;
  3382. hdlc_mode(info);
  3383. info->irq_occurred = FALSE;
  3384. /* init hdlc mode */
  3385. irq_enable(info, CHA, IRQ_TIMER);
  3386. write_reg(info, CHA + TIMR, 0); /* 512 cycles */
  3387. issue_command(info, CHA, CMD_START_TIMER);
  3388. spin_unlock_irqrestore(&info->lock,flags);
  3389. end_time=100;
  3390. while(end_time-- && !info->irq_occurred) {
  3391. msleep_interruptible(10);
  3392. }
  3393. info->testing_irq = FALSE;
  3394. spin_lock_irqsave(&info->lock,flags);
  3395. reset_device(info);
  3396. spin_unlock_irqrestore(&info->lock,flags);
  3397. return info->irq_occurred ? TRUE : FALSE;
  3398. }
  3399. int adapter_test(MGSLPC_INFO *info)
  3400. {
  3401. if (!register_test(info)) {
  3402. info->init_error = DiagStatus_AddressFailure;
  3403. printk( "%s(%d):Register test failure for device %s Addr=%04X\n",
  3404. __FILE__,__LINE__,info->device_name, (unsigned short)(info->io_base) );
  3405. return -ENODEV;
  3406. }
  3407. if (!irq_test(info)) {
  3408. info->init_error = DiagStatus_IrqFailure;
  3409. printk( "%s(%d):Interrupt test failure for device %s IRQ=%d\n",
  3410. __FILE__,__LINE__,info->device_name, (unsigned short)(info->irq_level) );
  3411. return -ENODEV;
  3412. }
  3413. if (debug_level >= DEBUG_LEVEL_INFO)
  3414. printk("%s(%d):device %s passed diagnostics\n",
  3415. __FILE__,__LINE__,info->device_name);
  3416. return 0;
  3417. }
  3418. void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit)
  3419. {
  3420. int i;
  3421. int linecount;
  3422. if (xmit)
  3423. printk("%s tx data:\n",info->device_name);
  3424. else
  3425. printk("%s rx data:\n",info->device_name);
  3426. while(count) {
  3427. if (count > 16)
  3428. linecount = 16;
  3429. else
  3430. linecount = count;
  3431. for(i=0;i<linecount;i++)
  3432. printk("%02X ",(unsigned char)data[i]);
  3433. for(;i<17;i++)
  3434. printk(" ");
  3435. for(i=0;i<linecount;i++) {
  3436. if (data[i]>=040 && data[i]<=0176)
  3437. printk("%c",data[i]);
  3438. else
  3439. printk(".");
  3440. }
  3441. printk("\n");
  3442. data += linecount;
  3443. count -= linecount;
  3444. }
  3445. }
  3446. /* HDLC frame time out
  3447. * update stats and do tx completion processing
  3448. */
  3449. void tx_timeout(unsigned long context)
  3450. {
  3451. MGSLPC_INFO *info = (MGSLPC_INFO*)context;
  3452. unsigned long flags;
  3453. if ( debug_level >= DEBUG_LEVEL_INFO )
  3454. printk( "%s(%d):tx_timeout(%s)\n",
  3455. __FILE__,__LINE__,info->device_name);
  3456. if(info->tx_active &&
  3457. info->params.mode == MGSL_MODE_HDLC) {
  3458. info->icount.txtimeout++;
  3459. }
  3460. spin_lock_irqsave(&info->lock,flags);
  3461. info->tx_active = 0;
  3462. info->tx_count = info->tx_put = info->tx_get = 0;
  3463. spin_unlock_irqrestore(&info->lock,flags);
  3464. #ifdef CONFIG_HDLC
  3465. if (info->netcount)
  3466. hdlcdev_tx_done(info);
  3467. else
  3468. #endif
  3469. bh_transmit(info);
  3470. }
  3471. #ifdef CONFIG_HDLC
  3472. /**
  3473. * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
  3474. * set encoding and frame check sequence (FCS) options
  3475. *
  3476. * dev pointer to network device structure
  3477. * encoding serial encoding setting
  3478. * parity FCS setting
  3479. *
  3480. * returns 0 if success, otherwise error code
  3481. */
  3482. static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
  3483. unsigned short parity)
  3484. {
  3485. MGSLPC_INFO *info = dev_to_port(dev);
  3486. unsigned char new_encoding;
  3487. unsigned short new_crctype;
  3488. /* return error if TTY interface open */
  3489. if (info->count)
  3490. return -EBUSY;
  3491. switch (encoding)
  3492. {
  3493. case ENCODING_NRZ: new_encoding = HDLC_ENCODING_NRZ; break;
  3494. case ENCODING_NRZI: new_encoding = HDLC_ENCODING_NRZI_SPACE; break;
  3495. case ENCODING_FM_MARK: new_encoding = HDLC_ENCODING_BIPHASE_MARK; break;
  3496. case ENCODING_FM_SPACE: new_encoding = HDLC_ENCODING_BIPHASE_SPACE; break;
  3497. case ENCODING_MANCHESTER: new_encoding = HDLC_ENCODING_BIPHASE_LEVEL; break;
  3498. default: return -EINVAL;
  3499. }
  3500. switch (parity)
  3501. {
  3502. case PARITY_NONE: new_crctype = HDLC_CRC_NONE; break;
  3503. case PARITY_CRC16_PR1_CCITT: new_crctype = HDLC_CRC_16_CCITT; break;
  3504. case PARITY_CRC32_PR1_CCITT: new_crctype = HDLC_CRC_32_CCITT; break;
  3505. default: return -EINVAL;
  3506. }
  3507. info->params.encoding = new_encoding;
  3508. info->params.crc_type = new_crctype;
  3509. /* if network interface up, reprogram hardware */
  3510. if (info->netcount)
  3511. mgslpc_program_hw(info);
  3512. return 0;
  3513. }
  3514. /**
  3515. * called by generic HDLC layer to send frame
  3516. *
  3517. * skb socket buffer containing HDLC frame
  3518. * dev pointer to network device structure
  3519. *
  3520. * returns 0 if success, otherwise error code
  3521. */
  3522. static int hdlcdev_xmit(struct sk_buff *skb, struct net_device *dev)
  3523. {
  3524. MGSLPC_INFO *info = dev_to_port(dev);
  3525. struct net_device_stats *stats = hdlc_stats(dev);
  3526. unsigned long flags;
  3527. if (debug_level >= DEBUG_LEVEL_INFO)
  3528. printk(KERN_INFO "%s:hdlc_xmit(%s)\n",__FILE__,dev->name);
  3529. /* stop sending until this frame completes */
  3530. netif_stop_queue(dev);
  3531. /* copy data to device buffers */
  3532. memcpy(info->tx_buf, skb->data, skb->len);
  3533. info->tx_get = 0;
  3534. info->tx_put = info->tx_count = skb->len;
  3535. /* update network statistics */
  3536. stats->tx_packets++;
  3537. stats->tx_bytes += skb->len;
  3538. /* done with socket buffer, so free it */
  3539. dev_kfree_skb(skb);
  3540. /* save start time for transmit timeout detection */
  3541. dev->trans_start = jiffies;
  3542. /* start hardware transmitter if necessary */
  3543. spin_lock_irqsave(&info->lock,flags);
  3544. if (!info->tx_active)
  3545. tx_start(info);
  3546. spin_unlock_irqrestore(&info->lock,flags);
  3547. return 0;
  3548. }
  3549. /**
  3550. * called by network layer when interface enabled
  3551. * claim resources and initialize hardware
  3552. *
  3553. * dev pointer to network device structure
  3554. *
  3555. * returns 0 if success, otherwise error code
  3556. */
  3557. static int hdlcdev_open(struct net_device *dev)
  3558. {
  3559. MGSLPC_INFO *info = dev_to_port(dev);
  3560. int rc;
  3561. unsigned long flags;
  3562. if (debug_level >= DEBUG_LEVEL_INFO)
  3563. printk("%s:hdlcdev_open(%s)\n",__FILE__,dev->name);
  3564. /* generic HDLC layer open processing */
  3565. if ((rc = hdlc_open(dev)))
  3566. return rc;
  3567. /* arbitrate between network and tty opens */
  3568. spin_lock_irqsave(&info->netlock, flags);
  3569. if (info->count != 0 || info->netcount != 0) {
  3570. printk(KERN_WARNING "%s: hdlc_open returning busy\n", dev->name);
  3571. spin_unlock_irqrestore(&info->netlock, flags);
  3572. return -EBUSY;
  3573. }
  3574. info->netcount=1;
  3575. spin_unlock_irqrestore(&info->netlock, flags);
  3576. /* claim resources and init adapter */
  3577. if ((rc = startup(info)) != 0) {
  3578. spin_lock_irqsave(&info->netlock, flags);
  3579. info->netcount=0;
  3580. spin_unlock_irqrestore(&info->netlock, flags);
  3581. return rc;
  3582. }
  3583. /* assert DTR and RTS, apply hardware settings */
  3584. info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
  3585. mgslpc_program_hw(info);
  3586. /* enable network layer transmit */
  3587. dev->trans_start = jiffies;
  3588. netif_start_queue(dev);
  3589. /* inform generic HDLC layer of current DCD status */
  3590. spin_lock_irqsave(&info->lock, flags);
  3591. get_signals(info);
  3592. spin_unlock_irqrestore(&info->lock, flags);
  3593. hdlc_set_carrier(info->serial_signals & SerialSignal_DCD, dev);
  3594. return 0;
  3595. }
  3596. /**
  3597. * called by network layer when interface is disabled
  3598. * shutdown hardware and release resources
  3599. *
  3600. * dev pointer to network device structure
  3601. *
  3602. * returns 0 if success, otherwise error code
  3603. */
  3604. static int hdlcdev_close(struct net_device *dev)
  3605. {
  3606. MGSLPC_INFO *info = dev_to_port(dev);
  3607. unsigned long flags;
  3608. if (debug_level >= DEBUG_LEVEL_INFO)
  3609. printk("%s:hdlcdev_close(%s)\n",__FILE__,dev->name);
  3610. netif_stop_queue(dev);
  3611. /* shutdown adapter and release resources */
  3612. shutdown(info);
  3613. hdlc_close(dev);
  3614. spin_lock_irqsave(&info->netlock, flags);
  3615. info->netcount=0;
  3616. spin_unlock_irqrestore(&info->netlock, flags);
  3617. return 0;
  3618. }
  3619. /**
  3620. * called by network layer to process IOCTL call to network device
  3621. *
  3622. * dev pointer to network device structure
  3623. * ifr pointer to network interface request structure
  3624. * cmd IOCTL command code
  3625. *
  3626. * returns 0 if success, otherwise error code
  3627. */
  3628. static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  3629. {
  3630. const size_t size = sizeof(sync_serial_settings);
  3631. sync_serial_settings new_line;
  3632. sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
  3633. MGSLPC_INFO *info = dev_to_port(dev);
  3634. unsigned int flags;
  3635. if (debug_level >= DEBUG_LEVEL_INFO)
  3636. printk("%s:hdlcdev_ioctl(%s)\n",__FILE__,dev->name);
  3637. /* return error if TTY interface open */
  3638. if (info->count)
  3639. return -EBUSY;
  3640. if (cmd != SIOCWANDEV)
  3641. return hdlc_ioctl(dev, ifr, cmd);
  3642. switch(ifr->ifr_settings.type) {
  3643. case IF_GET_IFACE: /* return current sync_serial_settings */
  3644. ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
  3645. if (ifr->ifr_settings.size < size) {
  3646. ifr->ifr_settings.size = size; /* data size wanted */
  3647. return -ENOBUFS;
  3648. }
  3649. flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
  3650. HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
  3651. HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
  3652. HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
  3653. switch (flags){
  3654. case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
  3655. case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break;
  3656. case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break;
  3657. case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
  3658. default: new_line.clock_type = CLOCK_DEFAULT;
  3659. }
  3660. new_line.clock_rate = info->params.clock_speed;
  3661. new_line.loopback = info->params.loopback ? 1:0;
  3662. if (copy_to_user(line, &new_line, size))
  3663. return -EFAULT;
  3664. return 0;
  3665. case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */
  3666. if(!capable(CAP_NET_ADMIN))
  3667. return -EPERM;
  3668. if (copy_from_user(&new_line, line, size))
  3669. return -EFAULT;
  3670. switch (new_line.clock_type)
  3671. {
  3672. case CLOCK_EXT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN; break;
  3673. case CLOCK_TXFROMRX: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN; break;
  3674. case CLOCK_INT: flags = HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG; break;
  3675. case CLOCK_TXINT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG; break;
  3676. case CLOCK_DEFAULT: flags = info->params.flags &
  3677. (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
  3678. HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
  3679. HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
  3680. HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN); break;
  3681. default: return -EINVAL;
  3682. }
  3683. if (new_line.loopback != 0 && new_line.loopback != 1)
  3684. return -EINVAL;
  3685. info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
  3686. HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
  3687. HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
  3688. HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
  3689. info->params.flags |= flags;
  3690. info->params.loopback = new_line.loopback;
  3691. if (flags & (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG))
  3692. info->params.clock_speed = new_line.clock_rate;
  3693. else
  3694. info->params.clock_speed = 0;
  3695. /* if network interface up, reprogram hardware */
  3696. if (info->netcount)
  3697. mgslpc_program_hw(info);
  3698. return 0;
  3699. default:
  3700. return hdlc_ioctl(dev, ifr, cmd);
  3701. }
  3702. }
  3703. /**
  3704. * called by network layer when transmit timeout is detected
  3705. *
  3706. * dev pointer to network device structure
  3707. */
  3708. static void hdlcdev_tx_timeout(struct net_device *dev)
  3709. {
  3710. MGSLPC_INFO *info = dev_to_port(dev);
  3711. struct net_device_stats *stats = hdlc_stats(dev);
  3712. unsigned long flags;
  3713. if (debug_level >= DEBUG_LEVEL_INFO)
  3714. printk("hdlcdev_tx_timeout(%s)\n",dev->name);
  3715. stats->tx_errors++;
  3716. stats->tx_aborted_errors++;
  3717. spin_lock_irqsave(&info->lock,flags);
  3718. tx_stop(info);
  3719. spin_unlock_irqrestore(&info->lock,flags);
  3720. netif_wake_queue(dev);
  3721. }
  3722. /**
  3723. * called by device driver when transmit completes
  3724. * reenable network layer transmit if stopped
  3725. *
  3726. * info pointer to device instance information
  3727. */
  3728. static void hdlcdev_tx_done(MGSLPC_INFO *info)
  3729. {
  3730. if (netif_queue_stopped(info->netdev))
  3731. netif_wake_queue(info->netdev);
  3732. }
  3733. /**
  3734. * called by device driver when frame received
  3735. * pass frame to network layer
  3736. *
  3737. * info pointer to device instance information
  3738. * buf pointer to buffer contianing frame data
  3739. * size count of data bytes in buf
  3740. */
  3741. static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size)
  3742. {
  3743. struct sk_buff *skb = dev_alloc_skb(size);
  3744. struct net_device *dev = info->netdev;
  3745. struct net_device_stats *stats = hdlc_stats(dev);
  3746. if (debug_level >= DEBUG_LEVEL_INFO)
  3747. printk("hdlcdev_rx(%s)\n",dev->name);
  3748. if (skb == NULL) {
  3749. printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name);
  3750. stats->rx_dropped++;
  3751. return;
  3752. }
  3753. memcpy(skb_put(skb, size),buf,size);
  3754. skb->protocol = hdlc_type_trans(skb, info->netdev);
  3755. stats->rx_packets++;
  3756. stats->rx_bytes += size;
  3757. netif_rx(skb);
  3758. info->netdev->last_rx = jiffies;
  3759. }
  3760. /**
  3761. * called by device driver when adding device instance
  3762. * do generic HDLC initialization
  3763. *
  3764. * info pointer to device instance information
  3765. *
  3766. * returns 0 if success, otherwise error code
  3767. */
  3768. static int hdlcdev_init(MGSLPC_INFO *info)
  3769. {
  3770. int rc;
  3771. struct net_device *dev;
  3772. hdlc_device *hdlc;
  3773. /* allocate and initialize network and HDLC layer objects */
  3774. if (!(dev = alloc_hdlcdev(info))) {
  3775. printk(KERN_ERR "%s:hdlc device allocation failure\n",__FILE__);
  3776. return -ENOMEM;
  3777. }
  3778. /* for network layer reporting purposes only */
  3779. dev->base_addr = info->io_base;
  3780. dev->irq = info->irq_level;
  3781. /* network layer callbacks and settings */
  3782. dev->do_ioctl = hdlcdev_ioctl;
  3783. dev->open = hdlcdev_open;
  3784. dev->stop = hdlcdev_close;
  3785. dev->tx_timeout = hdlcdev_tx_timeout;
  3786. dev->watchdog_timeo = 10*HZ;
  3787. dev->tx_queue_len = 50;
  3788. /* generic HDLC layer callbacks and settings */
  3789. hdlc = dev_to_hdlc(dev);
  3790. hdlc->attach = hdlcdev_attach;
  3791. hdlc->xmit = hdlcdev_xmit;
  3792. /* register objects with HDLC layer */
  3793. if ((rc = register_hdlc_device(dev))) {
  3794. printk(KERN_WARNING "%s:unable to register hdlc device\n",__FILE__);
  3795. free_netdev(dev);
  3796. return rc;
  3797. }
  3798. info->netdev = dev;
  3799. return 0;
  3800. }
  3801. /**
  3802. * called by device driver when removing device instance
  3803. * do generic HDLC cleanup
  3804. *
  3805. * info pointer to device instance information
  3806. */
  3807. static void hdlcdev_exit(MGSLPC_INFO *info)
  3808. {
  3809. unregister_hdlc_device(info->netdev);
  3810. free_netdev(info->netdev);
  3811. info->netdev = NULL;
  3812. }
  3813. #endif /* CONFIG_HDLC */