common.c 21 KB

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  1. /*
  2. * arch/arm/mach-kirkwood/common.c
  3. *
  4. * Core functions for Marvell Kirkwood SoCs
  5. *
  6. * This file is licensed under the terms of the GNU General Public
  7. * License version 2. This program is licensed "as is" without any
  8. * warranty of any kind, whether express or implied.
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/init.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/serial_8250.h>
  14. #include <linux/mbus.h>
  15. #include <linux/mv643xx_eth.h>
  16. #include <linux/mv643xx_i2c.h>
  17. #include <linux/ata_platform.h>
  18. #include <linux/mtd/nand.h>
  19. #include <linux/spi/orion_spi.h>
  20. #include <net/dsa.h>
  21. #include <asm/page.h>
  22. #include <asm/timex.h>
  23. #include <asm/mach/map.h>
  24. #include <asm/mach/time.h>
  25. #include <mach/kirkwood.h>
  26. #include <mach/bridge-regs.h>
  27. #include <plat/cache-feroceon-l2.h>
  28. #include <plat/ehci-orion.h>
  29. #include <plat/mvsdio.h>
  30. #include <plat/mv_xor.h>
  31. #include <plat/orion_nand.h>
  32. #include <plat/time.h>
  33. #include "common.h"
  34. /*****************************************************************************
  35. * I/O Address Mapping
  36. ****************************************************************************/
  37. static struct map_desc kirkwood_io_desc[] __initdata = {
  38. {
  39. .virtual = KIRKWOOD_PCIE_IO_VIRT_BASE,
  40. .pfn = __phys_to_pfn(KIRKWOOD_PCIE_IO_PHYS_BASE),
  41. .length = KIRKWOOD_PCIE_IO_SIZE,
  42. .type = MT_DEVICE,
  43. }, {
  44. .virtual = KIRKWOOD_REGS_VIRT_BASE,
  45. .pfn = __phys_to_pfn(KIRKWOOD_REGS_PHYS_BASE),
  46. .length = KIRKWOOD_REGS_SIZE,
  47. .type = MT_DEVICE,
  48. },
  49. };
  50. void __init kirkwood_map_io(void)
  51. {
  52. iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc));
  53. }
  54. /*****************************************************************************
  55. * EHCI
  56. ****************************************************************************/
  57. static struct orion_ehci_data kirkwood_ehci_data = {
  58. .dram = &kirkwood_mbus_dram_info,
  59. .phy_version = EHCI_PHY_NA,
  60. };
  61. static u64 ehci_dmamask = 0xffffffffUL;
  62. /*****************************************************************************
  63. * EHCI0
  64. ****************************************************************************/
  65. static struct resource kirkwood_ehci_resources[] = {
  66. {
  67. .start = USB_PHYS_BASE,
  68. .end = USB_PHYS_BASE + 0x0fff,
  69. .flags = IORESOURCE_MEM,
  70. }, {
  71. .start = IRQ_KIRKWOOD_USB,
  72. .end = IRQ_KIRKWOOD_USB,
  73. .flags = IORESOURCE_IRQ,
  74. },
  75. };
  76. static struct platform_device kirkwood_ehci = {
  77. .name = "orion-ehci",
  78. .id = 0,
  79. .dev = {
  80. .dma_mask = &ehci_dmamask,
  81. .coherent_dma_mask = 0xffffffff,
  82. .platform_data = &kirkwood_ehci_data,
  83. },
  84. .resource = kirkwood_ehci_resources,
  85. .num_resources = ARRAY_SIZE(kirkwood_ehci_resources),
  86. };
  87. void __init kirkwood_ehci_init(void)
  88. {
  89. platform_device_register(&kirkwood_ehci);
  90. }
  91. /*****************************************************************************
  92. * GE00
  93. ****************************************************************************/
  94. struct mv643xx_eth_shared_platform_data kirkwood_ge00_shared_data = {
  95. .dram = &kirkwood_mbus_dram_info,
  96. };
  97. static struct resource kirkwood_ge00_shared_resources[] = {
  98. {
  99. .name = "ge00 base",
  100. .start = GE00_PHYS_BASE + 0x2000,
  101. .end = GE00_PHYS_BASE + 0x3fff,
  102. .flags = IORESOURCE_MEM,
  103. }, {
  104. .name = "ge00 err irq",
  105. .start = IRQ_KIRKWOOD_GE00_ERR,
  106. .end = IRQ_KIRKWOOD_GE00_ERR,
  107. .flags = IORESOURCE_IRQ,
  108. },
  109. };
  110. static struct platform_device kirkwood_ge00_shared = {
  111. .name = MV643XX_ETH_SHARED_NAME,
  112. .id = 0,
  113. .dev = {
  114. .platform_data = &kirkwood_ge00_shared_data,
  115. },
  116. .num_resources = ARRAY_SIZE(kirkwood_ge00_shared_resources),
  117. .resource = kirkwood_ge00_shared_resources,
  118. };
  119. static struct resource kirkwood_ge00_resources[] = {
  120. {
  121. .name = "ge00 irq",
  122. .start = IRQ_KIRKWOOD_GE00_SUM,
  123. .end = IRQ_KIRKWOOD_GE00_SUM,
  124. .flags = IORESOURCE_IRQ,
  125. },
  126. };
  127. static struct platform_device kirkwood_ge00 = {
  128. .name = MV643XX_ETH_NAME,
  129. .id = 0,
  130. .num_resources = 1,
  131. .resource = kirkwood_ge00_resources,
  132. .dev = {
  133. .coherent_dma_mask = 0xffffffff,
  134. },
  135. };
  136. void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
  137. {
  138. eth_data->shared = &kirkwood_ge00_shared;
  139. kirkwood_ge00.dev.platform_data = eth_data;
  140. platform_device_register(&kirkwood_ge00_shared);
  141. platform_device_register(&kirkwood_ge00);
  142. }
  143. /*****************************************************************************
  144. * GE01
  145. ****************************************************************************/
  146. struct mv643xx_eth_shared_platform_data kirkwood_ge01_shared_data = {
  147. .dram = &kirkwood_mbus_dram_info,
  148. .shared_smi = &kirkwood_ge00_shared,
  149. };
  150. static struct resource kirkwood_ge01_shared_resources[] = {
  151. {
  152. .name = "ge01 base",
  153. .start = GE01_PHYS_BASE + 0x2000,
  154. .end = GE01_PHYS_BASE + 0x3fff,
  155. .flags = IORESOURCE_MEM,
  156. }, {
  157. .name = "ge01 err irq",
  158. .start = IRQ_KIRKWOOD_GE01_ERR,
  159. .end = IRQ_KIRKWOOD_GE01_ERR,
  160. .flags = IORESOURCE_IRQ,
  161. },
  162. };
  163. static struct platform_device kirkwood_ge01_shared = {
  164. .name = MV643XX_ETH_SHARED_NAME,
  165. .id = 1,
  166. .dev = {
  167. .platform_data = &kirkwood_ge01_shared_data,
  168. },
  169. .num_resources = ARRAY_SIZE(kirkwood_ge01_shared_resources),
  170. .resource = kirkwood_ge01_shared_resources,
  171. };
  172. static struct resource kirkwood_ge01_resources[] = {
  173. {
  174. .name = "ge01 irq",
  175. .start = IRQ_KIRKWOOD_GE01_SUM,
  176. .end = IRQ_KIRKWOOD_GE01_SUM,
  177. .flags = IORESOURCE_IRQ,
  178. },
  179. };
  180. static struct platform_device kirkwood_ge01 = {
  181. .name = MV643XX_ETH_NAME,
  182. .id = 1,
  183. .num_resources = 1,
  184. .resource = kirkwood_ge01_resources,
  185. .dev = {
  186. .coherent_dma_mask = 0xffffffff,
  187. },
  188. };
  189. void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data)
  190. {
  191. eth_data->shared = &kirkwood_ge01_shared;
  192. kirkwood_ge01.dev.platform_data = eth_data;
  193. platform_device_register(&kirkwood_ge01_shared);
  194. platform_device_register(&kirkwood_ge01);
  195. }
  196. /*****************************************************************************
  197. * Ethernet switch
  198. ****************************************************************************/
  199. static struct resource kirkwood_switch_resources[] = {
  200. {
  201. .start = 0,
  202. .end = 0,
  203. .flags = IORESOURCE_IRQ,
  204. },
  205. };
  206. static struct platform_device kirkwood_switch_device = {
  207. .name = "dsa",
  208. .id = 0,
  209. .num_resources = 0,
  210. .resource = kirkwood_switch_resources,
  211. };
  212. void __init kirkwood_ge00_switch_init(struct dsa_platform_data *d, int irq)
  213. {
  214. int i;
  215. if (irq != NO_IRQ) {
  216. kirkwood_switch_resources[0].start = irq;
  217. kirkwood_switch_resources[0].end = irq;
  218. kirkwood_switch_device.num_resources = 1;
  219. }
  220. d->netdev = &kirkwood_ge00.dev;
  221. for (i = 0; i < d->nr_chips; i++)
  222. d->chip[i].mii_bus = &kirkwood_ge00_shared.dev;
  223. kirkwood_switch_device.dev.platform_data = d;
  224. platform_device_register(&kirkwood_switch_device);
  225. }
  226. /*****************************************************************************
  227. * NAND flash
  228. ****************************************************************************/
  229. static struct resource kirkwood_nand_resource = {
  230. .flags = IORESOURCE_MEM,
  231. .start = KIRKWOOD_NAND_MEM_PHYS_BASE,
  232. .end = KIRKWOOD_NAND_MEM_PHYS_BASE +
  233. KIRKWOOD_NAND_MEM_SIZE - 1,
  234. };
  235. static struct orion_nand_data kirkwood_nand_data = {
  236. .cle = 0,
  237. .ale = 1,
  238. .width = 8,
  239. };
  240. static struct platform_device kirkwood_nand_flash = {
  241. .name = "orion_nand",
  242. .id = -1,
  243. .dev = {
  244. .platform_data = &kirkwood_nand_data,
  245. },
  246. .resource = &kirkwood_nand_resource,
  247. .num_resources = 1,
  248. };
  249. void __init kirkwood_nand_init(struct mtd_partition *parts, int nr_parts,
  250. int chip_delay)
  251. {
  252. kirkwood_nand_data.parts = parts;
  253. kirkwood_nand_data.nr_parts = nr_parts;
  254. kirkwood_nand_data.chip_delay = chip_delay;
  255. platform_device_register(&kirkwood_nand_flash);
  256. }
  257. /*****************************************************************************
  258. * SoC RTC
  259. ****************************************************************************/
  260. static struct resource kirkwood_rtc_resource = {
  261. .start = RTC_PHYS_BASE,
  262. .end = RTC_PHYS_BASE + SZ_16 - 1,
  263. .flags = IORESOURCE_MEM,
  264. };
  265. static void __init kirkwood_rtc_init(void)
  266. {
  267. platform_device_register_simple("rtc-mv", -1, &kirkwood_rtc_resource, 1);
  268. }
  269. /*****************************************************************************
  270. * SATA
  271. ****************************************************************************/
  272. static struct resource kirkwood_sata_resources[] = {
  273. {
  274. .name = "sata base",
  275. .start = SATA_PHYS_BASE,
  276. .end = SATA_PHYS_BASE + 0x5000 - 1,
  277. .flags = IORESOURCE_MEM,
  278. }, {
  279. .name = "sata irq",
  280. .start = IRQ_KIRKWOOD_SATA,
  281. .end = IRQ_KIRKWOOD_SATA,
  282. .flags = IORESOURCE_IRQ,
  283. },
  284. };
  285. static struct platform_device kirkwood_sata = {
  286. .name = "sata_mv",
  287. .id = 0,
  288. .dev = {
  289. .coherent_dma_mask = 0xffffffff,
  290. },
  291. .num_resources = ARRAY_SIZE(kirkwood_sata_resources),
  292. .resource = kirkwood_sata_resources,
  293. };
  294. void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data)
  295. {
  296. sata_data->dram = &kirkwood_mbus_dram_info;
  297. kirkwood_sata.dev.platform_data = sata_data;
  298. platform_device_register(&kirkwood_sata);
  299. }
  300. /*****************************************************************************
  301. * SD/SDIO/MMC
  302. ****************************************************************************/
  303. static struct resource mvsdio_resources[] = {
  304. [0] = {
  305. .start = SDIO_PHYS_BASE,
  306. .end = SDIO_PHYS_BASE + SZ_1K - 1,
  307. .flags = IORESOURCE_MEM,
  308. },
  309. [1] = {
  310. .start = IRQ_KIRKWOOD_SDIO,
  311. .end = IRQ_KIRKWOOD_SDIO,
  312. .flags = IORESOURCE_IRQ,
  313. },
  314. };
  315. static u64 mvsdio_dmamask = 0xffffffffUL;
  316. static struct platform_device kirkwood_sdio = {
  317. .name = "mvsdio",
  318. .id = -1,
  319. .dev = {
  320. .dma_mask = &mvsdio_dmamask,
  321. .coherent_dma_mask = 0xffffffff,
  322. },
  323. .num_resources = ARRAY_SIZE(mvsdio_resources),
  324. .resource = mvsdio_resources,
  325. };
  326. void __init kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data)
  327. {
  328. u32 dev, rev;
  329. kirkwood_pcie_id(&dev, &rev);
  330. if (rev == 0) /* catch all Kirkwood Z0's */
  331. mvsdio_data->clock = 100000000;
  332. else
  333. mvsdio_data->clock = 200000000;
  334. mvsdio_data->dram = &kirkwood_mbus_dram_info;
  335. kirkwood_sdio.dev.platform_data = mvsdio_data;
  336. platform_device_register(&kirkwood_sdio);
  337. }
  338. /*****************************************************************************
  339. * SPI
  340. ****************************************************************************/
  341. static struct orion_spi_info kirkwood_spi_plat_data = {
  342. };
  343. static struct resource kirkwood_spi_resources[] = {
  344. {
  345. .start = SPI_PHYS_BASE,
  346. .end = SPI_PHYS_BASE + SZ_512 - 1,
  347. .flags = IORESOURCE_MEM,
  348. },
  349. };
  350. static struct platform_device kirkwood_spi = {
  351. .name = "orion_spi",
  352. .id = 0,
  353. .resource = kirkwood_spi_resources,
  354. .dev = {
  355. .platform_data = &kirkwood_spi_plat_data,
  356. },
  357. .num_resources = ARRAY_SIZE(kirkwood_spi_resources),
  358. };
  359. void __init kirkwood_spi_init()
  360. {
  361. platform_device_register(&kirkwood_spi);
  362. }
  363. /*****************************************************************************
  364. * I2C
  365. ****************************************************************************/
  366. static struct mv64xxx_i2c_pdata kirkwood_i2c_pdata = {
  367. .freq_m = 8, /* assumes 166 MHz TCLK */
  368. .freq_n = 3,
  369. .timeout = 1000, /* Default timeout of 1 second */
  370. };
  371. static struct resource kirkwood_i2c_resources[] = {
  372. {
  373. .start = I2C_PHYS_BASE,
  374. .end = I2C_PHYS_BASE + 0x1f,
  375. .flags = IORESOURCE_MEM,
  376. }, {
  377. .start = IRQ_KIRKWOOD_TWSI,
  378. .end = IRQ_KIRKWOOD_TWSI,
  379. .flags = IORESOURCE_IRQ,
  380. },
  381. };
  382. static struct platform_device kirkwood_i2c = {
  383. .name = MV64XXX_I2C_CTLR_NAME,
  384. .id = 0,
  385. .num_resources = ARRAY_SIZE(kirkwood_i2c_resources),
  386. .resource = kirkwood_i2c_resources,
  387. .dev = {
  388. .platform_data = &kirkwood_i2c_pdata,
  389. },
  390. };
  391. void __init kirkwood_i2c_init(void)
  392. {
  393. platform_device_register(&kirkwood_i2c);
  394. }
  395. /*****************************************************************************
  396. * UART0
  397. ****************************************************************************/
  398. static struct plat_serial8250_port kirkwood_uart0_data[] = {
  399. {
  400. .mapbase = UART0_PHYS_BASE,
  401. .membase = (char *)UART0_VIRT_BASE,
  402. .irq = IRQ_KIRKWOOD_UART_0,
  403. .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
  404. .iotype = UPIO_MEM,
  405. .regshift = 2,
  406. .uartclk = 0,
  407. }, {
  408. },
  409. };
  410. static struct resource kirkwood_uart0_resources[] = {
  411. {
  412. .start = UART0_PHYS_BASE,
  413. .end = UART0_PHYS_BASE + 0xff,
  414. .flags = IORESOURCE_MEM,
  415. }, {
  416. .start = IRQ_KIRKWOOD_UART_0,
  417. .end = IRQ_KIRKWOOD_UART_0,
  418. .flags = IORESOURCE_IRQ,
  419. },
  420. };
  421. static struct platform_device kirkwood_uart0 = {
  422. .name = "serial8250",
  423. .id = 0,
  424. .dev = {
  425. .platform_data = kirkwood_uart0_data,
  426. },
  427. .resource = kirkwood_uart0_resources,
  428. .num_resources = ARRAY_SIZE(kirkwood_uart0_resources),
  429. };
  430. void __init kirkwood_uart0_init(void)
  431. {
  432. platform_device_register(&kirkwood_uart0);
  433. }
  434. /*****************************************************************************
  435. * UART1
  436. ****************************************************************************/
  437. static struct plat_serial8250_port kirkwood_uart1_data[] = {
  438. {
  439. .mapbase = UART1_PHYS_BASE,
  440. .membase = (char *)UART1_VIRT_BASE,
  441. .irq = IRQ_KIRKWOOD_UART_1,
  442. .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
  443. .iotype = UPIO_MEM,
  444. .regshift = 2,
  445. .uartclk = 0,
  446. }, {
  447. },
  448. };
  449. static struct resource kirkwood_uart1_resources[] = {
  450. {
  451. .start = UART1_PHYS_BASE,
  452. .end = UART1_PHYS_BASE + 0xff,
  453. .flags = IORESOURCE_MEM,
  454. }, {
  455. .start = IRQ_KIRKWOOD_UART_1,
  456. .end = IRQ_KIRKWOOD_UART_1,
  457. .flags = IORESOURCE_IRQ,
  458. },
  459. };
  460. static struct platform_device kirkwood_uart1 = {
  461. .name = "serial8250",
  462. .id = 1,
  463. .dev = {
  464. .platform_data = kirkwood_uart1_data,
  465. },
  466. .resource = kirkwood_uart1_resources,
  467. .num_resources = ARRAY_SIZE(kirkwood_uart1_resources),
  468. };
  469. void __init kirkwood_uart1_init(void)
  470. {
  471. platform_device_register(&kirkwood_uart1);
  472. }
  473. /*****************************************************************************
  474. * XOR
  475. ****************************************************************************/
  476. static struct mv_xor_platform_shared_data kirkwood_xor_shared_data = {
  477. .dram = &kirkwood_mbus_dram_info,
  478. };
  479. static u64 kirkwood_xor_dmamask = DMA_BIT_MASK(32);
  480. /*****************************************************************************
  481. * XOR0
  482. ****************************************************************************/
  483. static struct resource kirkwood_xor0_shared_resources[] = {
  484. {
  485. .name = "xor 0 low",
  486. .start = XOR0_PHYS_BASE,
  487. .end = XOR0_PHYS_BASE + 0xff,
  488. .flags = IORESOURCE_MEM,
  489. }, {
  490. .name = "xor 0 high",
  491. .start = XOR0_HIGH_PHYS_BASE,
  492. .end = XOR0_HIGH_PHYS_BASE + 0xff,
  493. .flags = IORESOURCE_MEM,
  494. },
  495. };
  496. static struct platform_device kirkwood_xor0_shared = {
  497. .name = MV_XOR_SHARED_NAME,
  498. .id = 0,
  499. .dev = {
  500. .platform_data = &kirkwood_xor_shared_data,
  501. },
  502. .num_resources = ARRAY_SIZE(kirkwood_xor0_shared_resources),
  503. .resource = kirkwood_xor0_shared_resources,
  504. };
  505. static struct resource kirkwood_xor00_resources[] = {
  506. [0] = {
  507. .start = IRQ_KIRKWOOD_XOR_00,
  508. .end = IRQ_KIRKWOOD_XOR_00,
  509. .flags = IORESOURCE_IRQ,
  510. },
  511. };
  512. static struct mv_xor_platform_data kirkwood_xor00_data = {
  513. .shared = &kirkwood_xor0_shared,
  514. .hw_id = 0,
  515. .pool_size = PAGE_SIZE,
  516. };
  517. static struct platform_device kirkwood_xor00_channel = {
  518. .name = MV_XOR_NAME,
  519. .id = 0,
  520. .num_resources = ARRAY_SIZE(kirkwood_xor00_resources),
  521. .resource = kirkwood_xor00_resources,
  522. .dev = {
  523. .dma_mask = &kirkwood_xor_dmamask,
  524. .coherent_dma_mask = DMA_BIT_MASK(64),
  525. .platform_data = (void *)&kirkwood_xor00_data,
  526. },
  527. };
  528. static struct resource kirkwood_xor01_resources[] = {
  529. [0] = {
  530. .start = IRQ_KIRKWOOD_XOR_01,
  531. .end = IRQ_KIRKWOOD_XOR_01,
  532. .flags = IORESOURCE_IRQ,
  533. },
  534. };
  535. static struct mv_xor_platform_data kirkwood_xor01_data = {
  536. .shared = &kirkwood_xor0_shared,
  537. .hw_id = 1,
  538. .pool_size = PAGE_SIZE,
  539. };
  540. static struct platform_device kirkwood_xor01_channel = {
  541. .name = MV_XOR_NAME,
  542. .id = 1,
  543. .num_resources = ARRAY_SIZE(kirkwood_xor01_resources),
  544. .resource = kirkwood_xor01_resources,
  545. .dev = {
  546. .dma_mask = &kirkwood_xor_dmamask,
  547. .coherent_dma_mask = DMA_BIT_MASK(64),
  548. .platform_data = (void *)&kirkwood_xor01_data,
  549. },
  550. };
  551. static void __init kirkwood_xor0_init(void)
  552. {
  553. platform_device_register(&kirkwood_xor0_shared);
  554. /*
  555. * two engines can't do memset simultaneously, this limitation
  556. * satisfied by removing memset support from one of the engines.
  557. */
  558. dma_cap_set(DMA_MEMCPY, kirkwood_xor00_data.cap_mask);
  559. dma_cap_set(DMA_XOR, kirkwood_xor00_data.cap_mask);
  560. platform_device_register(&kirkwood_xor00_channel);
  561. dma_cap_set(DMA_MEMCPY, kirkwood_xor01_data.cap_mask);
  562. dma_cap_set(DMA_MEMSET, kirkwood_xor01_data.cap_mask);
  563. dma_cap_set(DMA_XOR, kirkwood_xor01_data.cap_mask);
  564. platform_device_register(&kirkwood_xor01_channel);
  565. }
  566. /*****************************************************************************
  567. * XOR1
  568. ****************************************************************************/
  569. static struct resource kirkwood_xor1_shared_resources[] = {
  570. {
  571. .name = "xor 1 low",
  572. .start = XOR1_PHYS_BASE,
  573. .end = XOR1_PHYS_BASE + 0xff,
  574. .flags = IORESOURCE_MEM,
  575. }, {
  576. .name = "xor 1 high",
  577. .start = XOR1_HIGH_PHYS_BASE,
  578. .end = XOR1_HIGH_PHYS_BASE + 0xff,
  579. .flags = IORESOURCE_MEM,
  580. },
  581. };
  582. static struct platform_device kirkwood_xor1_shared = {
  583. .name = MV_XOR_SHARED_NAME,
  584. .id = 1,
  585. .dev = {
  586. .platform_data = &kirkwood_xor_shared_data,
  587. },
  588. .num_resources = ARRAY_SIZE(kirkwood_xor1_shared_resources),
  589. .resource = kirkwood_xor1_shared_resources,
  590. };
  591. static struct resource kirkwood_xor10_resources[] = {
  592. [0] = {
  593. .start = IRQ_KIRKWOOD_XOR_10,
  594. .end = IRQ_KIRKWOOD_XOR_10,
  595. .flags = IORESOURCE_IRQ,
  596. },
  597. };
  598. static struct mv_xor_platform_data kirkwood_xor10_data = {
  599. .shared = &kirkwood_xor1_shared,
  600. .hw_id = 0,
  601. .pool_size = PAGE_SIZE,
  602. };
  603. static struct platform_device kirkwood_xor10_channel = {
  604. .name = MV_XOR_NAME,
  605. .id = 2,
  606. .num_resources = ARRAY_SIZE(kirkwood_xor10_resources),
  607. .resource = kirkwood_xor10_resources,
  608. .dev = {
  609. .dma_mask = &kirkwood_xor_dmamask,
  610. .coherent_dma_mask = DMA_BIT_MASK(64),
  611. .platform_data = (void *)&kirkwood_xor10_data,
  612. },
  613. };
  614. static struct resource kirkwood_xor11_resources[] = {
  615. [0] = {
  616. .start = IRQ_KIRKWOOD_XOR_11,
  617. .end = IRQ_KIRKWOOD_XOR_11,
  618. .flags = IORESOURCE_IRQ,
  619. },
  620. };
  621. static struct mv_xor_platform_data kirkwood_xor11_data = {
  622. .shared = &kirkwood_xor1_shared,
  623. .hw_id = 1,
  624. .pool_size = PAGE_SIZE,
  625. };
  626. static struct platform_device kirkwood_xor11_channel = {
  627. .name = MV_XOR_NAME,
  628. .id = 3,
  629. .num_resources = ARRAY_SIZE(kirkwood_xor11_resources),
  630. .resource = kirkwood_xor11_resources,
  631. .dev = {
  632. .dma_mask = &kirkwood_xor_dmamask,
  633. .coherent_dma_mask = DMA_BIT_MASK(64),
  634. .platform_data = (void *)&kirkwood_xor11_data,
  635. },
  636. };
  637. static void __init kirkwood_xor1_init(void)
  638. {
  639. platform_device_register(&kirkwood_xor1_shared);
  640. /*
  641. * two engines can't do memset simultaneously, this limitation
  642. * satisfied by removing memset support from one of the engines.
  643. */
  644. dma_cap_set(DMA_MEMCPY, kirkwood_xor10_data.cap_mask);
  645. dma_cap_set(DMA_XOR, kirkwood_xor10_data.cap_mask);
  646. platform_device_register(&kirkwood_xor10_channel);
  647. dma_cap_set(DMA_MEMCPY, kirkwood_xor11_data.cap_mask);
  648. dma_cap_set(DMA_MEMSET, kirkwood_xor11_data.cap_mask);
  649. dma_cap_set(DMA_XOR, kirkwood_xor11_data.cap_mask);
  650. platform_device_register(&kirkwood_xor11_channel);
  651. }
  652. /*****************************************************************************
  653. * Time handling
  654. ****************************************************************************/
  655. int kirkwood_tclk;
  656. int __init kirkwood_find_tclk(void)
  657. {
  658. u32 dev, rev;
  659. kirkwood_pcie_id(&dev, &rev);
  660. if (dev == MV88F6281_DEV_ID && rev == MV88F6281_REV_A0)
  661. return 200000000;
  662. return 166666667;
  663. }
  664. static void kirkwood_timer_init(void)
  665. {
  666. kirkwood_tclk = kirkwood_find_tclk();
  667. orion_time_init(IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk);
  668. }
  669. struct sys_timer kirkwood_timer = {
  670. .init = kirkwood_timer_init,
  671. };
  672. /*****************************************************************************
  673. * General
  674. ****************************************************************************/
  675. /*
  676. * Identify device ID and revision.
  677. */
  678. static char * __init kirkwood_id(void)
  679. {
  680. u32 dev, rev;
  681. kirkwood_pcie_id(&dev, &rev);
  682. if (dev == MV88F6281_DEV_ID) {
  683. if (rev == MV88F6281_REV_Z0)
  684. return "MV88F6281-Z0";
  685. else if (rev == MV88F6281_REV_A0)
  686. return "MV88F6281-A0";
  687. else
  688. return "MV88F6281-Rev-Unsupported";
  689. } else if (dev == MV88F6192_DEV_ID) {
  690. if (rev == MV88F6192_REV_Z0)
  691. return "MV88F6192-Z0";
  692. else if (rev == MV88F6192_REV_A0)
  693. return "MV88F6192-A0";
  694. else
  695. return "MV88F6192-Rev-Unsupported";
  696. } else if (dev == MV88F6180_DEV_ID) {
  697. if (rev == MV88F6180_REV_A0)
  698. return "MV88F6180-Rev-A0";
  699. else
  700. return "MV88F6180-Rev-Unsupported";
  701. } else {
  702. return "Device-Unknown";
  703. }
  704. }
  705. static void __init kirkwood_l2_init(void)
  706. {
  707. #ifdef CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH
  708. writel(readl(L2_CONFIG_REG) | L2_WRITETHROUGH, L2_CONFIG_REG);
  709. feroceon_l2_init(1);
  710. #else
  711. writel(readl(L2_CONFIG_REG) & ~L2_WRITETHROUGH, L2_CONFIG_REG);
  712. feroceon_l2_init(0);
  713. #endif
  714. }
  715. void __init kirkwood_init(void)
  716. {
  717. printk(KERN_INFO "Kirkwood: %s, TCLK=%d.\n",
  718. kirkwood_id(), kirkwood_tclk);
  719. kirkwood_ge00_shared_data.t_clk = kirkwood_tclk;
  720. kirkwood_ge01_shared_data.t_clk = kirkwood_tclk;
  721. kirkwood_spi_plat_data.tclk = kirkwood_tclk;
  722. kirkwood_uart0_data[0].uartclk = kirkwood_tclk;
  723. kirkwood_uart1_data[0].uartclk = kirkwood_tclk;
  724. kirkwood_setup_cpu_mbus();
  725. #ifdef CONFIG_CACHE_FEROCEON_L2
  726. kirkwood_l2_init();
  727. #endif
  728. /* internal devices that every board has */
  729. kirkwood_rtc_init();
  730. kirkwood_xor0_init();
  731. kirkwood_xor1_init();
  732. }