e1000_main.c 126 KB

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  1. /*******************************************************************************
  2. Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. The full GNU General Public License is included in this distribution in the
  15. file called LICENSE.
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  19. *******************************************************************************/
  20. #include "e1000.h"
  21. /* Change Log
  22. * 6.0.58 4/20/05
  23. * o Accepted ethtool cleanup patch from Stephen Hemminger
  24. * 6.0.44+ 2/15/05
  25. * o applied Anton's patch to resolve tx hang in hardware
  26. * o Applied Andrew Mortons patch - e1000 stops working after resume
  27. */
  28. char e1000_driver_name[] = "e1000";
  29. static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
  30. #ifndef CONFIG_E1000_NAPI
  31. #define DRIVERNAPI
  32. #else
  33. #define DRIVERNAPI "-NAPI"
  34. #endif
  35. #define DRV_VERSION "6.3.9-k2"DRIVERNAPI
  36. char e1000_driver_version[] = DRV_VERSION;
  37. static char e1000_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
  38. /* e1000_pci_tbl - PCI Device ID Table
  39. *
  40. * Last entry must be all 0s
  41. *
  42. * Macro expands to...
  43. * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
  44. */
  45. static struct pci_device_id e1000_pci_tbl[] = {
  46. INTEL_E1000_ETHERNET_DEVICE(0x1000),
  47. INTEL_E1000_ETHERNET_DEVICE(0x1001),
  48. INTEL_E1000_ETHERNET_DEVICE(0x1004),
  49. INTEL_E1000_ETHERNET_DEVICE(0x1008),
  50. INTEL_E1000_ETHERNET_DEVICE(0x1009),
  51. INTEL_E1000_ETHERNET_DEVICE(0x100C),
  52. INTEL_E1000_ETHERNET_DEVICE(0x100D),
  53. INTEL_E1000_ETHERNET_DEVICE(0x100E),
  54. INTEL_E1000_ETHERNET_DEVICE(0x100F),
  55. INTEL_E1000_ETHERNET_DEVICE(0x1010),
  56. INTEL_E1000_ETHERNET_DEVICE(0x1011),
  57. INTEL_E1000_ETHERNET_DEVICE(0x1012),
  58. INTEL_E1000_ETHERNET_DEVICE(0x1013),
  59. INTEL_E1000_ETHERNET_DEVICE(0x1014),
  60. INTEL_E1000_ETHERNET_DEVICE(0x1015),
  61. INTEL_E1000_ETHERNET_DEVICE(0x1016),
  62. INTEL_E1000_ETHERNET_DEVICE(0x1017),
  63. INTEL_E1000_ETHERNET_DEVICE(0x1018),
  64. INTEL_E1000_ETHERNET_DEVICE(0x1019),
  65. INTEL_E1000_ETHERNET_DEVICE(0x101A),
  66. INTEL_E1000_ETHERNET_DEVICE(0x101D),
  67. INTEL_E1000_ETHERNET_DEVICE(0x101E),
  68. INTEL_E1000_ETHERNET_DEVICE(0x1026),
  69. INTEL_E1000_ETHERNET_DEVICE(0x1027),
  70. INTEL_E1000_ETHERNET_DEVICE(0x1028),
  71. INTEL_E1000_ETHERNET_DEVICE(0x105E),
  72. INTEL_E1000_ETHERNET_DEVICE(0x105F),
  73. INTEL_E1000_ETHERNET_DEVICE(0x1060),
  74. INTEL_E1000_ETHERNET_DEVICE(0x1075),
  75. INTEL_E1000_ETHERNET_DEVICE(0x1076),
  76. INTEL_E1000_ETHERNET_DEVICE(0x1077),
  77. INTEL_E1000_ETHERNET_DEVICE(0x1078),
  78. INTEL_E1000_ETHERNET_DEVICE(0x1079),
  79. INTEL_E1000_ETHERNET_DEVICE(0x107A),
  80. INTEL_E1000_ETHERNET_DEVICE(0x107B),
  81. INTEL_E1000_ETHERNET_DEVICE(0x107C),
  82. INTEL_E1000_ETHERNET_DEVICE(0x107D),
  83. INTEL_E1000_ETHERNET_DEVICE(0x107E),
  84. INTEL_E1000_ETHERNET_DEVICE(0x107F),
  85. INTEL_E1000_ETHERNET_DEVICE(0x108A),
  86. INTEL_E1000_ETHERNET_DEVICE(0x108B),
  87. INTEL_E1000_ETHERNET_DEVICE(0x108C),
  88. INTEL_E1000_ETHERNET_DEVICE(0x1099),
  89. INTEL_E1000_ETHERNET_DEVICE(0x109A),
  90. INTEL_E1000_ETHERNET_DEVICE(0x10B5),
  91. /* required last entry */
  92. {0,}
  93. };
  94. MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
  95. int e1000_up(struct e1000_adapter *adapter);
  96. void e1000_down(struct e1000_adapter *adapter);
  97. void e1000_reset(struct e1000_adapter *adapter);
  98. int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
  99. int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
  100. int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
  101. void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
  102. void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
  103. static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
  104. struct e1000_tx_ring *txdr);
  105. static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
  106. struct e1000_rx_ring *rxdr);
  107. static void e1000_free_tx_resources(struct e1000_adapter *adapter,
  108. struct e1000_tx_ring *tx_ring);
  109. static void e1000_free_rx_resources(struct e1000_adapter *adapter,
  110. struct e1000_rx_ring *rx_ring);
  111. void e1000_update_stats(struct e1000_adapter *adapter);
  112. /* Local Function Prototypes */
  113. static int e1000_init_module(void);
  114. static void e1000_exit_module(void);
  115. static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  116. static void __devexit e1000_remove(struct pci_dev *pdev);
  117. static int e1000_alloc_queues(struct e1000_adapter *adapter);
  118. #ifdef CONFIG_E1000_MQ
  119. static void e1000_setup_queue_mapping(struct e1000_adapter *adapter);
  120. #endif
  121. static int e1000_sw_init(struct e1000_adapter *adapter);
  122. static int e1000_open(struct net_device *netdev);
  123. static int e1000_close(struct net_device *netdev);
  124. static void e1000_configure_tx(struct e1000_adapter *adapter);
  125. static void e1000_configure_rx(struct e1000_adapter *adapter);
  126. static void e1000_setup_rctl(struct e1000_adapter *adapter);
  127. static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
  128. static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
  129. static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
  130. struct e1000_tx_ring *tx_ring);
  131. static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
  132. struct e1000_rx_ring *rx_ring);
  133. static void e1000_set_multi(struct net_device *netdev);
  134. static void e1000_update_phy_info(unsigned long data);
  135. static void e1000_watchdog(unsigned long data);
  136. static void e1000_watchdog_task(struct e1000_adapter *adapter);
  137. static void e1000_82547_tx_fifo_stall(unsigned long data);
  138. static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
  139. static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
  140. static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
  141. static int e1000_set_mac(struct net_device *netdev, void *p);
  142. static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
  143. static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
  144. struct e1000_tx_ring *tx_ring);
  145. #ifdef CONFIG_E1000_NAPI
  146. static int e1000_clean(struct net_device *poll_dev, int *budget);
  147. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  148. struct e1000_rx_ring *rx_ring,
  149. int *work_done, int work_to_do);
  150. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  151. struct e1000_rx_ring *rx_ring,
  152. int *work_done, int work_to_do);
  153. #else
  154. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  155. struct e1000_rx_ring *rx_ring);
  156. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  157. struct e1000_rx_ring *rx_ring);
  158. #endif
  159. static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  160. struct e1000_rx_ring *rx_ring,
  161. int cleaned_count);
  162. static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  163. struct e1000_rx_ring *rx_ring,
  164. int cleaned_count);
  165. static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
  166. static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
  167. int cmd);
  168. void e1000_set_ethtool_ops(struct net_device *netdev);
  169. static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
  170. static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
  171. static void e1000_tx_timeout(struct net_device *dev);
  172. static void e1000_tx_timeout_task(struct net_device *dev);
  173. static void e1000_smartspeed(struct e1000_adapter *adapter);
  174. static inline int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
  175. struct sk_buff *skb);
  176. static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
  177. static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
  178. static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
  179. static void e1000_restore_vlan(struct e1000_adapter *adapter);
  180. #ifdef CONFIG_PM
  181. static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
  182. static int e1000_resume(struct pci_dev *pdev);
  183. #endif
  184. #ifdef CONFIG_NET_POLL_CONTROLLER
  185. /* for netdump / net console */
  186. static void e1000_netpoll (struct net_device *netdev);
  187. #endif
  188. #ifdef CONFIG_E1000_MQ
  189. /* for multiple Rx queues */
  190. void e1000_rx_schedule(void *data);
  191. #endif
  192. /* Exported from other modules */
  193. extern void e1000_check_options(struct e1000_adapter *adapter);
  194. static struct pci_driver e1000_driver = {
  195. .name = e1000_driver_name,
  196. .id_table = e1000_pci_tbl,
  197. .probe = e1000_probe,
  198. .remove = __devexit_p(e1000_remove),
  199. /* Power Managment Hooks */
  200. #ifdef CONFIG_PM
  201. .suspend = e1000_suspend,
  202. .resume = e1000_resume
  203. #endif
  204. };
  205. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  206. MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
  207. MODULE_LICENSE("GPL");
  208. MODULE_VERSION(DRV_VERSION);
  209. static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
  210. module_param(debug, int, 0);
  211. MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  212. /**
  213. * e1000_init_module - Driver Registration Routine
  214. *
  215. * e1000_init_module is the first routine called when the driver is
  216. * loaded. All it does is register with the PCI subsystem.
  217. **/
  218. static int __init
  219. e1000_init_module(void)
  220. {
  221. int ret;
  222. printk(KERN_INFO "%s - version %s\n",
  223. e1000_driver_string, e1000_driver_version);
  224. printk(KERN_INFO "%s\n", e1000_copyright);
  225. ret = pci_module_init(&e1000_driver);
  226. return ret;
  227. }
  228. module_init(e1000_init_module);
  229. /**
  230. * e1000_exit_module - Driver Exit Cleanup Routine
  231. *
  232. * e1000_exit_module is called just before the driver is removed
  233. * from memory.
  234. **/
  235. static void __exit
  236. e1000_exit_module(void)
  237. {
  238. pci_unregister_driver(&e1000_driver);
  239. }
  240. module_exit(e1000_exit_module);
  241. /**
  242. * e1000_irq_disable - Mask off interrupt generation on the NIC
  243. * @adapter: board private structure
  244. **/
  245. static inline void
  246. e1000_irq_disable(struct e1000_adapter *adapter)
  247. {
  248. atomic_inc(&adapter->irq_sem);
  249. E1000_WRITE_REG(&adapter->hw, IMC, ~0);
  250. E1000_WRITE_FLUSH(&adapter->hw);
  251. synchronize_irq(adapter->pdev->irq);
  252. }
  253. /**
  254. * e1000_irq_enable - Enable default interrupt generation settings
  255. * @adapter: board private structure
  256. **/
  257. static inline void
  258. e1000_irq_enable(struct e1000_adapter *adapter)
  259. {
  260. if(likely(atomic_dec_and_test(&adapter->irq_sem))) {
  261. E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
  262. E1000_WRITE_FLUSH(&adapter->hw);
  263. }
  264. }
  265. static void
  266. e1000_update_mng_vlan(struct e1000_adapter *adapter)
  267. {
  268. struct net_device *netdev = adapter->netdev;
  269. uint16_t vid = adapter->hw.mng_cookie.vlan_id;
  270. uint16_t old_vid = adapter->mng_vlan_id;
  271. if(adapter->vlgrp) {
  272. if(!adapter->vlgrp->vlan_devices[vid]) {
  273. if(adapter->hw.mng_cookie.status &
  274. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
  275. e1000_vlan_rx_add_vid(netdev, vid);
  276. adapter->mng_vlan_id = vid;
  277. } else
  278. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  279. if((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
  280. (vid != old_vid) &&
  281. !adapter->vlgrp->vlan_devices[old_vid])
  282. e1000_vlan_rx_kill_vid(netdev, old_vid);
  283. }
  284. }
  285. }
  286. /**
  287. * e1000_release_hw_control - release control of the h/w to f/w
  288. * @adapter: address of board private structure
  289. *
  290. * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  291. * For ASF and Pass Through versions of f/w this means that the
  292. * driver is no longer loaded. For AMT version (only with 82573) i
  293. * of the f/w this means that the netowrk i/f is closed.
  294. *
  295. **/
  296. static inline void
  297. e1000_release_hw_control(struct e1000_adapter *adapter)
  298. {
  299. uint32_t ctrl_ext;
  300. uint32_t swsm;
  301. /* Let firmware taken over control of h/w */
  302. switch (adapter->hw.mac_type) {
  303. case e1000_82571:
  304. case e1000_82572:
  305. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  306. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  307. ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
  308. break;
  309. case e1000_82573:
  310. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  311. E1000_WRITE_REG(&adapter->hw, SWSM,
  312. swsm & ~E1000_SWSM_DRV_LOAD);
  313. default:
  314. break;
  315. }
  316. }
  317. /**
  318. * e1000_get_hw_control - get control of the h/w from f/w
  319. * @adapter: address of board private structure
  320. *
  321. * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  322. * For ASF and Pass Through versions of f/w this means that
  323. * the driver is loaded. For AMT version (only with 82573)
  324. * of the f/w this means that the netowrk i/f is open.
  325. *
  326. **/
  327. static inline void
  328. e1000_get_hw_control(struct e1000_adapter *adapter)
  329. {
  330. uint32_t ctrl_ext;
  331. uint32_t swsm;
  332. /* Let firmware know the driver has taken over */
  333. switch (adapter->hw.mac_type) {
  334. case e1000_82571:
  335. case e1000_82572:
  336. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  337. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  338. ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
  339. break;
  340. case e1000_82573:
  341. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  342. E1000_WRITE_REG(&adapter->hw, SWSM,
  343. swsm | E1000_SWSM_DRV_LOAD);
  344. break;
  345. default:
  346. break;
  347. }
  348. }
  349. int
  350. e1000_up(struct e1000_adapter *adapter)
  351. {
  352. struct net_device *netdev = adapter->netdev;
  353. int i, err;
  354. /* hardware has been reset, we need to reload some things */
  355. /* Reset the PHY if it was previously powered down */
  356. if(adapter->hw.media_type == e1000_media_type_copper) {
  357. uint16_t mii_reg;
  358. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  359. if(mii_reg & MII_CR_POWER_DOWN)
  360. e1000_phy_reset(&adapter->hw);
  361. }
  362. e1000_set_multi(netdev);
  363. e1000_restore_vlan(adapter);
  364. e1000_configure_tx(adapter);
  365. e1000_setup_rctl(adapter);
  366. e1000_configure_rx(adapter);
  367. /* call E1000_DESC_UNUSED which always leaves
  368. * at least 1 descriptor unused to make sure
  369. * next_to_use != next_to_clean */
  370. for (i = 0; i < adapter->num_rx_queues; i++) {
  371. struct e1000_rx_ring *ring = &adapter->rx_ring[i];
  372. adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
  373. }
  374. #ifdef CONFIG_PCI_MSI
  375. if(adapter->hw.mac_type > e1000_82547_rev_2) {
  376. adapter->have_msi = TRUE;
  377. if((err = pci_enable_msi(adapter->pdev))) {
  378. DPRINTK(PROBE, ERR,
  379. "Unable to allocate MSI interrupt Error: %d\n", err);
  380. adapter->have_msi = FALSE;
  381. }
  382. }
  383. #endif
  384. if((err = request_irq(adapter->pdev->irq, &e1000_intr,
  385. SA_SHIRQ | SA_SAMPLE_RANDOM,
  386. netdev->name, netdev))) {
  387. DPRINTK(PROBE, ERR,
  388. "Unable to allocate interrupt Error: %d\n", err);
  389. return err;
  390. }
  391. #ifdef CONFIG_E1000_MQ
  392. e1000_setup_queue_mapping(adapter);
  393. #endif
  394. adapter->tx_queue_len = netdev->tx_queue_len;
  395. mod_timer(&adapter->watchdog_timer, jiffies);
  396. #ifdef CONFIG_E1000_NAPI
  397. netif_poll_enable(netdev);
  398. #endif
  399. e1000_irq_enable(adapter);
  400. return 0;
  401. }
  402. void
  403. e1000_down(struct e1000_adapter *adapter)
  404. {
  405. struct net_device *netdev = adapter->netdev;
  406. boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
  407. e1000_check_mng_mode(&adapter->hw);
  408. e1000_irq_disable(adapter);
  409. #ifdef CONFIG_E1000_MQ
  410. while (atomic_read(&adapter->rx_sched_call_data.count) != 0);
  411. #endif
  412. free_irq(adapter->pdev->irq, netdev);
  413. #ifdef CONFIG_PCI_MSI
  414. if(adapter->hw.mac_type > e1000_82547_rev_2 &&
  415. adapter->have_msi == TRUE)
  416. pci_disable_msi(adapter->pdev);
  417. #endif
  418. del_timer_sync(&adapter->tx_fifo_stall_timer);
  419. del_timer_sync(&adapter->watchdog_timer);
  420. del_timer_sync(&adapter->phy_info_timer);
  421. #ifdef CONFIG_E1000_NAPI
  422. netif_poll_disable(netdev);
  423. #endif
  424. netdev->tx_queue_len = adapter->tx_queue_len;
  425. adapter->link_speed = 0;
  426. adapter->link_duplex = 0;
  427. netif_carrier_off(netdev);
  428. netif_stop_queue(netdev);
  429. e1000_reset(adapter);
  430. e1000_clean_all_tx_rings(adapter);
  431. e1000_clean_all_rx_rings(adapter);
  432. /* Power down the PHY so no link is implied when interface is down *
  433. * The PHY cannot be powered down if any of the following is TRUE *
  434. * (a) WoL is enabled
  435. * (b) AMT is active
  436. * (c) SoL/IDER session is active */
  437. if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
  438. adapter->hw.media_type == e1000_media_type_copper &&
  439. !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
  440. !mng_mode_enabled &&
  441. !e1000_check_phy_reset_block(&adapter->hw)) {
  442. uint16_t mii_reg;
  443. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  444. mii_reg |= MII_CR_POWER_DOWN;
  445. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
  446. mdelay(1);
  447. }
  448. }
  449. void
  450. e1000_reset(struct e1000_adapter *adapter)
  451. {
  452. uint32_t pba, manc;
  453. uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
  454. /* Repartition Pba for greater than 9k mtu
  455. * To take effect CTRL.RST is required.
  456. */
  457. switch (adapter->hw.mac_type) {
  458. case e1000_82547:
  459. case e1000_82547_rev_2:
  460. pba = E1000_PBA_30K;
  461. break;
  462. case e1000_82571:
  463. case e1000_82572:
  464. pba = E1000_PBA_38K;
  465. break;
  466. case e1000_82573:
  467. pba = E1000_PBA_12K;
  468. break;
  469. default:
  470. pba = E1000_PBA_48K;
  471. break;
  472. }
  473. if((adapter->hw.mac_type != e1000_82573) &&
  474. (adapter->netdev->mtu > E1000_RXBUFFER_8192))
  475. pba -= 8; /* allocate more FIFO for Tx */
  476. if(adapter->hw.mac_type == e1000_82547) {
  477. adapter->tx_fifo_head = 0;
  478. adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
  479. adapter->tx_fifo_size =
  480. (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
  481. atomic_set(&adapter->tx_fifo_stall, 0);
  482. }
  483. E1000_WRITE_REG(&adapter->hw, PBA, pba);
  484. /* flow control settings */
  485. /* Set the FC high water mark to 90% of the FIFO size.
  486. * Required to clear last 3 LSB */
  487. fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
  488. adapter->hw.fc_high_water = fc_high_water_mark;
  489. adapter->hw.fc_low_water = fc_high_water_mark - 8;
  490. adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
  491. adapter->hw.fc_send_xon = 1;
  492. adapter->hw.fc = adapter->hw.original_fc;
  493. /* Allow time for pending master requests to run */
  494. e1000_reset_hw(&adapter->hw);
  495. if(adapter->hw.mac_type >= e1000_82544)
  496. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  497. if(e1000_init_hw(&adapter->hw))
  498. DPRINTK(PROBE, ERR, "Hardware Error\n");
  499. e1000_update_mng_vlan(adapter);
  500. /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
  501. E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
  502. e1000_reset_adaptive(&adapter->hw);
  503. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  504. if (adapter->en_mng_pt) {
  505. manc = E1000_READ_REG(&adapter->hw, MANC);
  506. manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
  507. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  508. }
  509. }
  510. /**
  511. * e1000_probe - Device Initialization Routine
  512. * @pdev: PCI device information struct
  513. * @ent: entry in e1000_pci_tbl
  514. *
  515. * Returns 0 on success, negative on failure
  516. *
  517. * e1000_probe initializes an adapter identified by a pci_dev structure.
  518. * The OS initialization, configuring of the adapter private structure,
  519. * and a hardware reset occur.
  520. **/
  521. static int __devinit
  522. e1000_probe(struct pci_dev *pdev,
  523. const struct pci_device_id *ent)
  524. {
  525. struct net_device *netdev;
  526. struct e1000_adapter *adapter;
  527. unsigned long mmio_start, mmio_len;
  528. static int cards_found = 0;
  529. int i, err, pci_using_dac;
  530. uint16_t eeprom_data;
  531. uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
  532. if((err = pci_enable_device(pdev)))
  533. return err;
  534. if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
  535. pci_using_dac = 1;
  536. } else {
  537. if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
  538. E1000_ERR("No usable DMA configuration, aborting\n");
  539. return err;
  540. }
  541. pci_using_dac = 0;
  542. }
  543. if((err = pci_request_regions(pdev, e1000_driver_name)))
  544. return err;
  545. pci_set_master(pdev);
  546. netdev = alloc_etherdev(sizeof(struct e1000_adapter));
  547. if(!netdev) {
  548. err = -ENOMEM;
  549. goto err_alloc_etherdev;
  550. }
  551. SET_MODULE_OWNER(netdev);
  552. SET_NETDEV_DEV(netdev, &pdev->dev);
  553. pci_set_drvdata(pdev, netdev);
  554. adapter = netdev_priv(netdev);
  555. adapter->netdev = netdev;
  556. adapter->pdev = pdev;
  557. adapter->hw.back = adapter;
  558. adapter->msg_enable = (1 << debug) - 1;
  559. mmio_start = pci_resource_start(pdev, BAR_0);
  560. mmio_len = pci_resource_len(pdev, BAR_0);
  561. adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
  562. if(!adapter->hw.hw_addr) {
  563. err = -EIO;
  564. goto err_ioremap;
  565. }
  566. for(i = BAR_1; i <= BAR_5; i++) {
  567. if(pci_resource_len(pdev, i) == 0)
  568. continue;
  569. if(pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  570. adapter->hw.io_base = pci_resource_start(pdev, i);
  571. break;
  572. }
  573. }
  574. netdev->open = &e1000_open;
  575. netdev->stop = &e1000_close;
  576. netdev->hard_start_xmit = &e1000_xmit_frame;
  577. netdev->get_stats = &e1000_get_stats;
  578. netdev->set_multicast_list = &e1000_set_multi;
  579. netdev->set_mac_address = &e1000_set_mac;
  580. netdev->change_mtu = &e1000_change_mtu;
  581. netdev->do_ioctl = &e1000_ioctl;
  582. e1000_set_ethtool_ops(netdev);
  583. netdev->tx_timeout = &e1000_tx_timeout;
  584. netdev->watchdog_timeo = 5 * HZ;
  585. #ifdef CONFIG_E1000_NAPI
  586. netdev->poll = &e1000_clean;
  587. netdev->weight = 64;
  588. #endif
  589. netdev->vlan_rx_register = e1000_vlan_rx_register;
  590. netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
  591. netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
  592. #ifdef CONFIG_NET_POLL_CONTROLLER
  593. netdev->poll_controller = e1000_netpoll;
  594. #endif
  595. strcpy(netdev->name, pci_name(pdev));
  596. netdev->mem_start = mmio_start;
  597. netdev->mem_end = mmio_start + mmio_len;
  598. netdev->base_addr = adapter->hw.io_base;
  599. adapter->bd_number = cards_found;
  600. /* setup the private structure */
  601. if((err = e1000_sw_init(adapter)))
  602. goto err_sw_init;
  603. if((err = e1000_check_phy_reset_block(&adapter->hw)))
  604. DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
  605. if(adapter->hw.mac_type >= e1000_82543) {
  606. netdev->features = NETIF_F_SG |
  607. NETIF_F_HW_CSUM |
  608. NETIF_F_HW_VLAN_TX |
  609. NETIF_F_HW_VLAN_RX |
  610. NETIF_F_HW_VLAN_FILTER;
  611. }
  612. #ifdef NETIF_F_TSO
  613. if((adapter->hw.mac_type >= e1000_82544) &&
  614. (adapter->hw.mac_type != e1000_82547))
  615. netdev->features |= NETIF_F_TSO;
  616. #ifdef NETIF_F_TSO_IPV6
  617. if(adapter->hw.mac_type > e1000_82547_rev_2)
  618. netdev->features |= NETIF_F_TSO_IPV6;
  619. #endif
  620. #endif
  621. if(pci_using_dac)
  622. netdev->features |= NETIF_F_HIGHDMA;
  623. /* hard_start_xmit is safe against parallel locking */
  624. netdev->features |= NETIF_F_LLTX;
  625. adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
  626. /* before reading the EEPROM, reset the controller to
  627. * put the device in a known good starting state */
  628. e1000_reset_hw(&adapter->hw);
  629. /* make sure the EEPROM is good */
  630. if(e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
  631. DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
  632. err = -EIO;
  633. goto err_eeprom;
  634. }
  635. /* copy the MAC address out of the EEPROM */
  636. if(e1000_read_mac_addr(&adapter->hw))
  637. DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
  638. memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
  639. memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
  640. if(!is_valid_ether_addr(netdev->perm_addr)) {
  641. DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
  642. err = -EIO;
  643. goto err_eeprom;
  644. }
  645. e1000_read_part_num(&adapter->hw, &(adapter->part_num));
  646. e1000_get_bus_info(&adapter->hw);
  647. init_timer(&adapter->tx_fifo_stall_timer);
  648. adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
  649. adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
  650. init_timer(&adapter->watchdog_timer);
  651. adapter->watchdog_timer.function = &e1000_watchdog;
  652. adapter->watchdog_timer.data = (unsigned long) adapter;
  653. INIT_WORK(&adapter->watchdog_task,
  654. (void (*)(void *))e1000_watchdog_task, adapter);
  655. init_timer(&adapter->phy_info_timer);
  656. adapter->phy_info_timer.function = &e1000_update_phy_info;
  657. adapter->phy_info_timer.data = (unsigned long) adapter;
  658. INIT_WORK(&adapter->tx_timeout_task,
  659. (void (*)(void *))e1000_tx_timeout_task, netdev);
  660. /* we're going to reset, so assume we have no link for now */
  661. netif_carrier_off(netdev);
  662. netif_stop_queue(netdev);
  663. e1000_check_options(adapter);
  664. /* Initial Wake on LAN setting
  665. * If APM wake is enabled in the EEPROM,
  666. * enable the ACPI Magic Packet filter
  667. */
  668. switch(adapter->hw.mac_type) {
  669. case e1000_82542_rev2_0:
  670. case e1000_82542_rev2_1:
  671. case e1000_82543:
  672. break;
  673. case e1000_82544:
  674. e1000_read_eeprom(&adapter->hw,
  675. EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
  676. eeprom_apme_mask = E1000_EEPROM_82544_APM;
  677. break;
  678. case e1000_82546:
  679. case e1000_82546_rev_3:
  680. case e1000_82571:
  681. if(E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
  682. e1000_read_eeprom(&adapter->hw,
  683. EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
  684. break;
  685. }
  686. /* Fall Through */
  687. default:
  688. e1000_read_eeprom(&adapter->hw,
  689. EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
  690. break;
  691. }
  692. if(eeprom_data & eeprom_apme_mask)
  693. adapter->wol |= E1000_WUFC_MAG;
  694. /* print bus type/speed/width info */
  695. {
  696. struct e1000_hw *hw = &adapter->hw;
  697. DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
  698. ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
  699. (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
  700. ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
  701. (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
  702. (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
  703. (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
  704. (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
  705. ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
  706. (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
  707. (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
  708. "32-bit"));
  709. }
  710. for (i = 0; i < 6; i++)
  711. printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
  712. /* reset the hardware with the new settings */
  713. e1000_reset(adapter);
  714. /* If the controller is 82573 and f/w is AMT, do not set
  715. * DRV_LOAD until the interface is up. For all other cases,
  716. * let the f/w know that the h/w is now under the control
  717. * of the driver. */
  718. if (adapter->hw.mac_type != e1000_82573 ||
  719. !e1000_check_mng_mode(&adapter->hw))
  720. e1000_get_hw_control(adapter);
  721. strcpy(netdev->name, "eth%d");
  722. if((err = register_netdev(netdev)))
  723. goto err_register;
  724. DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
  725. cards_found++;
  726. return 0;
  727. err_register:
  728. err_sw_init:
  729. err_eeprom:
  730. iounmap(adapter->hw.hw_addr);
  731. err_ioremap:
  732. free_netdev(netdev);
  733. err_alloc_etherdev:
  734. pci_release_regions(pdev);
  735. return err;
  736. }
  737. /**
  738. * e1000_remove - Device Removal Routine
  739. * @pdev: PCI device information struct
  740. *
  741. * e1000_remove is called by the PCI subsystem to alert the driver
  742. * that it should release a PCI device. The could be caused by a
  743. * Hot-Plug event, or because the driver is going to be removed from
  744. * memory.
  745. **/
  746. static void __devexit
  747. e1000_remove(struct pci_dev *pdev)
  748. {
  749. struct net_device *netdev = pci_get_drvdata(pdev);
  750. struct e1000_adapter *adapter = netdev_priv(netdev);
  751. uint32_t manc;
  752. #ifdef CONFIG_E1000_NAPI
  753. int i;
  754. #endif
  755. flush_scheduled_work();
  756. if(adapter->hw.mac_type >= e1000_82540 &&
  757. adapter->hw.media_type == e1000_media_type_copper) {
  758. manc = E1000_READ_REG(&adapter->hw, MANC);
  759. if(manc & E1000_MANC_SMBUS_EN) {
  760. manc |= E1000_MANC_ARP_EN;
  761. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  762. }
  763. }
  764. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  765. * would have already happened in close and is redundant. */
  766. e1000_release_hw_control(adapter);
  767. unregister_netdev(netdev);
  768. #ifdef CONFIG_E1000_NAPI
  769. for (i = 0; i < adapter->num_rx_queues; i++)
  770. __dev_put(&adapter->polling_netdev[i]);
  771. #endif
  772. if(!e1000_check_phy_reset_block(&adapter->hw))
  773. e1000_phy_hw_reset(&adapter->hw);
  774. kfree(adapter->tx_ring);
  775. kfree(adapter->rx_ring);
  776. #ifdef CONFIG_E1000_NAPI
  777. kfree(adapter->polling_netdev);
  778. #endif
  779. iounmap(adapter->hw.hw_addr);
  780. pci_release_regions(pdev);
  781. #ifdef CONFIG_E1000_MQ
  782. free_percpu(adapter->cpu_netdev);
  783. free_percpu(adapter->cpu_tx_ring);
  784. #endif
  785. free_netdev(netdev);
  786. pci_disable_device(pdev);
  787. }
  788. /**
  789. * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
  790. * @adapter: board private structure to initialize
  791. *
  792. * e1000_sw_init initializes the Adapter private data structure.
  793. * Fields are initialized based on PCI device information and
  794. * OS network device settings (MTU size).
  795. **/
  796. static int __devinit
  797. e1000_sw_init(struct e1000_adapter *adapter)
  798. {
  799. struct e1000_hw *hw = &adapter->hw;
  800. struct net_device *netdev = adapter->netdev;
  801. struct pci_dev *pdev = adapter->pdev;
  802. #ifdef CONFIG_E1000_NAPI
  803. int i;
  804. #endif
  805. /* PCI config space info */
  806. hw->vendor_id = pdev->vendor;
  807. hw->device_id = pdev->device;
  808. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  809. hw->subsystem_id = pdev->subsystem_device;
  810. pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
  811. pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
  812. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  813. adapter->rx_ps_bsize0 = E1000_RXBUFFER_256;
  814. hw->max_frame_size = netdev->mtu +
  815. ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  816. hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
  817. /* identify the MAC */
  818. if(e1000_set_mac_type(hw)) {
  819. DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
  820. return -EIO;
  821. }
  822. /* initialize eeprom parameters */
  823. if(e1000_init_eeprom_params(hw)) {
  824. E1000_ERR("EEPROM initialization failed\n");
  825. return -EIO;
  826. }
  827. switch(hw->mac_type) {
  828. default:
  829. break;
  830. case e1000_82541:
  831. case e1000_82547:
  832. case e1000_82541_rev_2:
  833. case e1000_82547_rev_2:
  834. hw->phy_init_script = 1;
  835. break;
  836. }
  837. e1000_set_media_type(hw);
  838. hw->wait_autoneg_complete = FALSE;
  839. hw->tbi_compatibility_en = TRUE;
  840. hw->adaptive_ifs = TRUE;
  841. /* Copper options */
  842. if(hw->media_type == e1000_media_type_copper) {
  843. hw->mdix = AUTO_ALL_MODES;
  844. hw->disable_polarity_correction = FALSE;
  845. hw->master_slave = E1000_MASTER_SLAVE;
  846. }
  847. #ifdef CONFIG_E1000_MQ
  848. /* Number of supported queues */
  849. switch (hw->mac_type) {
  850. case e1000_82571:
  851. case e1000_82572:
  852. /* These controllers support 2 tx queues, but with a single
  853. * qdisc implementation, multiple tx queues aren't quite as
  854. * interesting. If we can find a logical way of mapping
  855. * flows to a queue, then perhaps we can up the num_tx_queue
  856. * count back to its default. Until then, we run the risk of
  857. * terrible performance due to SACK overload. */
  858. adapter->num_tx_queues = 1;
  859. adapter->num_rx_queues = 2;
  860. break;
  861. default:
  862. adapter->num_tx_queues = 1;
  863. adapter->num_rx_queues = 1;
  864. break;
  865. }
  866. adapter->num_rx_queues = min(adapter->num_rx_queues, num_online_cpus());
  867. adapter->num_tx_queues = min(adapter->num_tx_queues, num_online_cpus());
  868. DPRINTK(DRV, INFO, "Multiqueue Enabled: Rx Queue count = %u %s\n",
  869. adapter->num_rx_queues,
  870. ((adapter->num_rx_queues == 1)
  871. ? ((num_online_cpus() > 1)
  872. ? "(due to unsupported feature in current adapter)"
  873. : "(due to unsupported system configuration)")
  874. : ""));
  875. DPRINTK(DRV, INFO, "Multiqueue Enabled: Tx Queue count = %u\n",
  876. adapter->num_tx_queues);
  877. #else
  878. adapter->num_tx_queues = 1;
  879. adapter->num_rx_queues = 1;
  880. #endif
  881. if (e1000_alloc_queues(adapter)) {
  882. DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
  883. return -ENOMEM;
  884. }
  885. #ifdef CONFIG_E1000_NAPI
  886. for (i = 0; i < adapter->num_rx_queues; i++) {
  887. adapter->polling_netdev[i].priv = adapter;
  888. adapter->polling_netdev[i].poll = &e1000_clean;
  889. adapter->polling_netdev[i].weight = 64;
  890. dev_hold(&adapter->polling_netdev[i]);
  891. set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
  892. }
  893. spin_lock_init(&adapter->tx_queue_lock);
  894. #endif
  895. atomic_set(&adapter->irq_sem, 1);
  896. spin_lock_init(&adapter->stats_lock);
  897. return 0;
  898. }
  899. /**
  900. * e1000_alloc_queues - Allocate memory for all rings
  901. * @adapter: board private structure to initialize
  902. *
  903. * We allocate one ring per queue at run-time since we don't know the
  904. * number of queues at compile-time. The polling_netdev array is
  905. * intended for Multiqueue, but should work fine with a single queue.
  906. **/
  907. static int __devinit
  908. e1000_alloc_queues(struct e1000_adapter *adapter)
  909. {
  910. int size;
  911. size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
  912. adapter->tx_ring = kmalloc(size, GFP_KERNEL);
  913. if (!adapter->tx_ring)
  914. return -ENOMEM;
  915. memset(adapter->tx_ring, 0, size);
  916. size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
  917. adapter->rx_ring = kmalloc(size, GFP_KERNEL);
  918. if (!adapter->rx_ring) {
  919. kfree(adapter->tx_ring);
  920. return -ENOMEM;
  921. }
  922. memset(adapter->rx_ring, 0, size);
  923. #ifdef CONFIG_E1000_NAPI
  924. size = sizeof(struct net_device) * adapter->num_rx_queues;
  925. adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
  926. if (!adapter->polling_netdev) {
  927. kfree(adapter->tx_ring);
  928. kfree(adapter->rx_ring);
  929. return -ENOMEM;
  930. }
  931. memset(adapter->polling_netdev, 0, size);
  932. #endif
  933. #ifdef CONFIG_E1000_MQ
  934. adapter->rx_sched_call_data.func = e1000_rx_schedule;
  935. adapter->rx_sched_call_data.info = adapter->netdev;
  936. adapter->cpu_netdev = alloc_percpu(struct net_device *);
  937. adapter->cpu_tx_ring = alloc_percpu(struct e1000_tx_ring *);
  938. #endif
  939. return E1000_SUCCESS;
  940. }
  941. #ifdef CONFIG_E1000_MQ
  942. static void __devinit
  943. e1000_setup_queue_mapping(struct e1000_adapter *adapter)
  944. {
  945. int i, cpu;
  946. adapter->rx_sched_call_data.func = e1000_rx_schedule;
  947. adapter->rx_sched_call_data.info = adapter->netdev;
  948. cpus_clear(adapter->rx_sched_call_data.cpumask);
  949. adapter->cpu_netdev = alloc_percpu(struct net_device *);
  950. adapter->cpu_tx_ring = alloc_percpu(struct e1000_tx_ring *);
  951. lock_cpu_hotplug();
  952. i = 0;
  953. for_each_online_cpu(cpu) {
  954. *per_cpu_ptr(adapter->cpu_tx_ring, cpu) = &adapter->tx_ring[i % adapter->num_tx_queues];
  955. /* This is incomplete because we'd like to assign separate
  956. * physical cpus to these netdev polling structures and
  957. * avoid saturating a subset of cpus.
  958. */
  959. if (i < adapter->num_rx_queues) {
  960. *per_cpu_ptr(adapter->cpu_netdev, cpu) = &adapter->polling_netdev[i];
  961. adapter->rx_ring[i].cpu = cpu;
  962. cpu_set(cpu, adapter->cpumask);
  963. } else
  964. *per_cpu_ptr(adapter->cpu_netdev, cpu) = NULL;
  965. i++;
  966. }
  967. unlock_cpu_hotplug();
  968. }
  969. #endif
  970. /**
  971. * e1000_open - Called when a network interface is made active
  972. * @netdev: network interface device structure
  973. *
  974. * Returns 0 on success, negative value on failure
  975. *
  976. * The open entry point is called when a network interface is made
  977. * active by the system (IFF_UP). At this point all resources needed
  978. * for transmit and receive operations are allocated, the interrupt
  979. * handler is registered with the OS, the watchdog timer is started,
  980. * and the stack is notified that the interface is ready.
  981. **/
  982. static int
  983. e1000_open(struct net_device *netdev)
  984. {
  985. struct e1000_adapter *adapter = netdev_priv(netdev);
  986. int err;
  987. /* allocate transmit descriptors */
  988. if ((err = e1000_setup_all_tx_resources(adapter)))
  989. goto err_setup_tx;
  990. /* allocate receive descriptors */
  991. if ((err = e1000_setup_all_rx_resources(adapter)))
  992. goto err_setup_rx;
  993. if((err = e1000_up(adapter)))
  994. goto err_up;
  995. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  996. if((adapter->hw.mng_cookie.status &
  997. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  998. e1000_update_mng_vlan(adapter);
  999. }
  1000. /* If AMT is enabled, let the firmware know that the network
  1001. * interface is now open */
  1002. if (adapter->hw.mac_type == e1000_82573 &&
  1003. e1000_check_mng_mode(&adapter->hw))
  1004. e1000_get_hw_control(adapter);
  1005. return E1000_SUCCESS;
  1006. err_up:
  1007. e1000_free_all_rx_resources(adapter);
  1008. err_setup_rx:
  1009. e1000_free_all_tx_resources(adapter);
  1010. err_setup_tx:
  1011. e1000_reset(adapter);
  1012. return err;
  1013. }
  1014. /**
  1015. * e1000_close - Disables a network interface
  1016. * @netdev: network interface device structure
  1017. *
  1018. * Returns 0, this is not allowed to fail
  1019. *
  1020. * The close entry point is called when an interface is de-activated
  1021. * by the OS. The hardware is still under the drivers control, but
  1022. * needs to be disabled. A global MAC reset is issued to stop the
  1023. * hardware, and all transmit and receive resources are freed.
  1024. **/
  1025. static int
  1026. e1000_close(struct net_device *netdev)
  1027. {
  1028. struct e1000_adapter *adapter = netdev_priv(netdev);
  1029. e1000_down(adapter);
  1030. e1000_free_all_tx_resources(adapter);
  1031. e1000_free_all_rx_resources(adapter);
  1032. if((adapter->hw.mng_cookie.status &
  1033. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  1034. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  1035. }
  1036. /* If AMT is enabled, let the firmware know that the network
  1037. * interface is now closed */
  1038. if (adapter->hw.mac_type == e1000_82573 &&
  1039. e1000_check_mng_mode(&adapter->hw))
  1040. e1000_release_hw_control(adapter);
  1041. return 0;
  1042. }
  1043. /**
  1044. * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
  1045. * @adapter: address of board private structure
  1046. * @start: address of beginning of memory
  1047. * @len: length of memory
  1048. **/
  1049. static inline boolean_t
  1050. e1000_check_64k_bound(struct e1000_adapter *adapter,
  1051. void *start, unsigned long len)
  1052. {
  1053. unsigned long begin = (unsigned long) start;
  1054. unsigned long end = begin + len;
  1055. /* First rev 82545 and 82546 need to not allow any memory
  1056. * write location to cross 64k boundary due to errata 23 */
  1057. if (adapter->hw.mac_type == e1000_82545 ||
  1058. adapter->hw.mac_type == e1000_82546) {
  1059. return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
  1060. }
  1061. return TRUE;
  1062. }
  1063. /**
  1064. * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
  1065. * @adapter: board private structure
  1066. * @txdr: tx descriptor ring (for a specific queue) to setup
  1067. *
  1068. * Return 0 on success, negative on failure
  1069. **/
  1070. static int
  1071. e1000_setup_tx_resources(struct e1000_adapter *adapter,
  1072. struct e1000_tx_ring *txdr)
  1073. {
  1074. struct pci_dev *pdev = adapter->pdev;
  1075. int size;
  1076. size = sizeof(struct e1000_buffer) * txdr->count;
  1077. txdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
  1078. if(!txdr->buffer_info) {
  1079. DPRINTK(PROBE, ERR,
  1080. "Unable to allocate memory for the transmit descriptor ring\n");
  1081. return -ENOMEM;
  1082. }
  1083. memset(txdr->buffer_info, 0, size);
  1084. /* round up to nearest 4K */
  1085. txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
  1086. E1000_ROUNDUP(txdr->size, 4096);
  1087. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1088. if(!txdr->desc) {
  1089. setup_tx_desc_die:
  1090. vfree(txdr->buffer_info);
  1091. DPRINTK(PROBE, ERR,
  1092. "Unable to allocate memory for the transmit descriptor ring\n");
  1093. return -ENOMEM;
  1094. }
  1095. /* Fix for errata 23, can't cross 64kB boundary */
  1096. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1097. void *olddesc = txdr->desc;
  1098. dma_addr_t olddma = txdr->dma;
  1099. DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
  1100. "at %p\n", txdr->size, txdr->desc);
  1101. /* Try again, without freeing the previous */
  1102. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1103. if(!txdr->desc) {
  1104. /* Failed allocation, critical failure */
  1105. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1106. goto setup_tx_desc_die;
  1107. }
  1108. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1109. /* give up */
  1110. pci_free_consistent(pdev, txdr->size, txdr->desc,
  1111. txdr->dma);
  1112. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1113. DPRINTK(PROBE, ERR,
  1114. "Unable to allocate aligned memory "
  1115. "for the transmit descriptor ring\n");
  1116. vfree(txdr->buffer_info);
  1117. return -ENOMEM;
  1118. } else {
  1119. /* Free old allocation, new allocation was successful */
  1120. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1121. }
  1122. }
  1123. memset(txdr->desc, 0, txdr->size);
  1124. txdr->next_to_use = 0;
  1125. txdr->next_to_clean = 0;
  1126. spin_lock_init(&txdr->tx_lock);
  1127. return 0;
  1128. }
  1129. /**
  1130. * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
  1131. * (Descriptors) for all queues
  1132. * @adapter: board private structure
  1133. *
  1134. * If this function returns with an error, then it's possible one or
  1135. * more of the rings is populated (while the rest are not). It is the
  1136. * callers duty to clean those orphaned rings.
  1137. *
  1138. * Return 0 on success, negative on failure
  1139. **/
  1140. int
  1141. e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
  1142. {
  1143. int i, err = 0;
  1144. for (i = 0; i < adapter->num_tx_queues; i++) {
  1145. err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
  1146. if (err) {
  1147. DPRINTK(PROBE, ERR,
  1148. "Allocation for Tx Queue %u failed\n", i);
  1149. break;
  1150. }
  1151. }
  1152. return err;
  1153. }
  1154. /**
  1155. * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
  1156. * @adapter: board private structure
  1157. *
  1158. * Configure the Tx unit of the MAC after a reset.
  1159. **/
  1160. static void
  1161. e1000_configure_tx(struct e1000_adapter *adapter)
  1162. {
  1163. uint64_t tdba;
  1164. struct e1000_hw *hw = &adapter->hw;
  1165. uint32_t tdlen, tctl, tipg, tarc;
  1166. uint32_t ipgr1, ipgr2;
  1167. /* Setup the HW Tx Head and Tail descriptor pointers */
  1168. switch (adapter->num_tx_queues) {
  1169. case 2:
  1170. tdba = adapter->tx_ring[1].dma;
  1171. tdlen = adapter->tx_ring[1].count *
  1172. sizeof(struct e1000_tx_desc);
  1173. E1000_WRITE_REG(hw, TDBAL1, (tdba & 0x00000000ffffffffULL));
  1174. E1000_WRITE_REG(hw, TDBAH1, (tdba >> 32));
  1175. E1000_WRITE_REG(hw, TDLEN1, tdlen);
  1176. E1000_WRITE_REG(hw, TDH1, 0);
  1177. E1000_WRITE_REG(hw, TDT1, 0);
  1178. adapter->tx_ring[1].tdh = E1000_TDH1;
  1179. adapter->tx_ring[1].tdt = E1000_TDT1;
  1180. /* Fall Through */
  1181. case 1:
  1182. default:
  1183. tdba = adapter->tx_ring[0].dma;
  1184. tdlen = adapter->tx_ring[0].count *
  1185. sizeof(struct e1000_tx_desc);
  1186. E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
  1187. E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
  1188. E1000_WRITE_REG(hw, TDLEN, tdlen);
  1189. E1000_WRITE_REG(hw, TDH, 0);
  1190. E1000_WRITE_REG(hw, TDT, 0);
  1191. adapter->tx_ring[0].tdh = E1000_TDH;
  1192. adapter->tx_ring[0].tdt = E1000_TDT;
  1193. break;
  1194. }
  1195. /* Set the default values for the Tx Inter Packet Gap timer */
  1196. if (hw->media_type == e1000_media_type_fiber ||
  1197. hw->media_type == e1000_media_type_internal_serdes)
  1198. tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
  1199. else
  1200. tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
  1201. switch (hw->mac_type) {
  1202. case e1000_82542_rev2_0:
  1203. case e1000_82542_rev2_1:
  1204. tipg = DEFAULT_82542_TIPG_IPGT;
  1205. ipgr1 = DEFAULT_82542_TIPG_IPGR1;
  1206. ipgr2 = DEFAULT_82542_TIPG_IPGR2;
  1207. break;
  1208. default:
  1209. ipgr1 = DEFAULT_82543_TIPG_IPGR1;
  1210. ipgr2 = DEFAULT_82543_TIPG_IPGR2;
  1211. break;
  1212. }
  1213. tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
  1214. tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
  1215. E1000_WRITE_REG(hw, TIPG, tipg);
  1216. /* Set the Tx Interrupt Delay register */
  1217. E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
  1218. if (hw->mac_type >= e1000_82540)
  1219. E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
  1220. /* Program the Transmit Control Register */
  1221. tctl = E1000_READ_REG(hw, TCTL);
  1222. tctl &= ~E1000_TCTL_CT;
  1223. tctl |= E1000_TCTL_EN | E1000_TCTL_PSP | E1000_TCTL_RTLC |
  1224. (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
  1225. E1000_WRITE_REG(hw, TCTL, tctl);
  1226. if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
  1227. tarc = E1000_READ_REG(hw, TARC0);
  1228. tarc |= ((1 << 25) | (1 << 21));
  1229. E1000_WRITE_REG(hw, TARC0, tarc);
  1230. tarc = E1000_READ_REG(hw, TARC1);
  1231. tarc |= (1 << 25);
  1232. if (tctl & E1000_TCTL_MULR)
  1233. tarc &= ~(1 << 28);
  1234. else
  1235. tarc |= (1 << 28);
  1236. E1000_WRITE_REG(hw, TARC1, tarc);
  1237. }
  1238. e1000_config_collision_dist(hw);
  1239. /* Setup Transmit Descriptor Settings for eop descriptor */
  1240. adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
  1241. E1000_TXD_CMD_IFCS;
  1242. if (hw->mac_type < e1000_82543)
  1243. adapter->txd_cmd |= E1000_TXD_CMD_RPS;
  1244. else
  1245. adapter->txd_cmd |= E1000_TXD_CMD_RS;
  1246. /* Cache if we're 82544 running in PCI-X because we'll
  1247. * need this to apply a workaround later in the send path. */
  1248. if (hw->mac_type == e1000_82544 &&
  1249. hw->bus_type == e1000_bus_type_pcix)
  1250. adapter->pcix_82544 = 1;
  1251. }
  1252. /**
  1253. * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
  1254. * @adapter: board private structure
  1255. * @rxdr: rx descriptor ring (for a specific queue) to setup
  1256. *
  1257. * Returns 0 on success, negative on failure
  1258. **/
  1259. static int
  1260. e1000_setup_rx_resources(struct e1000_adapter *adapter,
  1261. struct e1000_rx_ring *rxdr)
  1262. {
  1263. struct pci_dev *pdev = adapter->pdev;
  1264. int size, desc_len;
  1265. size = sizeof(struct e1000_buffer) * rxdr->count;
  1266. rxdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
  1267. if (!rxdr->buffer_info) {
  1268. DPRINTK(PROBE, ERR,
  1269. "Unable to allocate memory for the receive descriptor ring\n");
  1270. return -ENOMEM;
  1271. }
  1272. memset(rxdr->buffer_info, 0, size);
  1273. size = sizeof(struct e1000_ps_page) * rxdr->count;
  1274. rxdr->ps_page = kmalloc(size, GFP_KERNEL);
  1275. if(!rxdr->ps_page) {
  1276. vfree(rxdr->buffer_info);
  1277. DPRINTK(PROBE, ERR,
  1278. "Unable to allocate memory for the receive descriptor ring\n");
  1279. return -ENOMEM;
  1280. }
  1281. memset(rxdr->ps_page, 0, size);
  1282. size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
  1283. rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
  1284. if(!rxdr->ps_page_dma) {
  1285. vfree(rxdr->buffer_info);
  1286. kfree(rxdr->ps_page);
  1287. DPRINTK(PROBE, ERR,
  1288. "Unable to allocate memory for the receive descriptor ring\n");
  1289. return -ENOMEM;
  1290. }
  1291. memset(rxdr->ps_page_dma, 0, size);
  1292. if(adapter->hw.mac_type <= e1000_82547_rev_2)
  1293. desc_len = sizeof(struct e1000_rx_desc);
  1294. else
  1295. desc_len = sizeof(union e1000_rx_desc_packet_split);
  1296. /* Round up to nearest 4K */
  1297. rxdr->size = rxdr->count * desc_len;
  1298. E1000_ROUNDUP(rxdr->size, 4096);
  1299. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1300. if (!rxdr->desc) {
  1301. DPRINTK(PROBE, ERR,
  1302. "Unable to allocate memory for the receive descriptor ring\n");
  1303. setup_rx_desc_die:
  1304. vfree(rxdr->buffer_info);
  1305. kfree(rxdr->ps_page);
  1306. kfree(rxdr->ps_page_dma);
  1307. return -ENOMEM;
  1308. }
  1309. /* Fix for errata 23, can't cross 64kB boundary */
  1310. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1311. void *olddesc = rxdr->desc;
  1312. dma_addr_t olddma = rxdr->dma;
  1313. DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
  1314. "at %p\n", rxdr->size, rxdr->desc);
  1315. /* Try again, without freeing the previous */
  1316. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1317. /* Failed allocation, critical failure */
  1318. if (!rxdr->desc) {
  1319. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1320. DPRINTK(PROBE, ERR,
  1321. "Unable to allocate memory "
  1322. "for the receive descriptor ring\n");
  1323. goto setup_rx_desc_die;
  1324. }
  1325. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1326. /* give up */
  1327. pci_free_consistent(pdev, rxdr->size, rxdr->desc,
  1328. rxdr->dma);
  1329. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1330. DPRINTK(PROBE, ERR,
  1331. "Unable to allocate aligned memory "
  1332. "for the receive descriptor ring\n");
  1333. goto setup_rx_desc_die;
  1334. } else {
  1335. /* Free old allocation, new allocation was successful */
  1336. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1337. }
  1338. }
  1339. memset(rxdr->desc, 0, rxdr->size);
  1340. rxdr->next_to_clean = 0;
  1341. rxdr->next_to_use = 0;
  1342. rxdr->rx_skb_top = NULL;
  1343. rxdr->rx_skb_prev = NULL;
  1344. return 0;
  1345. }
  1346. /**
  1347. * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
  1348. * (Descriptors) for all queues
  1349. * @adapter: board private structure
  1350. *
  1351. * If this function returns with an error, then it's possible one or
  1352. * more of the rings is populated (while the rest are not). It is the
  1353. * callers duty to clean those orphaned rings.
  1354. *
  1355. * Return 0 on success, negative on failure
  1356. **/
  1357. int
  1358. e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
  1359. {
  1360. int i, err = 0;
  1361. for (i = 0; i < adapter->num_rx_queues; i++) {
  1362. err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
  1363. if (err) {
  1364. DPRINTK(PROBE, ERR,
  1365. "Allocation for Rx Queue %u failed\n", i);
  1366. break;
  1367. }
  1368. }
  1369. return err;
  1370. }
  1371. /**
  1372. * e1000_setup_rctl - configure the receive control registers
  1373. * @adapter: Board private structure
  1374. **/
  1375. #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
  1376. (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
  1377. static void
  1378. e1000_setup_rctl(struct e1000_adapter *adapter)
  1379. {
  1380. uint32_t rctl, rfctl;
  1381. uint32_t psrctl = 0;
  1382. #ifdef CONFIG_E1000_PACKET_SPLIT
  1383. uint32_t pages = 0;
  1384. #endif
  1385. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1386. rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
  1387. rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
  1388. E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
  1389. (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
  1390. if (adapter->hw.mac_type > e1000_82543)
  1391. rctl |= E1000_RCTL_SECRC;
  1392. if (adapter->hw.tbi_compatibility_on == 1)
  1393. rctl |= E1000_RCTL_SBP;
  1394. else
  1395. rctl &= ~E1000_RCTL_SBP;
  1396. if (adapter->netdev->mtu <= ETH_DATA_LEN)
  1397. rctl &= ~E1000_RCTL_LPE;
  1398. else
  1399. rctl |= E1000_RCTL_LPE;
  1400. /* Setup buffer sizes */
  1401. if(adapter->hw.mac_type >= e1000_82571) {
  1402. /* We can now specify buffers in 1K increments.
  1403. * BSIZE and BSEX are ignored in this case. */
  1404. rctl |= adapter->rx_buffer_len << 0x11;
  1405. } else {
  1406. rctl &= ~E1000_RCTL_SZ_4096;
  1407. rctl |= E1000_RCTL_BSEX;
  1408. switch (adapter->rx_buffer_len) {
  1409. case E1000_RXBUFFER_2048:
  1410. default:
  1411. rctl |= E1000_RCTL_SZ_2048;
  1412. rctl &= ~E1000_RCTL_BSEX;
  1413. break;
  1414. case E1000_RXBUFFER_4096:
  1415. rctl |= E1000_RCTL_SZ_4096;
  1416. break;
  1417. case E1000_RXBUFFER_8192:
  1418. rctl |= E1000_RCTL_SZ_8192;
  1419. break;
  1420. case E1000_RXBUFFER_16384:
  1421. rctl |= E1000_RCTL_SZ_16384;
  1422. break;
  1423. }
  1424. }
  1425. #ifdef CONFIG_E1000_PACKET_SPLIT
  1426. /* 82571 and greater support packet-split where the protocol
  1427. * header is placed in skb->data and the packet data is
  1428. * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
  1429. * In the case of a non-split, skb->data is linearly filled,
  1430. * followed by the page buffers. Therefore, skb->data is
  1431. * sized to hold the largest protocol header.
  1432. */
  1433. pages = PAGE_USE_COUNT(adapter->netdev->mtu);
  1434. if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
  1435. PAGE_SIZE <= 16384)
  1436. adapter->rx_ps_pages = pages;
  1437. else
  1438. adapter->rx_ps_pages = 0;
  1439. #endif
  1440. if (adapter->rx_ps_pages) {
  1441. /* Configure extra packet-split registers */
  1442. rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
  1443. rfctl |= E1000_RFCTL_EXTEN;
  1444. /* disable IPv6 packet split support */
  1445. rfctl |= E1000_RFCTL_IPV6_DIS;
  1446. E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
  1447. rctl |= E1000_RCTL_DTYP_PS | E1000_RCTL_SECRC;
  1448. psrctl |= adapter->rx_ps_bsize0 >>
  1449. E1000_PSRCTL_BSIZE0_SHIFT;
  1450. switch (adapter->rx_ps_pages) {
  1451. case 3:
  1452. psrctl |= PAGE_SIZE <<
  1453. E1000_PSRCTL_BSIZE3_SHIFT;
  1454. case 2:
  1455. psrctl |= PAGE_SIZE <<
  1456. E1000_PSRCTL_BSIZE2_SHIFT;
  1457. case 1:
  1458. psrctl |= PAGE_SIZE >>
  1459. E1000_PSRCTL_BSIZE1_SHIFT;
  1460. break;
  1461. }
  1462. E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
  1463. }
  1464. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1465. }
  1466. /**
  1467. * e1000_configure_rx - Configure 8254x Receive Unit after Reset
  1468. * @adapter: board private structure
  1469. *
  1470. * Configure the Rx unit of the MAC after a reset.
  1471. **/
  1472. static void
  1473. e1000_configure_rx(struct e1000_adapter *adapter)
  1474. {
  1475. uint64_t rdba;
  1476. struct e1000_hw *hw = &adapter->hw;
  1477. uint32_t rdlen, rctl, rxcsum, ctrl_ext;
  1478. #ifdef CONFIG_E1000_MQ
  1479. uint32_t reta, mrqc;
  1480. int i;
  1481. #endif
  1482. if (adapter->rx_ps_pages) {
  1483. rdlen = adapter->rx_ring[0].count *
  1484. sizeof(union e1000_rx_desc_packet_split);
  1485. adapter->clean_rx = e1000_clean_rx_irq_ps;
  1486. adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
  1487. } else {
  1488. rdlen = adapter->rx_ring[0].count *
  1489. sizeof(struct e1000_rx_desc);
  1490. adapter->clean_rx = e1000_clean_rx_irq;
  1491. adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
  1492. }
  1493. /* disable receives while setting up the descriptors */
  1494. rctl = E1000_READ_REG(hw, RCTL);
  1495. E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
  1496. /* set the Receive Delay Timer Register */
  1497. E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
  1498. if (hw->mac_type >= e1000_82540) {
  1499. E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
  1500. if(adapter->itr > 1)
  1501. E1000_WRITE_REG(hw, ITR,
  1502. 1000000000 / (adapter->itr * 256));
  1503. }
  1504. if (hw->mac_type >= e1000_82571) {
  1505. ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
  1506. /* Reset delay timers after every interrupt */
  1507. ctrl_ext |= E1000_CTRL_EXT_CANC;
  1508. #ifdef CONFIG_E1000_NAPI
  1509. /* Auto-Mask interrupts upon ICR read. */
  1510. ctrl_ext |= E1000_CTRL_EXT_IAME;
  1511. #endif
  1512. E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
  1513. E1000_WRITE_REG(hw, IAM, ~0);
  1514. E1000_WRITE_FLUSH(hw);
  1515. }
  1516. /* Setup the HW Rx Head and Tail Descriptor Pointers and
  1517. * the Base and Length of the Rx Descriptor Ring */
  1518. switch (adapter->num_rx_queues) {
  1519. #ifdef CONFIG_E1000_MQ
  1520. case 2:
  1521. rdba = adapter->rx_ring[1].dma;
  1522. E1000_WRITE_REG(hw, RDBAL1, (rdba & 0x00000000ffffffffULL));
  1523. E1000_WRITE_REG(hw, RDBAH1, (rdba >> 32));
  1524. E1000_WRITE_REG(hw, RDLEN1, rdlen);
  1525. E1000_WRITE_REG(hw, RDH1, 0);
  1526. E1000_WRITE_REG(hw, RDT1, 0);
  1527. adapter->rx_ring[1].rdh = E1000_RDH1;
  1528. adapter->rx_ring[1].rdt = E1000_RDT1;
  1529. /* Fall Through */
  1530. #endif
  1531. case 1:
  1532. default:
  1533. rdba = adapter->rx_ring[0].dma;
  1534. E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
  1535. E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
  1536. E1000_WRITE_REG(hw, RDLEN, rdlen);
  1537. E1000_WRITE_REG(hw, RDH, 0);
  1538. E1000_WRITE_REG(hw, RDT, 0);
  1539. adapter->rx_ring[0].rdh = E1000_RDH;
  1540. adapter->rx_ring[0].rdt = E1000_RDT;
  1541. break;
  1542. }
  1543. #ifdef CONFIG_E1000_MQ
  1544. if (adapter->num_rx_queues > 1) {
  1545. uint32_t random[10];
  1546. get_random_bytes(&random[0], 40);
  1547. if (hw->mac_type <= e1000_82572) {
  1548. E1000_WRITE_REG(hw, RSSIR, 0);
  1549. E1000_WRITE_REG(hw, RSSIM, 0);
  1550. }
  1551. switch (adapter->num_rx_queues) {
  1552. case 2:
  1553. default:
  1554. reta = 0x00800080;
  1555. mrqc = E1000_MRQC_ENABLE_RSS_2Q;
  1556. break;
  1557. }
  1558. /* Fill out redirection table */
  1559. for (i = 0; i < 32; i++)
  1560. E1000_WRITE_REG_ARRAY(hw, RETA, i, reta);
  1561. /* Fill out hash function seeds */
  1562. for (i = 0; i < 10; i++)
  1563. E1000_WRITE_REG_ARRAY(hw, RSSRK, i, random[i]);
  1564. mrqc |= (E1000_MRQC_RSS_FIELD_IPV4 |
  1565. E1000_MRQC_RSS_FIELD_IPV4_TCP);
  1566. E1000_WRITE_REG(hw, MRQC, mrqc);
  1567. }
  1568. /* Multiqueue and packet checksumming are mutually exclusive. */
  1569. if (hw->mac_type >= e1000_82571) {
  1570. rxcsum = E1000_READ_REG(hw, RXCSUM);
  1571. rxcsum |= E1000_RXCSUM_PCSD;
  1572. E1000_WRITE_REG(hw, RXCSUM, rxcsum);
  1573. }
  1574. #else
  1575. /* Enable 82543 Receive Checksum Offload for TCP and UDP */
  1576. if (hw->mac_type >= e1000_82543) {
  1577. rxcsum = E1000_READ_REG(hw, RXCSUM);
  1578. if(adapter->rx_csum == TRUE) {
  1579. rxcsum |= E1000_RXCSUM_TUOFL;
  1580. /* Enable 82571 IPv4 payload checksum for UDP fragments
  1581. * Must be used in conjunction with packet-split. */
  1582. if ((hw->mac_type >= e1000_82571) &&
  1583. (adapter->rx_ps_pages)) {
  1584. rxcsum |= E1000_RXCSUM_IPPCSE;
  1585. }
  1586. } else {
  1587. rxcsum &= ~E1000_RXCSUM_TUOFL;
  1588. /* don't need to clear IPPCSE as it defaults to 0 */
  1589. }
  1590. E1000_WRITE_REG(hw, RXCSUM, rxcsum);
  1591. }
  1592. #endif /* CONFIG_E1000_MQ */
  1593. if (hw->mac_type == e1000_82573)
  1594. E1000_WRITE_REG(hw, ERT, 0x0100);
  1595. /* Enable Receives */
  1596. E1000_WRITE_REG(hw, RCTL, rctl);
  1597. }
  1598. /**
  1599. * e1000_free_tx_resources - Free Tx Resources per Queue
  1600. * @adapter: board private structure
  1601. * @tx_ring: Tx descriptor ring for a specific queue
  1602. *
  1603. * Free all transmit software resources
  1604. **/
  1605. static void
  1606. e1000_free_tx_resources(struct e1000_adapter *adapter,
  1607. struct e1000_tx_ring *tx_ring)
  1608. {
  1609. struct pci_dev *pdev = adapter->pdev;
  1610. e1000_clean_tx_ring(adapter, tx_ring);
  1611. vfree(tx_ring->buffer_info);
  1612. tx_ring->buffer_info = NULL;
  1613. pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
  1614. tx_ring->desc = NULL;
  1615. }
  1616. /**
  1617. * e1000_free_all_tx_resources - Free Tx Resources for All Queues
  1618. * @adapter: board private structure
  1619. *
  1620. * Free all transmit software resources
  1621. **/
  1622. void
  1623. e1000_free_all_tx_resources(struct e1000_adapter *adapter)
  1624. {
  1625. int i;
  1626. for (i = 0; i < adapter->num_tx_queues; i++)
  1627. e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
  1628. }
  1629. static inline void
  1630. e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
  1631. struct e1000_buffer *buffer_info)
  1632. {
  1633. if(buffer_info->dma) {
  1634. pci_unmap_page(adapter->pdev,
  1635. buffer_info->dma,
  1636. buffer_info->length,
  1637. PCI_DMA_TODEVICE);
  1638. buffer_info->dma = 0;
  1639. }
  1640. if(buffer_info->skb) {
  1641. dev_kfree_skb_any(buffer_info->skb);
  1642. buffer_info->skb = NULL;
  1643. }
  1644. }
  1645. /**
  1646. * e1000_clean_tx_ring - Free Tx Buffers
  1647. * @adapter: board private structure
  1648. * @tx_ring: ring to be cleaned
  1649. **/
  1650. static void
  1651. e1000_clean_tx_ring(struct e1000_adapter *adapter,
  1652. struct e1000_tx_ring *tx_ring)
  1653. {
  1654. struct e1000_buffer *buffer_info;
  1655. unsigned long size;
  1656. unsigned int i;
  1657. /* Free all the Tx ring sk_buffs */
  1658. for(i = 0; i < tx_ring->count; i++) {
  1659. buffer_info = &tx_ring->buffer_info[i];
  1660. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  1661. }
  1662. size = sizeof(struct e1000_buffer) * tx_ring->count;
  1663. memset(tx_ring->buffer_info, 0, size);
  1664. /* Zero out the descriptor ring */
  1665. memset(tx_ring->desc, 0, tx_ring->size);
  1666. tx_ring->next_to_use = 0;
  1667. tx_ring->next_to_clean = 0;
  1668. tx_ring->last_tx_tso = 0;
  1669. writel(0, adapter->hw.hw_addr + tx_ring->tdh);
  1670. writel(0, adapter->hw.hw_addr + tx_ring->tdt);
  1671. }
  1672. /**
  1673. * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
  1674. * @adapter: board private structure
  1675. **/
  1676. static void
  1677. e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
  1678. {
  1679. int i;
  1680. for (i = 0; i < adapter->num_tx_queues; i++)
  1681. e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
  1682. }
  1683. /**
  1684. * e1000_free_rx_resources - Free Rx Resources
  1685. * @adapter: board private structure
  1686. * @rx_ring: ring to clean the resources from
  1687. *
  1688. * Free all receive software resources
  1689. **/
  1690. static void
  1691. e1000_free_rx_resources(struct e1000_adapter *adapter,
  1692. struct e1000_rx_ring *rx_ring)
  1693. {
  1694. struct pci_dev *pdev = adapter->pdev;
  1695. e1000_clean_rx_ring(adapter, rx_ring);
  1696. vfree(rx_ring->buffer_info);
  1697. rx_ring->buffer_info = NULL;
  1698. kfree(rx_ring->ps_page);
  1699. rx_ring->ps_page = NULL;
  1700. kfree(rx_ring->ps_page_dma);
  1701. rx_ring->ps_page_dma = NULL;
  1702. pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
  1703. rx_ring->desc = NULL;
  1704. }
  1705. /**
  1706. * e1000_free_all_rx_resources - Free Rx Resources for All Queues
  1707. * @adapter: board private structure
  1708. *
  1709. * Free all receive software resources
  1710. **/
  1711. void
  1712. e1000_free_all_rx_resources(struct e1000_adapter *adapter)
  1713. {
  1714. int i;
  1715. for (i = 0; i < adapter->num_rx_queues; i++)
  1716. e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
  1717. }
  1718. /**
  1719. * e1000_clean_rx_ring - Free Rx Buffers per Queue
  1720. * @adapter: board private structure
  1721. * @rx_ring: ring to free buffers from
  1722. **/
  1723. static void
  1724. e1000_clean_rx_ring(struct e1000_adapter *adapter,
  1725. struct e1000_rx_ring *rx_ring)
  1726. {
  1727. struct e1000_buffer *buffer_info;
  1728. struct e1000_ps_page *ps_page;
  1729. struct e1000_ps_page_dma *ps_page_dma;
  1730. struct pci_dev *pdev = adapter->pdev;
  1731. unsigned long size;
  1732. unsigned int i, j;
  1733. /* Free all the Rx ring sk_buffs */
  1734. for(i = 0; i < rx_ring->count; i++) {
  1735. buffer_info = &rx_ring->buffer_info[i];
  1736. if(buffer_info->skb) {
  1737. ps_page = &rx_ring->ps_page[i];
  1738. ps_page_dma = &rx_ring->ps_page_dma[i];
  1739. pci_unmap_single(pdev,
  1740. buffer_info->dma,
  1741. buffer_info->length,
  1742. PCI_DMA_FROMDEVICE);
  1743. dev_kfree_skb(buffer_info->skb);
  1744. buffer_info->skb = NULL;
  1745. }
  1746. ps_page = &rx_ring->ps_page[i];
  1747. ps_page_dma = &rx_ring->ps_page_dma[i];
  1748. for (j = 0; j < adapter->rx_ps_pages; j++) {
  1749. if (!ps_page->ps_page[j]) break;
  1750. pci_unmap_page(pdev,
  1751. ps_page_dma->ps_page_dma[j],
  1752. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  1753. ps_page_dma->ps_page_dma[j] = 0;
  1754. put_page(ps_page->ps_page[j]);
  1755. ps_page->ps_page[j] = NULL;
  1756. }
  1757. }
  1758. /* there also may be some cached data in our adapter */
  1759. if (rx_ring->rx_skb_top) {
  1760. dev_kfree_skb(rx_ring->rx_skb_top);
  1761. /* rx_skb_prev will be wiped out by rx_skb_top */
  1762. rx_ring->rx_skb_top = NULL;
  1763. rx_ring->rx_skb_prev = NULL;
  1764. }
  1765. size = sizeof(struct e1000_buffer) * rx_ring->count;
  1766. memset(rx_ring->buffer_info, 0, size);
  1767. size = sizeof(struct e1000_ps_page) * rx_ring->count;
  1768. memset(rx_ring->ps_page, 0, size);
  1769. size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
  1770. memset(rx_ring->ps_page_dma, 0, size);
  1771. /* Zero out the descriptor ring */
  1772. memset(rx_ring->desc, 0, rx_ring->size);
  1773. rx_ring->next_to_clean = 0;
  1774. rx_ring->next_to_use = 0;
  1775. writel(0, adapter->hw.hw_addr + rx_ring->rdh);
  1776. writel(0, adapter->hw.hw_addr + rx_ring->rdt);
  1777. }
  1778. /**
  1779. * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
  1780. * @adapter: board private structure
  1781. **/
  1782. static void
  1783. e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
  1784. {
  1785. int i;
  1786. for (i = 0; i < adapter->num_rx_queues; i++)
  1787. e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
  1788. }
  1789. /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
  1790. * and memory write and invalidate disabled for certain operations
  1791. */
  1792. static void
  1793. e1000_enter_82542_rst(struct e1000_adapter *adapter)
  1794. {
  1795. struct net_device *netdev = adapter->netdev;
  1796. uint32_t rctl;
  1797. e1000_pci_clear_mwi(&adapter->hw);
  1798. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1799. rctl |= E1000_RCTL_RST;
  1800. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1801. E1000_WRITE_FLUSH(&adapter->hw);
  1802. mdelay(5);
  1803. if(netif_running(netdev))
  1804. e1000_clean_all_rx_rings(adapter);
  1805. }
  1806. static void
  1807. e1000_leave_82542_rst(struct e1000_adapter *adapter)
  1808. {
  1809. struct net_device *netdev = adapter->netdev;
  1810. uint32_t rctl;
  1811. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1812. rctl &= ~E1000_RCTL_RST;
  1813. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1814. E1000_WRITE_FLUSH(&adapter->hw);
  1815. mdelay(5);
  1816. if(adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
  1817. e1000_pci_set_mwi(&adapter->hw);
  1818. if(netif_running(netdev)) {
  1819. e1000_configure_rx(adapter);
  1820. /* No need to loop, because 82542 supports only 1 queue */
  1821. struct e1000_rx_ring *ring = &adapter->rx_ring[0];
  1822. adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
  1823. }
  1824. }
  1825. /**
  1826. * e1000_set_mac - Change the Ethernet Address of the NIC
  1827. * @netdev: network interface device structure
  1828. * @p: pointer to an address structure
  1829. *
  1830. * Returns 0 on success, negative on failure
  1831. **/
  1832. static int
  1833. e1000_set_mac(struct net_device *netdev, void *p)
  1834. {
  1835. struct e1000_adapter *adapter = netdev_priv(netdev);
  1836. struct sockaddr *addr = p;
  1837. if(!is_valid_ether_addr(addr->sa_data))
  1838. return -EADDRNOTAVAIL;
  1839. /* 82542 2.0 needs to be in reset to write receive address registers */
  1840. if(adapter->hw.mac_type == e1000_82542_rev2_0)
  1841. e1000_enter_82542_rst(adapter);
  1842. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  1843. memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
  1844. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  1845. /* With 82571 controllers, LAA may be overwritten (with the default)
  1846. * due to controller reset from the other port. */
  1847. if (adapter->hw.mac_type == e1000_82571) {
  1848. /* activate the work around */
  1849. adapter->hw.laa_is_present = 1;
  1850. /* Hold a copy of the LAA in RAR[14] This is done so that
  1851. * between the time RAR[0] gets clobbered and the time it
  1852. * gets fixed (in e1000_watchdog), the actual LAA is in one
  1853. * of the RARs and no incoming packets directed to this port
  1854. * are dropped. Eventaully the LAA will be in RAR[0] and
  1855. * RAR[14] */
  1856. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
  1857. E1000_RAR_ENTRIES - 1);
  1858. }
  1859. if(adapter->hw.mac_type == e1000_82542_rev2_0)
  1860. e1000_leave_82542_rst(adapter);
  1861. return 0;
  1862. }
  1863. /**
  1864. * e1000_set_multi - Multicast and Promiscuous mode set
  1865. * @netdev: network interface device structure
  1866. *
  1867. * The set_multi entry point is called whenever the multicast address
  1868. * list or the network interface flags are updated. This routine is
  1869. * responsible for configuring the hardware for proper multicast,
  1870. * promiscuous mode, and all-multi behavior.
  1871. **/
  1872. static void
  1873. e1000_set_multi(struct net_device *netdev)
  1874. {
  1875. struct e1000_adapter *adapter = netdev_priv(netdev);
  1876. struct e1000_hw *hw = &adapter->hw;
  1877. struct dev_mc_list *mc_ptr;
  1878. uint32_t rctl;
  1879. uint32_t hash_value;
  1880. int i, rar_entries = E1000_RAR_ENTRIES;
  1881. /* reserve RAR[14] for LAA over-write work-around */
  1882. if (adapter->hw.mac_type == e1000_82571)
  1883. rar_entries--;
  1884. /* Check for Promiscuous and All Multicast modes */
  1885. rctl = E1000_READ_REG(hw, RCTL);
  1886. if(netdev->flags & IFF_PROMISC) {
  1887. rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
  1888. } else if(netdev->flags & IFF_ALLMULTI) {
  1889. rctl |= E1000_RCTL_MPE;
  1890. rctl &= ~E1000_RCTL_UPE;
  1891. } else {
  1892. rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
  1893. }
  1894. E1000_WRITE_REG(hw, RCTL, rctl);
  1895. /* 82542 2.0 needs to be in reset to write receive address registers */
  1896. if(hw->mac_type == e1000_82542_rev2_0)
  1897. e1000_enter_82542_rst(adapter);
  1898. /* load the first 14 multicast address into the exact filters 1-14
  1899. * RAR 0 is used for the station MAC adddress
  1900. * if there are not 14 addresses, go ahead and clear the filters
  1901. * -- with 82571 controllers only 0-13 entries are filled here
  1902. */
  1903. mc_ptr = netdev->mc_list;
  1904. for(i = 1; i < rar_entries; i++) {
  1905. if (mc_ptr) {
  1906. e1000_rar_set(hw, mc_ptr->dmi_addr, i);
  1907. mc_ptr = mc_ptr->next;
  1908. } else {
  1909. E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
  1910. E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
  1911. }
  1912. }
  1913. /* clear the old settings from the multicast hash table */
  1914. for(i = 0; i < E1000_NUM_MTA_REGISTERS; i++)
  1915. E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
  1916. /* load any remaining addresses into the hash table */
  1917. for(; mc_ptr; mc_ptr = mc_ptr->next) {
  1918. hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
  1919. e1000_mta_set(hw, hash_value);
  1920. }
  1921. if(hw->mac_type == e1000_82542_rev2_0)
  1922. e1000_leave_82542_rst(adapter);
  1923. }
  1924. /* Need to wait a few seconds after link up to get diagnostic information from
  1925. * the phy */
  1926. static void
  1927. e1000_update_phy_info(unsigned long data)
  1928. {
  1929. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1930. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  1931. }
  1932. /**
  1933. * e1000_82547_tx_fifo_stall - Timer Call-back
  1934. * @data: pointer to adapter cast into an unsigned long
  1935. **/
  1936. static void
  1937. e1000_82547_tx_fifo_stall(unsigned long data)
  1938. {
  1939. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1940. struct net_device *netdev = adapter->netdev;
  1941. uint32_t tctl;
  1942. if(atomic_read(&adapter->tx_fifo_stall)) {
  1943. if((E1000_READ_REG(&adapter->hw, TDT) ==
  1944. E1000_READ_REG(&adapter->hw, TDH)) &&
  1945. (E1000_READ_REG(&adapter->hw, TDFT) ==
  1946. E1000_READ_REG(&adapter->hw, TDFH)) &&
  1947. (E1000_READ_REG(&adapter->hw, TDFTS) ==
  1948. E1000_READ_REG(&adapter->hw, TDFHS))) {
  1949. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  1950. E1000_WRITE_REG(&adapter->hw, TCTL,
  1951. tctl & ~E1000_TCTL_EN);
  1952. E1000_WRITE_REG(&adapter->hw, TDFT,
  1953. adapter->tx_head_addr);
  1954. E1000_WRITE_REG(&adapter->hw, TDFH,
  1955. adapter->tx_head_addr);
  1956. E1000_WRITE_REG(&adapter->hw, TDFTS,
  1957. adapter->tx_head_addr);
  1958. E1000_WRITE_REG(&adapter->hw, TDFHS,
  1959. adapter->tx_head_addr);
  1960. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  1961. E1000_WRITE_FLUSH(&adapter->hw);
  1962. adapter->tx_fifo_head = 0;
  1963. atomic_set(&adapter->tx_fifo_stall, 0);
  1964. netif_wake_queue(netdev);
  1965. } else {
  1966. mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
  1967. }
  1968. }
  1969. }
  1970. /**
  1971. * e1000_watchdog - Timer Call-back
  1972. * @data: pointer to adapter cast into an unsigned long
  1973. **/
  1974. static void
  1975. e1000_watchdog(unsigned long data)
  1976. {
  1977. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1978. /* Do the rest outside of interrupt context */
  1979. schedule_work(&adapter->watchdog_task);
  1980. }
  1981. static void
  1982. e1000_watchdog_task(struct e1000_adapter *adapter)
  1983. {
  1984. struct net_device *netdev = adapter->netdev;
  1985. struct e1000_tx_ring *txdr = adapter->tx_ring;
  1986. uint32_t link;
  1987. e1000_check_for_link(&adapter->hw);
  1988. if (adapter->hw.mac_type == e1000_82573) {
  1989. e1000_enable_tx_pkt_filtering(&adapter->hw);
  1990. if(adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
  1991. e1000_update_mng_vlan(adapter);
  1992. }
  1993. if((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
  1994. !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
  1995. link = !adapter->hw.serdes_link_down;
  1996. else
  1997. link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
  1998. if(link) {
  1999. if(!netif_carrier_ok(netdev)) {
  2000. e1000_get_speed_and_duplex(&adapter->hw,
  2001. &adapter->link_speed,
  2002. &adapter->link_duplex);
  2003. DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
  2004. adapter->link_speed,
  2005. adapter->link_duplex == FULL_DUPLEX ?
  2006. "Full Duplex" : "Half Duplex");
  2007. /* tweak tx_queue_len according to speed/duplex */
  2008. netdev->tx_queue_len = adapter->tx_queue_len;
  2009. adapter->tx_timeout_factor = 1;
  2010. if (adapter->link_duplex == HALF_DUPLEX) {
  2011. switch (adapter->link_speed) {
  2012. case SPEED_10:
  2013. netdev->tx_queue_len = 10;
  2014. adapter->tx_timeout_factor = 8;
  2015. break;
  2016. case SPEED_100:
  2017. netdev->tx_queue_len = 100;
  2018. break;
  2019. }
  2020. }
  2021. netif_carrier_on(netdev);
  2022. netif_wake_queue(netdev);
  2023. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  2024. adapter->smartspeed = 0;
  2025. }
  2026. } else {
  2027. if(netif_carrier_ok(netdev)) {
  2028. adapter->link_speed = 0;
  2029. adapter->link_duplex = 0;
  2030. DPRINTK(LINK, INFO, "NIC Link is Down\n");
  2031. netif_carrier_off(netdev);
  2032. netif_stop_queue(netdev);
  2033. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  2034. }
  2035. e1000_smartspeed(adapter);
  2036. }
  2037. e1000_update_stats(adapter);
  2038. adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
  2039. adapter->tpt_old = adapter->stats.tpt;
  2040. adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
  2041. adapter->colc_old = adapter->stats.colc;
  2042. adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
  2043. adapter->gorcl_old = adapter->stats.gorcl;
  2044. adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
  2045. adapter->gotcl_old = adapter->stats.gotcl;
  2046. e1000_update_adaptive(&adapter->hw);
  2047. #ifdef CONFIG_E1000_MQ
  2048. txdr = *per_cpu_ptr(adapter->cpu_tx_ring, smp_processor_id());
  2049. #endif
  2050. if (!netif_carrier_ok(netdev)) {
  2051. if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
  2052. /* We've lost link, so the controller stops DMA,
  2053. * but we've got queued Tx work that's never going
  2054. * to get done, so reset controller to flush Tx.
  2055. * (Do the reset outside of interrupt context). */
  2056. schedule_work(&adapter->tx_timeout_task);
  2057. }
  2058. }
  2059. /* Dynamic mode for Interrupt Throttle Rate (ITR) */
  2060. if(adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
  2061. /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
  2062. * asymmetrical Tx or Rx gets ITR=8000; everyone
  2063. * else is between 2000-8000. */
  2064. uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
  2065. uint32_t dif = (adapter->gotcl > adapter->gorcl ?
  2066. adapter->gotcl - adapter->gorcl :
  2067. adapter->gorcl - adapter->gotcl) / 10000;
  2068. uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
  2069. E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
  2070. }
  2071. /* Cause software interrupt to ensure rx ring is cleaned */
  2072. E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
  2073. /* Force detection of hung controller every watchdog period */
  2074. adapter->detect_tx_hung = TRUE;
  2075. /* With 82571 controllers, LAA may be overwritten due to controller
  2076. * reset from the other port. Set the appropriate LAA in RAR[0] */
  2077. if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
  2078. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  2079. /* Reset the timer */
  2080. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  2081. }
  2082. #define E1000_TX_FLAGS_CSUM 0x00000001
  2083. #define E1000_TX_FLAGS_VLAN 0x00000002
  2084. #define E1000_TX_FLAGS_TSO 0x00000004
  2085. #define E1000_TX_FLAGS_IPV4 0x00000008
  2086. #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
  2087. #define E1000_TX_FLAGS_VLAN_SHIFT 16
  2088. static inline int
  2089. e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2090. struct sk_buff *skb)
  2091. {
  2092. #ifdef NETIF_F_TSO
  2093. struct e1000_context_desc *context_desc;
  2094. struct e1000_buffer *buffer_info;
  2095. unsigned int i;
  2096. uint32_t cmd_length = 0;
  2097. uint16_t ipcse = 0, tucse, mss;
  2098. uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
  2099. int err;
  2100. if(skb_shinfo(skb)->tso_size) {
  2101. if (skb_header_cloned(skb)) {
  2102. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  2103. if (err)
  2104. return err;
  2105. }
  2106. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2107. mss = skb_shinfo(skb)->tso_size;
  2108. if(skb->protocol == ntohs(ETH_P_IP)) {
  2109. skb->nh.iph->tot_len = 0;
  2110. skb->nh.iph->check = 0;
  2111. skb->h.th->check =
  2112. ~csum_tcpudp_magic(skb->nh.iph->saddr,
  2113. skb->nh.iph->daddr,
  2114. 0,
  2115. IPPROTO_TCP,
  2116. 0);
  2117. cmd_length = E1000_TXD_CMD_IP;
  2118. ipcse = skb->h.raw - skb->data - 1;
  2119. #ifdef NETIF_F_TSO_IPV6
  2120. } else if(skb->protocol == ntohs(ETH_P_IPV6)) {
  2121. skb->nh.ipv6h->payload_len = 0;
  2122. skb->h.th->check =
  2123. ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
  2124. &skb->nh.ipv6h->daddr,
  2125. 0,
  2126. IPPROTO_TCP,
  2127. 0);
  2128. ipcse = 0;
  2129. #endif
  2130. }
  2131. ipcss = skb->nh.raw - skb->data;
  2132. ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
  2133. tucss = skb->h.raw - skb->data;
  2134. tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
  2135. tucse = 0;
  2136. cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
  2137. E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
  2138. i = tx_ring->next_to_use;
  2139. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2140. buffer_info = &tx_ring->buffer_info[i];
  2141. context_desc->lower_setup.ip_fields.ipcss = ipcss;
  2142. context_desc->lower_setup.ip_fields.ipcso = ipcso;
  2143. context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
  2144. context_desc->upper_setup.tcp_fields.tucss = tucss;
  2145. context_desc->upper_setup.tcp_fields.tucso = tucso;
  2146. context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
  2147. context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
  2148. context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
  2149. context_desc->cmd_and_length = cpu_to_le32(cmd_length);
  2150. buffer_info->time_stamp = jiffies;
  2151. if (++i == tx_ring->count) i = 0;
  2152. tx_ring->next_to_use = i;
  2153. return 1;
  2154. }
  2155. #endif
  2156. return 0;
  2157. }
  2158. static inline boolean_t
  2159. e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2160. struct sk_buff *skb)
  2161. {
  2162. struct e1000_context_desc *context_desc;
  2163. struct e1000_buffer *buffer_info;
  2164. unsigned int i;
  2165. uint8_t css;
  2166. if(likely(skb->ip_summed == CHECKSUM_HW)) {
  2167. css = skb->h.raw - skb->data;
  2168. i = tx_ring->next_to_use;
  2169. buffer_info = &tx_ring->buffer_info[i];
  2170. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2171. context_desc->upper_setup.tcp_fields.tucss = css;
  2172. context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
  2173. context_desc->upper_setup.tcp_fields.tucse = 0;
  2174. context_desc->tcp_seg_setup.data = 0;
  2175. context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
  2176. buffer_info->time_stamp = jiffies;
  2177. if (unlikely(++i == tx_ring->count)) i = 0;
  2178. tx_ring->next_to_use = i;
  2179. return TRUE;
  2180. }
  2181. return FALSE;
  2182. }
  2183. #define E1000_MAX_TXD_PWR 12
  2184. #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
  2185. static inline int
  2186. e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2187. struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
  2188. unsigned int nr_frags, unsigned int mss)
  2189. {
  2190. struct e1000_buffer *buffer_info;
  2191. unsigned int len = skb->len;
  2192. unsigned int offset = 0, size, count = 0, i;
  2193. unsigned int f;
  2194. len -= skb->data_len;
  2195. i = tx_ring->next_to_use;
  2196. while(len) {
  2197. buffer_info = &tx_ring->buffer_info[i];
  2198. size = min(len, max_per_txd);
  2199. #ifdef NETIF_F_TSO
  2200. /* Workaround for Controller erratum --
  2201. * descriptor for non-tso packet in a linear SKB that follows a
  2202. * tso gets written back prematurely before the data is fully
  2203. * DMAd to the controller */
  2204. if (!skb->data_len && tx_ring->last_tx_tso &&
  2205. !skb_shinfo(skb)->tso_size) {
  2206. tx_ring->last_tx_tso = 0;
  2207. size -= 4;
  2208. }
  2209. /* Workaround for premature desc write-backs
  2210. * in TSO mode. Append 4-byte sentinel desc */
  2211. if(unlikely(mss && !nr_frags && size == len && size > 8))
  2212. size -= 4;
  2213. #endif
  2214. /* work-around for errata 10 and it applies
  2215. * to all controllers in PCI-X mode
  2216. * The fix is to make sure that the first descriptor of a
  2217. * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
  2218. */
  2219. if(unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2220. (size > 2015) && count == 0))
  2221. size = 2015;
  2222. /* Workaround for potential 82544 hang in PCI-X. Avoid
  2223. * terminating buffers within evenly-aligned dwords. */
  2224. if(unlikely(adapter->pcix_82544 &&
  2225. !((unsigned long)(skb->data + offset + size - 1) & 4) &&
  2226. size > 4))
  2227. size -= 4;
  2228. buffer_info->length = size;
  2229. buffer_info->dma =
  2230. pci_map_single(adapter->pdev,
  2231. skb->data + offset,
  2232. size,
  2233. PCI_DMA_TODEVICE);
  2234. buffer_info->time_stamp = jiffies;
  2235. len -= size;
  2236. offset += size;
  2237. count++;
  2238. if(unlikely(++i == tx_ring->count)) i = 0;
  2239. }
  2240. for(f = 0; f < nr_frags; f++) {
  2241. struct skb_frag_struct *frag;
  2242. frag = &skb_shinfo(skb)->frags[f];
  2243. len = frag->size;
  2244. offset = frag->page_offset;
  2245. while(len) {
  2246. buffer_info = &tx_ring->buffer_info[i];
  2247. size = min(len, max_per_txd);
  2248. #ifdef NETIF_F_TSO
  2249. /* Workaround for premature desc write-backs
  2250. * in TSO mode. Append 4-byte sentinel desc */
  2251. if(unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
  2252. size -= 4;
  2253. #endif
  2254. /* Workaround for potential 82544 hang in PCI-X.
  2255. * Avoid terminating buffers within evenly-aligned
  2256. * dwords. */
  2257. if(unlikely(adapter->pcix_82544 &&
  2258. !((unsigned long)(frag->page+offset+size-1) & 4) &&
  2259. size > 4))
  2260. size -= 4;
  2261. buffer_info->length = size;
  2262. buffer_info->dma =
  2263. pci_map_page(adapter->pdev,
  2264. frag->page,
  2265. offset,
  2266. size,
  2267. PCI_DMA_TODEVICE);
  2268. buffer_info->time_stamp = jiffies;
  2269. len -= size;
  2270. offset += size;
  2271. count++;
  2272. if(unlikely(++i == tx_ring->count)) i = 0;
  2273. }
  2274. }
  2275. i = (i == 0) ? tx_ring->count - 1 : i - 1;
  2276. tx_ring->buffer_info[i].skb = skb;
  2277. tx_ring->buffer_info[first].next_to_watch = i;
  2278. return count;
  2279. }
  2280. static inline void
  2281. e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2282. int tx_flags, int count)
  2283. {
  2284. struct e1000_tx_desc *tx_desc = NULL;
  2285. struct e1000_buffer *buffer_info;
  2286. uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
  2287. unsigned int i;
  2288. if(likely(tx_flags & E1000_TX_FLAGS_TSO)) {
  2289. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
  2290. E1000_TXD_CMD_TSE;
  2291. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2292. if(likely(tx_flags & E1000_TX_FLAGS_IPV4))
  2293. txd_upper |= E1000_TXD_POPTS_IXSM << 8;
  2294. }
  2295. if(likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
  2296. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
  2297. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2298. }
  2299. if(unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
  2300. txd_lower |= E1000_TXD_CMD_VLE;
  2301. txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
  2302. }
  2303. i = tx_ring->next_to_use;
  2304. while(count--) {
  2305. buffer_info = &tx_ring->buffer_info[i];
  2306. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2307. tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  2308. tx_desc->lower.data =
  2309. cpu_to_le32(txd_lower | buffer_info->length);
  2310. tx_desc->upper.data = cpu_to_le32(txd_upper);
  2311. if(unlikely(++i == tx_ring->count)) i = 0;
  2312. }
  2313. tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
  2314. /* Force memory writes to complete before letting h/w
  2315. * know there are new descriptors to fetch. (Only
  2316. * applicable for weak-ordered memory model archs,
  2317. * such as IA-64). */
  2318. wmb();
  2319. tx_ring->next_to_use = i;
  2320. writel(i, adapter->hw.hw_addr + tx_ring->tdt);
  2321. }
  2322. /**
  2323. * 82547 workaround to avoid controller hang in half-duplex environment.
  2324. * The workaround is to avoid queuing a large packet that would span
  2325. * the internal Tx FIFO ring boundary by notifying the stack to resend
  2326. * the packet at a later time. This gives the Tx FIFO an opportunity to
  2327. * flush all packets. When that occurs, we reset the Tx FIFO pointers
  2328. * to the beginning of the Tx FIFO.
  2329. **/
  2330. #define E1000_FIFO_HDR 0x10
  2331. #define E1000_82547_PAD_LEN 0x3E0
  2332. static inline int
  2333. e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
  2334. {
  2335. uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
  2336. uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
  2337. E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
  2338. if(adapter->link_duplex != HALF_DUPLEX)
  2339. goto no_fifo_stall_required;
  2340. if(atomic_read(&adapter->tx_fifo_stall))
  2341. return 1;
  2342. if(skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
  2343. atomic_set(&adapter->tx_fifo_stall, 1);
  2344. return 1;
  2345. }
  2346. no_fifo_stall_required:
  2347. adapter->tx_fifo_head += skb_fifo_len;
  2348. if(adapter->tx_fifo_head >= adapter->tx_fifo_size)
  2349. adapter->tx_fifo_head -= adapter->tx_fifo_size;
  2350. return 0;
  2351. }
  2352. #define MINIMUM_DHCP_PACKET_SIZE 282
  2353. static inline int
  2354. e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
  2355. {
  2356. struct e1000_hw *hw = &adapter->hw;
  2357. uint16_t length, offset;
  2358. if(vlan_tx_tag_present(skb)) {
  2359. if(!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
  2360. ( adapter->hw.mng_cookie.status &
  2361. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
  2362. return 0;
  2363. }
  2364. if ((skb->len > MINIMUM_DHCP_PACKET_SIZE) && (!skb->protocol)) {
  2365. struct ethhdr *eth = (struct ethhdr *) skb->data;
  2366. if((htons(ETH_P_IP) == eth->h_proto)) {
  2367. const struct iphdr *ip =
  2368. (struct iphdr *)((uint8_t *)skb->data+14);
  2369. if(IPPROTO_UDP == ip->protocol) {
  2370. struct udphdr *udp =
  2371. (struct udphdr *)((uint8_t *)ip +
  2372. (ip->ihl << 2));
  2373. if(ntohs(udp->dest) == 67) {
  2374. offset = (uint8_t *)udp + 8 - skb->data;
  2375. length = skb->len - offset;
  2376. return e1000_mng_write_dhcp_info(hw,
  2377. (uint8_t *)udp + 8,
  2378. length);
  2379. }
  2380. }
  2381. }
  2382. }
  2383. return 0;
  2384. }
  2385. #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
  2386. static int
  2387. e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  2388. {
  2389. struct e1000_adapter *adapter = netdev_priv(netdev);
  2390. struct e1000_tx_ring *tx_ring;
  2391. unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
  2392. unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
  2393. unsigned int tx_flags = 0;
  2394. unsigned int len = skb->len;
  2395. unsigned long flags;
  2396. unsigned int nr_frags = 0;
  2397. unsigned int mss = 0;
  2398. int count = 0;
  2399. int tso;
  2400. unsigned int f;
  2401. len -= skb->data_len;
  2402. #ifdef CONFIG_E1000_MQ
  2403. tx_ring = *per_cpu_ptr(adapter->cpu_tx_ring, smp_processor_id());
  2404. #else
  2405. tx_ring = adapter->tx_ring;
  2406. #endif
  2407. if (unlikely(skb->len <= 0)) {
  2408. dev_kfree_skb_any(skb);
  2409. return NETDEV_TX_OK;
  2410. }
  2411. #ifdef NETIF_F_TSO
  2412. mss = skb_shinfo(skb)->tso_size;
  2413. /* The controller does a simple calculation to
  2414. * make sure there is enough room in the FIFO before
  2415. * initiating the DMA for each buffer. The calc is:
  2416. * 4 = ceil(buffer len/mss). To make sure we don't
  2417. * overrun the FIFO, adjust the max buffer len if mss
  2418. * drops. */
  2419. if(mss) {
  2420. uint8_t hdr_len;
  2421. max_per_txd = min(mss << 2, max_per_txd);
  2422. max_txd_pwr = fls(max_per_txd) - 1;
  2423. /* TSO Workaround for 82571/2 Controllers -- if skb->data
  2424. * points to just header, pull a few bytes of payload from
  2425. * frags into skb->data */
  2426. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2427. if (skb->data_len && (hdr_len == (skb->len - skb->data_len)) &&
  2428. (adapter->hw.mac_type == e1000_82571 ||
  2429. adapter->hw.mac_type == e1000_82572)) {
  2430. unsigned int pull_size;
  2431. pull_size = min((unsigned int)4, skb->data_len);
  2432. if (!__pskb_pull_tail(skb, pull_size)) {
  2433. printk(KERN_ERR "__pskb_pull_tail failed.\n");
  2434. dev_kfree_skb_any(skb);
  2435. return -EFAULT;
  2436. }
  2437. len = skb->len - skb->data_len;
  2438. }
  2439. }
  2440. if((mss) || (skb->ip_summed == CHECKSUM_HW))
  2441. /* reserve a descriptor for the offload context */
  2442. count++;
  2443. count++;
  2444. #else
  2445. if(skb->ip_summed == CHECKSUM_HW)
  2446. count++;
  2447. #endif
  2448. #ifdef NETIF_F_TSO
  2449. /* Controller Erratum workaround */
  2450. if (!skb->data_len && tx_ring->last_tx_tso &&
  2451. !skb_shinfo(skb)->tso_size)
  2452. count++;
  2453. #endif
  2454. count += TXD_USE_COUNT(len, max_txd_pwr);
  2455. if(adapter->pcix_82544)
  2456. count++;
  2457. /* work-around for errata 10 and it applies to all controllers
  2458. * in PCI-X mode, so add one more descriptor to the count
  2459. */
  2460. if(unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2461. (len > 2015)))
  2462. count++;
  2463. nr_frags = skb_shinfo(skb)->nr_frags;
  2464. for(f = 0; f < nr_frags; f++)
  2465. count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
  2466. max_txd_pwr);
  2467. if(adapter->pcix_82544)
  2468. count += nr_frags;
  2469. if(adapter->hw.tx_pkt_filtering && (adapter->hw.mac_type == e1000_82573) )
  2470. e1000_transfer_dhcp_info(adapter, skb);
  2471. local_irq_save(flags);
  2472. if (!spin_trylock(&tx_ring->tx_lock)) {
  2473. /* Collision - tell upper layer to requeue */
  2474. local_irq_restore(flags);
  2475. return NETDEV_TX_LOCKED;
  2476. }
  2477. /* need: count + 2 desc gap to keep tail from touching
  2478. * head, otherwise try next time */
  2479. if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
  2480. netif_stop_queue(netdev);
  2481. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2482. return NETDEV_TX_BUSY;
  2483. }
  2484. if(unlikely(adapter->hw.mac_type == e1000_82547)) {
  2485. if(unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
  2486. netif_stop_queue(netdev);
  2487. mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
  2488. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2489. return NETDEV_TX_BUSY;
  2490. }
  2491. }
  2492. if(unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
  2493. tx_flags |= E1000_TX_FLAGS_VLAN;
  2494. tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
  2495. }
  2496. first = tx_ring->next_to_use;
  2497. tso = e1000_tso(adapter, tx_ring, skb);
  2498. if (tso < 0) {
  2499. dev_kfree_skb_any(skb);
  2500. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2501. return NETDEV_TX_OK;
  2502. }
  2503. if (likely(tso)) {
  2504. tx_ring->last_tx_tso = 1;
  2505. tx_flags |= E1000_TX_FLAGS_TSO;
  2506. } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
  2507. tx_flags |= E1000_TX_FLAGS_CSUM;
  2508. /* Old method was to assume IPv4 packet by default if TSO was enabled.
  2509. * 82571 hardware supports TSO capabilities for IPv6 as well...
  2510. * no longer assume, we must. */
  2511. if (likely(skb->protocol == ntohs(ETH_P_IP)))
  2512. tx_flags |= E1000_TX_FLAGS_IPV4;
  2513. e1000_tx_queue(adapter, tx_ring, tx_flags,
  2514. e1000_tx_map(adapter, tx_ring, skb, first,
  2515. max_per_txd, nr_frags, mss));
  2516. netdev->trans_start = jiffies;
  2517. /* Make sure there is space in the ring for the next send. */
  2518. if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
  2519. netif_stop_queue(netdev);
  2520. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2521. return NETDEV_TX_OK;
  2522. }
  2523. /**
  2524. * e1000_tx_timeout - Respond to a Tx Hang
  2525. * @netdev: network interface device structure
  2526. **/
  2527. static void
  2528. e1000_tx_timeout(struct net_device *netdev)
  2529. {
  2530. struct e1000_adapter *adapter = netdev_priv(netdev);
  2531. /* Do the reset outside of interrupt context */
  2532. schedule_work(&adapter->tx_timeout_task);
  2533. }
  2534. static void
  2535. e1000_tx_timeout_task(struct net_device *netdev)
  2536. {
  2537. struct e1000_adapter *adapter = netdev_priv(netdev);
  2538. adapter->tx_timeout_count++;
  2539. e1000_down(adapter);
  2540. e1000_up(adapter);
  2541. }
  2542. /**
  2543. * e1000_get_stats - Get System Network Statistics
  2544. * @netdev: network interface device structure
  2545. *
  2546. * Returns the address of the device statistics structure.
  2547. * The statistics are actually updated from the timer callback.
  2548. **/
  2549. static struct net_device_stats *
  2550. e1000_get_stats(struct net_device *netdev)
  2551. {
  2552. struct e1000_adapter *adapter = netdev_priv(netdev);
  2553. /* only return the current stats */
  2554. return &adapter->net_stats;
  2555. }
  2556. /**
  2557. * e1000_change_mtu - Change the Maximum Transfer Unit
  2558. * @netdev: network interface device structure
  2559. * @new_mtu: new value for maximum frame size
  2560. *
  2561. * Returns 0 on success, negative on failure
  2562. **/
  2563. static int
  2564. e1000_change_mtu(struct net_device *netdev, int new_mtu)
  2565. {
  2566. struct e1000_adapter *adapter = netdev_priv(netdev);
  2567. int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  2568. if((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
  2569. (max_frame > MAX_JUMBO_FRAME_SIZE)) {
  2570. DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
  2571. return -EINVAL;
  2572. }
  2573. /* Adapter-specific max frame size limits. */
  2574. switch (adapter->hw.mac_type) {
  2575. case e1000_82542_rev2_0:
  2576. case e1000_82542_rev2_1:
  2577. case e1000_82573:
  2578. if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
  2579. DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
  2580. return -EINVAL;
  2581. }
  2582. break;
  2583. case e1000_82571:
  2584. case e1000_82572:
  2585. #define MAX_STD_JUMBO_FRAME_SIZE 9234
  2586. if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
  2587. DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
  2588. return -EINVAL;
  2589. }
  2590. break;
  2591. default:
  2592. /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
  2593. break;
  2594. }
  2595. /* since the driver code now supports splitting a packet across
  2596. * multiple descriptors, most of the fifo related limitations on
  2597. * jumbo frame traffic have gone away.
  2598. * simply use 2k descriptors for everything.
  2599. *
  2600. * NOTE: dev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
  2601. * means we reserve 2 more, this pushes us to allocate from the next
  2602. * larger slab size
  2603. * i.e. RXBUFFER_2048 --> size-4096 slab */
  2604. /* recent hardware supports 1KB granularity */
  2605. if (adapter->hw.mac_type > e1000_82547_rev_2) {
  2606. adapter->rx_buffer_len =
  2607. ((max_frame < E1000_RXBUFFER_2048) ?
  2608. max_frame : E1000_RXBUFFER_2048);
  2609. E1000_ROUNDUP(adapter->rx_buffer_len, 1024);
  2610. } else
  2611. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  2612. netdev->mtu = new_mtu;
  2613. if(netif_running(netdev)) {
  2614. e1000_down(adapter);
  2615. e1000_up(adapter);
  2616. }
  2617. adapter->hw.max_frame_size = max_frame;
  2618. return 0;
  2619. }
  2620. /**
  2621. * e1000_update_stats - Update the board statistics counters
  2622. * @adapter: board private structure
  2623. **/
  2624. void
  2625. e1000_update_stats(struct e1000_adapter *adapter)
  2626. {
  2627. struct e1000_hw *hw = &adapter->hw;
  2628. unsigned long flags;
  2629. uint16_t phy_tmp;
  2630. #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
  2631. spin_lock_irqsave(&adapter->stats_lock, flags);
  2632. /* these counters are modified from e1000_adjust_tbi_stats,
  2633. * called from the interrupt context, so they must only
  2634. * be written while holding adapter->stats_lock
  2635. */
  2636. adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
  2637. adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
  2638. adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
  2639. adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
  2640. adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
  2641. adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
  2642. adapter->stats.roc += E1000_READ_REG(hw, ROC);
  2643. adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
  2644. adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
  2645. adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
  2646. adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
  2647. adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
  2648. adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
  2649. adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
  2650. adapter->stats.mpc += E1000_READ_REG(hw, MPC);
  2651. adapter->stats.scc += E1000_READ_REG(hw, SCC);
  2652. adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
  2653. adapter->stats.mcc += E1000_READ_REG(hw, MCC);
  2654. adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
  2655. adapter->stats.dc += E1000_READ_REG(hw, DC);
  2656. adapter->stats.sec += E1000_READ_REG(hw, SEC);
  2657. adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
  2658. adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
  2659. adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
  2660. adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
  2661. adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
  2662. adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
  2663. adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
  2664. adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
  2665. adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
  2666. adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
  2667. adapter->stats.ruc += E1000_READ_REG(hw, RUC);
  2668. adapter->stats.rfc += E1000_READ_REG(hw, RFC);
  2669. adapter->stats.rjc += E1000_READ_REG(hw, RJC);
  2670. adapter->stats.torl += E1000_READ_REG(hw, TORL);
  2671. adapter->stats.torh += E1000_READ_REG(hw, TORH);
  2672. adapter->stats.totl += E1000_READ_REG(hw, TOTL);
  2673. adapter->stats.toth += E1000_READ_REG(hw, TOTH);
  2674. adapter->stats.tpr += E1000_READ_REG(hw, TPR);
  2675. adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
  2676. adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
  2677. adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
  2678. adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
  2679. adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
  2680. adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
  2681. adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
  2682. adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
  2683. /* used for adaptive IFS */
  2684. hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
  2685. adapter->stats.tpt += hw->tx_packet_delta;
  2686. hw->collision_delta = E1000_READ_REG(hw, COLC);
  2687. adapter->stats.colc += hw->collision_delta;
  2688. if(hw->mac_type >= e1000_82543) {
  2689. adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
  2690. adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
  2691. adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
  2692. adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
  2693. adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
  2694. adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
  2695. }
  2696. if(hw->mac_type > e1000_82547_rev_2) {
  2697. adapter->stats.iac += E1000_READ_REG(hw, IAC);
  2698. adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
  2699. adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
  2700. adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
  2701. adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
  2702. adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
  2703. adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
  2704. adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
  2705. adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
  2706. }
  2707. /* Fill out the OS statistics structure */
  2708. adapter->net_stats.rx_packets = adapter->stats.gprc;
  2709. adapter->net_stats.tx_packets = adapter->stats.gptc;
  2710. adapter->net_stats.rx_bytes = adapter->stats.gorcl;
  2711. adapter->net_stats.tx_bytes = adapter->stats.gotcl;
  2712. adapter->net_stats.multicast = adapter->stats.mprc;
  2713. adapter->net_stats.collisions = adapter->stats.colc;
  2714. /* Rx Errors */
  2715. adapter->net_stats.rx_errors = adapter->stats.rxerrc +
  2716. adapter->stats.crcerrs + adapter->stats.algnerrc +
  2717. adapter->stats.rlec + adapter->stats.cexterr;
  2718. adapter->net_stats.rx_dropped = 0;
  2719. adapter->net_stats.rx_length_errors = adapter->stats.rlec;
  2720. adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
  2721. adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
  2722. adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
  2723. /* Tx Errors */
  2724. adapter->net_stats.tx_errors = adapter->stats.ecol +
  2725. adapter->stats.latecol;
  2726. adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
  2727. adapter->net_stats.tx_window_errors = adapter->stats.latecol;
  2728. adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
  2729. /* Tx Dropped needs to be maintained elsewhere */
  2730. /* Phy Stats */
  2731. if(hw->media_type == e1000_media_type_copper) {
  2732. if((adapter->link_speed == SPEED_1000) &&
  2733. (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
  2734. phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
  2735. adapter->phy_stats.idle_errors += phy_tmp;
  2736. }
  2737. if((hw->mac_type <= e1000_82546) &&
  2738. (hw->phy_type == e1000_phy_m88) &&
  2739. !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
  2740. adapter->phy_stats.receive_errors += phy_tmp;
  2741. }
  2742. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  2743. }
  2744. #ifdef CONFIG_E1000_MQ
  2745. void
  2746. e1000_rx_schedule(void *data)
  2747. {
  2748. struct net_device *poll_dev, *netdev = data;
  2749. struct e1000_adapter *adapter = netdev->priv;
  2750. int this_cpu = get_cpu();
  2751. poll_dev = *per_cpu_ptr(adapter->cpu_netdev, this_cpu);
  2752. if (poll_dev == NULL) {
  2753. put_cpu();
  2754. return;
  2755. }
  2756. if (likely(netif_rx_schedule_prep(poll_dev)))
  2757. __netif_rx_schedule(poll_dev);
  2758. else
  2759. e1000_irq_enable(adapter);
  2760. put_cpu();
  2761. }
  2762. #endif
  2763. /**
  2764. * e1000_intr - Interrupt Handler
  2765. * @irq: interrupt number
  2766. * @data: pointer to a network interface device structure
  2767. * @pt_regs: CPU registers structure
  2768. **/
  2769. static irqreturn_t
  2770. e1000_intr(int irq, void *data, struct pt_regs *regs)
  2771. {
  2772. struct net_device *netdev = data;
  2773. struct e1000_adapter *adapter = netdev_priv(netdev);
  2774. struct e1000_hw *hw = &adapter->hw;
  2775. uint32_t icr = E1000_READ_REG(hw, ICR);
  2776. #ifndef CONFIG_E1000_NAPI
  2777. int i;
  2778. #else
  2779. /* Interrupt Auto-Mask...upon reading ICR,
  2780. * interrupts are masked. No need for the
  2781. * IMC write, but it does mean we should
  2782. * account for it ASAP. */
  2783. if (likely(hw->mac_type >= e1000_82571))
  2784. atomic_inc(&adapter->irq_sem);
  2785. #endif
  2786. if (unlikely(!icr)) {
  2787. #ifdef CONFIG_E1000_NAPI
  2788. if (hw->mac_type >= e1000_82571)
  2789. e1000_irq_enable(adapter);
  2790. #endif
  2791. return IRQ_NONE; /* Not our interrupt */
  2792. }
  2793. if(unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
  2794. hw->get_link_status = 1;
  2795. mod_timer(&adapter->watchdog_timer, jiffies);
  2796. }
  2797. #ifdef CONFIG_E1000_NAPI
  2798. if (unlikely(hw->mac_type < e1000_82571)) {
  2799. atomic_inc(&adapter->irq_sem);
  2800. E1000_WRITE_REG(hw, IMC, ~0);
  2801. E1000_WRITE_FLUSH(hw);
  2802. }
  2803. #ifdef CONFIG_E1000_MQ
  2804. if (atomic_read(&adapter->rx_sched_call_data.count) == 0) {
  2805. /* We must setup the cpumask once count == 0 since
  2806. * each cpu bit is cleared when the work is done. */
  2807. adapter->rx_sched_call_data.cpumask = adapter->cpumask;
  2808. atomic_add(adapter->num_rx_queues - 1, &adapter->irq_sem);
  2809. atomic_set(&adapter->rx_sched_call_data.count,
  2810. adapter->num_rx_queues);
  2811. smp_call_async_mask(&adapter->rx_sched_call_data);
  2812. } else {
  2813. printk("call_data.count == %u\n", atomic_read(&adapter->rx_sched_call_data.count));
  2814. }
  2815. #else /* if !CONFIG_E1000_MQ */
  2816. if (likely(netif_rx_schedule_prep(&adapter->polling_netdev[0])))
  2817. __netif_rx_schedule(&adapter->polling_netdev[0]);
  2818. else
  2819. e1000_irq_enable(adapter);
  2820. #endif /* CONFIG_E1000_MQ */
  2821. #else /* if !CONFIG_E1000_NAPI */
  2822. /* Writing IMC and IMS is needed for 82547.
  2823. Due to Hub Link bus being occupied, an interrupt
  2824. de-assertion message is not able to be sent.
  2825. When an interrupt assertion message is generated later,
  2826. two messages are re-ordered and sent out.
  2827. That causes APIC to think 82547 is in de-assertion
  2828. state, while 82547 is in assertion state, resulting
  2829. in dead lock. Writing IMC forces 82547 into
  2830. de-assertion state.
  2831. */
  2832. if(hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2){
  2833. atomic_inc(&adapter->irq_sem);
  2834. E1000_WRITE_REG(hw, IMC, ~0);
  2835. }
  2836. for(i = 0; i < E1000_MAX_INTR; i++)
  2837. if(unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
  2838. !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
  2839. break;
  2840. if(hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
  2841. e1000_irq_enable(adapter);
  2842. #endif /* CONFIG_E1000_NAPI */
  2843. return IRQ_HANDLED;
  2844. }
  2845. #ifdef CONFIG_E1000_NAPI
  2846. /**
  2847. * e1000_clean - NAPI Rx polling callback
  2848. * @adapter: board private structure
  2849. **/
  2850. static int
  2851. e1000_clean(struct net_device *poll_dev, int *budget)
  2852. {
  2853. struct e1000_adapter *adapter;
  2854. int work_to_do = min(*budget, poll_dev->quota);
  2855. int tx_cleaned, i = 0, work_done = 0;
  2856. /* Must NOT use netdev_priv macro here. */
  2857. adapter = poll_dev->priv;
  2858. /* Keep link state information with original netdev */
  2859. if (!netif_carrier_ok(adapter->netdev))
  2860. goto quit_polling;
  2861. while (poll_dev != &adapter->polling_netdev[i]) {
  2862. i++;
  2863. if (unlikely(i == adapter->num_rx_queues))
  2864. BUG();
  2865. }
  2866. tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[i]);
  2867. adapter->clean_rx(adapter, &adapter->rx_ring[i],
  2868. &work_done, work_to_do);
  2869. *budget -= work_done;
  2870. poll_dev->quota -= work_done;
  2871. /* If no Tx and not enough Rx work done, exit the polling mode */
  2872. if((!tx_cleaned && (work_done == 0)) ||
  2873. !netif_running(adapter->netdev)) {
  2874. quit_polling:
  2875. netif_rx_complete(poll_dev);
  2876. e1000_irq_enable(adapter);
  2877. return 0;
  2878. }
  2879. return 1;
  2880. }
  2881. #endif
  2882. /**
  2883. * e1000_clean_tx_irq - Reclaim resources after transmit completes
  2884. * @adapter: board private structure
  2885. **/
  2886. static boolean_t
  2887. e1000_clean_tx_irq(struct e1000_adapter *adapter,
  2888. struct e1000_tx_ring *tx_ring)
  2889. {
  2890. struct net_device *netdev = adapter->netdev;
  2891. struct e1000_tx_desc *tx_desc, *eop_desc;
  2892. struct e1000_buffer *buffer_info;
  2893. unsigned int i, eop;
  2894. boolean_t cleaned = FALSE;
  2895. i = tx_ring->next_to_clean;
  2896. eop = tx_ring->buffer_info[i].next_to_watch;
  2897. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2898. while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
  2899. for(cleaned = FALSE; !cleaned; ) {
  2900. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2901. buffer_info = &tx_ring->buffer_info[i];
  2902. cleaned = (i == eop);
  2903. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  2904. tx_desc->buffer_addr = 0;
  2905. tx_desc->lower.data = 0;
  2906. tx_desc->upper.data = 0;
  2907. if(unlikely(++i == tx_ring->count)) i = 0;
  2908. }
  2909. #ifdef CONFIG_E1000_MQ
  2910. tx_ring->tx_stats.packets++;
  2911. #endif
  2912. eop = tx_ring->buffer_info[i].next_to_watch;
  2913. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2914. }
  2915. tx_ring->next_to_clean = i;
  2916. spin_lock(&tx_ring->tx_lock);
  2917. if(unlikely(cleaned && netif_queue_stopped(netdev) &&
  2918. netif_carrier_ok(netdev)))
  2919. netif_wake_queue(netdev);
  2920. spin_unlock(&tx_ring->tx_lock);
  2921. if (adapter->detect_tx_hung) {
  2922. /* Detect a transmit hang in hardware, this serializes the
  2923. * check with the clearing of time_stamp and movement of i */
  2924. adapter->detect_tx_hung = FALSE;
  2925. if (tx_ring->buffer_info[eop].dma &&
  2926. time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
  2927. adapter->tx_timeout_factor * HZ)
  2928. && !(E1000_READ_REG(&adapter->hw, STATUS) &
  2929. E1000_STATUS_TXOFF)) {
  2930. /* detected Tx unit hang */
  2931. DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
  2932. " Tx Queue <%lu>\n"
  2933. " TDH <%x>\n"
  2934. " TDT <%x>\n"
  2935. " next_to_use <%x>\n"
  2936. " next_to_clean <%x>\n"
  2937. "buffer_info[next_to_clean]\n"
  2938. " time_stamp <%lx>\n"
  2939. " next_to_watch <%x>\n"
  2940. " jiffies <%lx>\n"
  2941. " next_to_watch.status <%x>\n",
  2942. (unsigned long)((tx_ring - adapter->tx_ring) /
  2943. sizeof(struct e1000_tx_ring)),
  2944. readl(adapter->hw.hw_addr + tx_ring->tdh),
  2945. readl(adapter->hw.hw_addr + tx_ring->tdt),
  2946. tx_ring->next_to_use,
  2947. tx_ring->next_to_clean,
  2948. tx_ring->buffer_info[eop].time_stamp,
  2949. eop,
  2950. jiffies,
  2951. eop_desc->upper.fields.status);
  2952. netif_stop_queue(netdev);
  2953. }
  2954. }
  2955. return cleaned;
  2956. }
  2957. /**
  2958. * e1000_rx_checksum - Receive Checksum Offload for 82543
  2959. * @adapter: board private structure
  2960. * @status_err: receive descriptor status and error fields
  2961. * @csum: receive descriptor csum field
  2962. * @sk_buff: socket buffer with received data
  2963. **/
  2964. static inline void
  2965. e1000_rx_checksum(struct e1000_adapter *adapter,
  2966. uint32_t status_err, uint32_t csum,
  2967. struct sk_buff *skb)
  2968. {
  2969. uint16_t status = (uint16_t)status_err;
  2970. uint8_t errors = (uint8_t)(status_err >> 24);
  2971. skb->ip_summed = CHECKSUM_NONE;
  2972. /* 82543 or newer only */
  2973. if(unlikely(adapter->hw.mac_type < e1000_82543)) return;
  2974. /* Ignore Checksum bit is set */
  2975. if(unlikely(status & E1000_RXD_STAT_IXSM)) return;
  2976. /* TCP/UDP checksum error bit is set */
  2977. if(unlikely(errors & E1000_RXD_ERR_TCPE)) {
  2978. /* let the stack verify checksum errors */
  2979. adapter->hw_csum_err++;
  2980. return;
  2981. }
  2982. /* TCP/UDP Checksum has not been calculated */
  2983. if(adapter->hw.mac_type <= e1000_82547_rev_2) {
  2984. if(!(status & E1000_RXD_STAT_TCPCS))
  2985. return;
  2986. } else {
  2987. if(!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
  2988. return;
  2989. }
  2990. /* It must be a TCP or UDP packet with a valid checksum */
  2991. if (likely(status & E1000_RXD_STAT_TCPCS)) {
  2992. /* TCP checksum is good */
  2993. skb->ip_summed = CHECKSUM_UNNECESSARY;
  2994. } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
  2995. /* IP fragment with UDP payload */
  2996. /* Hardware complements the payload checksum, so we undo it
  2997. * and then put the value in host order for further stack use.
  2998. */
  2999. csum = ntohl(csum ^ 0xFFFF);
  3000. skb->csum = csum;
  3001. skb->ip_summed = CHECKSUM_HW;
  3002. }
  3003. adapter->hw_csum_good++;
  3004. }
  3005. /**
  3006. * e1000_clean_rx_irq - Send received data up the network stack; legacy
  3007. * @adapter: board private structure
  3008. **/
  3009. static boolean_t
  3010. #ifdef CONFIG_E1000_NAPI
  3011. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  3012. struct e1000_rx_ring *rx_ring,
  3013. int *work_done, int work_to_do)
  3014. #else
  3015. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  3016. struct e1000_rx_ring *rx_ring)
  3017. #endif
  3018. {
  3019. struct net_device *netdev = adapter->netdev;
  3020. struct pci_dev *pdev = adapter->pdev;
  3021. struct e1000_rx_desc *rx_desc;
  3022. struct e1000_buffer *buffer_info;
  3023. struct sk_buff *skb;
  3024. unsigned long flags;
  3025. uint32_t length;
  3026. uint8_t last_byte;
  3027. unsigned int i;
  3028. boolean_t cleaned = FALSE;
  3029. int cleaned_count = 0;
  3030. i = rx_ring->next_to_clean;
  3031. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3032. while(rx_desc->status & E1000_RXD_STAT_DD) {
  3033. buffer_info = &rx_ring->buffer_info[i];
  3034. #ifdef CONFIG_E1000_NAPI
  3035. if(*work_done >= work_to_do)
  3036. break;
  3037. (*work_done)++;
  3038. #endif
  3039. cleaned = TRUE;
  3040. cleaned_count++;
  3041. pci_unmap_single(pdev, buffer_info->dma, buffer_info->length,
  3042. PCI_DMA_FROMDEVICE);
  3043. skb = buffer_info->skb;
  3044. length = le16_to_cpu(rx_desc->length);
  3045. if(unlikely(!(rx_desc->status & E1000_RXD_STAT_EOP))) {
  3046. /* All receives must fit into a single buffer */
  3047. E1000_DBG("%s: Receive packet consumed multiple"
  3048. " buffers\n", netdev->name);
  3049. dev_kfree_skb_irq(skb);
  3050. goto next_desc;
  3051. }
  3052. if(unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
  3053. last_byte = *(skb->data + length - 1);
  3054. if(TBI_ACCEPT(&adapter->hw, rx_desc->status,
  3055. rx_desc->errors, length, last_byte)) {
  3056. spin_lock_irqsave(&adapter->stats_lock, flags);
  3057. e1000_tbi_adjust_stats(&adapter->hw, &adapter->stats,
  3058. length, skb->data);
  3059. spin_unlock_irqrestore(&adapter->stats_lock,
  3060. flags);
  3061. length--;
  3062. } else {
  3063. dev_kfree_skb_irq(skb);
  3064. goto next_desc;
  3065. }
  3066. }
  3067. /* Good Receive */
  3068. skb_put(skb, length - ETHERNET_FCS_SIZE);
  3069. /* Receive Checksum Offload */
  3070. e1000_rx_checksum(adapter, (uint32_t)(rx_desc->status) |
  3071. ((uint32_t)(rx_desc->errors) << 24),
  3072. rx_desc->csum, skb);
  3073. skb->protocol = eth_type_trans(skb, netdev);
  3074. #ifdef CONFIG_E1000_NAPI
  3075. if(unlikely(adapter->vlgrp &&
  3076. (rx_desc->status & E1000_RXD_STAT_VP))) {
  3077. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3078. le16_to_cpu(rx_desc->special) &
  3079. E1000_RXD_SPC_VLAN_MASK);
  3080. } else {
  3081. netif_receive_skb(skb);
  3082. }
  3083. #else /* CONFIG_E1000_NAPI */
  3084. if(unlikely(adapter->vlgrp &&
  3085. (rx_desc->status & E1000_RXD_STAT_VP))) {
  3086. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3087. le16_to_cpu(rx_desc->special) &
  3088. E1000_RXD_SPC_VLAN_MASK);
  3089. } else {
  3090. netif_rx(skb);
  3091. }
  3092. #endif /* CONFIG_E1000_NAPI */
  3093. netdev->last_rx = jiffies;
  3094. #ifdef CONFIG_E1000_MQ
  3095. rx_ring->rx_stats.packets++;
  3096. rx_ring->rx_stats.bytes += length;
  3097. #endif
  3098. next_desc:
  3099. rx_desc->status = 0;
  3100. /* return some buffers to hardware, one at a time is too slow */
  3101. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3102. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3103. cleaned_count = 0;
  3104. }
  3105. }
  3106. rx_ring->next_to_clean = i;
  3107. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3108. if (cleaned_count)
  3109. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3110. return cleaned;
  3111. }
  3112. /**
  3113. * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
  3114. * @adapter: board private structure
  3115. **/
  3116. static boolean_t
  3117. #ifdef CONFIG_E1000_NAPI
  3118. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3119. struct e1000_rx_ring *rx_ring,
  3120. int *work_done, int work_to_do)
  3121. #else
  3122. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3123. struct e1000_rx_ring *rx_ring)
  3124. #endif
  3125. {
  3126. union e1000_rx_desc_packet_split *rx_desc;
  3127. struct net_device *netdev = adapter->netdev;
  3128. struct pci_dev *pdev = adapter->pdev;
  3129. struct e1000_buffer *buffer_info;
  3130. struct e1000_ps_page *ps_page;
  3131. struct e1000_ps_page_dma *ps_page_dma;
  3132. struct sk_buff *skb;
  3133. unsigned int i, j;
  3134. uint32_t length, staterr;
  3135. int cleaned_count = 0;
  3136. boolean_t cleaned = FALSE;
  3137. i = rx_ring->next_to_clean;
  3138. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3139. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3140. while(staterr & E1000_RXD_STAT_DD) {
  3141. buffer_info = &rx_ring->buffer_info[i];
  3142. ps_page = &rx_ring->ps_page[i];
  3143. ps_page_dma = &rx_ring->ps_page_dma[i];
  3144. #ifdef CONFIG_E1000_NAPI
  3145. if(unlikely(*work_done >= work_to_do))
  3146. break;
  3147. (*work_done)++;
  3148. #endif
  3149. cleaned = TRUE;
  3150. cleaned_count++;
  3151. pci_unmap_single(pdev, buffer_info->dma,
  3152. buffer_info->length,
  3153. PCI_DMA_FROMDEVICE);
  3154. skb = buffer_info->skb;
  3155. if(unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
  3156. E1000_DBG("%s: Packet Split buffers didn't pick up"
  3157. " the full packet\n", netdev->name);
  3158. dev_kfree_skb_irq(skb);
  3159. goto next_desc;
  3160. }
  3161. if(unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
  3162. dev_kfree_skb_irq(skb);
  3163. goto next_desc;
  3164. }
  3165. length = le16_to_cpu(rx_desc->wb.middle.length0);
  3166. if(unlikely(!length)) {
  3167. E1000_DBG("%s: Last part of the packet spanning"
  3168. " multiple descriptors\n", netdev->name);
  3169. dev_kfree_skb_irq(skb);
  3170. goto next_desc;
  3171. }
  3172. /* Good Receive */
  3173. skb_put(skb, length);
  3174. for(j = 0; j < adapter->rx_ps_pages; j++) {
  3175. if(!(length = le16_to_cpu(rx_desc->wb.upper.length[j])))
  3176. break;
  3177. pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
  3178. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  3179. ps_page_dma->ps_page_dma[j] = 0;
  3180. skb_shinfo(skb)->frags[j].page =
  3181. ps_page->ps_page[j];
  3182. ps_page->ps_page[j] = NULL;
  3183. skb_shinfo(skb)->frags[j].page_offset = 0;
  3184. skb_shinfo(skb)->frags[j].size = length;
  3185. skb_shinfo(skb)->nr_frags++;
  3186. skb->len += length;
  3187. skb->data_len += length;
  3188. }
  3189. e1000_rx_checksum(adapter, staterr,
  3190. rx_desc->wb.lower.hi_dword.csum_ip.csum, skb);
  3191. skb->protocol = eth_type_trans(skb, netdev);
  3192. if(likely(rx_desc->wb.upper.header_status &
  3193. E1000_RXDPS_HDRSTAT_HDRSP)) {
  3194. adapter->rx_hdr_split++;
  3195. #ifdef HAVE_RX_ZERO_COPY
  3196. skb_shinfo(skb)->zero_copy = TRUE;
  3197. #endif
  3198. }
  3199. #ifdef CONFIG_E1000_NAPI
  3200. if(unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3201. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3202. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3203. E1000_RXD_SPC_VLAN_MASK);
  3204. } else {
  3205. netif_receive_skb(skb);
  3206. }
  3207. #else /* CONFIG_E1000_NAPI */
  3208. if(unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3209. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3210. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3211. E1000_RXD_SPC_VLAN_MASK);
  3212. } else {
  3213. netif_rx(skb);
  3214. }
  3215. #endif /* CONFIG_E1000_NAPI */
  3216. netdev->last_rx = jiffies;
  3217. #ifdef CONFIG_E1000_MQ
  3218. rx_ring->rx_stats.packets++;
  3219. rx_ring->rx_stats.bytes += length;
  3220. #endif
  3221. next_desc:
  3222. rx_desc->wb.middle.status_error &= ~0xFF;
  3223. buffer_info->skb = NULL;
  3224. /* return some buffers to hardware, one at a time is too slow */
  3225. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3226. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3227. cleaned_count = 0;
  3228. }
  3229. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3230. }
  3231. rx_ring->next_to_clean = i;
  3232. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3233. if (cleaned_count)
  3234. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3235. return cleaned;
  3236. }
  3237. /**
  3238. * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
  3239. * @adapter: address of board private structure
  3240. **/
  3241. static void
  3242. e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  3243. struct e1000_rx_ring *rx_ring,
  3244. int cleaned_count)
  3245. {
  3246. struct net_device *netdev = adapter->netdev;
  3247. struct pci_dev *pdev = adapter->pdev;
  3248. struct e1000_rx_desc *rx_desc;
  3249. struct e1000_buffer *buffer_info;
  3250. struct sk_buff *skb;
  3251. unsigned int i;
  3252. unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
  3253. i = rx_ring->next_to_use;
  3254. buffer_info = &rx_ring->buffer_info[i];
  3255. while(!buffer_info->skb) {
  3256. skb = dev_alloc_skb(bufsz);
  3257. if(unlikely(!skb)) {
  3258. /* Better luck next round */
  3259. adapter->alloc_rx_buff_failed++;
  3260. break;
  3261. }
  3262. /* Fix for errata 23, can't cross 64kB boundary */
  3263. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3264. struct sk_buff *oldskb = skb;
  3265. DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
  3266. "at %p\n", bufsz, skb->data);
  3267. /* Try again, without freeing the previous */
  3268. skb = dev_alloc_skb(bufsz);
  3269. /* Failed allocation, critical failure */
  3270. if (!skb) {
  3271. dev_kfree_skb(oldskb);
  3272. break;
  3273. }
  3274. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3275. /* give up */
  3276. dev_kfree_skb(skb);
  3277. dev_kfree_skb(oldskb);
  3278. break; /* while !buffer_info->skb */
  3279. } else {
  3280. /* Use new allocation */
  3281. dev_kfree_skb(oldskb);
  3282. }
  3283. }
  3284. /* Make buffer alignment 2 beyond a 16 byte boundary
  3285. * this will result in a 16 byte aligned IP header after
  3286. * the 14 byte MAC header is removed
  3287. */
  3288. skb_reserve(skb, NET_IP_ALIGN);
  3289. skb->dev = netdev;
  3290. buffer_info->skb = skb;
  3291. buffer_info->length = adapter->rx_buffer_len;
  3292. buffer_info->dma = pci_map_single(pdev,
  3293. skb->data,
  3294. adapter->rx_buffer_len,
  3295. PCI_DMA_FROMDEVICE);
  3296. /* Fix for errata 23, can't cross 64kB boundary */
  3297. if (!e1000_check_64k_bound(adapter,
  3298. (void *)(unsigned long)buffer_info->dma,
  3299. adapter->rx_buffer_len)) {
  3300. DPRINTK(RX_ERR, ERR,
  3301. "dma align check failed: %u bytes at %p\n",
  3302. adapter->rx_buffer_len,
  3303. (void *)(unsigned long)buffer_info->dma);
  3304. dev_kfree_skb(skb);
  3305. buffer_info->skb = NULL;
  3306. pci_unmap_single(pdev, buffer_info->dma,
  3307. adapter->rx_buffer_len,
  3308. PCI_DMA_FROMDEVICE);
  3309. break; /* while !buffer_info->skb */
  3310. }
  3311. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3312. rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  3313. if(unlikely((i & ~(E1000_RX_BUFFER_WRITE - 1)) == i)) {
  3314. /* Force memory writes to complete before letting h/w
  3315. * know there are new descriptors to fetch. (Only
  3316. * applicable for weak-ordered memory model archs,
  3317. * such as IA-64). */
  3318. wmb();
  3319. writel(i, adapter->hw.hw_addr + rx_ring->rdt);
  3320. }
  3321. if(unlikely(++i == rx_ring->count)) i = 0;
  3322. buffer_info = &rx_ring->buffer_info[i];
  3323. }
  3324. rx_ring->next_to_use = i;
  3325. }
  3326. /**
  3327. * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
  3328. * @adapter: address of board private structure
  3329. **/
  3330. static void
  3331. e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  3332. struct e1000_rx_ring *rx_ring,
  3333. int cleaned_count)
  3334. {
  3335. struct net_device *netdev = adapter->netdev;
  3336. struct pci_dev *pdev = adapter->pdev;
  3337. union e1000_rx_desc_packet_split *rx_desc;
  3338. struct e1000_buffer *buffer_info;
  3339. struct e1000_ps_page *ps_page;
  3340. struct e1000_ps_page_dma *ps_page_dma;
  3341. struct sk_buff *skb;
  3342. unsigned int i, j;
  3343. i = rx_ring->next_to_use;
  3344. buffer_info = &rx_ring->buffer_info[i];
  3345. ps_page = &rx_ring->ps_page[i];
  3346. ps_page_dma = &rx_ring->ps_page_dma[i];
  3347. while (cleaned_count--) {
  3348. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3349. for(j = 0; j < PS_PAGE_BUFFERS; j++) {
  3350. if (j < adapter->rx_ps_pages) {
  3351. if (likely(!ps_page->ps_page[j])) {
  3352. ps_page->ps_page[j] =
  3353. alloc_page(GFP_ATOMIC);
  3354. if (unlikely(!ps_page->ps_page[j]))
  3355. goto no_buffers;
  3356. ps_page_dma->ps_page_dma[j] =
  3357. pci_map_page(pdev,
  3358. ps_page->ps_page[j],
  3359. 0, PAGE_SIZE,
  3360. PCI_DMA_FROMDEVICE);
  3361. }
  3362. /* Refresh the desc even if buffer_addrs didn't
  3363. * change because each write-back erases
  3364. * this info.
  3365. */
  3366. rx_desc->read.buffer_addr[j+1] =
  3367. cpu_to_le64(ps_page_dma->ps_page_dma[j]);
  3368. } else
  3369. rx_desc->read.buffer_addr[j+1] = ~0;
  3370. }
  3371. skb = dev_alloc_skb(adapter->rx_ps_bsize0 + NET_IP_ALIGN);
  3372. if(unlikely(!skb))
  3373. break;
  3374. /* Make buffer alignment 2 beyond a 16 byte boundary
  3375. * this will result in a 16 byte aligned IP header after
  3376. * the 14 byte MAC header is removed
  3377. */
  3378. skb_reserve(skb, NET_IP_ALIGN);
  3379. skb->dev = netdev;
  3380. buffer_info->skb = skb;
  3381. buffer_info->length = adapter->rx_ps_bsize0;
  3382. buffer_info->dma = pci_map_single(pdev, skb->data,
  3383. adapter->rx_ps_bsize0,
  3384. PCI_DMA_FROMDEVICE);
  3385. rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
  3386. if(unlikely((i & ~(E1000_RX_BUFFER_WRITE - 1)) == i)) {
  3387. /* Force memory writes to complete before letting h/w
  3388. * know there are new descriptors to fetch. (Only
  3389. * applicable for weak-ordered memory model archs,
  3390. * such as IA-64). */
  3391. wmb();
  3392. /* Hardware increments by 16 bytes, but packet split
  3393. * descriptors are 32 bytes...so we increment tail
  3394. * twice as much.
  3395. */
  3396. writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
  3397. }
  3398. if(unlikely(++i == rx_ring->count)) i = 0;
  3399. buffer_info = &rx_ring->buffer_info[i];
  3400. ps_page = &rx_ring->ps_page[i];
  3401. ps_page_dma = &rx_ring->ps_page_dma[i];
  3402. }
  3403. no_buffers:
  3404. rx_ring->next_to_use = i;
  3405. }
  3406. /**
  3407. * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
  3408. * @adapter:
  3409. **/
  3410. static void
  3411. e1000_smartspeed(struct e1000_adapter *adapter)
  3412. {
  3413. uint16_t phy_status;
  3414. uint16_t phy_ctrl;
  3415. if((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
  3416. !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
  3417. return;
  3418. if(adapter->smartspeed == 0) {
  3419. /* If Master/Slave config fault is asserted twice,
  3420. * we assume back-to-back */
  3421. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3422. if(!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3423. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3424. if(!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3425. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3426. if(phy_ctrl & CR_1000T_MS_ENABLE) {
  3427. phy_ctrl &= ~CR_1000T_MS_ENABLE;
  3428. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
  3429. phy_ctrl);
  3430. adapter->smartspeed++;
  3431. if(!e1000_phy_setup_autoneg(&adapter->hw) &&
  3432. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
  3433. &phy_ctrl)) {
  3434. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3435. MII_CR_RESTART_AUTO_NEG);
  3436. e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
  3437. phy_ctrl);
  3438. }
  3439. }
  3440. return;
  3441. } else if(adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
  3442. /* If still no link, perhaps using 2/3 pair cable */
  3443. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3444. phy_ctrl |= CR_1000T_MS_ENABLE;
  3445. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
  3446. if(!e1000_phy_setup_autoneg(&adapter->hw) &&
  3447. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
  3448. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3449. MII_CR_RESTART_AUTO_NEG);
  3450. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
  3451. }
  3452. }
  3453. /* Restart process after E1000_SMARTSPEED_MAX iterations */
  3454. if(adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
  3455. adapter->smartspeed = 0;
  3456. }
  3457. /**
  3458. * e1000_ioctl -
  3459. * @netdev:
  3460. * @ifreq:
  3461. * @cmd:
  3462. **/
  3463. static int
  3464. e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3465. {
  3466. switch (cmd) {
  3467. case SIOCGMIIPHY:
  3468. case SIOCGMIIREG:
  3469. case SIOCSMIIREG:
  3470. return e1000_mii_ioctl(netdev, ifr, cmd);
  3471. default:
  3472. return -EOPNOTSUPP;
  3473. }
  3474. }
  3475. /**
  3476. * e1000_mii_ioctl -
  3477. * @netdev:
  3478. * @ifreq:
  3479. * @cmd:
  3480. **/
  3481. static int
  3482. e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3483. {
  3484. struct e1000_adapter *adapter = netdev_priv(netdev);
  3485. struct mii_ioctl_data *data = if_mii(ifr);
  3486. int retval;
  3487. uint16_t mii_reg;
  3488. uint16_t spddplx;
  3489. unsigned long flags;
  3490. if(adapter->hw.media_type != e1000_media_type_copper)
  3491. return -EOPNOTSUPP;
  3492. switch (cmd) {
  3493. case SIOCGMIIPHY:
  3494. data->phy_id = adapter->hw.phy_addr;
  3495. break;
  3496. case SIOCGMIIREG:
  3497. if(!capable(CAP_NET_ADMIN))
  3498. return -EPERM;
  3499. spin_lock_irqsave(&adapter->stats_lock, flags);
  3500. if(e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
  3501. &data->val_out)) {
  3502. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3503. return -EIO;
  3504. }
  3505. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3506. break;
  3507. case SIOCSMIIREG:
  3508. if(!capable(CAP_NET_ADMIN))
  3509. return -EPERM;
  3510. if(data->reg_num & ~(0x1F))
  3511. return -EFAULT;
  3512. mii_reg = data->val_in;
  3513. spin_lock_irqsave(&adapter->stats_lock, flags);
  3514. if(e1000_write_phy_reg(&adapter->hw, data->reg_num,
  3515. mii_reg)) {
  3516. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3517. return -EIO;
  3518. }
  3519. if(adapter->hw.phy_type == e1000_phy_m88) {
  3520. switch (data->reg_num) {
  3521. case PHY_CTRL:
  3522. if(mii_reg & MII_CR_POWER_DOWN)
  3523. break;
  3524. if(mii_reg & MII_CR_AUTO_NEG_EN) {
  3525. adapter->hw.autoneg = 1;
  3526. adapter->hw.autoneg_advertised = 0x2F;
  3527. } else {
  3528. if (mii_reg & 0x40)
  3529. spddplx = SPEED_1000;
  3530. else if (mii_reg & 0x2000)
  3531. spddplx = SPEED_100;
  3532. else
  3533. spddplx = SPEED_10;
  3534. spddplx += (mii_reg & 0x100)
  3535. ? FULL_DUPLEX :
  3536. HALF_DUPLEX;
  3537. retval = e1000_set_spd_dplx(adapter,
  3538. spddplx);
  3539. if(retval) {
  3540. spin_unlock_irqrestore(
  3541. &adapter->stats_lock,
  3542. flags);
  3543. return retval;
  3544. }
  3545. }
  3546. if(netif_running(adapter->netdev)) {
  3547. e1000_down(adapter);
  3548. e1000_up(adapter);
  3549. } else
  3550. e1000_reset(adapter);
  3551. break;
  3552. case M88E1000_PHY_SPEC_CTRL:
  3553. case M88E1000_EXT_PHY_SPEC_CTRL:
  3554. if(e1000_phy_reset(&adapter->hw)) {
  3555. spin_unlock_irqrestore(
  3556. &adapter->stats_lock, flags);
  3557. return -EIO;
  3558. }
  3559. break;
  3560. }
  3561. } else {
  3562. switch (data->reg_num) {
  3563. case PHY_CTRL:
  3564. if(mii_reg & MII_CR_POWER_DOWN)
  3565. break;
  3566. if(netif_running(adapter->netdev)) {
  3567. e1000_down(adapter);
  3568. e1000_up(adapter);
  3569. } else
  3570. e1000_reset(adapter);
  3571. break;
  3572. }
  3573. }
  3574. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3575. break;
  3576. default:
  3577. return -EOPNOTSUPP;
  3578. }
  3579. return E1000_SUCCESS;
  3580. }
  3581. void
  3582. e1000_pci_set_mwi(struct e1000_hw *hw)
  3583. {
  3584. struct e1000_adapter *adapter = hw->back;
  3585. int ret_val = pci_set_mwi(adapter->pdev);
  3586. if(ret_val)
  3587. DPRINTK(PROBE, ERR, "Error in setting MWI\n");
  3588. }
  3589. void
  3590. e1000_pci_clear_mwi(struct e1000_hw *hw)
  3591. {
  3592. struct e1000_adapter *adapter = hw->back;
  3593. pci_clear_mwi(adapter->pdev);
  3594. }
  3595. void
  3596. e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3597. {
  3598. struct e1000_adapter *adapter = hw->back;
  3599. pci_read_config_word(adapter->pdev, reg, value);
  3600. }
  3601. void
  3602. e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3603. {
  3604. struct e1000_adapter *adapter = hw->back;
  3605. pci_write_config_word(adapter->pdev, reg, *value);
  3606. }
  3607. uint32_t
  3608. e1000_io_read(struct e1000_hw *hw, unsigned long port)
  3609. {
  3610. return inl(port);
  3611. }
  3612. void
  3613. e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
  3614. {
  3615. outl(value, port);
  3616. }
  3617. static void
  3618. e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
  3619. {
  3620. struct e1000_adapter *adapter = netdev_priv(netdev);
  3621. uint32_t ctrl, rctl;
  3622. e1000_irq_disable(adapter);
  3623. adapter->vlgrp = grp;
  3624. if(grp) {
  3625. /* enable VLAN tag insert/strip */
  3626. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3627. ctrl |= E1000_CTRL_VME;
  3628. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3629. /* enable VLAN receive filtering */
  3630. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3631. rctl |= E1000_RCTL_VFE;
  3632. rctl &= ~E1000_RCTL_CFIEN;
  3633. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3634. e1000_update_mng_vlan(adapter);
  3635. } else {
  3636. /* disable VLAN tag insert/strip */
  3637. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3638. ctrl &= ~E1000_CTRL_VME;
  3639. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3640. /* disable VLAN filtering */
  3641. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3642. rctl &= ~E1000_RCTL_VFE;
  3643. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3644. if(adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
  3645. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  3646. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  3647. }
  3648. }
  3649. e1000_irq_enable(adapter);
  3650. }
  3651. static void
  3652. e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
  3653. {
  3654. struct e1000_adapter *adapter = netdev_priv(netdev);
  3655. uint32_t vfta, index;
  3656. if((adapter->hw.mng_cookie.status &
  3657. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3658. (vid == adapter->mng_vlan_id))
  3659. return;
  3660. /* add VID to filter table */
  3661. index = (vid >> 5) & 0x7F;
  3662. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3663. vfta |= (1 << (vid & 0x1F));
  3664. e1000_write_vfta(&adapter->hw, index, vfta);
  3665. }
  3666. static void
  3667. e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
  3668. {
  3669. struct e1000_adapter *adapter = netdev_priv(netdev);
  3670. uint32_t vfta, index;
  3671. e1000_irq_disable(adapter);
  3672. if(adapter->vlgrp)
  3673. adapter->vlgrp->vlan_devices[vid] = NULL;
  3674. e1000_irq_enable(adapter);
  3675. if((adapter->hw.mng_cookie.status &
  3676. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3677. (vid == adapter->mng_vlan_id)) {
  3678. /* release control to f/w */
  3679. e1000_release_hw_control(adapter);
  3680. return;
  3681. }
  3682. /* remove VID from filter table */
  3683. index = (vid >> 5) & 0x7F;
  3684. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3685. vfta &= ~(1 << (vid & 0x1F));
  3686. e1000_write_vfta(&adapter->hw, index, vfta);
  3687. }
  3688. static void
  3689. e1000_restore_vlan(struct e1000_adapter *adapter)
  3690. {
  3691. e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  3692. if(adapter->vlgrp) {
  3693. uint16_t vid;
  3694. for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
  3695. if(!adapter->vlgrp->vlan_devices[vid])
  3696. continue;
  3697. e1000_vlan_rx_add_vid(adapter->netdev, vid);
  3698. }
  3699. }
  3700. }
  3701. int
  3702. e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
  3703. {
  3704. adapter->hw.autoneg = 0;
  3705. /* Fiber NICs only allow 1000 gbps Full duplex */
  3706. if((adapter->hw.media_type == e1000_media_type_fiber) &&
  3707. spddplx != (SPEED_1000 + DUPLEX_FULL)) {
  3708. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3709. return -EINVAL;
  3710. }
  3711. switch(spddplx) {
  3712. case SPEED_10 + DUPLEX_HALF:
  3713. adapter->hw.forced_speed_duplex = e1000_10_half;
  3714. break;
  3715. case SPEED_10 + DUPLEX_FULL:
  3716. adapter->hw.forced_speed_duplex = e1000_10_full;
  3717. break;
  3718. case SPEED_100 + DUPLEX_HALF:
  3719. adapter->hw.forced_speed_duplex = e1000_100_half;
  3720. break;
  3721. case SPEED_100 + DUPLEX_FULL:
  3722. adapter->hw.forced_speed_duplex = e1000_100_full;
  3723. break;
  3724. case SPEED_1000 + DUPLEX_FULL:
  3725. adapter->hw.autoneg = 1;
  3726. adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
  3727. break;
  3728. case SPEED_1000 + DUPLEX_HALF: /* not supported */
  3729. default:
  3730. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3731. return -EINVAL;
  3732. }
  3733. return 0;
  3734. }
  3735. #ifdef CONFIG_PM
  3736. static int
  3737. e1000_suspend(struct pci_dev *pdev, pm_message_t state)
  3738. {
  3739. struct net_device *netdev = pci_get_drvdata(pdev);
  3740. struct e1000_adapter *adapter = netdev_priv(netdev);
  3741. uint32_t ctrl, ctrl_ext, rctl, manc, status;
  3742. uint32_t wufc = adapter->wol;
  3743. netif_device_detach(netdev);
  3744. if(netif_running(netdev))
  3745. e1000_down(adapter);
  3746. status = E1000_READ_REG(&adapter->hw, STATUS);
  3747. if(status & E1000_STATUS_LU)
  3748. wufc &= ~E1000_WUFC_LNKC;
  3749. if(wufc) {
  3750. e1000_setup_rctl(adapter);
  3751. e1000_set_multi(netdev);
  3752. /* turn on all-multi mode if wake on multicast is enabled */
  3753. if(adapter->wol & E1000_WUFC_MC) {
  3754. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3755. rctl |= E1000_RCTL_MPE;
  3756. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3757. }
  3758. if(adapter->hw.mac_type >= e1000_82540) {
  3759. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3760. /* advertise wake from D3Cold */
  3761. #define E1000_CTRL_ADVD3WUC 0x00100000
  3762. /* phy power management enable */
  3763. #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
  3764. ctrl |= E1000_CTRL_ADVD3WUC |
  3765. E1000_CTRL_EN_PHY_PWR_MGMT;
  3766. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3767. }
  3768. if(adapter->hw.media_type == e1000_media_type_fiber ||
  3769. adapter->hw.media_type == e1000_media_type_internal_serdes) {
  3770. /* keep the laser running in D3 */
  3771. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  3772. ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
  3773. E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
  3774. }
  3775. /* Allow time for pending master requests to run */
  3776. e1000_disable_pciex_master(&adapter->hw);
  3777. E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
  3778. E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
  3779. pci_enable_wake(pdev, 3, 1);
  3780. pci_enable_wake(pdev, 4, 1); /* 4 == D3 cold */
  3781. } else {
  3782. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  3783. E1000_WRITE_REG(&adapter->hw, WUFC, 0);
  3784. pci_enable_wake(pdev, 3, 0);
  3785. pci_enable_wake(pdev, 4, 0); /* 4 == D3 cold */
  3786. }
  3787. pci_save_state(pdev);
  3788. if(adapter->hw.mac_type >= e1000_82540 &&
  3789. adapter->hw.media_type == e1000_media_type_copper) {
  3790. manc = E1000_READ_REG(&adapter->hw, MANC);
  3791. if(manc & E1000_MANC_SMBUS_EN) {
  3792. manc |= E1000_MANC_ARP_EN;
  3793. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  3794. pci_enable_wake(pdev, 3, 1);
  3795. pci_enable_wake(pdev, 4, 1); /* 4 == D3 cold */
  3796. }
  3797. }
  3798. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  3799. * would have already happened in close and is redundant. */
  3800. e1000_release_hw_control(adapter);
  3801. pci_disable_device(pdev);
  3802. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  3803. return 0;
  3804. }
  3805. static int
  3806. e1000_resume(struct pci_dev *pdev)
  3807. {
  3808. struct net_device *netdev = pci_get_drvdata(pdev);
  3809. struct e1000_adapter *adapter = netdev_priv(netdev);
  3810. uint32_t manc, ret_val;
  3811. pci_set_power_state(pdev, PCI_D0);
  3812. pci_restore_state(pdev);
  3813. ret_val = pci_enable_device(pdev);
  3814. pci_set_master(pdev);
  3815. pci_enable_wake(pdev, PCI_D3hot, 0);
  3816. pci_enable_wake(pdev, PCI_D3cold, 0);
  3817. e1000_reset(adapter);
  3818. E1000_WRITE_REG(&adapter->hw, WUS, ~0);
  3819. if(netif_running(netdev))
  3820. e1000_up(adapter);
  3821. netif_device_attach(netdev);
  3822. if(adapter->hw.mac_type >= e1000_82540 &&
  3823. adapter->hw.media_type == e1000_media_type_copper) {
  3824. manc = E1000_READ_REG(&adapter->hw, MANC);
  3825. manc &= ~(E1000_MANC_ARP_EN);
  3826. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  3827. }
  3828. /* If the controller is 82573 and f/w is AMT, do not set
  3829. * DRV_LOAD until the interface is up. For all other cases,
  3830. * let the f/w know that the h/w is now under the control
  3831. * of the driver. */
  3832. if (adapter->hw.mac_type != e1000_82573 ||
  3833. !e1000_check_mng_mode(&adapter->hw))
  3834. e1000_get_hw_control(adapter);
  3835. return 0;
  3836. }
  3837. #endif
  3838. #ifdef CONFIG_NET_POLL_CONTROLLER
  3839. /*
  3840. * Polling 'interrupt' - used by things like netconsole to send skbs
  3841. * without having to re-enable interrupts. It's not called while
  3842. * the interrupt routine is executing.
  3843. */
  3844. static void
  3845. e1000_netpoll(struct net_device *netdev)
  3846. {
  3847. struct e1000_adapter *adapter = netdev_priv(netdev);
  3848. disable_irq(adapter->pdev->irq);
  3849. e1000_intr(adapter->pdev->irq, netdev, NULL);
  3850. e1000_clean_tx_irq(adapter, adapter->tx_ring);
  3851. #ifndef CONFIG_E1000_NAPI
  3852. adapter->clean_rx(adapter, adapter->rx_ring);
  3853. #endif
  3854. enable_irq(adapter->pdev->irq);
  3855. }
  3856. #endif
  3857. /* e1000_main.c */