davinci-pcm.c 25 KB

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  1. /*
  2. * ALSA PCM interface for the TI DAVINCI processor
  3. *
  4. * Author: Vladimir Barinov, <vbarinov@embeddedalley.com>
  5. * Copyright: (C) 2007 MontaVista Software, Inc., <source@mvista.com>
  6. * added SRAM ping/pong (C) 2008 Troy Kisky <troy.kisky@boundarydevices.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/module.h>
  13. #include <linux/init.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/slab.h>
  16. #include <linux/dma-mapping.h>
  17. #include <linux/kernel.h>
  18. #include <sound/core.h>
  19. #include <sound/pcm.h>
  20. #include <sound/pcm_params.h>
  21. #include <sound/soc.h>
  22. #include <asm/dma.h>
  23. #include <mach/edma.h>
  24. #include <mach/sram.h>
  25. #include "davinci-pcm.h"
  26. #ifdef DEBUG
  27. static void print_buf_info(int slot, char *name)
  28. {
  29. struct edmacc_param p;
  30. if (slot < 0)
  31. return;
  32. edma_read_slot(slot, &p);
  33. printk(KERN_DEBUG "%s: 0x%x, opt=%x, src=%x, a_b_cnt=%x dst=%x\n",
  34. name, slot, p.opt, p.src, p.a_b_cnt, p.dst);
  35. printk(KERN_DEBUG " src_dst_bidx=%x link_bcntrld=%x src_dst_cidx=%x ccnt=%x\n",
  36. p.src_dst_bidx, p.link_bcntrld, p.src_dst_cidx, p.ccnt);
  37. }
  38. #else
  39. static void print_buf_info(int slot, char *name)
  40. {
  41. }
  42. #endif
  43. static struct snd_pcm_hardware pcm_hardware_playback = {
  44. .info = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER |
  45. SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
  46. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME),
  47. .formats = (SNDRV_PCM_FMTBIT_S16_LE),
  48. .rates = (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
  49. SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 |
  50. SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |
  51. SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 |
  52. SNDRV_PCM_RATE_KNOT),
  53. .rate_min = 8000,
  54. .rate_max = 96000,
  55. .channels_min = 2,
  56. .channels_max = 2,
  57. .buffer_bytes_max = 128 * 1024,
  58. .period_bytes_min = 32,
  59. .period_bytes_max = 8 * 1024,
  60. .periods_min = 16,
  61. .periods_max = 255,
  62. .fifo_size = 0,
  63. };
  64. static struct snd_pcm_hardware pcm_hardware_capture = {
  65. .info = (SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER |
  66. SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
  67. SNDRV_PCM_INFO_PAUSE),
  68. .formats = (SNDRV_PCM_FMTBIT_S16_LE),
  69. .rates = (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |
  70. SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 |
  71. SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |
  72. SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 |
  73. SNDRV_PCM_RATE_KNOT),
  74. .rate_min = 8000,
  75. .rate_max = 96000,
  76. .channels_min = 2,
  77. .channels_max = 2,
  78. .buffer_bytes_max = 128 * 1024,
  79. .period_bytes_min = 32,
  80. .period_bytes_max = 8 * 1024,
  81. .periods_min = 16,
  82. .periods_max = 255,
  83. .fifo_size = 0,
  84. };
  85. /*
  86. * How ping/pong works....
  87. *
  88. * Playback:
  89. * ram_params - copys 2*ping_size from start of SDRAM to iram,
  90. * links to ram_link2
  91. * ram_link2 - copys rest of SDRAM to iram in ping_size units,
  92. * links to ram_link
  93. * ram_link - copys entire SDRAM to iram in ping_size uints,
  94. * links to self
  95. *
  96. * asp_params - same as asp_link[0]
  97. * asp_link[0] - copys from lower half of iram to asp port
  98. * links to asp_link[1], triggers iram copy event on completion
  99. * asp_link[1] - copys from upper half of iram to asp port
  100. * links to asp_link[0], triggers iram copy event on completion
  101. * triggers interrupt only needed to let upper SOC levels update position
  102. * in stream on completion
  103. *
  104. * When playback is started:
  105. * ram_params started
  106. * asp_params started
  107. *
  108. * Capture:
  109. * ram_params - same as ram_link,
  110. * links to ram_link
  111. * ram_link - same as playback
  112. * links to self
  113. *
  114. * asp_params - same as playback
  115. * asp_link[0] - same as playback
  116. * asp_link[1] - same as playback
  117. *
  118. * When capture is started:
  119. * asp_params started
  120. */
  121. struct davinci_runtime_data {
  122. spinlock_t lock;
  123. int period; /* current DMA period */
  124. int asp_channel; /* Master DMA channel */
  125. int asp_link[2]; /* asp parameter link channel, ping/pong */
  126. struct davinci_pcm_dma_params *params; /* DMA params */
  127. int ram_channel;
  128. int ram_link;
  129. int ram_link2;
  130. struct edmacc_param asp_params;
  131. struct edmacc_param ram_params;
  132. };
  133. /*
  134. * Not used with ping/pong
  135. */
  136. static void davinci_pcm_enqueue_dma(struct snd_pcm_substream *substream)
  137. {
  138. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  139. struct snd_pcm_runtime *runtime = substream->runtime;
  140. int link = prtd->asp_link[0];
  141. unsigned int period_size;
  142. unsigned int dma_offset;
  143. dma_addr_t dma_pos;
  144. dma_addr_t src, dst;
  145. unsigned short src_bidx, dst_bidx;
  146. unsigned short src_cidx, dst_cidx;
  147. unsigned int data_type;
  148. unsigned short acnt;
  149. unsigned int count;
  150. unsigned int fifo_level;
  151. period_size = snd_pcm_lib_period_bytes(substream);
  152. dma_offset = prtd->period * period_size;
  153. dma_pos = runtime->dma_addr + dma_offset;
  154. fifo_level = prtd->params->fifo_level;
  155. pr_debug("davinci_pcm: audio_set_dma_params_play channel = %d "
  156. "dma_ptr = %x period_size=%x\n", link, dma_pos, period_size);
  157. data_type = prtd->params->data_type;
  158. count = period_size / data_type;
  159. if (fifo_level)
  160. count /= fifo_level;
  161. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  162. src = dma_pos;
  163. dst = prtd->params->dma_addr;
  164. src_bidx = data_type;
  165. dst_bidx = 0;
  166. src_cidx = data_type * fifo_level;
  167. dst_cidx = 0;
  168. } else {
  169. src = prtd->params->dma_addr;
  170. dst = dma_pos;
  171. src_bidx = 0;
  172. dst_bidx = data_type;
  173. src_cidx = 0;
  174. dst_cidx = data_type * fifo_level;
  175. }
  176. acnt = prtd->params->acnt;
  177. edma_set_src(link, src, INCR, W8BIT);
  178. edma_set_dest(link, dst, INCR, W8BIT);
  179. edma_set_src_index(link, src_bidx, src_cidx);
  180. edma_set_dest_index(link, dst_bidx, dst_cidx);
  181. if (!fifo_level)
  182. edma_set_transfer_params(link, acnt, count, 1, 0, ASYNC);
  183. else
  184. edma_set_transfer_params(link, acnt, fifo_level, count,
  185. fifo_level, ABSYNC);
  186. prtd->period++;
  187. if (unlikely(prtd->period >= runtime->periods))
  188. prtd->period = 0;
  189. }
  190. static void davinci_pcm_dma_irq(unsigned link, u16 ch_status, void *data)
  191. {
  192. struct snd_pcm_substream *substream = data;
  193. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  194. print_buf_info(prtd->ram_channel, "i ram_channel");
  195. pr_debug("davinci_pcm: link=%d, status=0x%x\n", link, ch_status);
  196. if (unlikely(ch_status != DMA_COMPLETE))
  197. return;
  198. if (snd_pcm_running(substream)) {
  199. if (prtd->ram_channel < 0) {
  200. /* No ping/pong must fix up link dma data*/
  201. spin_lock(&prtd->lock);
  202. davinci_pcm_enqueue_dma(substream);
  203. spin_unlock(&prtd->lock);
  204. }
  205. snd_pcm_period_elapsed(substream);
  206. }
  207. }
  208. static int allocate_sram(struct snd_pcm_substream *substream, unsigned size,
  209. struct snd_pcm_hardware *ppcm)
  210. {
  211. struct snd_dma_buffer *buf = &substream->dma_buffer;
  212. struct snd_dma_buffer *iram_dma = NULL;
  213. dma_addr_t iram_phys = 0;
  214. void *iram_virt = NULL;
  215. if (buf->private_data || !size)
  216. return 0;
  217. ppcm->period_bytes_max = size;
  218. iram_virt = sram_alloc(size, &iram_phys);
  219. if (!iram_virt)
  220. goto exit1;
  221. iram_dma = kzalloc(sizeof(*iram_dma), GFP_KERNEL);
  222. if (!iram_dma)
  223. goto exit2;
  224. iram_dma->area = iram_virt;
  225. iram_dma->addr = iram_phys;
  226. memset(iram_dma->area, 0, size);
  227. iram_dma->bytes = size;
  228. buf->private_data = iram_dma;
  229. return 0;
  230. exit2:
  231. if (iram_virt)
  232. sram_free(iram_virt, size);
  233. exit1:
  234. return -ENOMEM;
  235. }
  236. /*
  237. * Only used with ping/pong.
  238. * This is called after runtime->dma_addr, period_bytes and data_type are valid
  239. */
  240. static int ping_pong_dma_setup(struct snd_pcm_substream *substream)
  241. {
  242. unsigned short ram_src_cidx, ram_dst_cidx;
  243. struct snd_pcm_runtime *runtime = substream->runtime;
  244. struct davinci_runtime_data *prtd = runtime->private_data;
  245. struct snd_dma_buffer *iram_dma =
  246. (struct snd_dma_buffer *)substream->dma_buffer.private_data;
  247. struct davinci_pcm_dma_params *params = prtd->params;
  248. unsigned int data_type = params->data_type;
  249. unsigned int acnt = params->acnt;
  250. /* divide by 2 for ping/pong */
  251. unsigned int ping_size = snd_pcm_lib_period_bytes(substream) >> 1;
  252. int link = prtd->asp_link[1];
  253. unsigned int fifo_level = prtd->params->fifo_level;
  254. unsigned int count;
  255. if ((data_type == 0) || (data_type > 4)) {
  256. printk(KERN_ERR "%s: data_type=%i\n", __func__, data_type);
  257. return -EINVAL;
  258. }
  259. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  260. dma_addr_t asp_src_pong = iram_dma->addr + ping_size;
  261. ram_src_cidx = ping_size;
  262. ram_dst_cidx = -ping_size;
  263. edma_set_src(link, asp_src_pong, INCR, W8BIT);
  264. link = prtd->asp_link[0];
  265. edma_set_src_index(link, data_type, data_type * fifo_level);
  266. link = prtd->asp_link[1];
  267. edma_set_src_index(link, data_type, data_type * fifo_level);
  268. link = prtd->ram_link;
  269. edma_set_src(link, runtime->dma_addr, INCR, W32BIT);
  270. } else {
  271. dma_addr_t asp_dst_pong = iram_dma->addr + ping_size;
  272. ram_src_cidx = -ping_size;
  273. ram_dst_cidx = ping_size;
  274. edma_set_dest(link, asp_dst_pong, INCR, W8BIT);
  275. link = prtd->asp_link[0];
  276. edma_set_dest_index(link, data_type, data_type * fifo_level);
  277. link = prtd->asp_link[1];
  278. edma_set_dest_index(link, data_type, data_type * fifo_level);
  279. link = prtd->ram_link;
  280. edma_set_dest(link, runtime->dma_addr, INCR, W32BIT);
  281. }
  282. if (!fifo_level) {
  283. count = ping_size / data_type;
  284. edma_set_transfer_params(prtd->asp_link[0], acnt, count,
  285. 1, 0, ASYNC);
  286. edma_set_transfer_params(prtd->asp_link[1], acnt, count,
  287. 1, 0, ASYNC);
  288. } else {
  289. count = ping_size / (data_type * fifo_level);
  290. edma_set_transfer_params(prtd->asp_link[0], acnt, fifo_level,
  291. count, fifo_level, ABSYNC);
  292. edma_set_transfer_params(prtd->asp_link[1], acnt, fifo_level,
  293. count, fifo_level, ABSYNC);
  294. }
  295. link = prtd->ram_link;
  296. edma_set_src_index(link, ping_size, ram_src_cidx);
  297. edma_set_dest_index(link, ping_size, ram_dst_cidx);
  298. edma_set_transfer_params(link, ping_size, 2,
  299. runtime->periods, 2, ASYNC);
  300. /* init master params */
  301. edma_read_slot(prtd->asp_link[0], &prtd->asp_params);
  302. edma_read_slot(prtd->ram_link, &prtd->ram_params);
  303. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  304. struct edmacc_param p_ram;
  305. /* Copy entire iram buffer before playback started */
  306. prtd->ram_params.a_b_cnt = (1 << 16) | (ping_size << 1);
  307. /* 0 dst_bidx */
  308. prtd->ram_params.src_dst_bidx = (ping_size << 1);
  309. /* 0 dst_cidx */
  310. prtd->ram_params.src_dst_cidx = (ping_size << 1);
  311. prtd->ram_params.ccnt = 1;
  312. /* Skip 1st period */
  313. edma_read_slot(prtd->ram_link, &p_ram);
  314. p_ram.src += (ping_size << 1);
  315. p_ram.ccnt -= 1;
  316. edma_write_slot(prtd->ram_link2, &p_ram);
  317. /*
  318. * When 1st started, ram -> iram dma channel will fill the
  319. * entire iram. Then, whenever a ping/pong asp buffer finishes,
  320. * 1/2 iram will be filled.
  321. */
  322. prtd->ram_params.link_bcntrld =
  323. EDMA_CHAN_SLOT(prtd->ram_link2) << 5;
  324. }
  325. return 0;
  326. }
  327. /* 1 asp tx or rx channel using 2 parameter channels
  328. * 1 ram to/from iram channel using 1 parameter channel
  329. *
  330. * Playback
  331. * ram copy channel kicks off first,
  332. * 1st ram copy of entire iram buffer completion kicks off asp channel
  333. * asp tcc always kicks off ram copy of 1/2 iram buffer
  334. *
  335. * Record
  336. * asp channel starts, tcc kicks off ram copy
  337. */
  338. static int request_ping_pong(struct snd_pcm_substream *substream,
  339. struct davinci_runtime_data *prtd,
  340. struct snd_dma_buffer *iram_dma)
  341. {
  342. dma_addr_t asp_src_ping;
  343. dma_addr_t asp_dst_ping;
  344. int link;
  345. struct davinci_pcm_dma_params *params = prtd->params;
  346. /* Request ram master channel */
  347. link = prtd->ram_channel = edma_alloc_channel(EDMA_CHANNEL_ANY,
  348. davinci_pcm_dma_irq, substream,
  349. prtd->params->ram_chan_q);
  350. if (link < 0)
  351. goto exit1;
  352. /* Request ram link channel */
  353. link = prtd->ram_link = edma_alloc_slot(
  354. EDMA_CTLR(prtd->ram_channel), EDMA_SLOT_ANY);
  355. if (link < 0)
  356. goto exit2;
  357. link = prtd->asp_link[1] = edma_alloc_slot(
  358. EDMA_CTLR(prtd->asp_channel), EDMA_SLOT_ANY);
  359. if (link < 0)
  360. goto exit3;
  361. prtd->ram_link2 = -1;
  362. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  363. link = prtd->ram_link2 = edma_alloc_slot(
  364. EDMA_CTLR(prtd->ram_channel), EDMA_SLOT_ANY);
  365. if (link < 0)
  366. goto exit4;
  367. }
  368. /* circle ping-pong buffers */
  369. edma_link(prtd->asp_link[0], prtd->asp_link[1]);
  370. edma_link(prtd->asp_link[1], prtd->asp_link[0]);
  371. /* circle ram buffers */
  372. edma_link(prtd->ram_link, prtd->ram_link);
  373. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  374. asp_src_ping = iram_dma->addr;
  375. asp_dst_ping = params->dma_addr; /* fifo */
  376. } else {
  377. asp_src_ping = params->dma_addr; /* fifo */
  378. asp_dst_ping = iram_dma->addr;
  379. }
  380. /* ping */
  381. link = prtd->asp_link[0];
  382. edma_set_src(link, asp_src_ping, INCR, W16BIT);
  383. edma_set_dest(link, asp_dst_ping, INCR, W16BIT);
  384. edma_set_src_index(link, 0, 0);
  385. edma_set_dest_index(link, 0, 0);
  386. edma_read_slot(link, &prtd->asp_params);
  387. prtd->asp_params.opt &= ~(TCCMODE | EDMA_TCC(0x3f) | TCINTEN);
  388. prtd->asp_params.opt |= TCCHEN |
  389. EDMA_TCC(prtd->ram_channel & 0x3f);
  390. edma_write_slot(link, &prtd->asp_params);
  391. /* pong */
  392. link = prtd->asp_link[1];
  393. edma_set_src(link, asp_src_ping, INCR, W16BIT);
  394. edma_set_dest(link, asp_dst_ping, INCR, W16BIT);
  395. edma_set_src_index(link, 0, 0);
  396. edma_set_dest_index(link, 0, 0);
  397. edma_read_slot(link, &prtd->asp_params);
  398. prtd->asp_params.opt &= ~(TCCMODE | EDMA_TCC(0x3f));
  399. /* interrupt after every pong completion */
  400. prtd->asp_params.opt |= TCINTEN | TCCHEN |
  401. EDMA_TCC(prtd->ram_channel & 0x3f);
  402. edma_write_slot(link, &prtd->asp_params);
  403. /* ram */
  404. link = prtd->ram_link;
  405. edma_set_src(link, iram_dma->addr, INCR, W32BIT);
  406. edma_set_dest(link, iram_dma->addr, INCR, W32BIT);
  407. pr_debug("%s: audio dma channels/slots in use for ram:%u %u %u,"
  408. "for asp:%u %u %u\n", __func__,
  409. prtd->ram_channel, prtd->ram_link, prtd->ram_link2,
  410. prtd->asp_channel, prtd->asp_link[0],
  411. prtd->asp_link[1]);
  412. return 0;
  413. exit4:
  414. edma_free_channel(prtd->asp_link[1]);
  415. prtd->asp_link[1] = -1;
  416. exit3:
  417. edma_free_channel(prtd->ram_link);
  418. prtd->ram_link = -1;
  419. exit2:
  420. edma_free_channel(prtd->ram_channel);
  421. prtd->ram_channel = -1;
  422. exit1:
  423. return link;
  424. }
  425. static int davinci_pcm_dma_request(struct snd_pcm_substream *substream)
  426. {
  427. struct snd_dma_buffer *iram_dma;
  428. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  429. struct davinci_pcm_dma_params *params = prtd->params;
  430. int link;
  431. if (!params)
  432. return -ENODEV;
  433. /* Request asp master DMA channel */
  434. link = prtd->asp_channel = edma_alloc_channel(params->channel,
  435. davinci_pcm_dma_irq, substream,
  436. prtd->params->asp_chan_q);
  437. if (link < 0)
  438. goto exit1;
  439. /* Request asp link channels */
  440. link = prtd->asp_link[0] = edma_alloc_slot(
  441. EDMA_CTLR(prtd->asp_channel), EDMA_SLOT_ANY);
  442. if (link < 0)
  443. goto exit2;
  444. iram_dma = (struct snd_dma_buffer *)substream->dma_buffer.private_data;
  445. if (iram_dma) {
  446. if (request_ping_pong(substream, prtd, iram_dma) == 0)
  447. return 0;
  448. printk(KERN_WARNING "%s: dma channel allocation failed,"
  449. "not using sram\n", __func__);
  450. }
  451. /* Issue transfer completion IRQ when the channel completes a
  452. * transfer, then always reload from the same slot (by a kind
  453. * of loopback link). The completion IRQ handler will update
  454. * the reload slot with a new buffer.
  455. *
  456. * REVISIT save p_ram here after setting up everything except
  457. * the buffer and its length (ccnt) ... use it as a template
  458. * so davinci_pcm_enqueue_dma() takes less time in IRQ.
  459. */
  460. edma_read_slot(link, &prtd->asp_params);
  461. prtd->asp_params.opt |= TCINTEN |
  462. EDMA_TCC(EDMA_CHAN_SLOT(prtd->asp_channel));
  463. prtd->asp_params.link_bcntrld = EDMA_CHAN_SLOT(link) << 5;
  464. edma_write_slot(link, &prtd->asp_params);
  465. return 0;
  466. exit2:
  467. edma_free_channel(prtd->asp_channel);
  468. prtd->asp_channel = -1;
  469. exit1:
  470. return link;
  471. }
  472. static int davinci_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
  473. {
  474. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  475. int ret = 0;
  476. spin_lock(&prtd->lock);
  477. switch (cmd) {
  478. case SNDRV_PCM_TRIGGER_START:
  479. case SNDRV_PCM_TRIGGER_RESUME:
  480. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  481. edma_resume(prtd->asp_channel);
  482. break;
  483. case SNDRV_PCM_TRIGGER_STOP:
  484. case SNDRV_PCM_TRIGGER_SUSPEND:
  485. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  486. edma_pause(prtd->asp_channel);
  487. break;
  488. default:
  489. ret = -EINVAL;
  490. break;
  491. }
  492. spin_unlock(&prtd->lock);
  493. return ret;
  494. }
  495. static int davinci_pcm_prepare(struct snd_pcm_substream *substream)
  496. {
  497. struct davinci_runtime_data *prtd = substream->runtime->private_data;
  498. if (prtd->ram_channel >= 0) {
  499. int ret = ping_pong_dma_setup(substream);
  500. if (ret < 0)
  501. return ret;
  502. edma_write_slot(prtd->ram_channel, &prtd->ram_params);
  503. edma_write_slot(prtd->asp_channel, &prtd->asp_params);
  504. print_buf_info(prtd->ram_channel, "ram_channel");
  505. print_buf_info(prtd->ram_link, "ram_link");
  506. print_buf_info(prtd->ram_link2, "ram_link2");
  507. print_buf_info(prtd->asp_channel, "asp_channel");
  508. print_buf_info(prtd->asp_link[0], "asp_link[0]");
  509. print_buf_info(prtd->asp_link[1], "asp_link[1]");
  510. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  511. /* copy 1st iram buffer */
  512. edma_start(prtd->ram_channel);
  513. }
  514. edma_start(prtd->asp_channel);
  515. return 0;
  516. }
  517. prtd->period = 0;
  518. davinci_pcm_enqueue_dma(substream);
  519. /* Copy self-linked parameter RAM entry into master channel */
  520. edma_read_slot(prtd->asp_link[0], &prtd->asp_params);
  521. edma_write_slot(prtd->asp_channel, &prtd->asp_params);
  522. davinci_pcm_enqueue_dma(substream);
  523. edma_start(prtd->asp_channel);
  524. return 0;
  525. }
  526. static snd_pcm_uframes_t
  527. davinci_pcm_pointer(struct snd_pcm_substream *substream)
  528. {
  529. struct snd_pcm_runtime *runtime = substream->runtime;
  530. struct davinci_runtime_data *prtd = runtime->private_data;
  531. unsigned int offset;
  532. int asp_count;
  533. dma_addr_t asp_src, asp_dst;
  534. spin_lock(&prtd->lock);
  535. if (prtd->ram_channel >= 0) {
  536. int ram_count;
  537. int mod_ram;
  538. dma_addr_t ram_src, ram_dst;
  539. unsigned int period_size = snd_pcm_lib_period_bytes(substream);
  540. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  541. /* reading ram before asp should be safe
  542. * as long as the asp transfers less than a ping size
  543. * of bytes between the 2 reads
  544. */
  545. edma_get_position(prtd->ram_channel,
  546. &ram_src, &ram_dst);
  547. edma_get_position(prtd->asp_channel,
  548. &asp_src, &asp_dst);
  549. asp_count = asp_src - prtd->asp_params.src;
  550. ram_count = ram_src - prtd->ram_params.src;
  551. mod_ram = ram_count % period_size;
  552. mod_ram -= asp_count;
  553. if (mod_ram < 0)
  554. mod_ram += period_size;
  555. else if (mod_ram == 0) {
  556. if (snd_pcm_running(substream))
  557. mod_ram += period_size;
  558. }
  559. ram_count -= mod_ram;
  560. if (ram_count < 0)
  561. ram_count += period_size * runtime->periods;
  562. } else {
  563. edma_get_position(prtd->ram_channel,
  564. &ram_src, &ram_dst);
  565. ram_count = ram_dst - prtd->ram_params.dst;
  566. }
  567. asp_count = ram_count;
  568. } else {
  569. edma_get_position(prtd->asp_channel, &asp_src, &asp_dst);
  570. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  571. asp_count = asp_src - runtime->dma_addr;
  572. else
  573. asp_count = asp_dst - runtime->dma_addr;
  574. }
  575. spin_unlock(&prtd->lock);
  576. offset = bytes_to_frames(runtime, asp_count);
  577. if (offset >= runtime->buffer_size)
  578. offset = 0;
  579. return offset;
  580. }
  581. static int davinci_pcm_open(struct snd_pcm_substream *substream)
  582. {
  583. struct snd_pcm_runtime *runtime = substream->runtime;
  584. struct davinci_runtime_data *prtd;
  585. struct snd_pcm_hardware *ppcm;
  586. int ret = 0;
  587. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  588. struct davinci_pcm_dma_params *pa;
  589. struct davinci_pcm_dma_params *params;
  590. pa = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream);
  591. if (!pa)
  592. return -ENODEV;
  593. params = &pa[substream->stream];
  594. ppcm = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
  595. &pcm_hardware_playback : &pcm_hardware_capture;
  596. allocate_sram(substream, params->sram_size, ppcm);
  597. snd_soc_set_runtime_hwparams(substream, ppcm);
  598. /* ensure that buffer size is a multiple of period size */
  599. ret = snd_pcm_hw_constraint_integer(runtime,
  600. SNDRV_PCM_HW_PARAM_PERIODS);
  601. if (ret < 0)
  602. return ret;
  603. prtd = kzalloc(sizeof(struct davinci_runtime_data), GFP_KERNEL);
  604. if (prtd == NULL)
  605. return -ENOMEM;
  606. spin_lock_init(&prtd->lock);
  607. prtd->params = params;
  608. prtd->asp_channel = -1;
  609. prtd->asp_link[0] = prtd->asp_link[1] = -1;
  610. prtd->ram_channel = -1;
  611. prtd->ram_link = -1;
  612. prtd->ram_link2 = -1;
  613. runtime->private_data = prtd;
  614. ret = davinci_pcm_dma_request(substream);
  615. if (ret) {
  616. printk(KERN_ERR "davinci_pcm: Failed to get dma channels\n");
  617. kfree(prtd);
  618. }
  619. return ret;
  620. }
  621. static int davinci_pcm_close(struct snd_pcm_substream *substream)
  622. {
  623. struct snd_pcm_runtime *runtime = substream->runtime;
  624. struct davinci_runtime_data *prtd = runtime->private_data;
  625. if (prtd->ram_channel >= 0)
  626. edma_stop(prtd->ram_channel);
  627. if (prtd->asp_channel >= 0)
  628. edma_stop(prtd->asp_channel);
  629. if (prtd->asp_link[0] >= 0)
  630. edma_unlink(prtd->asp_link[0]);
  631. if (prtd->asp_link[1] >= 0)
  632. edma_unlink(prtd->asp_link[1]);
  633. if (prtd->ram_link >= 0)
  634. edma_unlink(prtd->ram_link);
  635. if (prtd->asp_link[0] >= 0)
  636. edma_free_slot(prtd->asp_link[0]);
  637. if (prtd->asp_link[1] >= 0)
  638. edma_free_slot(prtd->asp_link[1]);
  639. if (prtd->asp_channel >= 0)
  640. edma_free_channel(prtd->asp_channel);
  641. if (prtd->ram_link >= 0)
  642. edma_free_slot(prtd->ram_link);
  643. if (prtd->ram_link2 >= 0)
  644. edma_free_slot(prtd->ram_link2);
  645. if (prtd->ram_channel >= 0)
  646. edma_free_channel(prtd->ram_channel);
  647. kfree(prtd);
  648. return 0;
  649. }
  650. static int davinci_pcm_hw_params(struct snd_pcm_substream *substream,
  651. struct snd_pcm_hw_params *hw_params)
  652. {
  653. return snd_pcm_lib_malloc_pages(substream,
  654. params_buffer_bytes(hw_params));
  655. }
  656. static int davinci_pcm_hw_free(struct snd_pcm_substream *substream)
  657. {
  658. return snd_pcm_lib_free_pages(substream);
  659. }
  660. static int davinci_pcm_mmap(struct snd_pcm_substream *substream,
  661. struct vm_area_struct *vma)
  662. {
  663. struct snd_pcm_runtime *runtime = substream->runtime;
  664. return dma_mmap_writecombine(substream->pcm->card->dev, vma,
  665. runtime->dma_area,
  666. runtime->dma_addr,
  667. runtime->dma_bytes);
  668. }
  669. static struct snd_pcm_ops davinci_pcm_ops = {
  670. .open = davinci_pcm_open,
  671. .close = davinci_pcm_close,
  672. .ioctl = snd_pcm_lib_ioctl,
  673. .hw_params = davinci_pcm_hw_params,
  674. .hw_free = davinci_pcm_hw_free,
  675. .prepare = davinci_pcm_prepare,
  676. .trigger = davinci_pcm_trigger,
  677. .pointer = davinci_pcm_pointer,
  678. .mmap = davinci_pcm_mmap,
  679. };
  680. static int davinci_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, int stream,
  681. size_t size)
  682. {
  683. struct snd_pcm_substream *substream = pcm->streams[stream].substream;
  684. struct snd_dma_buffer *buf = &substream->dma_buffer;
  685. buf->dev.type = SNDRV_DMA_TYPE_DEV;
  686. buf->dev.dev = pcm->card->dev;
  687. buf->private_data = NULL;
  688. buf->area = dma_alloc_writecombine(pcm->card->dev, size,
  689. &buf->addr, GFP_KERNEL);
  690. pr_debug("davinci_pcm: preallocate_dma_buffer: area=%p, addr=%p, "
  691. "size=%d\n", (void *) buf->area, (void *) buf->addr, size);
  692. if (!buf->area)
  693. return -ENOMEM;
  694. buf->bytes = size;
  695. return 0;
  696. }
  697. static void davinci_pcm_free(struct snd_pcm *pcm)
  698. {
  699. struct snd_pcm_substream *substream;
  700. struct snd_dma_buffer *buf;
  701. int stream;
  702. for (stream = 0; stream < 2; stream++) {
  703. struct snd_dma_buffer *iram_dma;
  704. substream = pcm->streams[stream].substream;
  705. if (!substream)
  706. continue;
  707. buf = &substream->dma_buffer;
  708. if (!buf->area)
  709. continue;
  710. dma_free_writecombine(pcm->card->dev, buf->bytes,
  711. buf->area, buf->addr);
  712. buf->area = NULL;
  713. iram_dma = buf->private_data;
  714. if (iram_dma) {
  715. sram_free(iram_dma->area, iram_dma->bytes);
  716. kfree(iram_dma);
  717. }
  718. }
  719. }
  720. static u64 davinci_pcm_dmamask = 0xffffffff;
  721. static int davinci_pcm_new(struct snd_card *card,
  722. struct snd_soc_dai *dai, struct snd_pcm *pcm)
  723. {
  724. int ret;
  725. if (!card->dev->dma_mask)
  726. card->dev->dma_mask = &davinci_pcm_dmamask;
  727. if (!card->dev->coherent_dma_mask)
  728. card->dev->coherent_dma_mask = 0xffffffff;
  729. if (dai->driver->playback.channels_min) {
  730. ret = davinci_pcm_preallocate_dma_buffer(pcm,
  731. SNDRV_PCM_STREAM_PLAYBACK,
  732. pcm_hardware_playback.buffer_bytes_max);
  733. if (ret)
  734. return ret;
  735. }
  736. if (dai->driver->capture.channels_min) {
  737. ret = davinci_pcm_preallocate_dma_buffer(pcm,
  738. SNDRV_PCM_STREAM_CAPTURE,
  739. pcm_hardware_capture.buffer_bytes_max);
  740. if (ret)
  741. return ret;
  742. }
  743. return 0;
  744. }
  745. static struct snd_soc_platform_driver davinci_soc_platform = {
  746. .ops = &davinci_pcm_ops,
  747. .pcm_new = davinci_pcm_new,
  748. .pcm_free = davinci_pcm_free,
  749. };
  750. static int __devinit davinci_soc_platform_probe(struct platform_device *pdev)
  751. {
  752. return snd_soc_register_platform(&pdev->dev, &davinci_soc_platform);
  753. }
  754. static int __devexit davinci_soc_platform_remove(struct platform_device *pdev)
  755. {
  756. snd_soc_unregister_platform(&pdev->dev);
  757. return 0;
  758. }
  759. static struct platform_driver davinci_pcm_driver = {
  760. .driver = {
  761. .name = "davinci-pcm-audio",
  762. .owner = THIS_MODULE,
  763. },
  764. .probe = davinci_soc_platform_probe,
  765. .remove = __devexit_p(davinci_soc_platform_remove),
  766. };
  767. static int __init snd_davinci_pcm_init(void)
  768. {
  769. return platform_driver_register(&davinci_pcm_driver);
  770. }
  771. module_init(snd_davinci_pcm_init);
  772. static void __exit snd_davinci_pcm_exit(void)
  773. {
  774. platform_driver_unregister(&davinci_pcm_driver);
  775. }
  776. module_exit(snd_davinci_pcm_exit);
  777. MODULE_AUTHOR("Vladimir Barinov");
  778. MODULE_DESCRIPTION("TI DAVINCI PCM DMA module");
  779. MODULE_LICENSE("GPL");