phy_common.h 12 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401
  1. #ifndef LINUX_B43_PHY_COMMON_H_
  2. #define LINUX_B43_PHY_COMMON_H_
  3. #include <linux/rfkill.h>
  4. struct b43_wldev;
  5. /* PHY register routing bits */
  6. #define B43_PHYROUTE 0x0C00 /* PHY register routing bits mask */
  7. #define B43_PHYROUTE_BASE 0x0000 /* Base registers */
  8. #define B43_PHYROUTE_OFDM_GPHY 0x0400 /* OFDM register routing for G-PHYs */
  9. #define B43_PHYROUTE_EXT_GPHY 0x0800 /* Extended G-PHY registers */
  10. #define B43_PHYROUTE_N_BMODE 0x0C00 /* N-PHY BMODE registers */
  11. /* CCK (B-PHY) registers. */
  12. #define B43_PHY_CCK(reg) ((reg) | B43_PHYROUTE_BASE)
  13. /* N-PHY registers. */
  14. #define B43_PHY_N(reg) ((reg) | B43_PHYROUTE_BASE)
  15. /* N-PHY BMODE registers. */
  16. #define B43_PHY_N_BMODE(reg) ((reg) | B43_PHYROUTE_N_BMODE)
  17. /* OFDM (A-PHY) registers. */
  18. #define B43_PHY_OFDM(reg) ((reg) | B43_PHYROUTE_OFDM_GPHY)
  19. /* Extended G-PHY registers. */
  20. #define B43_PHY_EXTG(reg) ((reg) | B43_PHYROUTE_EXT_GPHY)
  21. /* Masks for the PHY versioning registers. */
  22. #define B43_PHYVER_ANALOG 0xF000
  23. #define B43_PHYVER_ANALOG_SHIFT 12
  24. #define B43_PHYVER_TYPE 0x0F00
  25. #define B43_PHYVER_TYPE_SHIFT 8
  26. #define B43_PHYVER_VERSION 0x00FF
  27. /**
  28. * enum b43_interference_mitigation - Interference Mitigation mode
  29. *
  30. * @B43_INTERFMODE_NONE: Disabled
  31. * @B43_INTERFMODE_NONWLAN: Non-WLAN Interference Mitigation
  32. * @B43_INTERFMODE_MANUALWLAN: WLAN Interference Mitigation
  33. * @B43_INTERFMODE_AUTOWLAN: Automatic WLAN Interference Mitigation
  34. */
  35. enum b43_interference_mitigation {
  36. B43_INTERFMODE_NONE,
  37. B43_INTERFMODE_NONWLAN,
  38. B43_INTERFMODE_MANUALWLAN,
  39. B43_INTERFMODE_AUTOWLAN,
  40. };
  41. /* Antenna identifiers */
  42. enum {
  43. B43_ANTENNA0, /* Antenna 0 */
  44. B43_ANTENNA1, /* Antenna 0 */
  45. B43_ANTENNA_AUTO1, /* Automatic, starting with antenna 1 */
  46. B43_ANTENNA_AUTO0, /* Automatic, starting with antenna 0 */
  47. B43_ANTENNA2,
  48. B43_ANTENNA3 = 8,
  49. B43_ANTENNA_AUTO = B43_ANTENNA_AUTO0,
  50. B43_ANTENNA_DEFAULT = B43_ANTENNA_AUTO,
  51. };
  52. /**
  53. * enum b43_txpwr_result - Return value for the recalc_txpower PHY op.
  54. *
  55. * @B43_TXPWR_RES_NEED_ADJUST: Values changed. Hardware adjustment is needed.
  56. * @B43_TXPWR_RES_DONE: No more work to do. Everything is done.
  57. */
  58. enum b43_txpwr_result {
  59. B43_TXPWR_RES_NEED_ADJUST,
  60. B43_TXPWR_RES_DONE,
  61. };
  62. /**
  63. * struct b43_phy_operations - Function pointers for PHY ops.
  64. *
  65. * @allocate: Allocate and initialise the PHY data structures.
  66. * Must not be NULL.
  67. * @free: Destroy and free the PHY data structures.
  68. * Must not be NULL.
  69. *
  70. * @prepare_structs: Prepare the PHY data structures.
  71. * The data structures allocated in @allocate are
  72. * initialized here.
  73. * Must not be NULL.
  74. * @prepare_hardware: Prepare the PHY. This is called before b43_chip_init to
  75. * do some early early PHY hardware init.
  76. * Can be NULL, if not required.
  77. * @init: Initialize the PHY.
  78. * Must not be NULL.
  79. * @exit: Shutdown the PHY.
  80. * Can be NULL, if not required.
  81. *
  82. * @phy_read: Read from a PHY register.
  83. * Must not be NULL.
  84. * @phy_write: Write to a PHY register.
  85. * Must not be NULL.
  86. * @radio_read: Read from a Radio register.
  87. * Must not be NULL.
  88. * @radio_write: Write to a Radio register.
  89. * Must not be NULL.
  90. *
  91. * @supports_hwpctl: Returns a boolean whether Hardware Power Control
  92. * is supported or not.
  93. * If NULL, hwpctl is assumed to be never supported.
  94. * @software_rfkill: Turn the radio ON or OFF.
  95. * Possible state values are
  96. * RFKILL_STATE_SOFT_BLOCKED or
  97. * RFKILL_STATE_UNBLOCKED
  98. * Must not be NULL.
  99. * @switch_channel: Switch the radio to another channel.
  100. * Must not be NULL.
  101. * @get_default_chan: Just returns the default channel number.
  102. * Must not be NULL.
  103. * @set_rx_antenna: Set the antenna used for RX.
  104. * Can be NULL, if not supported.
  105. * @interf_mitigation: Switch the Interference Mitigation mode.
  106. * Can be NULL, if not supported.
  107. *
  108. * @recalc_txpower: Recalculate the transmission power parameters.
  109. * This callback has to recalculate the TX power settings,
  110. * but does not need to write them to the hardware, yet.
  111. * Returns enum b43_txpwr_result to indicate whether the hardware
  112. * needs to be adjusted.
  113. * If B43_TXPWR_NEED_ADJUST is returned, @adjust_txpower
  114. * will be called later.
  115. * If the parameter "ignore_tssi" is true, the TSSI values should
  116. * be ignored and a recalculation of the power settings should be
  117. * done even if the TSSI values did not change.
  118. * This callback is called with wl->irq_lock held and must not sleep.
  119. * Must not be NULL.
  120. * @adjust_txpower: Write the previously calculated TX power settings
  121. * (from @recalc_txpower) to the hardware.
  122. * This function may sleep.
  123. * Can be NULL, if (and ONLY if) @recalc_txpower _always_
  124. * returns B43_TXPWR_RES_DONE.
  125. *
  126. * @pwork_15sec: Periodic work. Called every 15 seconds.
  127. * Can be NULL, if not required.
  128. * @pwork_60sec: Periodic work. Called every 60 seconds.
  129. * Can be NULL, if not required.
  130. */
  131. struct b43_phy_operations {
  132. /* Initialisation */
  133. int (*allocate)(struct b43_wldev *dev);
  134. void (*free)(struct b43_wldev *dev);
  135. void (*prepare_structs)(struct b43_wldev *dev);
  136. int (*prepare_hardware)(struct b43_wldev *dev);
  137. int (*init)(struct b43_wldev *dev);
  138. void (*exit)(struct b43_wldev *dev);
  139. /* Register access */
  140. u16 (*phy_read)(struct b43_wldev *dev, u16 reg);
  141. void (*phy_write)(struct b43_wldev *dev, u16 reg, u16 value);
  142. u16 (*radio_read)(struct b43_wldev *dev, u16 reg);
  143. void (*radio_write)(struct b43_wldev *dev, u16 reg, u16 value);
  144. /* Radio */
  145. bool (*supports_hwpctl)(struct b43_wldev *dev);
  146. void (*software_rfkill)(struct b43_wldev *dev, enum rfkill_state state);
  147. int (*switch_channel)(struct b43_wldev *dev, unsigned int new_channel);
  148. unsigned int (*get_default_chan)(struct b43_wldev *dev);
  149. void (*set_rx_antenna)(struct b43_wldev *dev, int antenna);
  150. int (*interf_mitigation)(struct b43_wldev *dev,
  151. enum b43_interference_mitigation new_mode);
  152. /* Transmission power adjustment */
  153. enum b43_txpwr_result (*recalc_txpower)(struct b43_wldev *dev,
  154. bool ignore_tssi);
  155. void (*adjust_txpower)(struct b43_wldev *dev);
  156. /* Misc */
  157. void (*pwork_15sec)(struct b43_wldev *dev);
  158. void (*pwork_60sec)(struct b43_wldev *dev);
  159. };
  160. struct b43_phy_a;
  161. struct b43_phy_g;
  162. struct b43_phy_n;
  163. struct b43_phy_lp;
  164. struct b43_phy {
  165. /* Hardware operation callbacks. */
  166. const struct b43_phy_operations *ops;
  167. /* Most hardware context information is stored in the standard-
  168. * specific data structures pointed to by the pointers below.
  169. * Only one of them is valid (the currently enabled PHY). */
  170. #ifdef CONFIG_B43_DEBUG
  171. /* No union for debug build to force NULL derefs in buggy code. */
  172. struct {
  173. #else
  174. union {
  175. #endif
  176. /* A-PHY specific information */
  177. struct b43_phy_a *a;
  178. /* G-PHY specific information */
  179. struct b43_phy_g *g;
  180. /* N-PHY specific information */
  181. struct b43_phy_n *n;
  182. /* LP-PHY specific information */
  183. struct b43_phy_lp *lp;
  184. };
  185. /* Band support flags. */
  186. bool supports_2ghz;
  187. bool supports_5ghz;
  188. /* GMODE bit enabled? */
  189. bool gmode;
  190. /* Analog Type */
  191. u8 analog;
  192. /* B43_PHYTYPE_ */
  193. u8 type;
  194. /* PHY revision number. */
  195. u8 rev;
  196. /* Radio versioning */
  197. u16 radio_manuf; /* Radio manufacturer */
  198. u16 radio_ver; /* Radio version */
  199. u8 radio_rev; /* Radio revision */
  200. /* Software state of the radio */
  201. bool radio_on;
  202. /* Desired TX power level (in dBm).
  203. * This is set by the user and adjusted in b43_phy_xmitpower(). */
  204. int desired_txpower;
  205. /* Hardware Power Control enabled? */
  206. bool hardware_power_control;
  207. /* The time (in absolute jiffies) when the next TX power output
  208. * check is needed. */
  209. unsigned long next_txpwr_check_time;
  210. /* current channel */
  211. unsigned int channel;
  212. /* PHY TX errors counter. */
  213. atomic_t txerr_cnt;
  214. #ifdef CONFIG_B43_DEBUG
  215. /* PHY registers locked by b43_phy_lock()? */
  216. bool phy_locked;
  217. #endif /* B43_DEBUG */
  218. };
  219. /**
  220. * b43_phy_allocate - Allocate PHY structs
  221. * Allocate the PHY data structures, based on the current dev->phy.type
  222. */
  223. int b43_phy_allocate(struct b43_wldev *dev);
  224. /**
  225. * b43_phy_free - Free PHY structs
  226. */
  227. void b43_phy_free(struct b43_wldev *dev);
  228. /**
  229. * b43_phy_init - Initialise the PHY
  230. */
  231. int b43_phy_init(struct b43_wldev *dev);
  232. /**
  233. * b43_phy_exit - Cleanup PHY
  234. */
  235. void b43_phy_exit(struct b43_wldev *dev);
  236. /**
  237. * b43_has_hardware_pctl - Hardware Power Control supported?
  238. * Returns a boolean, whether hardware power control is supported.
  239. */
  240. bool b43_has_hardware_pctl(struct b43_wldev *dev);
  241. /**
  242. * b43_phy_read - 16bit PHY register read access
  243. */
  244. u16 b43_phy_read(struct b43_wldev *dev, u16 reg);
  245. /**
  246. * b43_phy_write - 16bit PHY register write access
  247. */
  248. void b43_phy_write(struct b43_wldev *dev, u16 reg, u16 value);
  249. /**
  250. * b43_phy_mask - Mask a PHY register with a mask
  251. */
  252. void b43_phy_mask(struct b43_wldev *dev, u16 offset, u16 mask);
  253. /**
  254. * b43_phy_set - OR a PHY register with a bitmap
  255. */
  256. void b43_phy_set(struct b43_wldev *dev, u16 offset, u16 set);
  257. /**
  258. * b43_phy_maskset - Mask and OR a PHY register with a mask and bitmap
  259. */
  260. void b43_phy_maskset(struct b43_wldev *dev, u16 offset, u16 mask, u16 set);
  261. /**
  262. * b43_radio_read - 16bit Radio register read access
  263. */
  264. u16 b43_radio_read(struct b43_wldev *dev, u16 reg);
  265. #define b43_radio_read16 b43_radio_read /* DEPRECATED */
  266. /**
  267. * b43_radio_write - 16bit Radio register write access
  268. */
  269. void b43_radio_write(struct b43_wldev *dev, u16 reg, u16 value);
  270. #define b43_radio_write16 b43_radio_write /* DEPRECATED */
  271. /**
  272. * b43_radio_mask - Mask a 16bit radio register with a mask
  273. */
  274. void b43_radio_mask(struct b43_wldev *dev, u16 offset, u16 mask);
  275. /**
  276. * b43_radio_set - OR a 16bit radio register with a bitmap
  277. */
  278. void b43_radio_set(struct b43_wldev *dev, u16 offset, u16 set);
  279. /**
  280. * b43_radio_maskset - Mask and OR a radio register with a mask and bitmap
  281. */
  282. void b43_radio_maskset(struct b43_wldev *dev, u16 offset, u16 mask, u16 set);
  283. /**
  284. * b43_radio_lock - Lock firmware radio register access
  285. */
  286. void b43_radio_lock(struct b43_wldev *dev);
  287. /**
  288. * b43_radio_unlock - Unlock firmware radio register access
  289. */
  290. void b43_radio_unlock(struct b43_wldev *dev);
  291. /**
  292. * b43_phy_lock - Lock firmware PHY register access
  293. */
  294. void b43_phy_lock(struct b43_wldev *dev);
  295. /**
  296. * b43_phy_unlock - Unlock firmware PHY register access
  297. */
  298. void b43_phy_unlock(struct b43_wldev *dev);
  299. /**
  300. * b43_switch_channel - Switch to another channel
  301. */
  302. int b43_switch_channel(struct b43_wldev *dev, unsigned int new_channel);
  303. /**
  304. * B43_DEFAULT_CHANNEL - Switch to the default channel.
  305. */
  306. #define B43_DEFAULT_CHANNEL UINT_MAX
  307. /**
  308. * b43_software_rfkill - Turn the radio ON or OFF in software.
  309. */
  310. void b43_software_rfkill(struct b43_wldev *dev, enum rfkill_state state);
  311. /**
  312. * b43_phy_txpower_check - Check TX power output.
  313. *
  314. * Compare the current TX power output to the desired power emission
  315. * and schedule an adjustment in case it mismatches.
  316. * Requires wl->irq_lock locked.
  317. *
  318. * @flags: OR'ed enum b43_phy_txpower_check_flags flags.
  319. * See the docs below.
  320. */
  321. void b43_phy_txpower_check(struct b43_wldev *dev, unsigned int flags);
  322. /**
  323. * enum b43_phy_txpower_check_flags - Flags for b43_phy_txpower_check()
  324. *
  325. * @B43_TXPWR_IGNORE_TIME: Ignore the schedule time and force-redo
  326. * the check now.
  327. * @B43_TXPWR_IGNORE_TSSI: Redo the recalculation, even if the average
  328. * TSSI did not change.
  329. */
  330. enum b43_phy_txpower_check_flags {
  331. B43_TXPWR_IGNORE_TIME = (1 << 0),
  332. B43_TXPWR_IGNORE_TSSI = (1 << 1),
  333. };
  334. struct work_struct;
  335. void b43_phy_txpower_adjust_work(struct work_struct *work);
  336. /**
  337. * b43_phy_shm_tssi_read - Read the average of the last 4 TSSI from SHM.
  338. *
  339. * @shm_offset: The SHM address to read the values from.
  340. *
  341. * Returns the average of the 4 TSSI values, or a negative error code.
  342. */
  343. int b43_phy_shm_tssi_read(struct b43_wldev *dev, u16 shm_offset);
  344. #endif /* LINUX_B43_PHY_COMMON_H_ */