ppi.c 6.4 KB

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  1. /*
  2. * ppi.c Analog Devices Parallel Peripheral Interface driver
  3. *
  4. * Copyright (c) 2011 Analog Devices Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  18. */
  19. #include <linux/module.h>
  20. #include <linux/slab.h>
  21. #include <asm/bfin_ppi.h>
  22. #include <asm/blackfin.h>
  23. #include <asm/cacheflush.h>
  24. #include <asm/dma.h>
  25. #include <asm/portmux.h>
  26. #include <media/blackfin/ppi.h>
  27. static int ppi_attach_irq(struct ppi_if *ppi, irq_handler_t handler);
  28. static void ppi_detach_irq(struct ppi_if *ppi);
  29. static int ppi_start(struct ppi_if *ppi);
  30. static int ppi_stop(struct ppi_if *ppi);
  31. static int ppi_set_params(struct ppi_if *ppi, struct ppi_params *params);
  32. static void ppi_update_addr(struct ppi_if *ppi, unsigned long addr);
  33. static const struct ppi_ops ppi_ops = {
  34. .attach_irq = ppi_attach_irq,
  35. .detach_irq = ppi_detach_irq,
  36. .start = ppi_start,
  37. .stop = ppi_stop,
  38. .set_params = ppi_set_params,
  39. .update_addr = ppi_update_addr,
  40. };
  41. static irqreturn_t ppi_irq_err(int irq, void *dev_id)
  42. {
  43. struct ppi_if *ppi = dev_id;
  44. const struct ppi_info *info = ppi->info;
  45. switch (info->type) {
  46. case PPI_TYPE_PPI:
  47. {
  48. struct bfin_ppi_regs *reg = info->base;
  49. unsigned short status;
  50. /* register on bf561 is cleared when read
  51. * others are W1C
  52. */
  53. status = bfin_read16(&reg->status);
  54. bfin_write16(&reg->status, 0xff00);
  55. break;
  56. }
  57. case PPI_TYPE_EPPI:
  58. {
  59. struct bfin_eppi_regs *reg = info->base;
  60. bfin_write16(&reg->status, 0xffff);
  61. break;
  62. }
  63. default:
  64. break;
  65. }
  66. return IRQ_HANDLED;
  67. }
  68. static int ppi_attach_irq(struct ppi_if *ppi, irq_handler_t handler)
  69. {
  70. const struct ppi_info *info = ppi->info;
  71. int ret;
  72. ret = request_dma(info->dma_ch, "PPI_DMA");
  73. if (ret) {
  74. pr_err("Unable to allocate DMA channel for PPI\n");
  75. return ret;
  76. }
  77. set_dma_callback(info->dma_ch, handler, ppi);
  78. if (ppi->err_int) {
  79. ret = request_irq(info->irq_err, ppi_irq_err, 0, "PPI ERROR", ppi);
  80. if (ret) {
  81. pr_err("Unable to allocate IRQ for PPI\n");
  82. free_dma(info->dma_ch);
  83. }
  84. }
  85. return ret;
  86. }
  87. static void ppi_detach_irq(struct ppi_if *ppi)
  88. {
  89. const struct ppi_info *info = ppi->info;
  90. if (ppi->err_int)
  91. free_irq(info->irq_err, ppi);
  92. free_dma(info->dma_ch);
  93. }
  94. static int ppi_start(struct ppi_if *ppi)
  95. {
  96. const struct ppi_info *info = ppi->info;
  97. /* enable DMA */
  98. enable_dma(info->dma_ch);
  99. /* enable PPI */
  100. ppi->ppi_control |= PORT_EN;
  101. switch (info->type) {
  102. case PPI_TYPE_PPI:
  103. {
  104. struct bfin_ppi_regs *reg = info->base;
  105. bfin_write16(&reg->control, ppi->ppi_control);
  106. break;
  107. }
  108. case PPI_TYPE_EPPI:
  109. {
  110. struct bfin_eppi_regs *reg = info->base;
  111. bfin_write32(&reg->control, ppi->ppi_control);
  112. break;
  113. }
  114. default:
  115. return -EINVAL;
  116. }
  117. SSYNC();
  118. return 0;
  119. }
  120. static int ppi_stop(struct ppi_if *ppi)
  121. {
  122. const struct ppi_info *info = ppi->info;
  123. /* disable PPI */
  124. ppi->ppi_control &= ~PORT_EN;
  125. switch (info->type) {
  126. case PPI_TYPE_PPI:
  127. {
  128. struct bfin_ppi_regs *reg = info->base;
  129. bfin_write16(&reg->control, ppi->ppi_control);
  130. break;
  131. }
  132. case PPI_TYPE_EPPI:
  133. {
  134. struct bfin_eppi_regs *reg = info->base;
  135. bfin_write32(&reg->control, ppi->ppi_control);
  136. break;
  137. }
  138. default:
  139. return -EINVAL;
  140. }
  141. /* disable DMA */
  142. clear_dma_irqstat(info->dma_ch);
  143. disable_dma(info->dma_ch);
  144. SSYNC();
  145. return 0;
  146. }
  147. static int ppi_set_params(struct ppi_if *ppi, struct ppi_params *params)
  148. {
  149. const struct ppi_info *info = ppi->info;
  150. int dma32 = 0;
  151. int dma_config, bytes_per_line, lines_per_frame;
  152. bytes_per_line = params->width * params->bpp / 8;
  153. lines_per_frame = params->height;
  154. if (params->int_mask == 0xFFFFFFFF)
  155. ppi->err_int = false;
  156. else
  157. ppi->err_int = true;
  158. dma_config = (DMA_FLOW_STOP | WNR | RESTART | DMA2D | DI_EN);
  159. ppi->ppi_control = params->ppi_control & ~PORT_EN;
  160. switch (info->type) {
  161. case PPI_TYPE_PPI:
  162. {
  163. struct bfin_ppi_regs *reg = info->base;
  164. if (params->ppi_control & DMA32)
  165. dma32 = 1;
  166. bfin_write16(&reg->control, ppi->ppi_control);
  167. bfin_write16(&reg->count, bytes_per_line - 1);
  168. bfin_write16(&reg->frame, lines_per_frame);
  169. break;
  170. }
  171. case PPI_TYPE_EPPI:
  172. {
  173. struct bfin_eppi_regs *reg = info->base;
  174. if ((params->ppi_control & PACK_EN)
  175. || (params->ppi_control & 0x38000) > DLEN_16)
  176. dma32 = 1;
  177. bfin_write32(&reg->control, ppi->ppi_control);
  178. bfin_write16(&reg->line, bytes_per_line + params->blank_clocks);
  179. bfin_write16(&reg->frame, lines_per_frame);
  180. bfin_write16(&reg->hdelay, 0);
  181. bfin_write16(&reg->vdelay, 0);
  182. bfin_write16(&reg->hcount, bytes_per_line);
  183. bfin_write16(&reg->vcount, lines_per_frame);
  184. break;
  185. }
  186. default:
  187. return -EINVAL;
  188. }
  189. if (dma32) {
  190. dma_config |= WDSIZE_32;
  191. set_dma_x_count(info->dma_ch, bytes_per_line >> 2);
  192. set_dma_x_modify(info->dma_ch, 4);
  193. set_dma_y_modify(info->dma_ch, 4);
  194. } else {
  195. dma_config |= WDSIZE_16;
  196. set_dma_x_count(info->dma_ch, bytes_per_line >> 1);
  197. set_dma_x_modify(info->dma_ch, 2);
  198. set_dma_y_modify(info->dma_ch, 2);
  199. }
  200. set_dma_y_count(info->dma_ch, lines_per_frame);
  201. set_dma_config(info->dma_ch, dma_config);
  202. SSYNC();
  203. return 0;
  204. }
  205. static void ppi_update_addr(struct ppi_if *ppi, unsigned long addr)
  206. {
  207. set_dma_start_addr(ppi->info->dma_ch, addr);
  208. }
  209. struct ppi_if *ppi_create_instance(const struct ppi_info *info)
  210. {
  211. struct ppi_if *ppi;
  212. if (!info || !info->pin_req)
  213. return NULL;
  214. if (peripheral_request_list(info->pin_req, KBUILD_MODNAME)) {
  215. pr_err("request peripheral failed\n");
  216. return NULL;
  217. }
  218. ppi = kzalloc(sizeof(*ppi), GFP_KERNEL);
  219. if (!ppi) {
  220. peripheral_free_list(info->pin_req);
  221. pr_err("unable to allocate memory for ppi handle\n");
  222. return NULL;
  223. }
  224. ppi->ops = &ppi_ops;
  225. ppi->info = info;
  226. pr_info("ppi probe success\n");
  227. return ppi;
  228. }
  229. EXPORT_SYMBOL(ppi_create_instance);
  230. void ppi_delete_instance(struct ppi_if *ppi)
  231. {
  232. peripheral_free_list(ppi->info->pin_req);
  233. kfree(ppi);
  234. }
  235. EXPORT_SYMBOL(ppi_delete_instance);
  236. MODULE_DESCRIPTION("Analog Devices PPI driver");
  237. MODULE_AUTHOR("Scott Jiang <Scott.Jiang.Linux@gmail.com>");
  238. MODULE_LICENSE("GPL v2");