main.c 54 KB

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  1. /*
  2. * Copyright (c) 2008-2009 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/nl80211.h>
  17. #include "ath9k.h"
  18. #include "btcoex.h"
  19. static void ath_update_txpow(struct ath_softc *sc)
  20. {
  21. struct ath_hw *ah = sc->sc_ah;
  22. if (sc->curtxpow != sc->config.txpowlimit) {
  23. ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit, false);
  24. /* read back in case value is clamped */
  25. sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
  26. }
  27. }
  28. static u8 parse_mpdudensity(u8 mpdudensity)
  29. {
  30. /*
  31. * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  32. * 0 for no restriction
  33. * 1 for 1/4 us
  34. * 2 for 1/2 us
  35. * 3 for 1 us
  36. * 4 for 2 us
  37. * 5 for 4 us
  38. * 6 for 8 us
  39. * 7 for 16 us
  40. */
  41. switch (mpdudensity) {
  42. case 0:
  43. return 0;
  44. case 1:
  45. case 2:
  46. case 3:
  47. /* Our lower layer calculations limit our precision to
  48. 1 microsecond */
  49. return 1;
  50. case 4:
  51. return 2;
  52. case 5:
  53. return 4;
  54. case 6:
  55. return 8;
  56. case 7:
  57. return 16;
  58. default:
  59. return 0;
  60. }
  61. }
  62. static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
  63. struct ieee80211_hw *hw)
  64. {
  65. struct ieee80211_channel *curchan = hw->conf.channel;
  66. struct ath9k_channel *channel;
  67. u8 chan_idx;
  68. chan_idx = curchan->hw_value;
  69. channel = &sc->sc_ah->channels[chan_idx];
  70. ath9k_update_ichannel(sc, hw, channel);
  71. return channel;
  72. }
  73. bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  74. {
  75. unsigned long flags;
  76. bool ret;
  77. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  78. ret = ath9k_hw_setpower(sc->sc_ah, mode);
  79. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  80. return ret;
  81. }
  82. void ath9k_ps_wakeup(struct ath_softc *sc)
  83. {
  84. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  85. unsigned long flags;
  86. enum ath9k_power_mode power_mode;
  87. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  88. if (++sc->ps_usecount != 1)
  89. goto unlock;
  90. power_mode = sc->sc_ah->power_mode;
  91. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
  92. /*
  93. * While the hardware is asleep, the cycle counters contain no
  94. * useful data. Better clear them now so that they don't mess up
  95. * survey data results.
  96. */
  97. if (power_mode != ATH9K_PM_AWAKE) {
  98. spin_lock(&common->cc_lock);
  99. ath_hw_cycle_counters_update(common);
  100. memset(&common->cc_survey, 0, sizeof(common->cc_survey));
  101. spin_unlock(&common->cc_lock);
  102. }
  103. unlock:
  104. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  105. }
  106. void ath9k_ps_restore(struct ath_softc *sc)
  107. {
  108. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  109. unsigned long flags;
  110. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  111. if (--sc->ps_usecount != 0)
  112. goto unlock;
  113. spin_lock(&common->cc_lock);
  114. ath_hw_cycle_counters_update(common);
  115. spin_unlock(&common->cc_lock);
  116. if (sc->ps_idle)
  117. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
  118. else if (sc->ps_enabled &&
  119. !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
  120. PS_WAIT_FOR_CAB |
  121. PS_WAIT_FOR_PSPOLL_DATA |
  122. PS_WAIT_FOR_TX_ACK)))
  123. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
  124. unlock:
  125. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  126. }
  127. static void ath_start_ani(struct ath_common *common)
  128. {
  129. struct ath_hw *ah = common->ah;
  130. unsigned long timestamp = jiffies_to_msecs(jiffies);
  131. struct ath_softc *sc = (struct ath_softc *) common->priv;
  132. if (!(sc->sc_flags & SC_OP_ANI_RUN))
  133. return;
  134. if (sc->sc_flags & SC_OP_OFFCHANNEL)
  135. return;
  136. common->ani.longcal_timer = timestamp;
  137. common->ani.shortcal_timer = timestamp;
  138. common->ani.checkani_timer = timestamp;
  139. mod_timer(&common->ani.timer,
  140. jiffies +
  141. msecs_to_jiffies((u32)ah->config.ani_poll_interval));
  142. }
  143. static void ath_update_survey_nf(struct ath_softc *sc, int channel)
  144. {
  145. struct ath_hw *ah = sc->sc_ah;
  146. struct ath9k_channel *chan = &ah->channels[channel];
  147. struct survey_info *survey = &sc->survey[channel];
  148. if (chan->noisefloor) {
  149. survey->filled |= SURVEY_INFO_NOISE_DBM;
  150. survey->noise = chan->noisefloor;
  151. }
  152. }
  153. static void ath_update_survey_stats(struct ath_softc *sc)
  154. {
  155. struct ath_hw *ah = sc->sc_ah;
  156. struct ath_common *common = ath9k_hw_common(ah);
  157. int pos = ah->curchan - &ah->channels[0];
  158. struct survey_info *survey = &sc->survey[pos];
  159. struct ath_cycle_counters *cc = &common->cc_survey;
  160. unsigned int div = common->clockrate * 1000;
  161. if (!ah->curchan)
  162. return;
  163. if (ah->power_mode == ATH9K_PM_AWAKE)
  164. ath_hw_cycle_counters_update(common);
  165. if (cc->cycles > 0) {
  166. survey->filled |= SURVEY_INFO_CHANNEL_TIME |
  167. SURVEY_INFO_CHANNEL_TIME_BUSY |
  168. SURVEY_INFO_CHANNEL_TIME_RX |
  169. SURVEY_INFO_CHANNEL_TIME_TX;
  170. survey->channel_time += cc->cycles / div;
  171. survey->channel_time_busy += cc->rx_busy / div;
  172. survey->channel_time_rx += cc->rx_frame / div;
  173. survey->channel_time_tx += cc->tx_frame / div;
  174. }
  175. memset(cc, 0, sizeof(*cc));
  176. ath_update_survey_nf(sc, pos);
  177. }
  178. /*
  179. * Set/change channels. If the channel is really being changed, it's done
  180. * by reseting the chip. To accomplish this we must first cleanup any pending
  181. * DMA, then restart stuff.
  182. */
  183. int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
  184. struct ath9k_channel *hchan)
  185. {
  186. struct ath_wiphy *aphy = hw->priv;
  187. struct ath_hw *ah = sc->sc_ah;
  188. struct ath_common *common = ath9k_hw_common(ah);
  189. struct ieee80211_conf *conf = &common->hw->conf;
  190. bool fastcc = true, stopped;
  191. struct ieee80211_channel *channel = hw->conf.channel;
  192. struct ath9k_hw_cal_data *caldata = NULL;
  193. int r;
  194. if (sc->sc_flags & SC_OP_INVALID)
  195. return -EIO;
  196. del_timer_sync(&common->ani.timer);
  197. cancel_work_sync(&sc->paprd_work);
  198. cancel_work_sync(&sc->hw_check_work);
  199. cancel_delayed_work_sync(&sc->tx_complete_work);
  200. ath9k_ps_wakeup(sc);
  201. spin_lock_bh(&sc->sc_pcu_lock);
  202. /*
  203. * This is only performed if the channel settings have
  204. * actually changed.
  205. *
  206. * To switch channels clear any pending DMA operations;
  207. * wait long enough for the RX fifo to drain, reset the
  208. * hardware at the new frequency, and then re-enable
  209. * the relevant bits of the h/w.
  210. */
  211. ath9k_hw_disable_interrupts(ah);
  212. stopped = ath_drain_all_txq(sc, false);
  213. if (!ath_stoprecv(sc))
  214. stopped = false;
  215. /* XXX: do not flush receive queue here. We don't want
  216. * to flush data frames already in queue because of
  217. * changing channel. */
  218. if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
  219. fastcc = false;
  220. if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
  221. caldata = &aphy->caldata;
  222. ath_dbg(common, ATH_DBG_CONFIG,
  223. "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
  224. sc->sc_ah->curchan->channel,
  225. channel->center_freq, conf_is_ht40(conf),
  226. fastcc);
  227. r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
  228. if (r) {
  229. ath_err(common,
  230. "Unable to reset channel (%u MHz), reset status %d\n",
  231. channel->center_freq, r);
  232. goto ps_restore;
  233. }
  234. if (ath_startrecv(sc) != 0) {
  235. ath_err(common, "Unable to restart recv logic\n");
  236. r = -EIO;
  237. goto ps_restore;
  238. }
  239. ath_update_txpow(sc);
  240. ath9k_hw_set_interrupts(ah, ah->imask);
  241. if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
  242. if (sc->sc_flags & SC_OP_BEACONS)
  243. ath_beacon_config(sc, NULL);
  244. ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
  245. ath_start_ani(common);
  246. }
  247. ps_restore:
  248. spin_unlock_bh(&sc->sc_pcu_lock);
  249. ath9k_ps_restore(sc);
  250. return r;
  251. }
  252. static void ath_paprd_activate(struct ath_softc *sc)
  253. {
  254. struct ath_hw *ah = sc->sc_ah;
  255. struct ath9k_hw_cal_data *caldata = ah->caldata;
  256. struct ath_common *common = ath9k_hw_common(ah);
  257. int chain;
  258. if (!caldata || !caldata->paprd_done)
  259. return;
  260. ath9k_ps_wakeup(sc);
  261. ar9003_paprd_enable(ah, false);
  262. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  263. if (!(common->tx_chainmask & BIT(chain)))
  264. continue;
  265. ar9003_paprd_populate_single_table(ah, caldata, chain);
  266. }
  267. ar9003_paprd_enable(ah, true);
  268. ath9k_ps_restore(sc);
  269. }
  270. static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
  271. {
  272. struct ieee80211_hw *hw = sc->hw;
  273. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  274. struct ath_hw *ah = sc->sc_ah;
  275. struct ath_common *common = ath9k_hw_common(ah);
  276. struct ath_tx_control txctl;
  277. int time_left;
  278. memset(&txctl, 0, sizeof(txctl));
  279. txctl.txq = sc->tx.txq_map[WME_AC_BE];
  280. memset(tx_info, 0, sizeof(*tx_info));
  281. tx_info->band = hw->conf.channel->band;
  282. tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
  283. tx_info->control.rates[0].idx = 0;
  284. tx_info->control.rates[0].count = 1;
  285. tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
  286. tx_info->control.rates[1].idx = -1;
  287. init_completion(&sc->paprd_complete);
  288. txctl.paprd = BIT(chain);
  289. if (ath_tx_start(hw, skb, &txctl) != 0) {
  290. ath_dbg(common, ATH_DBG_XMIT, "PAPRD TX failed\n");
  291. dev_kfree_skb_any(skb);
  292. return false;
  293. }
  294. time_left = wait_for_completion_timeout(&sc->paprd_complete,
  295. msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
  296. if (!time_left)
  297. ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CALIBRATE,
  298. "Timeout waiting for paprd training on TX chain %d\n",
  299. chain);
  300. return !!time_left;
  301. }
  302. void ath_paprd_calibrate(struct work_struct *work)
  303. {
  304. struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
  305. struct ieee80211_hw *hw = sc->hw;
  306. struct ath_hw *ah = sc->sc_ah;
  307. struct ieee80211_hdr *hdr;
  308. struct sk_buff *skb = NULL;
  309. struct ath9k_hw_cal_data *caldata = ah->caldata;
  310. struct ath_common *common = ath9k_hw_common(ah);
  311. int ftype;
  312. int chain_ok = 0;
  313. int chain;
  314. int len = 1800;
  315. if (!caldata)
  316. return;
  317. if (ar9003_paprd_init_table(ah) < 0)
  318. return;
  319. skb = alloc_skb(len, GFP_KERNEL);
  320. if (!skb)
  321. return;
  322. skb_put(skb, len);
  323. memset(skb->data, 0, len);
  324. hdr = (struct ieee80211_hdr *)skb->data;
  325. ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
  326. hdr->frame_control = cpu_to_le16(ftype);
  327. hdr->duration_id = cpu_to_le16(10);
  328. memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
  329. memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
  330. memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
  331. ath9k_ps_wakeup(sc);
  332. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  333. if (!(common->tx_chainmask & BIT(chain)))
  334. continue;
  335. chain_ok = 0;
  336. ath_dbg(common, ATH_DBG_CALIBRATE,
  337. "Sending PAPRD frame for thermal measurement "
  338. "on chain %d\n", chain);
  339. if (!ath_paprd_send_frame(sc, skb, chain))
  340. goto fail_paprd;
  341. ar9003_paprd_setup_gain_table(ah, chain);
  342. ath_dbg(common, ATH_DBG_CALIBRATE,
  343. "Sending PAPRD training frame on chain %d\n", chain);
  344. if (!ath_paprd_send_frame(sc, skb, chain))
  345. goto fail_paprd;
  346. if (!ar9003_paprd_is_done(ah))
  347. break;
  348. if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
  349. break;
  350. chain_ok = 1;
  351. }
  352. kfree_skb(skb);
  353. if (chain_ok) {
  354. caldata->paprd_done = true;
  355. ath_paprd_activate(sc);
  356. }
  357. fail_paprd:
  358. ath9k_ps_restore(sc);
  359. }
  360. /*
  361. * This routine performs the periodic noise floor calibration function
  362. * that is used to adjust and optimize the chip performance. This
  363. * takes environmental changes (location, temperature) into account.
  364. * When the task is complete, it reschedules itself depending on the
  365. * appropriate interval that was calculated.
  366. */
  367. void ath_ani_calibrate(unsigned long data)
  368. {
  369. struct ath_softc *sc = (struct ath_softc *)data;
  370. struct ath_hw *ah = sc->sc_ah;
  371. struct ath_common *common = ath9k_hw_common(ah);
  372. bool longcal = false;
  373. bool shortcal = false;
  374. bool aniflag = false;
  375. unsigned int timestamp = jiffies_to_msecs(jiffies);
  376. u32 cal_interval, short_cal_interval, long_cal_interval;
  377. unsigned long flags;
  378. if (ah->caldata && ah->caldata->nfcal_interference)
  379. long_cal_interval = ATH_LONG_CALINTERVAL_INT;
  380. else
  381. long_cal_interval = ATH_LONG_CALINTERVAL;
  382. short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
  383. ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
  384. /* Only calibrate if awake */
  385. if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
  386. goto set_timer;
  387. ath9k_ps_wakeup(sc);
  388. /* Long calibration runs independently of short calibration. */
  389. if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
  390. longcal = true;
  391. ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
  392. common->ani.longcal_timer = timestamp;
  393. }
  394. /* Short calibration applies only while caldone is false */
  395. if (!common->ani.caldone) {
  396. if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
  397. shortcal = true;
  398. ath_dbg(common, ATH_DBG_ANI,
  399. "shortcal @%lu\n", jiffies);
  400. common->ani.shortcal_timer = timestamp;
  401. common->ani.resetcal_timer = timestamp;
  402. }
  403. } else {
  404. if ((timestamp - common->ani.resetcal_timer) >=
  405. ATH_RESTART_CALINTERVAL) {
  406. common->ani.caldone = ath9k_hw_reset_calvalid(ah);
  407. if (common->ani.caldone)
  408. common->ani.resetcal_timer = timestamp;
  409. }
  410. }
  411. /* Verify whether we must check ANI */
  412. if ((timestamp - common->ani.checkani_timer) >=
  413. ah->config.ani_poll_interval) {
  414. aniflag = true;
  415. common->ani.checkani_timer = timestamp;
  416. }
  417. /* Skip all processing if there's nothing to do. */
  418. if (longcal || shortcal || aniflag) {
  419. /* Call ANI routine if necessary */
  420. if (aniflag) {
  421. spin_lock_irqsave(&common->cc_lock, flags);
  422. ath9k_hw_ani_monitor(ah, ah->curchan);
  423. ath_update_survey_stats(sc);
  424. spin_unlock_irqrestore(&common->cc_lock, flags);
  425. }
  426. /* Perform calibration if necessary */
  427. if (longcal || shortcal) {
  428. common->ani.caldone =
  429. ath9k_hw_calibrate(ah,
  430. ah->curchan,
  431. common->rx_chainmask,
  432. longcal);
  433. }
  434. }
  435. ath9k_ps_restore(sc);
  436. set_timer:
  437. /*
  438. * Set timer interval based on previous results.
  439. * The interval must be the shortest necessary to satisfy ANI,
  440. * short calibration and long calibration.
  441. */
  442. cal_interval = ATH_LONG_CALINTERVAL;
  443. if (sc->sc_ah->config.enable_ani)
  444. cal_interval = min(cal_interval,
  445. (u32)ah->config.ani_poll_interval);
  446. if (!common->ani.caldone)
  447. cal_interval = min(cal_interval, (u32)short_cal_interval);
  448. mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
  449. if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
  450. if (!ah->caldata->paprd_done)
  451. ieee80211_queue_work(sc->hw, &sc->paprd_work);
  452. else if (!ah->paprd_table_write_done)
  453. ath_paprd_activate(sc);
  454. }
  455. }
  456. static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
  457. {
  458. struct ath_node *an;
  459. struct ath_hw *ah = sc->sc_ah;
  460. an = (struct ath_node *)sta->drv_priv;
  461. if ((ah->caps.hw_caps) & ATH9K_HW_CAP_APM)
  462. sc->sc_flags |= SC_OP_ENABLE_APM;
  463. if (sc->sc_flags & SC_OP_TXAGGR) {
  464. ath_tx_node_init(sc, an);
  465. an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
  466. sta->ht_cap.ampdu_factor);
  467. an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
  468. }
  469. }
  470. static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
  471. {
  472. struct ath_node *an = (struct ath_node *)sta->drv_priv;
  473. if (sc->sc_flags & SC_OP_TXAGGR)
  474. ath_tx_node_cleanup(sc, an);
  475. }
  476. void ath_hw_check(struct work_struct *work)
  477. {
  478. struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
  479. int i;
  480. ath9k_ps_wakeup(sc);
  481. for (i = 0; i < 3; i++) {
  482. if (ath9k_hw_check_alive(sc->sc_ah))
  483. goto out;
  484. msleep(1);
  485. }
  486. ath_reset(sc, true);
  487. out:
  488. ath9k_ps_restore(sc);
  489. }
  490. void ath9k_tasklet(unsigned long data)
  491. {
  492. struct ath_softc *sc = (struct ath_softc *)data;
  493. struct ath_hw *ah = sc->sc_ah;
  494. struct ath_common *common = ath9k_hw_common(ah);
  495. u32 status = sc->intrstatus;
  496. u32 rxmask;
  497. if (status & ATH9K_INT_FATAL) {
  498. ath_reset(sc, true);
  499. return;
  500. }
  501. ath9k_ps_wakeup(sc);
  502. spin_lock(&sc->sc_pcu_lock);
  503. if (!ath9k_hw_check_alive(ah))
  504. ieee80211_queue_work(sc->hw, &sc->hw_check_work);
  505. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  506. rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
  507. ATH9K_INT_RXORN);
  508. else
  509. rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  510. if (status & rxmask) {
  511. /* Check for high priority Rx first */
  512. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  513. (status & ATH9K_INT_RXHP))
  514. ath_rx_tasklet(sc, 0, true);
  515. ath_rx_tasklet(sc, 0, false);
  516. }
  517. if (status & ATH9K_INT_TX) {
  518. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  519. ath_tx_edma_tasklet(sc);
  520. else
  521. ath_tx_tasklet(sc);
  522. }
  523. if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
  524. /*
  525. * TSF sync does not look correct; remain awake to sync with
  526. * the next Beacon.
  527. */
  528. ath_dbg(common, ATH_DBG_PS,
  529. "TSFOOR - Sync with next Beacon\n");
  530. sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
  531. }
  532. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  533. if (status & ATH9K_INT_GENTIMER)
  534. ath_gen_timer_isr(sc->sc_ah);
  535. /* re-enable hardware interrupt */
  536. ath9k_hw_enable_interrupts(ah);
  537. spin_unlock(&sc->sc_pcu_lock);
  538. ath9k_ps_restore(sc);
  539. }
  540. irqreturn_t ath_isr(int irq, void *dev)
  541. {
  542. #define SCHED_INTR ( \
  543. ATH9K_INT_FATAL | \
  544. ATH9K_INT_RXORN | \
  545. ATH9K_INT_RXEOL | \
  546. ATH9K_INT_RX | \
  547. ATH9K_INT_RXLP | \
  548. ATH9K_INT_RXHP | \
  549. ATH9K_INT_TX | \
  550. ATH9K_INT_BMISS | \
  551. ATH9K_INT_CST | \
  552. ATH9K_INT_TSFOOR | \
  553. ATH9K_INT_GENTIMER)
  554. struct ath_softc *sc = dev;
  555. struct ath_hw *ah = sc->sc_ah;
  556. struct ath_common *common = ath9k_hw_common(ah);
  557. enum ath9k_int status;
  558. bool sched = false;
  559. /*
  560. * The hardware is not ready/present, don't
  561. * touch anything. Note this can happen early
  562. * on if the IRQ is shared.
  563. */
  564. if (sc->sc_flags & SC_OP_INVALID)
  565. return IRQ_NONE;
  566. /* shared irq, not for us */
  567. if (!ath9k_hw_intrpend(ah))
  568. return IRQ_NONE;
  569. /*
  570. * Figure out the reason(s) for the interrupt. Note
  571. * that the hal returns a pseudo-ISR that may include
  572. * bits we haven't explicitly enabled so we mask the
  573. * value to insure we only process bits we requested.
  574. */
  575. ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
  576. status &= ah->imask; /* discard unasked-for bits */
  577. /*
  578. * If there are no status bits set, then this interrupt was not
  579. * for me (should have been caught above).
  580. */
  581. if (!status)
  582. return IRQ_NONE;
  583. /* Cache the status */
  584. sc->intrstatus = status;
  585. if (status & SCHED_INTR)
  586. sched = true;
  587. /*
  588. * If a FATAL or RXORN interrupt is received, we have to reset the
  589. * chip immediately.
  590. */
  591. if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
  592. !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
  593. goto chip_reset;
  594. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  595. (status & ATH9K_INT_BB_WATCHDOG)) {
  596. spin_lock(&common->cc_lock);
  597. ath_hw_cycle_counters_update(common);
  598. ar9003_hw_bb_watchdog_dbg_info(ah);
  599. spin_unlock(&common->cc_lock);
  600. goto chip_reset;
  601. }
  602. if (status & ATH9K_INT_SWBA)
  603. tasklet_schedule(&sc->bcon_tasklet);
  604. if (status & ATH9K_INT_TXURN)
  605. ath9k_hw_updatetxtriglevel(ah, true);
  606. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
  607. if (status & ATH9K_INT_RXEOL) {
  608. ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  609. ath9k_hw_set_interrupts(ah, ah->imask);
  610. }
  611. }
  612. if (status & ATH9K_INT_MIB) {
  613. /*
  614. * Disable interrupts until we service the MIB
  615. * interrupt; otherwise it will continue to
  616. * fire.
  617. */
  618. ath9k_hw_disable_interrupts(ah);
  619. /*
  620. * Let the hal handle the event. We assume
  621. * it will clear whatever condition caused
  622. * the interrupt.
  623. */
  624. spin_lock(&common->cc_lock);
  625. ath9k_hw_proc_mib_event(ah);
  626. spin_unlock(&common->cc_lock);
  627. ath9k_hw_enable_interrupts(ah);
  628. }
  629. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  630. if (status & ATH9K_INT_TIM_TIMER) {
  631. if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
  632. goto chip_reset;
  633. /* Clear RxAbort bit so that we can
  634. * receive frames */
  635. ath9k_setpower(sc, ATH9K_PM_AWAKE);
  636. ath9k_hw_setrxabort(sc->sc_ah, 0);
  637. sc->ps_flags |= PS_WAIT_FOR_BEACON;
  638. }
  639. chip_reset:
  640. ath_debug_stat_interrupt(sc, status);
  641. if (sched) {
  642. /* turn off every interrupt */
  643. ath9k_hw_disable_interrupts(ah);
  644. tasklet_schedule(&sc->intr_tq);
  645. }
  646. return IRQ_HANDLED;
  647. #undef SCHED_INTR
  648. }
  649. static u32 ath_get_extchanmode(struct ath_softc *sc,
  650. struct ieee80211_channel *chan,
  651. enum nl80211_channel_type channel_type)
  652. {
  653. u32 chanmode = 0;
  654. switch (chan->band) {
  655. case IEEE80211_BAND_2GHZ:
  656. switch(channel_type) {
  657. case NL80211_CHAN_NO_HT:
  658. case NL80211_CHAN_HT20:
  659. chanmode = CHANNEL_G_HT20;
  660. break;
  661. case NL80211_CHAN_HT40PLUS:
  662. chanmode = CHANNEL_G_HT40PLUS;
  663. break;
  664. case NL80211_CHAN_HT40MINUS:
  665. chanmode = CHANNEL_G_HT40MINUS;
  666. break;
  667. }
  668. break;
  669. case IEEE80211_BAND_5GHZ:
  670. switch(channel_type) {
  671. case NL80211_CHAN_NO_HT:
  672. case NL80211_CHAN_HT20:
  673. chanmode = CHANNEL_A_HT20;
  674. break;
  675. case NL80211_CHAN_HT40PLUS:
  676. chanmode = CHANNEL_A_HT40PLUS;
  677. break;
  678. case NL80211_CHAN_HT40MINUS:
  679. chanmode = CHANNEL_A_HT40MINUS;
  680. break;
  681. }
  682. break;
  683. default:
  684. break;
  685. }
  686. return chanmode;
  687. }
  688. static void ath9k_bss_assoc_info(struct ath_softc *sc,
  689. struct ieee80211_hw *hw,
  690. struct ieee80211_vif *vif,
  691. struct ieee80211_bss_conf *bss_conf)
  692. {
  693. struct ath_wiphy *aphy = hw->priv;
  694. struct ath_hw *ah = sc->sc_ah;
  695. struct ath_common *common = ath9k_hw_common(ah);
  696. if (bss_conf->assoc) {
  697. ath_dbg(common, ATH_DBG_CONFIG,
  698. "Bss Info ASSOC %d, bssid: %pM\n",
  699. bss_conf->aid, common->curbssid);
  700. /* New association, store aid */
  701. common->curaid = bss_conf->aid;
  702. ath9k_hw_write_associd(ah);
  703. /*
  704. * Request a re-configuration of Beacon related timers
  705. * on the receipt of the first Beacon frame (i.e.,
  706. * after time sync with the AP).
  707. */
  708. sc->ps_flags |= PS_BEACON_SYNC;
  709. /* Configure the beacon */
  710. ath_beacon_config(sc, vif);
  711. /* Reset rssi stats */
  712. aphy->last_rssi = ATH_RSSI_DUMMY_MARKER;
  713. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  714. sc->sc_flags |= SC_OP_ANI_RUN;
  715. ath_start_ani(common);
  716. } else {
  717. ath_dbg(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
  718. common->curaid = 0;
  719. /* Stop ANI */
  720. sc->sc_flags &= ~SC_OP_ANI_RUN;
  721. del_timer_sync(&common->ani.timer);
  722. }
  723. }
  724. void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
  725. {
  726. struct ath_hw *ah = sc->sc_ah;
  727. struct ath_common *common = ath9k_hw_common(ah);
  728. struct ieee80211_channel *channel = hw->conf.channel;
  729. int r;
  730. ath9k_ps_wakeup(sc);
  731. spin_lock_bh(&sc->sc_pcu_lock);
  732. ath9k_hw_configpcipowersave(ah, 0, 0);
  733. if (!ah->curchan)
  734. ah->curchan = ath_get_curchannel(sc, sc->hw);
  735. r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
  736. if (r) {
  737. ath_err(common,
  738. "Unable to reset channel (%u MHz), reset status %d\n",
  739. channel->center_freq, r);
  740. }
  741. ath_update_txpow(sc);
  742. if (ath_startrecv(sc) != 0) {
  743. ath_err(common, "Unable to restart recv logic\n");
  744. goto out;
  745. }
  746. if (sc->sc_flags & SC_OP_BEACONS)
  747. ath_beacon_config(sc, NULL); /* restart beacons */
  748. /* Re-Enable interrupts */
  749. ath9k_hw_set_interrupts(ah, ah->imask);
  750. /* Enable LED */
  751. ath9k_hw_cfg_output(ah, ah->led_pin,
  752. AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
  753. ath9k_hw_set_gpio(ah, ah->led_pin, 0);
  754. ieee80211_wake_queues(hw);
  755. out:
  756. spin_unlock_bh(&sc->sc_pcu_lock);
  757. ath9k_ps_restore(sc);
  758. }
  759. void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
  760. {
  761. struct ath_hw *ah = sc->sc_ah;
  762. struct ieee80211_channel *channel = hw->conf.channel;
  763. int r;
  764. ath9k_ps_wakeup(sc);
  765. spin_lock_bh(&sc->sc_pcu_lock);
  766. ieee80211_stop_queues(hw);
  767. /*
  768. * Keep the LED on when the radio is disabled
  769. * during idle unassociated state.
  770. */
  771. if (!sc->ps_idle) {
  772. ath9k_hw_set_gpio(ah, ah->led_pin, 1);
  773. ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
  774. }
  775. /* Disable interrupts */
  776. ath9k_hw_disable_interrupts(ah);
  777. ath_drain_all_txq(sc, false); /* clear pending tx frames */
  778. ath_stoprecv(sc); /* turn off frame recv */
  779. ath_flushrecv(sc); /* flush recv queue */
  780. if (!ah->curchan)
  781. ah->curchan = ath_get_curchannel(sc, hw);
  782. r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
  783. if (r) {
  784. ath_err(ath9k_hw_common(sc->sc_ah),
  785. "Unable to reset channel (%u MHz), reset status %d\n",
  786. channel->center_freq, r);
  787. }
  788. ath9k_hw_phy_disable(ah);
  789. ath9k_hw_configpcipowersave(ah, 1, 1);
  790. spin_unlock_bh(&sc->sc_pcu_lock);
  791. ath9k_ps_restore(sc);
  792. }
  793. int ath_reset(struct ath_softc *sc, bool retry_tx)
  794. {
  795. struct ath_hw *ah = sc->sc_ah;
  796. struct ath_common *common = ath9k_hw_common(ah);
  797. struct ieee80211_hw *hw = sc->hw;
  798. int r;
  799. /* Stop ANI */
  800. del_timer_sync(&common->ani.timer);
  801. ath9k_ps_wakeup(sc);
  802. spin_lock_bh(&sc->sc_pcu_lock);
  803. ieee80211_stop_queues(hw);
  804. ath9k_hw_disable_interrupts(ah);
  805. ath_drain_all_txq(sc, retry_tx);
  806. ath_stoprecv(sc);
  807. ath_flushrecv(sc);
  808. r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
  809. if (r)
  810. ath_err(common,
  811. "Unable to reset hardware; reset status %d\n", r);
  812. if (ath_startrecv(sc) != 0)
  813. ath_err(common, "Unable to start recv logic\n");
  814. /*
  815. * We may be doing a reset in response to a request
  816. * that changes the channel so update any state that
  817. * might change as a result.
  818. */
  819. ath_update_txpow(sc);
  820. if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
  821. ath_beacon_config(sc, NULL); /* restart beacons */
  822. ath9k_hw_set_interrupts(ah, ah->imask);
  823. if (retry_tx) {
  824. int i;
  825. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  826. if (ATH_TXQ_SETUP(sc, i)) {
  827. spin_lock_bh(&sc->tx.txq[i].axq_lock);
  828. ath_txq_schedule(sc, &sc->tx.txq[i]);
  829. spin_unlock_bh(&sc->tx.txq[i].axq_lock);
  830. }
  831. }
  832. }
  833. ieee80211_wake_queues(hw);
  834. spin_unlock_bh(&sc->sc_pcu_lock);
  835. /* Start ANI */
  836. ath_start_ani(common);
  837. ath9k_ps_restore(sc);
  838. return r;
  839. }
  840. /* XXX: Remove me once we don't depend on ath9k_channel for all
  841. * this redundant data */
  842. void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
  843. struct ath9k_channel *ichan)
  844. {
  845. struct ieee80211_channel *chan = hw->conf.channel;
  846. struct ieee80211_conf *conf = &hw->conf;
  847. ichan->channel = chan->center_freq;
  848. ichan->chan = chan;
  849. if (chan->band == IEEE80211_BAND_2GHZ) {
  850. ichan->chanmode = CHANNEL_G;
  851. ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
  852. } else {
  853. ichan->chanmode = CHANNEL_A;
  854. ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
  855. }
  856. if (conf_is_ht(conf))
  857. ichan->chanmode = ath_get_extchanmode(sc, chan,
  858. conf->channel_type);
  859. }
  860. /**********************/
  861. /* mac80211 callbacks */
  862. /**********************/
  863. static int ath9k_start(struct ieee80211_hw *hw)
  864. {
  865. struct ath_wiphy *aphy = hw->priv;
  866. struct ath_softc *sc = aphy->sc;
  867. struct ath_hw *ah = sc->sc_ah;
  868. struct ath_common *common = ath9k_hw_common(ah);
  869. struct ieee80211_channel *curchan = hw->conf.channel;
  870. struct ath9k_channel *init_channel;
  871. int r;
  872. ath_dbg(common, ATH_DBG_CONFIG,
  873. "Starting driver with initial channel: %d MHz\n",
  874. curchan->center_freq);
  875. mutex_lock(&sc->mutex);
  876. if (ath9k_wiphy_started(sc)) {
  877. if (sc->chan_idx == curchan->hw_value) {
  878. /*
  879. * Already on the operational channel, the new wiphy
  880. * can be marked active.
  881. */
  882. aphy->state = ATH_WIPHY_ACTIVE;
  883. ieee80211_wake_queues(hw);
  884. } else {
  885. /*
  886. * Another wiphy is on another channel, start the new
  887. * wiphy in paused state.
  888. */
  889. aphy->state = ATH_WIPHY_PAUSED;
  890. ieee80211_stop_queues(hw);
  891. }
  892. mutex_unlock(&sc->mutex);
  893. return 0;
  894. }
  895. aphy->state = ATH_WIPHY_ACTIVE;
  896. /* setup initial channel */
  897. sc->chan_idx = curchan->hw_value;
  898. init_channel = ath_get_curchannel(sc, hw);
  899. /* Reset SERDES registers */
  900. ath9k_hw_configpcipowersave(ah, 0, 0);
  901. /*
  902. * The basic interface to setting the hardware in a good
  903. * state is ``reset''. On return the hardware is known to
  904. * be powered up and with interrupts disabled. This must
  905. * be followed by initialization of the appropriate bits
  906. * and then setup of the interrupt mask.
  907. */
  908. spin_lock_bh(&sc->sc_pcu_lock);
  909. r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
  910. if (r) {
  911. ath_err(common,
  912. "Unable to reset hardware; reset status %d (freq %u MHz)\n",
  913. r, curchan->center_freq);
  914. spin_unlock_bh(&sc->sc_pcu_lock);
  915. goto mutex_unlock;
  916. }
  917. /*
  918. * This is needed only to setup initial state
  919. * but it's best done after a reset.
  920. */
  921. ath_update_txpow(sc);
  922. /*
  923. * Setup the hardware after reset:
  924. * The receive engine is set going.
  925. * Frame transmit is handled entirely
  926. * in the frame output path; there's nothing to do
  927. * here except setup the interrupt mask.
  928. */
  929. if (ath_startrecv(sc) != 0) {
  930. ath_err(common, "Unable to start recv logic\n");
  931. r = -EIO;
  932. spin_unlock_bh(&sc->sc_pcu_lock);
  933. goto mutex_unlock;
  934. }
  935. spin_unlock_bh(&sc->sc_pcu_lock);
  936. /* Setup our intr mask. */
  937. ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
  938. ATH9K_INT_RXORN | ATH9K_INT_FATAL |
  939. ATH9K_INT_GLOBAL;
  940. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  941. ah->imask |= ATH9K_INT_RXHP |
  942. ATH9K_INT_RXLP |
  943. ATH9K_INT_BB_WATCHDOG;
  944. else
  945. ah->imask |= ATH9K_INT_RX;
  946. ah->imask |= ATH9K_INT_GTT;
  947. if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
  948. ah->imask |= ATH9K_INT_CST;
  949. sc->sc_flags &= ~SC_OP_INVALID;
  950. sc->sc_ah->is_monitoring = false;
  951. /* Disable BMISS interrupt when we're not associated */
  952. ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
  953. ath9k_hw_set_interrupts(ah, ah->imask);
  954. ieee80211_wake_queues(hw);
  955. ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
  956. if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
  957. !ah->btcoex_hw.enabled) {
  958. ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
  959. AR_STOMP_LOW_WLAN_WGHT);
  960. ath9k_hw_btcoex_enable(ah);
  961. if (common->bus_ops->bt_coex_prep)
  962. common->bus_ops->bt_coex_prep(common);
  963. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  964. ath9k_btcoex_timer_resume(sc);
  965. }
  966. if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
  967. common->bus_ops->extn_synch_en(common);
  968. mutex_unlock:
  969. mutex_unlock(&sc->mutex);
  970. return r;
  971. }
  972. static int ath9k_tx(struct ieee80211_hw *hw,
  973. struct sk_buff *skb)
  974. {
  975. struct ath_wiphy *aphy = hw->priv;
  976. struct ath_softc *sc = aphy->sc;
  977. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  978. struct ath_tx_control txctl;
  979. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
  980. if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
  981. ath_dbg(common, ATH_DBG_XMIT,
  982. "ath9k: %s: TX in unexpected wiphy state %d\n",
  983. wiphy_name(hw->wiphy), aphy->state);
  984. goto exit;
  985. }
  986. if (sc->ps_enabled) {
  987. /*
  988. * mac80211 does not set PM field for normal data frames, so we
  989. * need to update that based on the current PS mode.
  990. */
  991. if (ieee80211_is_data(hdr->frame_control) &&
  992. !ieee80211_is_nullfunc(hdr->frame_control) &&
  993. !ieee80211_has_pm(hdr->frame_control)) {
  994. ath_dbg(common, ATH_DBG_PS,
  995. "Add PM=1 for a TX frame while in PS mode\n");
  996. hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
  997. }
  998. }
  999. if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
  1000. /*
  1001. * We are using PS-Poll and mac80211 can request TX while in
  1002. * power save mode. Need to wake up hardware for the TX to be
  1003. * completed and if needed, also for RX of buffered frames.
  1004. */
  1005. ath9k_ps_wakeup(sc);
  1006. if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  1007. ath9k_hw_setrxabort(sc->sc_ah, 0);
  1008. if (ieee80211_is_pspoll(hdr->frame_control)) {
  1009. ath_dbg(common, ATH_DBG_PS,
  1010. "Sending PS-Poll to pick a buffered frame\n");
  1011. sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
  1012. } else {
  1013. ath_dbg(common, ATH_DBG_PS,
  1014. "Wake up to complete TX\n");
  1015. sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
  1016. }
  1017. /*
  1018. * The actual restore operation will happen only after
  1019. * the sc_flags bit is cleared. We are just dropping
  1020. * the ps_usecount here.
  1021. */
  1022. ath9k_ps_restore(sc);
  1023. }
  1024. memset(&txctl, 0, sizeof(struct ath_tx_control));
  1025. txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
  1026. ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
  1027. if (ath_tx_start(hw, skb, &txctl) != 0) {
  1028. ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
  1029. goto exit;
  1030. }
  1031. return 0;
  1032. exit:
  1033. dev_kfree_skb_any(skb);
  1034. return 0;
  1035. }
  1036. static void ath9k_stop(struct ieee80211_hw *hw)
  1037. {
  1038. struct ath_wiphy *aphy = hw->priv;
  1039. struct ath_softc *sc = aphy->sc;
  1040. struct ath_hw *ah = sc->sc_ah;
  1041. struct ath_common *common = ath9k_hw_common(ah);
  1042. int i;
  1043. mutex_lock(&sc->mutex);
  1044. aphy->state = ATH_WIPHY_INACTIVE;
  1045. if (led_blink)
  1046. cancel_delayed_work_sync(&sc->ath_led_blink_work);
  1047. cancel_delayed_work_sync(&sc->tx_complete_work);
  1048. cancel_work_sync(&sc->paprd_work);
  1049. cancel_work_sync(&sc->hw_check_work);
  1050. for (i = 0; i < sc->num_sec_wiphy; i++) {
  1051. if (sc->sec_wiphy[i])
  1052. break;
  1053. }
  1054. if (i == sc->num_sec_wiphy) {
  1055. cancel_delayed_work_sync(&sc->wiphy_work);
  1056. cancel_work_sync(&sc->chan_work);
  1057. }
  1058. if (sc->sc_flags & SC_OP_INVALID) {
  1059. ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
  1060. mutex_unlock(&sc->mutex);
  1061. return;
  1062. }
  1063. if (ath9k_wiphy_started(sc)) {
  1064. mutex_unlock(&sc->mutex);
  1065. return; /* another wiphy still in use */
  1066. }
  1067. /* Ensure HW is awake when we try to shut it down. */
  1068. ath9k_ps_wakeup(sc);
  1069. if (ah->btcoex_hw.enabled) {
  1070. ath9k_hw_btcoex_disable(ah);
  1071. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  1072. ath9k_btcoex_timer_pause(sc);
  1073. }
  1074. spin_lock_bh(&sc->sc_pcu_lock);
  1075. /* prevent tasklets to enable interrupts once we disable them */
  1076. ah->imask &= ~ATH9K_INT_GLOBAL;
  1077. /* make sure h/w will not generate any interrupt
  1078. * before setting the invalid flag. */
  1079. ath9k_hw_disable_interrupts(ah);
  1080. if (!(sc->sc_flags & SC_OP_INVALID)) {
  1081. ath_drain_all_txq(sc, false);
  1082. ath_stoprecv(sc);
  1083. ath9k_hw_phy_disable(ah);
  1084. } else
  1085. sc->rx.rxlink = NULL;
  1086. /* disable HAL and put h/w to sleep */
  1087. ath9k_hw_disable(ah);
  1088. ath9k_hw_configpcipowersave(ah, 1, 1);
  1089. spin_unlock_bh(&sc->sc_pcu_lock);
  1090. /* we can now sync irq and kill any running tasklets, since we already
  1091. * disabled interrupts and not holding a spin lock */
  1092. synchronize_irq(sc->irq);
  1093. tasklet_kill(&sc->intr_tq);
  1094. tasklet_kill(&sc->bcon_tasklet);
  1095. ath9k_ps_restore(sc);
  1096. sc->ps_idle = true;
  1097. ath9k_set_wiphy_idle(aphy, true);
  1098. ath_radio_disable(sc, hw);
  1099. sc->sc_flags |= SC_OP_INVALID;
  1100. mutex_unlock(&sc->mutex);
  1101. ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
  1102. }
  1103. static int ath9k_add_interface(struct ieee80211_hw *hw,
  1104. struct ieee80211_vif *vif)
  1105. {
  1106. struct ath_wiphy *aphy = hw->priv;
  1107. struct ath_softc *sc = aphy->sc;
  1108. struct ath_hw *ah = sc->sc_ah;
  1109. struct ath_common *common = ath9k_hw_common(ah);
  1110. struct ath_vif *avp = (void *)vif->drv_priv;
  1111. enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
  1112. int ret = 0;
  1113. mutex_lock(&sc->mutex);
  1114. switch (vif->type) {
  1115. case NL80211_IFTYPE_STATION:
  1116. ic_opmode = NL80211_IFTYPE_STATION;
  1117. break;
  1118. case NL80211_IFTYPE_WDS:
  1119. ic_opmode = NL80211_IFTYPE_WDS;
  1120. break;
  1121. case NL80211_IFTYPE_ADHOC:
  1122. case NL80211_IFTYPE_AP:
  1123. case NL80211_IFTYPE_MESH_POINT:
  1124. if (sc->nbcnvifs >= ATH_BCBUF) {
  1125. ret = -ENOBUFS;
  1126. goto out;
  1127. }
  1128. ic_opmode = vif->type;
  1129. break;
  1130. default:
  1131. ath_err(common, "Interface type %d not yet supported\n",
  1132. vif->type);
  1133. ret = -EOPNOTSUPP;
  1134. goto out;
  1135. }
  1136. ath_dbg(common, ATH_DBG_CONFIG,
  1137. "Attach a VIF of type: %d\n", ic_opmode);
  1138. /* Set the VIF opmode */
  1139. avp->av_opmode = ic_opmode;
  1140. avp->av_bslot = -1;
  1141. sc->nvifs++;
  1142. ath9k_set_bssid_mask(hw, vif);
  1143. if (sc->nvifs > 1)
  1144. goto out; /* skip global settings for secondary vif */
  1145. if (ic_opmode == NL80211_IFTYPE_AP) {
  1146. ath9k_hw_set_tsfadjust(ah, 1);
  1147. sc->sc_flags |= SC_OP_TSF_RESET;
  1148. }
  1149. /* Set the device opmode */
  1150. ah->opmode = ic_opmode;
  1151. /*
  1152. * Enable MIB interrupts when there are hardware phy counters.
  1153. * Note we only do this (at the moment) for station mode.
  1154. */
  1155. if ((vif->type == NL80211_IFTYPE_STATION) ||
  1156. (vif->type == NL80211_IFTYPE_ADHOC) ||
  1157. (vif->type == NL80211_IFTYPE_MESH_POINT)) {
  1158. if (ah->config.enable_ani)
  1159. ah->imask |= ATH9K_INT_MIB;
  1160. ah->imask |= ATH9K_INT_TSFOOR;
  1161. }
  1162. ath9k_hw_set_interrupts(ah, ah->imask);
  1163. if (vif->type == NL80211_IFTYPE_AP ||
  1164. vif->type == NL80211_IFTYPE_ADHOC) {
  1165. sc->sc_flags |= SC_OP_ANI_RUN;
  1166. ath_start_ani(common);
  1167. }
  1168. out:
  1169. mutex_unlock(&sc->mutex);
  1170. return ret;
  1171. }
  1172. static void ath9k_reclaim_beacon(struct ath_softc *sc,
  1173. struct ieee80211_vif *vif)
  1174. {
  1175. struct ath_vif *avp = (void *)vif->drv_priv;
  1176. /* Disable SWBA interrupt */
  1177. sc->sc_ah->imask &= ~ATH9K_INT_SWBA;
  1178. ath9k_ps_wakeup(sc);
  1179. ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
  1180. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1181. tasklet_kill(&sc->bcon_tasklet);
  1182. ath9k_ps_restore(sc);
  1183. ath_beacon_return(sc, avp);
  1184. sc->sc_flags &= ~SC_OP_BEACONS;
  1185. if (sc->nbcnvifs > 0) {
  1186. /* Re-enable beaconing */
  1187. sc->sc_ah->imask |= ATH9K_INT_SWBA;
  1188. ath9k_ps_wakeup(sc);
  1189. ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
  1190. ath9k_ps_restore(sc);
  1191. }
  1192. }
  1193. static int ath9k_change_interface(struct ieee80211_hw *hw,
  1194. struct ieee80211_vif *vif,
  1195. enum nl80211_iftype new_type,
  1196. bool p2p)
  1197. {
  1198. struct ath_wiphy *aphy = hw->priv;
  1199. struct ath_softc *sc = aphy->sc;
  1200. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1201. int ret = 0;
  1202. ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
  1203. mutex_lock(&sc->mutex);
  1204. switch (new_type) {
  1205. case NL80211_IFTYPE_AP:
  1206. case NL80211_IFTYPE_ADHOC:
  1207. if (sc->nbcnvifs >= ATH_BCBUF) {
  1208. ath_err(common, "No beacon slot available\n");
  1209. ret = -ENOBUFS;
  1210. goto out;
  1211. }
  1212. break;
  1213. case NL80211_IFTYPE_STATION:
  1214. /* Stop ANI */
  1215. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1216. del_timer_sync(&common->ani.timer);
  1217. if ((vif->type == NL80211_IFTYPE_AP) ||
  1218. (vif->type == NL80211_IFTYPE_ADHOC))
  1219. ath9k_reclaim_beacon(sc, vif);
  1220. break;
  1221. default:
  1222. ath_err(common, "Interface type %d not yet supported\n",
  1223. vif->type);
  1224. ret = -ENOTSUPP;
  1225. goto out;
  1226. }
  1227. vif->type = new_type;
  1228. vif->p2p = p2p;
  1229. out:
  1230. mutex_unlock(&sc->mutex);
  1231. return ret;
  1232. }
  1233. static void ath9k_remove_interface(struct ieee80211_hw *hw,
  1234. struct ieee80211_vif *vif)
  1235. {
  1236. struct ath_wiphy *aphy = hw->priv;
  1237. struct ath_softc *sc = aphy->sc;
  1238. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1239. ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
  1240. mutex_lock(&sc->mutex);
  1241. /* Stop ANI */
  1242. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1243. del_timer_sync(&common->ani.timer);
  1244. /* Reclaim beacon resources */
  1245. if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
  1246. (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
  1247. (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT))
  1248. ath9k_reclaim_beacon(sc, vif);
  1249. sc->nvifs--;
  1250. mutex_unlock(&sc->mutex);
  1251. }
  1252. static void ath9k_enable_ps(struct ath_softc *sc)
  1253. {
  1254. struct ath_hw *ah = sc->sc_ah;
  1255. sc->ps_enabled = true;
  1256. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1257. if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
  1258. ah->imask |= ATH9K_INT_TIM_TIMER;
  1259. ath9k_hw_set_interrupts(ah, ah->imask);
  1260. }
  1261. ath9k_hw_setrxabort(ah, 1);
  1262. }
  1263. }
  1264. static void ath9k_disable_ps(struct ath_softc *sc)
  1265. {
  1266. struct ath_hw *ah = sc->sc_ah;
  1267. sc->ps_enabled = false;
  1268. ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
  1269. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1270. ath9k_hw_setrxabort(ah, 0);
  1271. sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
  1272. PS_WAIT_FOR_CAB |
  1273. PS_WAIT_FOR_PSPOLL_DATA |
  1274. PS_WAIT_FOR_TX_ACK);
  1275. if (ah->imask & ATH9K_INT_TIM_TIMER) {
  1276. ah->imask &= ~ATH9K_INT_TIM_TIMER;
  1277. ath9k_hw_set_interrupts(ah, ah->imask);
  1278. }
  1279. }
  1280. }
  1281. static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
  1282. {
  1283. struct ath_wiphy *aphy = hw->priv;
  1284. struct ath_softc *sc = aphy->sc;
  1285. struct ath_hw *ah = sc->sc_ah;
  1286. struct ath_common *common = ath9k_hw_common(ah);
  1287. struct ieee80211_conf *conf = &hw->conf;
  1288. bool disable_radio;
  1289. mutex_lock(&sc->mutex);
  1290. /*
  1291. * Leave this as the first check because we need to turn on the
  1292. * radio if it was disabled before prior to processing the rest
  1293. * of the changes. Likewise we must only disable the radio towards
  1294. * the end.
  1295. */
  1296. if (changed & IEEE80211_CONF_CHANGE_IDLE) {
  1297. bool enable_radio;
  1298. bool all_wiphys_idle;
  1299. bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
  1300. spin_lock_bh(&sc->wiphy_lock);
  1301. all_wiphys_idle = ath9k_all_wiphys_idle(sc);
  1302. ath9k_set_wiphy_idle(aphy, idle);
  1303. enable_radio = (!idle && all_wiphys_idle);
  1304. /*
  1305. * After we unlock here its possible another wiphy
  1306. * can be re-renabled so to account for that we will
  1307. * only disable the radio toward the end of this routine
  1308. * if by then all wiphys are still idle.
  1309. */
  1310. spin_unlock_bh(&sc->wiphy_lock);
  1311. if (enable_radio) {
  1312. sc->ps_idle = false;
  1313. ath_radio_enable(sc, hw);
  1314. ath_dbg(common, ATH_DBG_CONFIG,
  1315. "not-idle: enabling radio\n");
  1316. }
  1317. }
  1318. /*
  1319. * We just prepare to enable PS. We have to wait until our AP has
  1320. * ACK'd our null data frame to disable RX otherwise we'll ignore
  1321. * those ACKs and end up retransmitting the same null data frames.
  1322. * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
  1323. */
  1324. if (changed & IEEE80211_CONF_CHANGE_PS) {
  1325. unsigned long flags;
  1326. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  1327. if (conf->flags & IEEE80211_CONF_PS)
  1328. ath9k_enable_ps(sc);
  1329. else
  1330. ath9k_disable_ps(sc);
  1331. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  1332. }
  1333. if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
  1334. if (conf->flags & IEEE80211_CONF_MONITOR) {
  1335. ath_dbg(common, ATH_DBG_CONFIG,
  1336. "Monitor mode is enabled\n");
  1337. sc->sc_ah->is_monitoring = true;
  1338. } else {
  1339. ath_dbg(common, ATH_DBG_CONFIG,
  1340. "Monitor mode is disabled\n");
  1341. sc->sc_ah->is_monitoring = false;
  1342. }
  1343. }
  1344. if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
  1345. struct ieee80211_channel *curchan = hw->conf.channel;
  1346. int pos = curchan->hw_value;
  1347. int old_pos = -1;
  1348. unsigned long flags;
  1349. if (ah->curchan)
  1350. old_pos = ah->curchan - &ah->channels[0];
  1351. aphy->chan_idx = pos;
  1352. aphy->chan_is_ht = conf_is_ht(conf);
  1353. if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
  1354. sc->sc_flags |= SC_OP_OFFCHANNEL;
  1355. else
  1356. sc->sc_flags &= ~SC_OP_OFFCHANNEL;
  1357. if (aphy->state == ATH_WIPHY_SCAN ||
  1358. aphy->state == ATH_WIPHY_ACTIVE)
  1359. ath9k_wiphy_pause_all_forced(sc, aphy);
  1360. else {
  1361. /*
  1362. * Do not change operational channel based on a paused
  1363. * wiphy changes.
  1364. */
  1365. goto skip_chan_change;
  1366. }
  1367. ath_dbg(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
  1368. curchan->center_freq);
  1369. /* XXX: remove me eventualy */
  1370. ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
  1371. /* update survey stats for the old channel before switching */
  1372. spin_lock_irqsave(&common->cc_lock, flags);
  1373. ath_update_survey_stats(sc);
  1374. spin_unlock_irqrestore(&common->cc_lock, flags);
  1375. /*
  1376. * If the operating channel changes, change the survey in-use flags
  1377. * along with it.
  1378. * Reset the survey data for the new channel, unless we're switching
  1379. * back to the operating channel from an off-channel operation.
  1380. */
  1381. if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
  1382. sc->cur_survey != &sc->survey[pos]) {
  1383. if (sc->cur_survey)
  1384. sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
  1385. sc->cur_survey = &sc->survey[pos];
  1386. memset(sc->cur_survey, 0, sizeof(struct survey_info));
  1387. sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
  1388. } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
  1389. memset(&sc->survey[pos], 0, sizeof(struct survey_info));
  1390. }
  1391. if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
  1392. ath_err(common, "Unable to set channel\n");
  1393. mutex_unlock(&sc->mutex);
  1394. return -EINVAL;
  1395. }
  1396. /*
  1397. * The most recent snapshot of channel->noisefloor for the old
  1398. * channel is only available after the hardware reset. Copy it to
  1399. * the survey stats now.
  1400. */
  1401. if (old_pos >= 0)
  1402. ath_update_survey_nf(sc, old_pos);
  1403. }
  1404. skip_chan_change:
  1405. if (changed & IEEE80211_CONF_CHANGE_POWER) {
  1406. sc->config.txpowlimit = 2 * conf->power_level;
  1407. ath9k_ps_wakeup(sc);
  1408. ath_update_txpow(sc);
  1409. ath9k_ps_restore(sc);
  1410. }
  1411. spin_lock_bh(&sc->wiphy_lock);
  1412. disable_radio = ath9k_all_wiphys_idle(sc);
  1413. spin_unlock_bh(&sc->wiphy_lock);
  1414. if (disable_radio) {
  1415. ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
  1416. sc->ps_idle = true;
  1417. ath_radio_disable(sc, hw);
  1418. }
  1419. mutex_unlock(&sc->mutex);
  1420. return 0;
  1421. }
  1422. #define SUPPORTED_FILTERS \
  1423. (FIF_PROMISC_IN_BSS | \
  1424. FIF_ALLMULTI | \
  1425. FIF_CONTROL | \
  1426. FIF_PSPOLL | \
  1427. FIF_OTHER_BSS | \
  1428. FIF_BCN_PRBRESP_PROMISC | \
  1429. FIF_PROBE_REQ | \
  1430. FIF_FCSFAIL)
  1431. /* FIXME: sc->sc_full_reset ? */
  1432. static void ath9k_configure_filter(struct ieee80211_hw *hw,
  1433. unsigned int changed_flags,
  1434. unsigned int *total_flags,
  1435. u64 multicast)
  1436. {
  1437. struct ath_wiphy *aphy = hw->priv;
  1438. struct ath_softc *sc = aphy->sc;
  1439. u32 rfilt;
  1440. changed_flags &= SUPPORTED_FILTERS;
  1441. *total_flags &= SUPPORTED_FILTERS;
  1442. sc->rx.rxfilter = *total_flags;
  1443. ath9k_ps_wakeup(sc);
  1444. rfilt = ath_calcrxfilter(sc);
  1445. ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
  1446. ath9k_ps_restore(sc);
  1447. ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
  1448. "Set HW RX filter: 0x%x\n", rfilt);
  1449. }
  1450. static int ath9k_sta_add(struct ieee80211_hw *hw,
  1451. struct ieee80211_vif *vif,
  1452. struct ieee80211_sta *sta)
  1453. {
  1454. struct ath_wiphy *aphy = hw->priv;
  1455. struct ath_softc *sc = aphy->sc;
  1456. ath_node_attach(sc, sta);
  1457. return 0;
  1458. }
  1459. static int ath9k_sta_remove(struct ieee80211_hw *hw,
  1460. struct ieee80211_vif *vif,
  1461. struct ieee80211_sta *sta)
  1462. {
  1463. struct ath_wiphy *aphy = hw->priv;
  1464. struct ath_softc *sc = aphy->sc;
  1465. ath_node_detach(sc, sta);
  1466. return 0;
  1467. }
  1468. static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
  1469. const struct ieee80211_tx_queue_params *params)
  1470. {
  1471. struct ath_wiphy *aphy = hw->priv;
  1472. struct ath_softc *sc = aphy->sc;
  1473. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1474. struct ath_txq *txq;
  1475. struct ath9k_tx_queue_info qi;
  1476. int ret = 0;
  1477. if (queue >= WME_NUM_AC)
  1478. return 0;
  1479. txq = sc->tx.txq_map[queue];
  1480. mutex_lock(&sc->mutex);
  1481. memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
  1482. qi.tqi_aifs = params->aifs;
  1483. qi.tqi_cwmin = params->cw_min;
  1484. qi.tqi_cwmax = params->cw_max;
  1485. qi.tqi_burstTime = params->txop;
  1486. ath_dbg(common, ATH_DBG_CONFIG,
  1487. "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
  1488. queue, txq->axq_qnum, params->aifs, params->cw_min,
  1489. params->cw_max, params->txop);
  1490. ret = ath_txq_update(sc, txq->axq_qnum, &qi);
  1491. if (ret)
  1492. ath_err(common, "TXQ Update failed\n");
  1493. if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
  1494. if (queue == WME_AC_BE && !ret)
  1495. ath_beaconq_config(sc);
  1496. mutex_unlock(&sc->mutex);
  1497. return ret;
  1498. }
  1499. static int ath9k_set_key(struct ieee80211_hw *hw,
  1500. enum set_key_cmd cmd,
  1501. struct ieee80211_vif *vif,
  1502. struct ieee80211_sta *sta,
  1503. struct ieee80211_key_conf *key)
  1504. {
  1505. struct ath_wiphy *aphy = hw->priv;
  1506. struct ath_softc *sc = aphy->sc;
  1507. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1508. int ret = 0;
  1509. if (ath9k_modparam_nohwcrypt)
  1510. return -ENOSPC;
  1511. mutex_lock(&sc->mutex);
  1512. ath9k_ps_wakeup(sc);
  1513. ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
  1514. switch (cmd) {
  1515. case SET_KEY:
  1516. ret = ath_key_config(common, vif, sta, key);
  1517. if (ret >= 0) {
  1518. key->hw_key_idx = ret;
  1519. /* push IV and Michael MIC generation to stack */
  1520. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  1521. if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
  1522. key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
  1523. if (sc->sc_ah->sw_mgmt_crypto &&
  1524. key->cipher == WLAN_CIPHER_SUITE_CCMP)
  1525. key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
  1526. ret = 0;
  1527. }
  1528. break;
  1529. case DISABLE_KEY:
  1530. ath_key_delete(common, key);
  1531. break;
  1532. default:
  1533. ret = -EINVAL;
  1534. }
  1535. ath9k_ps_restore(sc);
  1536. mutex_unlock(&sc->mutex);
  1537. return ret;
  1538. }
  1539. static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
  1540. struct ieee80211_vif *vif,
  1541. struct ieee80211_bss_conf *bss_conf,
  1542. u32 changed)
  1543. {
  1544. struct ath_wiphy *aphy = hw->priv;
  1545. struct ath_softc *sc = aphy->sc;
  1546. struct ath_hw *ah = sc->sc_ah;
  1547. struct ath_common *common = ath9k_hw_common(ah);
  1548. struct ath_vif *avp = (void *)vif->drv_priv;
  1549. int slottime;
  1550. int error;
  1551. mutex_lock(&sc->mutex);
  1552. if (changed & BSS_CHANGED_BSSID) {
  1553. /* Set BSSID */
  1554. memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
  1555. memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
  1556. common->curaid = 0;
  1557. ath9k_hw_write_associd(ah);
  1558. /* Set aggregation protection mode parameters */
  1559. sc->config.ath_aggr_prot = 0;
  1560. ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
  1561. common->curbssid, common->curaid);
  1562. /* need to reconfigure the beacon */
  1563. sc->sc_flags &= ~SC_OP_BEACONS ;
  1564. }
  1565. /* Enable transmission of beacons (AP, IBSS, MESH) */
  1566. if ((changed & BSS_CHANGED_BEACON) ||
  1567. ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
  1568. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1569. error = ath_beacon_alloc(aphy, vif);
  1570. if (!error)
  1571. ath_beacon_config(sc, vif);
  1572. }
  1573. if (changed & BSS_CHANGED_ERP_SLOT) {
  1574. if (bss_conf->use_short_slot)
  1575. slottime = 9;
  1576. else
  1577. slottime = 20;
  1578. if (vif->type == NL80211_IFTYPE_AP) {
  1579. /*
  1580. * Defer update, so that connected stations can adjust
  1581. * their settings at the same time.
  1582. * See beacon.c for more details
  1583. */
  1584. sc->beacon.slottime = slottime;
  1585. sc->beacon.updateslot = UPDATE;
  1586. } else {
  1587. ah->slottime = slottime;
  1588. ath9k_hw_init_global_settings(ah);
  1589. }
  1590. }
  1591. /* Disable transmission of beacons */
  1592. if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
  1593. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1594. if (changed & BSS_CHANGED_BEACON_INT) {
  1595. sc->beacon_interval = bss_conf->beacon_int;
  1596. /*
  1597. * In case of AP mode, the HW TSF has to be reset
  1598. * when the beacon interval changes.
  1599. */
  1600. if (vif->type == NL80211_IFTYPE_AP) {
  1601. sc->sc_flags |= SC_OP_TSF_RESET;
  1602. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1603. error = ath_beacon_alloc(aphy, vif);
  1604. if (!error)
  1605. ath_beacon_config(sc, vif);
  1606. } else {
  1607. ath_beacon_config(sc, vif);
  1608. }
  1609. }
  1610. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  1611. ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
  1612. bss_conf->use_short_preamble);
  1613. if (bss_conf->use_short_preamble)
  1614. sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
  1615. else
  1616. sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
  1617. }
  1618. if (changed & BSS_CHANGED_ERP_CTS_PROT) {
  1619. ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
  1620. bss_conf->use_cts_prot);
  1621. if (bss_conf->use_cts_prot &&
  1622. hw->conf.channel->band != IEEE80211_BAND_5GHZ)
  1623. sc->sc_flags |= SC_OP_PROTECT_ENABLE;
  1624. else
  1625. sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
  1626. }
  1627. if (changed & BSS_CHANGED_ASSOC) {
  1628. ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
  1629. bss_conf->assoc);
  1630. ath9k_bss_assoc_info(sc, hw, vif, bss_conf);
  1631. }
  1632. mutex_unlock(&sc->mutex);
  1633. }
  1634. static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
  1635. {
  1636. u64 tsf;
  1637. struct ath_wiphy *aphy = hw->priv;
  1638. struct ath_softc *sc = aphy->sc;
  1639. mutex_lock(&sc->mutex);
  1640. ath9k_ps_wakeup(sc);
  1641. tsf = ath9k_hw_gettsf64(sc->sc_ah);
  1642. ath9k_ps_restore(sc);
  1643. mutex_unlock(&sc->mutex);
  1644. return tsf;
  1645. }
  1646. static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
  1647. {
  1648. struct ath_wiphy *aphy = hw->priv;
  1649. struct ath_softc *sc = aphy->sc;
  1650. mutex_lock(&sc->mutex);
  1651. ath9k_ps_wakeup(sc);
  1652. ath9k_hw_settsf64(sc->sc_ah, tsf);
  1653. ath9k_ps_restore(sc);
  1654. mutex_unlock(&sc->mutex);
  1655. }
  1656. static void ath9k_reset_tsf(struct ieee80211_hw *hw)
  1657. {
  1658. struct ath_wiphy *aphy = hw->priv;
  1659. struct ath_softc *sc = aphy->sc;
  1660. mutex_lock(&sc->mutex);
  1661. ath9k_ps_wakeup(sc);
  1662. ath9k_hw_reset_tsf(sc->sc_ah);
  1663. ath9k_ps_restore(sc);
  1664. mutex_unlock(&sc->mutex);
  1665. }
  1666. static int ath9k_ampdu_action(struct ieee80211_hw *hw,
  1667. struct ieee80211_vif *vif,
  1668. enum ieee80211_ampdu_mlme_action action,
  1669. struct ieee80211_sta *sta,
  1670. u16 tid, u16 *ssn)
  1671. {
  1672. struct ath_wiphy *aphy = hw->priv;
  1673. struct ath_softc *sc = aphy->sc;
  1674. int ret = 0;
  1675. local_bh_disable();
  1676. switch (action) {
  1677. case IEEE80211_AMPDU_RX_START:
  1678. if (!(sc->sc_flags & SC_OP_RXAGGR))
  1679. ret = -ENOTSUPP;
  1680. break;
  1681. case IEEE80211_AMPDU_RX_STOP:
  1682. break;
  1683. case IEEE80211_AMPDU_TX_START:
  1684. if (!(sc->sc_flags & SC_OP_TXAGGR))
  1685. return -EOPNOTSUPP;
  1686. ath9k_ps_wakeup(sc);
  1687. ret = ath_tx_aggr_start(sc, sta, tid, ssn);
  1688. if (!ret)
  1689. ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1690. ath9k_ps_restore(sc);
  1691. break;
  1692. case IEEE80211_AMPDU_TX_STOP:
  1693. ath9k_ps_wakeup(sc);
  1694. ath_tx_aggr_stop(sc, sta, tid);
  1695. ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1696. ath9k_ps_restore(sc);
  1697. break;
  1698. case IEEE80211_AMPDU_TX_OPERATIONAL:
  1699. ath9k_ps_wakeup(sc);
  1700. ath_tx_aggr_resume(sc, sta, tid);
  1701. ath9k_ps_restore(sc);
  1702. break;
  1703. default:
  1704. ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
  1705. }
  1706. local_bh_enable();
  1707. return ret;
  1708. }
  1709. static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
  1710. struct survey_info *survey)
  1711. {
  1712. struct ath_wiphy *aphy = hw->priv;
  1713. struct ath_softc *sc = aphy->sc;
  1714. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1715. struct ieee80211_supported_band *sband;
  1716. struct ieee80211_channel *chan;
  1717. unsigned long flags;
  1718. int pos;
  1719. spin_lock_irqsave(&common->cc_lock, flags);
  1720. if (idx == 0)
  1721. ath_update_survey_stats(sc);
  1722. sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
  1723. if (sband && idx >= sband->n_channels) {
  1724. idx -= sband->n_channels;
  1725. sband = NULL;
  1726. }
  1727. if (!sband)
  1728. sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
  1729. if (!sband || idx >= sband->n_channels) {
  1730. spin_unlock_irqrestore(&common->cc_lock, flags);
  1731. return -ENOENT;
  1732. }
  1733. chan = &sband->channels[idx];
  1734. pos = chan->hw_value;
  1735. memcpy(survey, &sc->survey[pos], sizeof(*survey));
  1736. survey->channel = chan;
  1737. spin_unlock_irqrestore(&common->cc_lock, flags);
  1738. return 0;
  1739. }
  1740. static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
  1741. {
  1742. struct ath_wiphy *aphy = hw->priv;
  1743. struct ath_softc *sc = aphy->sc;
  1744. mutex_lock(&sc->mutex);
  1745. if (ath9k_wiphy_scanning(sc)) {
  1746. /*
  1747. * There is a race here in mac80211 but fixing it requires
  1748. * we revisit how we handle the scan complete callback.
  1749. * After mac80211 fixes we will not have configured hardware
  1750. * to the home channel nor would we have configured the RX
  1751. * filter yet.
  1752. */
  1753. mutex_unlock(&sc->mutex);
  1754. return;
  1755. }
  1756. aphy->state = ATH_WIPHY_SCAN;
  1757. ath9k_wiphy_pause_all_forced(sc, aphy);
  1758. mutex_unlock(&sc->mutex);
  1759. }
  1760. /*
  1761. * XXX: this requires a revisit after the driver
  1762. * scan_complete gets moved to another place/removed in mac80211.
  1763. */
  1764. static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
  1765. {
  1766. struct ath_wiphy *aphy = hw->priv;
  1767. struct ath_softc *sc = aphy->sc;
  1768. mutex_lock(&sc->mutex);
  1769. aphy->state = ATH_WIPHY_ACTIVE;
  1770. mutex_unlock(&sc->mutex);
  1771. }
  1772. static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
  1773. {
  1774. struct ath_wiphy *aphy = hw->priv;
  1775. struct ath_softc *sc = aphy->sc;
  1776. struct ath_hw *ah = sc->sc_ah;
  1777. mutex_lock(&sc->mutex);
  1778. ah->coverage_class = coverage_class;
  1779. ath9k_hw_init_global_settings(ah);
  1780. mutex_unlock(&sc->mutex);
  1781. }
  1782. struct ieee80211_ops ath9k_ops = {
  1783. .tx = ath9k_tx,
  1784. .start = ath9k_start,
  1785. .stop = ath9k_stop,
  1786. .add_interface = ath9k_add_interface,
  1787. .change_interface = ath9k_change_interface,
  1788. .remove_interface = ath9k_remove_interface,
  1789. .config = ath9k_config,
  1790. .configure_filter = ath9k_configure_filter,
  1791. .sta_add = ath9k_sta_add,
  1792. .sta_remove = ath9k_sta_remove,
  1793. .conf_tx = ath9k_conf_tx,
  1794. .bss_info_changed = ath9k_bss_info_changed,
  1795. .set_key = ath9k_set_key,
  1796. .get_tsf = ath9k_get_tsf,
  1797. .set_tsf = ath9k_set_tsf,
  1798. .reset_tsf = ath9k_reset_tsf,
  1799. .ampdu_action = ath9k_ampdu_action,
  1800. .get_survey = ath9k_get_survey,
  1801. .sw_scan_start = ath9k_sw_scan_start,
  1802. .sw_scan_complete = ath9k_sw_scan_complete,
  1803. .rfkill_poll = ath9k_rfkill_poll_state,
  1804. .set_coverage_class = ath9k_set_coverage_class,
  1805. };