x86.c 105 KB

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  1. /*
  2. * Kernel-based Virtual Machine driver for Linux
  3. *
  4. * derived from drivers/kvm/kvm_main.c
  5. *
  6. * Copyright (C) 2006 Qumranet, Inc.
  7. * Copyright (C) 2008 Qumranet, Inc.
  8. * Copyright IBM Corporation, 2008
  9. *
  10. * Authors:
  11. * Avi Kivity <avi@qumranet.com>
  12. * Yaniv Kamay <yaniv@qumranet.com>
  13. * Amit Shah <amit.shah@qumranet.com>
  14. * Ben-Ami Yassour <benami@il.ibm.com>
  15. *
  16. * This work is licensed under the terms of the GNU GPL, version 2. See
  17. * the COPYING file in the top-level directory.
  18. *
  19. */
  20. #include <linux/kvm_host.h>
  21. #include "irq.h"
  22. #include "mmu.h"
  23. #include "i8254.h"
  24. #include "tss.h"
  25. #include "kvm_cache_regs.h"
  26. #include "x86.h"
  27. #include <linux/clocksource.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/kvm.h>
  30. #include <linux/fs.h>
  31. #include <linux/pci.h>
  32. #include <linux/vmalloc.h>
  33. #include <linux/module.h>
  34. #include <linux/mman.h>
  35. #include <linux/highmem.h>
  36. #include <asm/uaccess.h>
  37. #include <asm/msr.h>
  38. #include <asm/desc.h>
  39. #define MAX_IO_MSRS 256
  40. #define CR0_RESERVED_BITS \
  41. (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
  42. | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
  43. | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
  44. #define CR4_RESERVED_BITS \
  45. (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
  46. | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
  47. | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
  48. | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
  49. #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
  50. /* EFER defaults:
  51. * - enable syscall per default because its emulated by KVM
  52. * - enable LME and LMA per default on 64 bit KVM
  53. */
  54. #ifdef CONFIG_X86_64
  55. static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
  56. #else
  57. static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
  58. #endif
  59. #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  60. #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  61. static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  62. struct kvm_cpuid_entry2 __user *entries);
  63. struct kvm_x86_ops *kvm_x86_ops;
  64. EXPORT_SYMBOL_GPL(kvm_x86_ops);
  65. struct kvm_stats_debugfs_item debugfs_entries[] = {
  66. { "pf_fixed", VCPU_STAT(pf_fixed) },
  67. { "pf_guest", VCPU_STAT(pf_guest) },
  68. { "tlb_flush", VCPU_STAT(tlb_flush) },
  69. { "invlpg", VCPU_STAT(invlpg) },
  70. { "exits", VCPU_STAT(exits) },
  71. { "io_exits", VCPU_STAT(io_exits) },
  72. { "mmio_exits", VCPU_STAT(mmio_exits) },
  73. { "signal_exits", VCPU_STAT(signal_exits) },
  74. { "irq_window", VCPU_STAT(irq_window_exits) },
  75. { "nmi_window", VCPU_STAT(nmi_window_exits) },
  76. { "halt_exits", VCPU_STAT(halt_exits) },
  77. { "halt_wakeup", VCPU_STAT(halt_wakeup) },
  78. { "hypercalls", VCPU_STAT(hypercalls) },
  79. { "request_irq", VCPU_STAT(request_irq_exits) },
  80. { "irq_exits", VCPU_STAT(irq_exits) },
  81. { "host_state_reload", VCPU_STAT(host_state_reload) },
  82. { "efer_reload", VCPU_STAT(efer_reload) },
  83. { "fpu_reload", VCPU_STAT(fpu_reload) },
  84. { "insn_emulation", VCPU_STAT(insn_emulation) },
  85. { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
  86. { "irq_injections", VCPU_STAT(irq_injections) },
  87. { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
  88. { "mmu_pte_write", VM_STAT(mmu_pte_write) },
  89. { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
  90. { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
  91. { "mmu_flooded", VM_STAT(mmu_flooded) },
  92. { "mmu_recycled", VM_STAT(mmu_recycled) },
  93. { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
  94. { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
  95. { "largepages", VM_STAT(lpages) },
  96. { NULL }
  97. };
  98. static struct kvm_assigned_dev_kernel *kvm_find_assigned_dev(struct list_head *head,
  99. int assigned_dev_id)
  100. {
  101. struct list_head *ptr;
  102. struct kvm_assigned_dev_kernel *match;
  103. list_for_each(ptr, head) {
  104. match = list_entry(ptr, struct kvm_assigned_dev_kernel, list);
  105. if (match->assigned_dev_id == assigned_dev_id)
  106. return match;
  107. }
  108. return NULL;
  109. }
  110. static void kvm_assigned_dev_interrupt_work_handler(struct work_struct *work)
  111. {
  112. struct kvm_assigned_dev_kernel *assigned_dev;
  113. assigned_dev = container_of(work, struct kvm_assigned_dev_kernel,
  114. interrupt_work);
  115. /* This is taken to safely inject irq inside the guest. When
  116. * the interrupt injection (or the ioapic code) uses a
  117. * finer-grained lock, update this
  118. */
  119. mutex_lock(&assigned_dev->kvm->lock);
  120. kvm_set_irq(assigned_dev->kvm,
  121. assigned_dev->guest_irq, 1);
  122. mutex_unlock(&assigned_dev->kvm->lock);
  123. kvm_put_kvm(assigned_dev->kvm);
  124. }
  125. /* FIXME: Implement the OR logic needed to make shared interrupts on
  126. * this line behave properly
  127. */
  128. static irqreturn_t kvm_assigned_dev_intr(int irq, void *dev_id)
  129. {
  130. struct kvm_assigned_dev_kernel *assigned_dev =
  131. (struct kvm_assigned_dev_kernel *) dev_id;
  132. kvm_get_kvm(assigned_dev->kvm);
  133. schedule_work(&assigned_dev->interrupt_work);
  134. disable_irq_nosync(irq);
  135. return IRQ_HANDLED;
  136. }
  137. /* Ack the irq line for an assigned device */
  138. static void kvm_assigned_dev_ack_irq(struct kvm_irq_ack_notifier *kian)
  139. {
  140. struct kvm_assigned_dev_kernel *dev;
  141. if (kian->gsi == -1)
  142. return;
  143. dev = container_of(kian, struct kvm_assigned_dev_kernel,
  144. ack_notifier);
  145. kvm_set_irq(dev->kvm, dev->guest_irq, 0);
  146. enable_irq(dev->host_irq);
  147. }
  148. static int kvm_vm_ioctl_assign_irq(struct kvm *kvm,
  149. struct kvm_assigned_irq
  150. *assigned_irq)
  151. {
  152. int r = 0;
  153. struct kvm_assigned_dev_kernel *match;
  154. mutex_lock(&kvm->lock);
  155. match = kvm_find_assigned_dev(&kvm->arch.assigned_dev_head,
  156. assigned_irq->assigned_dev_id);
  157. if (!match) {
  158. mutex_unlock(&kvm->lock);
  159. return -EINVAL;
  160. }
  161. if (match->irq_requested) {
  162. match->guest_irq = assigned_irq->guest_irq;
  163. match->ack_notifier.gsi = assigned_irq->guest_irq;
  164. mutex_unlock(&kvm->lock);
  165. return 0;
  166. }
  167. INIT_WORK(&match->interrupt_work,
  168. kvm_assigned_dev_interrupt_work_handler);
  169. if (irqchip_in_kernel(kvm)) {
  170. if (!capable(CAP_SYS_RAWIO)) {
  171. return -EPERM;
  172. goto out;
  173. }
  174. if (assigned_irq->host_irq)
  175. match->host_irq = assigned_irq->host_irq;
  176. else
  177. match->host_irq = match->dev->irq;
  178. match->guest_irq = assigned_irq->guest_irq;
  179. match->ack_notifier.gsi = assigned_irq->guest_irq;
  180. match->ack_notifier.irq_acked = kvm_assigned_dev_ack_irq;
  181. kvm_register_irq_ack_notifier(kvm, &match->ack_notifier);
  182. /* Even though this is PCI, we don't want to use shared
  183. * interrupts. Sharing host devices with guest-assigned devices
  184. * on the same interrupt line is not a happy situation: there
  185. * are going to be long delays in accepting, acking, etc.
  186. */
  187. if (request_irq(match->host_irq, kvm_assigned_dev_intr, 0,
  188. "kvm_assigned_device", (void *)match)) {
  189. printk(KERN_INFO "%s: couldn't allocate irq for pv "
  190. "device\n", __func__);
  191. r = -EIO;
  192. goto out;
  193. }
  194. }
  195. match->irq_requested = true;
  196. out:
  197. mutex_unlock(&kvm->lock);
  198. return r;
  199. }
  200. static int kvm_vm_ioctl_assign_device(struct kvm *kvm,
  201. struct kvm_assigned_pci_dev *assigned_dev)
  202. {
  203. int r = 0;
  204. struct kvm_assigned_dev_kernel *match;
  205. struct pci_dev *dev;
  206. mutex_lock(&kvm->lock);
  207. match = kvm_find_assigned_dev(&kvm->arch.assigned_dev_head,
  208. assigned_dev->assigned_dev_id);
  209. if (match) {
  210. /* device already assigned */
  211. r = -EINVAL;
  212. goto out;
  213. }
  214. match = kzalloc(sizeof(struct kvm_assigned_dev_kernel), GFP_KERNEL);
  215. if (match == NULL) {
  216. printk(KERN_INFO "%s: Couldn't allocate memory\n",
  217. __func__);
  218. r = -ENOMEM;
  219. goto out;
  220. }
  221. dev = pci_get_bus_and_slot(assigned_dev->busnr,
  222. assigned_dev->devfn);
  223. if (!dev) {
  224. printk(KERN_INFO "%s: host device not found\n", __func__);
  225. r = -EINVAL;
  226. goto out_free;
  227. }
  228. if (pci_enable_device(dev)) {
  229. printk(KERN_INFO "%s: Could not enable PCI device\n", __func__);
  230. r = -EBUSY;
  231. goto out_put;
  232. }
  233. r = pci_request_regions(dev, "kvm_assigned_device");
  234. if (r) {
  235. printk(KERN_INFO "%s: Could not get access to device regions\n",
  236. __func__);
  237. goto out_disable;
  238. }
  239. match->assigned_dev_id = assigned_dev->assigned_dev_id;
  240. match->host_busnr = assigned_dev->busnr;
  241. match->host_devfn = assigned_dev->devfn;
  242. match->dev = dev;
  243. match->kvm = kvm;
  244. list_add(&match->list, &kvm->arch.assigned_dev_head);
  245. out:
  246. mutex_unlock(&kvm->lock);
  247. return r;
  248. out_disable:
  249. pci_disable_device(dev);
  250. out_put:
  251. pci_dev_put(dev);
  252. out_free:
  253. kfree(match);
  254. mutex_unlock(&kvm->lock);
  255. return r;
  256. }
  257. static void kvm_free_assigned_devices(struct kvm *kvm)
  258. {
  259. struct list_head *ptr, *ptr2;
  260. struct kvm_assigned_dev_kernel *assigned_dev;
  261. list_for_each_safe(ptr, ptr2, &kvm->arch.assigned_dev_head) {
  262. assigned_dev = list_entry(ptr,
  263. struct kvm_assigned_dev_kernel,
  264. list);
  265. if (irqchip_in_kernel(kvm) && assigned_dev->irq_requested) {
  266. free_irq(assigned_dev->host_irq,
  267. (void *)assigned_dev);
  268. kvm_unregister_irq_ack_notifier(kvm,
  269. &assigned_dev->
  270. ack_notifier);
  271. }
  272. if (cancel_work_sync(&assigned_dev->interrupt_work))
  273. /* We had pending work. That means we will have to take
  274. * care of kvm_put_kvm.
  275. */
  276. kvm_put_kvm(kvm);
  277. pci_release_regions(assigned_dev->dev);
  278. pci_disable_device(assigned_dev->dev);
  279. pci_dev_put(assigned_dev->dev);
  280. list_del(&assigned_dev->list);
  281. kfree(assigned_dev);
  282. }
  283. }
  284. unsigned long segment_base(u16 selector)
  285. {
  286. struct descriptor_table gdt;
  287. struct desc_struct *d;
  288. unsigned long table_base;
  289. unsigned long v;
  290. if (selector == 0)
  291. return 0;
  292. asm("sgdt %0" : "=m"(gdt));
  293. table_base = gdt.base;
  294. if (selector & 4) { /* from ldt */
  295. u16 ldt_selector;
  296. asm("sldt %0" : "=g"(ldt_selector));
  297. table_base = segment_base(ldt_selector);
  298. }
  299. d = (struct desc_struct *)(table_base + (selector & ~7));
  300. v = d->base0 | ((unsigned long)d->base1 << 16) |
  301. ((unsigned long)d->base2 << 24);
  302. #ifdef CONFIG_X86_64
  303. if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
  304. v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
  305. #endif
  306. return v;
  307. }
  308. EXPORT_SYMBOL_GPL(segment_base);
  309. u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
  310. {
  311. if (irqchip_in_kernel(vcpu->kvm))
  312. return vcpu->arch.apic_base;
  313. else
  314. return vcpu->arch.apic_base;
  315. }
  316. EXPORT_SYMBOL_GPL(kvm_get_apic_base);
  317. void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
  318. {
  319. /* TODO: reserve bits check */
  320. if (irqchip_in_kernel(vcpu->kvm))
  321. kvm_lapic_set_base(vcpu, data);
  322. else
  323. vcpu->arch.apic_base = data;
  324. }
  325. EXPORT_SYMBOL_GPL(kvm_set_apic_base);
  326. void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
  327. {
  328. WARN_ON(vcpu->arch.exception.pending);
  329. vcpu->arch.exception.pending = true;
  330. vcpu->arch.exception.has_error_code = false;
  331. vcpu->arch.exception.nr = nr;
  332. }
  333. EXPORT_SYMBOL_GPL(kvm_queue_exception);
  334. void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
  335. u32 error_code)
  336. {
  337. ++vcpu->stat.pf_guest;
  338. if (vcpu->arch.exception.pending) {
  339. if (vcpu->arch.exception.nr == PF_VECTOR) {
  340. printk(KERN_DEBUG "kvm: inject_page_fault:"
  341. " double fault 0x%lx\n", addr);
  342. vcpu->arch.exception.nr = DF_VECTOR;
  343. vcpu->arch.exception.error_code = 0;
  344. } else if (vcpu->arch.exception.nr == DF_VECTOR) {
  345. /* triple fault -> shutdown */
  346. set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
  347. }
  348. return;
  349. }
  350. vcpu->arch.cr2 = addr;
  351. kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
  352. }
  353. void kvm_inject_nmi(struct kvm_vcpu *vcpu)
  354. {
  355. vcpu->arch.nmi_pending = 1;
  356. }
  357. EXPORT_SYMBOL_GPL(kvm_inject_nmi);
  358. void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
  359. {
  360. WARN_ON(vcpu->arch.exception.pending);
  361. vcpu->arch.exception.pending = true;
  362. vcpu->arch.exception.has_error_code = true;
  363. vcpu->arch.exception.nr = nr;
  364. vcpu->arch.exception.error_code = error_code;
  365. }
  366. EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
  367. static void __queue_exception(struct kvm_vcpu *vcpu)
  368. {
  369. kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
  370. vcpu->arch.exception.has_error_code,
  371. vcpu->arch.exception.error_code);
  372. }
  373. /*
  374. * Load the pae pdptrs. Return true is they are all valid.
  375. */
  376. int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
  377. {
  378. gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
  379. unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
  380. int i;
  381. int ret;
  382. u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
  383. ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
  384. offset * sizeof(u64), sizeof(pdpte));
  385. if (ret < 0) {
  386. ret = 0;
  387. goto out;
  388. }
  389. for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
  390. if ((pdpte[i] & 1) && (pdpte[i] & 0xfffffff0000001e6ull)) {
  391. ret = 0;
  392. goto out;
  393. }
  394. }
  395. ret = 1;
  396. memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
  397. out:
  398. return ret;
  399. }
  400. EXPORT_SYMBOL_GPL(load_pdptrs);
  401. static bool pdptrs_changed(struct kvm_vcpu *vcpu)
  402. {
  403. u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
  404. bool changed = true;
  405. int r;
  406. if (is_long_mode(vcpu) || !is_pae(vcpu))
  407. return false;
  408. r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
  409. if (r < 0)
  410. goto out;
  411. changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
  412. out:
  413. return changed;
  414. }
  415. void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
  416. {
  417. if (cr0 & CR0_RESERVED_BITS) {
  418. printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
  419. cr0, vcpu->arch.cr0);
  420. kvm_inject_gp(vcpu, 0);
  421. return;
  422. }
  423. if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
  424. printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
  425. kvm_inject_gp(vcpu, 0);
  426. return;
  427. }
  428. if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
  429. printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
  430. "and a clear PE flag\n");
  431. kvm_inject_gp(vcpu, 0);
  432. return;
  433. }
  434. if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
  435. #ifdef CONFIG_X86_64
  436. if ((vcpu->arch.shadow_efer & EFER_LME)) {
  437. int cs_db, cs_l;
  438. if (!is_pae(vcpu)) {
  439. printk(KERN_DEBUG "set_cr0: #GP, start paging "
  440. "in long mode while PAE is disabled\n");
  441. kvm_inject_gp(vcpu, 0);
  442. return;
  443. }
  444. kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
  445. if (cs_l) {
  446. printk(KERN_DEBUG "set_cr0: #GP, start paging "
  447. "in long mode while CS.L == 1\n");
  448. kvm_inject_gp(vcpu, 0);
  449. return;
  450. }
  451. } else
  452. #endif
  453. if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
  454. printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
  455. "reserved bits\n");
  456. kvm_inject_gp(vcpu, 0);
  457. return;
  458. }
  459. }
  460. kvm_x86_ops->set_cr0(vcpu, cr0);
  461. vcpu->arch.cr0 = cr0;
  462. kvm_mmu_reset_context(vcpu);
  463. return;
  464. }
  465. EXPORT_SYMBOL_GPL(kvm_set_cr0);
  466. void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
  467. {
  468. kvm_set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
  469. KVMTRACE_1D(LMSW, vcpu,
  470. (u32)((vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f)),
  471. handler);
  472. }
  473. EXPORT_SYMBOL_GPL(kvm_lmsw);
  474. void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
  475. {
  476. if (cr4 & CR4_RESERVED_BITS) {
  477. printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
  478. kvm_inject_gp(vcpu, 0);
  479. return;
  480. }
  481. if (is_long_mode(vcpu)) {
  482. if (!(cr4 & X86_CR4_PAE)) {
  483. printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
  484. "in long mode\n");
  485. kvm_inject_gp(vcpu, 0);
  486. return;
  487. }
  488. } else if (is_paging(vcpu) && !is_pae(vcpu) && (cr4 & X86_CR4_PAE)
  489. && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
  490. printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
  491. kvm_inject_gp(vcpu, 0);
  492. return;
  493. }
  494. if (cr4 & X86_CR4_VMXE) {
  495. printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
  496. kvm_inject_gp(vcpu, 0);
  497. return;
  498. }
  499. kvm_x86_ops->set_cr4(vcpu, cr4);
  500. vcpu->arch.cr4 = cr4;
  501. kvm_mmu_reset_context(vcpu);
  502. }
  503. EXPORT_SYMBOL_GPL(kvm_set_cr4);
  504. void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
  505. {
  506. if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
  507. kvm_mmu_flush_tlb(vcpu);
  508. return;
  509. }
  510. if (is_long_mode(vcpu)) {
  511. if (cr3 & CR3_L_MODE_RESERVED_BITS) {
  512. printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
  513. kvm_inject_gp(vcpu, 0);
  514. return;
  515. }
  516. } else {
  517. if (is_pae(vcpu)) {
  518. if (cr3 & CR3_PAE_RESERVED_BITS) {
  519. printk(KERN_DEBUG
  520. "set_cr3: #GP, reserved bits\n");
  521. kvm_inject_gp(vcpu, 0);
  522. return;
  523. }
  524. if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
  525. printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
  526. "reserved bits\n");
  527. kvm_inject_gp(vcpu, 0);
  528. return;
  529. }
  530. }
  531. /*
  532. * We don't check reserved bits in nonpae mode, because
  533. * this isn't enforced, and VMware depends on this.
  534. */
  535. }
  536. /*
  537. * Does the new cr3 value map to physical memory? (Note, we
  538. * catch an invalid cr3 even in real-mode, because it would
  539. * cause trouble later on when we turn on paging anyway.)
  540. *
  541. * A real CPU would silently accept an invalid cr3 and would
  542. * attempt to use it - with largely undefined (and often hard
  543. * to debug) behavior on the guest side.
  544. */
  545. if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
  546. kvm_inject_gp(vcpu, 0);
  547. else {
  548. vcpu->arch.cr3 = cr3;
  549. vcpu->arch.mmu.new_cr3(vcpu);
  550. }
  551. }
  552. EXPORT_SYMBOL_GPL(kvm_set_cr3);
  553. void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
  554. {
  555. if (cr8 & CR8_RESERVED_BITS) {
  556. printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
  557. kvm_inject_gp(vcpu, 0);
  558. return;
  559. }
  560. if (irqchip_in_kernel(vcpu->kvm))
  561. kvm_lapic_set_tpr(vcpu, cr8);
  562. else
  563. vcpu->arch.cr8 = cr8;
  564. }
  565. EXPORT_SYMBOL_GPL(kvm_set_cr8);
  566. unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
  567. {
  568. if (irqchip_in_kernel(vcpu->kvm))
  569. return kvm_lapic_get_cr8(vcpu);
  570. else
  571. return vcpu->arch.cr8;
  572. }
  573. EXPORT_SYMBOL_GPL(kvm_get_cr8);
  574. /*
  575. * List of msr numbers which we expose to userspace through KVM_GET_MSRS
  576. * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
  577. *
  578. * This list is modified at module load time to reflect the
  579. * capabilities of the host cpu.
  580. */
  581. static u32 msrs_to_save[] = {
  582. MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
  583. MSR_K6_STAR,
  584. #ifdef CONFIG_X86_64
  585. MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
  586. #endif
  587. MSR_IA32_TIME_STAMP_COUNTER, MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
  588. MSR_IA32_PERF_STATUS,
  589. };
  590. static unsigned num_msrs_to_save;
  591. static u32 emulated_msrs[] = {
  592. MSR_IA32_MISC_ENABLE,
  593. };
  594. static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
  595. {
  596. if (efer & efer_reserved_bits) {
  597. printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
  598. efer);
  599. kvm_inject_gp(vcpu, 0);
  600. return;
  601. }
  602. if (is_paging(vcpu)
  603. && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
  604. printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
  605. kvm_inject_gp(vcpu, 0);
  606. return;
  607. }
  608. kvm_x86_ops->set_efer(vcpu, efer);
  609. efer &= ~EFER_LMA;
  610. efer |= vcpu->arch.shadow_efer & EFER_LMA;
  611. vcpu->arch.shadow_efer = efer;
  612. }
  613. void kvm_enable_efer_bits(u64 mask)
  614. {
  615. efer_reserved_bits &= ~mask;
  616. }
  617. EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
  618. /*
  619. * Writes msr value into into the appropriate "register".
  620. * Returns 0 on success, non-0 otherwise.
  621. * Assumes vcpu_load() was already called.
  622. */
  623. int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
  624. {
  625. return kvm_x86_ops->set_msr(vcpu, msr_index, data);
  626. }
  627. /*
  628. * Adapt set_msr() to msr_io()'s calling convention
  629. */
  630. static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
  631. {
  632. return kvm_set_msr(vcpu, index, *data);
  633. }
  634. static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
  635. {
  636. static int version;
  637. struct pvclock_wall_clock wc;
  638. struct timespec now, sys, boot;
  639. if (!wall_clock)
  640. return;
  641. version++;
  642. kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
  643. /*
  644. * The guest calculates current wall clock time by adding
  645. * system time (updated by kvm_write_guest_time below) to the
  646. * wall clock specified here. guest system time equals host
  647. * system time for us, thus we must fill in host boot time here.
  648. */
  649. now = current_kernel_time();
  650. ktime_get_ts(&sys);
  651. boot = ns_to_timespec(timespec_to_ns(&now) - timespec_to_ns(&sys));
  652. wc.sec = boot.tv_sec;
  653. wc.nsec = boot.tv_nsec;
  654. wc.version = version;
  655. kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
  656. version++;
  657. kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
  658. }
  659. static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
  660. {
  661. uint32_t quotient, remainder;
  662. /* Don't try to replace with do_div(), this one calculates
  663. * "(dividend << 32) / divisor" */
  664. __asm__ ( "divl %4"
  665. : "=a" (quotient), "=d" (remainder)
  666. : "0" (0), "1" (dividend), "r" (divisor) );
  667. return quotient;
  668. }
  669. static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
  670. {
  671. uint64_t nsecs = 1000000000LL;
  672. int32_t shift = 0;
  673. uint64_t tps64;
  674. uint32_t tps32;
  675. tps64 = tsc_khz * 1000LL;
  676. while (tps64 > nsecs*2) {
  677. tps64 >>= 1;
  678. shift--;
  679. }
  680. tps32 = (uint32_t)tps64;
  681. while (tps32 <= (uint32_t)nsecs) {
  682. tps32 <<= 1;
  683. shift++;
  684. }
  685. hv_clock->tsc_shift = shift;
  686. hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
  687. pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
  688. __FUNCTION__, tsc_khz, hv_clock->tsc_shift,
  689. hv_clock->tsc_to_system_mul);
  690. }
  691. static void kvm_write_guest_time(struct kvm_vcpu *v)
  692. {
  693. struct timespec ts;
  694. unsigned long flags;
  695. struct kvm_vcpu_arch *vcpu = &v->arch;
  696. void *shared_kaddr;
  697. if ((!vcpu->time_page))
  698. return;
  699. if (unlikely(vcpu->hv_clock_tsc_khz != tsc_khz)) {
  700. kvm_set_time_scale(tsc_khz, &vcpu->hv_clock);
  701. vcpu->hv_clock_tsc_khz = tsc_khz;
  702. }
  703. /* Keep irq disabled to prevent changes to the clock */
  704. local_irq_save(flags);
  705. kvm_get_msr(v, MSR_IA32_TIME_STAMP_COUNTER,
  706. &vcpu->hv_clock.tsc_timestamp);
  707. ktime_get_ts(&ts);
  708. local_irq_restore(flags);
  709. /* With all the info we got, fill in the values */
  710. vcpu->hv_clock.system_time = ts.tv_nsec +
  711. (NSEC_PER_SEC * (u64)ts.tv_sec);
  712. /*
  713. * The interface expects us to write an even number signaling that the
  714. * update is finished. Since the guest won't see the intermediate
  715. * state, we just increase by 2 at the end.
  716. */
  717. vcpu->hv_clock.version += 2;
  718. shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
  719. memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
  720. sizeof(vcpu->hv_clock));
  721. kunmap_atomic(shared_kaddr, KM_USER0);
  722. mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
  723. }
  724. static bool msr_mtrr_valid(unsigned msr)
  725. {
  726. switch (msr) {
  727. case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
  728. case MSR_MTRRfix64K_00000:
  729. case MSR_MTRRfix16K_80000:
  730. case MSR_MTRRfix16K_A0000:
  731. case MSR_MTRRfix4K_C0000:
  732. case MSR_MTRRfix4K_C8000:
  733. case MSR_MTRRfix4K_D0000:
  734. case MSR_MTRRfix4K_D8000:
  735. case MSR_MTRRfix4K_E0000:
  736. case MSR_MTRRfix4K_E8000:
  737. case MSR_MTRRfix4K_F0000:
  738. case MSR_MTRRfix4K_F8000:
  739. case MSR_MTRRdefType:
  740. case MSR_IA32_CR_PAT:
  741. return true;
  742. case 0x2f8:
  743. return true;
  744. }
  745. return false;
  746. }
  747. static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
  748. {
  749. if (!msr_mtrr_valid(msr))
  750. return 1;
  751. vcpu->arch.mtrr[msr - 0x200] = data;
  752. return 0;
  753. }
  754. int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
  755. {
  756. switch (msr) {
  757. case MSR_EFER:
  758. set_efer(vcpu, data);
  759. break;
  760. case MSR_IA32_MC0_STATUS:
  761. pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n",
  762. __func__, data);
  763. break;
  764. case MSR_IA32_MCG_STATUS:
  765. pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n",
  766. __func__, data);
  767. break;
  768. case MSR_IA32_MCG_CTL:
  769. pr_unimpl(vcpu, "%s: MSR_IA32_MCG_CTL 0x%llx, nop\n",
  770. __func__, data);
  771. break;
  772. case MSR_IA32_DEBUGCTLMSR:
  773. if (!data) {
  774. /* We support the non-activated case already */
  775. break;
  776. } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
  777. /* Values other than LBR and BTF are vendor-specific,
  778. thus reserved and should throw a #GP */
  779. return 1;
  780. }
  781. pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
  782. __func__, data);
  783. break;
  784. case MSR_IA32_UCODE_REV:
  785. case MSR_IA32_UCODE_WRITE:
  786. break;
  787. case 0x200 ... 0x2ff:
  788. return set_msr_mtrr(vcpu, msr, data);
  789. case MSR_IA32_APICBASE:
  790. kvm_set_apic_base(vcpu, data);
  791. break;
  792. case MSR_IA32_MISC_ENABLE:
  793. vcpu->arch.ia32_misc_enable_msr = data;
  794. break;
  795. case MSR_KVM_WALL_CLOCK:
  796. vcpu->kvm->arch.wall_clock = data;
  797. kvm_write_wall_clock(vcpu->kvm, data);
  798. break;
  799. case MSR_KVM_SYSTEM_TIME: {
  800. if (vcpu->arch.time_page) {
  801. kvm_release_page_dirty(vcpu->arch.time_page);
  802. vcpu->arch.time_page = NULL;
  803. }
  804. vcpu->arch.time = data;
  805. /* we verify if the enable bit is set... */
  806. if (!(data & 1))
  807. break;
  808. /* ...but clean it before doing the actual write */
  809. vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
  810. down_read(&current->mm->mmap_sem);
  811. vcpu->arch.time_page =
  812. gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
  813. up_read(&current->mm->mmap_sem);
  814. if (is_error_page(vcpu->arch.time_page)) {
  815. kvm_release_page_clean(vcpu->arch.time_page);
  816. vcpu->arch.time_page = NULL;
  817. }
  818. kvm_write_guest_time(vcpu);
  819. break;
  820. }
  821. default:
  822. pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n", msr, data);
  823. return 1;
  824. }
  825. return 0;
  826. }
  827. EXPORT_SYMBOL_GPL(kvm_set_msr_common);
  828. /*
  829. * Reads an msr value (of 'msr_index') into 'pdata'.
  830. * Returns 0 on success, non-0 otherwise.
  831. * Assumes vcpu_load() was already called.
  832. */
  833. int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
  834. {
  835. return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
  836. }
  837. static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
  838. {
  839. if (!msr_mtrr_valid(msr))
  840. return 1;
  841. *pdata = vcpu->arch.mtrr[msr - 0x200];
  842. return 0;
  843. }
  844. int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
  845. {
  846. u64 data;
  847. switch (msr) {
  848. case 0xc0010010: /* SYSCFG */
  849. case 0xc0010015: /* HWCR */
  850. case MSR_IA32_PLATFORM_ID:
  851. case MSR_IA32_P5_MC_ADDR:
  852. case MSR_IA32_P5_MC_TYPE:
  853. case MSR_IA32_MC0_CTL:
  854. case MSR_IA32_MCG_STATUS:
  855. case MSR_IA32_MCG_CAP:
  856. case MSR_IA32_MCG_CTL:
  857. case MSR_IA32_MC0_MISC:
  858. case MSR_IA32_MC0_MISC+4:
  859. case MSR_IA32_MC0_MISC+8:
  860. case MSR_IA32_MC0_MISC+12:
  861. case MSR_IA32_MC0_MISC+16:
  862. case MSR_IA32_MC0_MISC+20:
  863. case MSR_IA32_UCODE_REV:
  864. case MSR_IA32_EBL_CR_POWERON:
  865. case MSR_IA32_DEBUGCTLMSR:
  866. case MSR_IA32_LASTBRANCHFROMIP:
  867. case MSR_IA32_LASTBRANCHTOIP:
  868. case MSR_IA32_LASTINTFROMIP:
  869. case MSR_IA32_LASTINTTOIP:
  870. data = 0;
  871. break;
  872. case MSR_MTRRcap:
  873. data = 0x500 | KVM_NR_VAR_MTRR;
  874. break;
  875. case 0x200 ... 0x2ff:
  876. return get_msr_mtrr(vcpu, msr, pdata);
  877. case 0xcd: /* fsb frequency */
  878. data = 3;
  879. break;
  880. case MSR_IA32_APICBASE:
  881. data = kvm_get_apic_base(vcpu);
  882. break;
  883. case MSR_IA32_MISC_ENABLE:
  884. data = vcpu->arch.ia32_misc_enable_msr;
  885. break;
  886. case MSR_IA32_PERF_STATUS:
  887. /* TSC increment by tick */
  888. data = 1000ULL;
  889. /* CPU multiplier */
  890. data |= (((uint64_t)4ULL) << 40);
  891. break;
  892. case MSR_EFER:
  893. data = vcpu->arch.shadow_efer;
  894. break;
  895. case MSR_KVM_WALL_CLOCK:
  896. data = vcpu->kvm->arch.wall_clock;
  897. break;
  898. case MSR_KVM_SYSTEM_TIME:
  899. data = vcpu->arch.time;
  900. break;
  901. default:
  902. pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
  903. return 1;
  904. }
  905. *pdata = data;
  906. return 0;
  907. }
  908. EXPORT_SYMBOL_GPL(kvm_get_msr_common);
  909. /*
  910. * Read or write a bunch of msrs. All parameters are kernel addresses.
  911. *
  912. * @return number of msrs set successfully.
  913. */
  914. static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
  915. struct kvm_msr_entry *entries,
  916. int (*do_msr)(struct kvm_vcpu *vcpu,
  917. unsigned index, u64 *data))
  918. {
  919. int i;
  920. vcpu_load(vcpu);
  921. down_read(&vcpu->kvm->slots_lock);
  922. for (i = 0; i < msrs->nmsrs; ++i)
  923. if (do_msr(vcpu, entries[i].index, &entries[i].data))
  924. break;
  925. up_read(&vcpu->kvm->slots_lock);
  926. vcpu_put(vcpu);
  927. return i;
  928. }
  929. /*
  930. * Read or write a bunch of msrs. Parameters are user addresses.
  931. *
  932. * @return number of msrs set successfully.
  933. */
  934. static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
  935. int (*do_msr)(struct kvm_vcpu *vcpu,
  936. unsigned index, u64 *data),
  937. int writeback)
  938. {
  939. struct kvm_msrs msrs;
  940. struct kvm_msr_entry *entries;
  941. int r, n;
  942. unsigned size;
  943. r = -EFAULT;
  944. if (copy_from_user(&msrs, user_msrs, sizeof msrs))
  945. goto out;
  946. r = -E2BIG;
  947. if (msrs.nmsrs >= MAX_IO_MSRS)
  948. goto out;
  949. r = -ENOMEM;
  950. size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
  951. entries = vmalloc(size);
  952. if (!entries)
  953. goto out;
  954. r = -EFAULT;
  955. if (copy_from_user(entries, user_msrs->entries, size))
  956. goto out_free;
  957. r = n = __msr_io(vcpu, &msrs, entries, do_msr);
  958. if (r < 0)
  959. goto out_free;
  960. r = -EFAULT;
  961. if (writeback && copy_to_user(user_msrs->entries, entries, size))
  962. goto out_free;
  963. r = n;
  964. out_free:
  965. vfree(entries);
  966. out:
  967. return r;
  968. }
  969. int kvm_dev_ioctl_check_extension(long ext)
  970. {
  971. int r;
  972. switch (ext) {
  973. case KVM_CAP_IRQCHIP:
  974. case KVM_CAP_HLT:
  975. case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
  976. case KVM_CAP_USER_MEMORY:
  977. case KVM_CAP_SET_TSS_ADDR:
  978. case KVM_CAP_EXT_CPUID:
  979. case KVM_CAP_CLOCKSOURCE:
  980. case KVM_CAP_PIT:
  981. case KVM_CAP_NOP_IO_DELAY:
  982. case KVM_CAP_MP_STATE:
  983. case KVM_CAP_SYNC_MMU:
  984. r = 1;
  985. break;
  986. case KVM_CAP_COALESCED_MMIO:
  987. r = KVM_COALESCED_MMIO_PAGE_OFFSET;
  988. break;
  989. case KVM_CAP_VAPIC:
  990. r = !kvm_x86_ops->cpu_has_accelerated_tpr();
  991. break;
  992. case KVM_CAP_NR_VCPUS:
  993. r = KVM_MAX_VCPUS;
  994. break;
  995. case KVM_CAP_NR_MEMSLOTS:
  996. r = KVM_MEMORY_SLOTS;
  997. break;
  998. case KVM_CAP_PV_MMU:
  999. r = !tdp_enabled;
  1000. break;
  1001. default:
  1002. r = 0;
  1003. break;
  1004. }
  1005. return r;
  1006. }
  1007. long kvm_arch_dev_ioctl(struct file *filp,
  1008. unsigned int ioctl, unsigned long arg)
  1009. {
  1010. void __user *argp = (void __user *)arg;
  1011. long r;
  1012. switch (ioctl) {
  1013. case KVM_GET_MSR_INDEX_LIST: {
  1014. struct kvm_msr_list __user *user_msr_list = argp;
  1015. struct kvm_msr_list msr_list;
  1016. unsigned n;
  1017. r = -EFAULT;
  1018. if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
  1019. goto out;
  1020. n = msr_list.nmsrs;
  1021. msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
  1022. if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
  1023. goto out;
  1024. r = -E2BIG;
  1025. if (n < num_msrs_to_save)
  1026. goto out;
  1027. r = -EFAULT;
  1028. if (copy_to_user(user_msr_list->indices, &msrs_to_save,
  1029. num_msrs_to_save * sizeof(u32)))
  1030. goto out;
  1031. if (copy_to_user(user_msr_list->indices
  1032. + num_msrs_to_save * sizeof(u32),
  1033. &emulated_msrs,
  1034. ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
  1035. goto out;
  1036. r = 0;
  1037. break;
  1038. }
  1039. case KVM_GET_SUPPORTED_CPUID: {
  1040. struct kvm_cpuid2 __user *cpuid_arg = argp;
  1041. struct kvm_cpuid2 cpuid;
  1042. r = -EFAULT;
  1043. if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
  1044. goto out;
  1045. r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
  1046. cpuid_arg->entries);
  1047. if (r)
  1048. goto out;
  1049. r = -EFAULT;
  1050. if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
  1051. goto out;
  1052. r = 0;
  1053. break;
  1054. }
  1055. default:
  1056. r = -EINVAL;
  1057. }
  1058. out:
  1059. return r;
  1060. }
  1061. void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
  1062. {
  1063. kvm_x86_ops->vcpu_load(vcpu, cpu);
  1064. kvm_write_guest_time(vcpu);
  1065. }
  1066. void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
  1067. {
  1068. kvm_x86_ops->vcpu_put(vcpu);
  1069. kvm_put_guest_fpu(vcpu);
  1070. }
  1071. static int is_efer_nx(void)
  1072. {
  1073. u64 efer;
  1074. rdmsrl(MSR_EFER, efer);
  1075. return efer & EFER_NX;
  1076. }
  1077. static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
  1078. {
  1079. int i;
  1080. struct kvm_cpuid_entry2 *e, *entry;
  1081. entry = NULL;
  1082. for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
  1083. e = &vcpu->arch.cpuid_entries[i];
  1084. if (e->function == 0x80000001) {
  1085. entry = e;
  1086. break;
  1087. }
  1088. }
  1089. if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
  1090. entry->edx &= ~(1 << 20);
  1091. printk(KERN_INFO "kvm: guest NX capability removed\n");
  1092. }
  1093. }
  1094. /* when an old userspace process fills a new kernel module */
  1095. static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
  1096. struct kvm_cpuid *cpuid,
  1097. struct kvm_cpuid_entry __user *entries)
  1098. {
  1099. int r, i;
  1100. struct kvm_cpuid_entry *cpuid_entries;
  1101. r = -E2BIG;
  1102. if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
  1103. goto out;
  1104. r = -ENOMEM;
  1105. cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
  1106. if (!cpuid_entries)
  1107. goto out;
  1108. r = -EFAULT;
  1109. if (copy_from_user(cpuid_entries, entries,
  1110. cpuid->nent * sizeof(struct kvm_cpuid_entry)))
  1111. goto out_free;
  1112. for (i = 0; i < cpuid->nent; i++) {
  1113. vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
  1114. vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
  1115. vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
  1116. vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
  1117. vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
  1118. vcpu->arch.cpuid_entries[i].index = 0;
  1119. vcpu->arch.cpuid_entries[i].flags = 0;
  1120. vcpu->arch.cpuid_entries[i].padding[0] = 0;
  1121. vcpu->arch.cpuid_entries[i].padding[1] = 0;
  1122. vcpu->arch.cpuid_entries[i].padding[2] = 0;
  1123. }
  1124. vcpu->arch.cpuid_nent = cpuid->nent;
  1125. cpuid_fix_nx_cap(vcpu);
  1126. r = 0;
  1127. out_free:
  1128. vfree(cpuid_entries);
  1129. out:
  1130. return r;
  1131. }
  1132. static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
  1133. struct kvm_cpuid2 *cpuid,
  1134. struct kvm_cpuid_entry2 __user *entries)
  1135. {
  1136. int r;
  1137. r = -E2BIG;
  1138. if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
  1139. goto out;
  1140. r = -EFAULT;
  1141. if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
  1142. cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
  1143. goto out;
  1144. vcpu->arch.cpuid_nent = cpuid->nent;
  1145. return 0;
  1146. out:
  1147. return r;
  1148. }
  1149. static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
  1150. struct kvm_cpuid2 *cpuid,
  1151. struct kvm_cpuid_entry2 __user *entries)
  1152. {
  1153. int r;
  1154. r = -E2BIG;
  1155. if (cpuid->nent < vcpu->arch.cpuid_nent)
  1156. goto out;
  1157. r = -EFAULT;
  1158. if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
  1159. vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
  1160. goto out;
  1161. return 0;
  1162. out:
  1163. cpuid->nent = vcpu->arch.cpuid_nent;
  1164. return r;
  1165. }
  1166. static inline u32 bit(int bitno)
  1167. {
  1168. return 1 << (bitno & 31);
  1169. }
  1170. static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
  1171. u32 index)
  1172. {
  1173. entry->function = function;
  1174. entry->index = index;
  1175. cpuid_count(entry->function, entry->index,
  1176. &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
  1177. entry->flags = 0;
  1178. }
  1179. static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
  1180. u32 index, int *nent, int maxnent)
  1181. {
  1182. const u32 kvm_supported_word0_x86_features = bit(X86_FEATURE_FPU) |
  1183. bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
  1184. bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
  1185. bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
  1186. bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
  1187. bit(X86_FEATURE_SEP) | bit(X86_FEATURE_PGE) |
  1188. bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
  1189. bit(X86_FEATURE_CLFLSH) | bit(X86_FEATURE_MMX) |
  1190. bit(X86_FEATURE_FXSR) | bit(X86_FEATURE_XMM) |
  1191. bit(X86_FEATURE_XMM2) | bit(X86_FEATURE_SELFSNOOP);
  1192. const u32 kvm_supported_word1_x86_features = bit(X86_FEATURE_FPU) |
  1193. bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
  1194. bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
  1195. bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
  1196. bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
  1197. bit(X86_FEATURE_PGE) |
  1198. bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
  1199. bit(X86_FEATURE_MMX) | bit(X86_FEATURE_FXSR) |
  1200. bit(X86_FEATURE_SYSCALL) |
  1201. (bit(X86_FEATURE_NX) && is_efer_nx()) |
  1202. #ifdef CONFIG_X86_64
  1203. bit(X86_FEATURE_LM) |
  1204. #endif
  1205. bit(X86_FEATURE_MMXEXT) |
  1206. bit(X86_FEATURE_3DNOWEXT) |
  1207. bit(X86_FEATURE_3DNOW);
  1208. const u32 kvm_supported_word3_x86_features =
  1209. bit(X86_FEATURE_XMM3) | bit(X86_FEATURE_CX16);
  1210. const u32 kvm_supported_word6_x86_features =
  1211. bit(X86_FEATURE_LAHF_LM) | bit(X86_FEATURE_CMP_LEGACY);
  1212. /* all func 2 cpuid_count() should be called on the same cpu */
  1213. get_cpu();
  1214. do_cpuid_1_ent(entry, function, index);
  1215. ++*nent;
  1216. switch (function) {
  1217. case 0:
  1218. entry->eax = min(entry->eax, (u32)0xb);
  1219. break;
  1220. case 1:
  1221. entry->edx &= kvm_supported_word0_x86_features;
  1222. entry->ecx &= kvm_supported_word3_x86_features;
  1223. break;
  1224. /* function 2 entries are STATEFUL. That is, repeated cpuid commands
  1225. * may return different values. This forces us to get_cpu() before
  1226. * issuing the first command, and also to emulate this annoying behavior
  1227. * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
  1228. case 2: {
  1229. int t, times = entry->eax & 0xff;
  1230. entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
  1231. for (t = 1; t < times && *nent < maxnent; ++t) {
  1232. do_cpuid_1_ent(&entry[t], function, 0);
  1233. entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
  1234. ++*nent;
  1235. }
  1236. break;
  1237. }
  1238. /* function 4 and 0xb have additional index. */
  1239. case 4: {
  1240. int i, cache_type;
  1241. entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
  1242. /* read more entries until cache_type is zero */
  1243. for (i = 1; *nent < maxnent; ++i) {
  1244. cache_type = entry[i - 1].eax & 0x1f;
  1245. if (!cache_type)
  1246. break;
  1247. do_cpuid_1_ent(&entry[i], function, i);
  1248. entry[i].flags |=
  1249. KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
  1250. ++*nent;
  1251. }
  1252. break;
  1253. }
  1254. case 0xb: {
  1255. int i, level_type;
  1256. entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
  1257. /* read more entries until level_type is zero */
  1258. for (i = 1; *nent < maxnent; ++i) {
  1259. level_type = entry[i - 1].ecx & 0xff;
  1260. if (!level_type)
  1261. break;
  1262. do_cpuid_1_ent(&entry[i], function, i);
  1263. entry[i].flags |=
  1264. KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
  1265. ++*nent;
  1266. }
  1267. break;
  1268. }
  1269. case 0x80000000:
  1270. entry->eax = min(entry->eax, 0x8000001a);
  1271. break;
  1272. case 0x80000001:
  1273. entry->edx &= kvm_supported_word1_x86_features;
  1274. entry->ecx &= kvm_supported_word6_x86_features;
  1275. break;
  1276. }
  1277. put_cpu();
  1278. }
  1279. static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  1280. struct kvm_cpuid_entry2 __user *entries)
  1281. {
  1282. struct kvm_cpuid_entry2 *cpuid_entries;
  1283. int limit, nent = 0, r = -E2BIG;
  1284. u32 func;
  1285. if (cpuid->nent < 1)
  1286. goto out;
  1287. r = -ENOMEM;
  1288. cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
  1289. if (!cpuid_entries)
  1290. goto out;
  1291. do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
  1292. limit = cpuid_entries[0].eax;
  1293. for (func = 1; func <= limit && nent < cpuid->nent; ++func)
  1294. do_cpuid_ent(&cpuid_entries[nent], func, 0,
  1295. &nent, cpuid->nent);
  1296. r = -E2BIG;
  1297. if (nent >= cpuid->nent)
  1298. goto out_free;
  1299. do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
  1300. limit = cpuid_entries[nent - 1].eax;
  1301. for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
  1302. do_cpuid_ent(&cpuid_entries[nent], func, 0,
  1303. &nent, cpuid->nent);
  1304. r = -EFAULT;
  1305. if (copy_to_user(entries, cpuid_entries,
  1306. nent * sizeof(struct kvm_cpuid_entry2)))
  1307. goto out_free;
  1308. cpuid->nent = nent;
  1309. r = 0;
  1310. out_free:
  1311. vfree(cpuid_entries);
  1312. out:
  1313. return r;
  1314. }
  1315. static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
  1316. struct kvm_lapic_state *s)
  1317. {
  1318. vcpu_load(vcpu);
  1319. memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
  1320. vcpu_put(vcpu);
  1321. return 0;
  1322. }
  1323. static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
  1324. struct kvm_lapic_state *s)
  1325. {
  1326. vcpu_load(vcpu);
  1327. memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
  1328. kvm_apic_post_state_restore(vcpu);
  1329. vcpu_put(vcpu);
  1330. return 0;
  1331. }
  1332. static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
  1333. struct kvm_interrupt *irq)
  1334. {
  1335. if (irq->irq < 0 || irq->irq >= 256)
  1336. return -EINVAL;
  1337. if (irqchip_in_kernel(vcpu->kvm))
  1338. return -ENXIO;
  1339. vcpu_load(vcpu);
  1340. set_bit(irq->irq, vcpu->arch.irq_pending);
  1341. set_bit(irq->irq / BITS_PER_LONG, &vcpu->arch.irq_summary);
  1342. vcpu_put(vcpu);
  1343. return 0;
  1344. }
  1345. static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
  1346. struct kvm_tpr_access_ctl *tac)
  1347. {
  1348. if (tac->flags)
  1349. return -EINVAL;
  1350. vcpu->arch.tpr_access_reporting = !!tac->enabled;
  1351. return 0;
  1352. }
  1353. long kvm_arch_vcpu_ioctl(struct file *filp,
  1354. unsigned int ioctl, unsigned long arg)
  1355. {
  1356. struct kvm_vcpu *vcpu = filp->private_data;
  1357. void __user *argp = (void __user *)arg;
  1358. int r;
  1359. struct kvm_lapic_state *lapic = NULL;
  1360. switch (ioctl) {
  1361. case KVM_GET_LAPIC: {
  1362. lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
  1363. r = -ENOMEM;
  1364. if (!lapic)
  1365. goto out;
  1366. r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
  1367. if (r)
  1368. goto out;
  1369. r = -EFAULT;
  1370. if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
  1371. goto out;
  1372. r = 0;
  1373. break;
  1374. }
  1375. case KVM_SET_LAPIC: {
  1376. lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
  1377. r = -ENOMEM;
  1378. if (!lapic)
  1379. goto out;
  1380. r = -EFAULT;
  1381. if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
  1382. goto out;
  1383. r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
  1384. if (r)
  1385. goto out;
  1386. r = 0;
  1387. break;
  1388. }
  1389. case KVM_INTERRUPT: {
  1390. struct kvm_interrupt irq;
  1391. r = -EFAULT;
  1392. if (copy_from_user(&irq, argp, sizeof irq))
  1393. goto out;
  1394. r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
  1395. if (r)
  1396. goto out;
  1397. r = 0;
  1398. break;
  1399. }
  1400. case KVM_SET_CPUID: {
  1401. struct kvm_cpuid __user *cpuid_arg = argp;
  1402. struct kvm_cpuid cpuid;
  1403. r = -EFAULT;
  1404. if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
  1405. goto out;
  1406. r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
  1407. if (r)
  1408. goto out;
  1409. break;
  1410. }
  1411. case KVM_SET_CPUID2: {
  1412. struct kvm_cpuid2 __user *cpuid_arg = argp;
  1413. struct kvm_cpuid2 cpuid;
  1414. r = -EFAULT;
  1415. if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
  1416. goto out;
  1417. r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
  1418. cpuid_arg->entries);
  1419. if (r)
  1420. goto out;
  1421. break;
  1422. }
  1423. case KVM_GET_CPUID2: {
  1424. struct kvm_cpuid2 __user *cpuid_arg = argp;
  1425. struct kvm_cpuid2 cpuid;
  1426. r = -EFAULT;
  1427. if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
  1428. goto out;
  1429. r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
  1430. cpuid_arg->entries);
  1431. if (r)
  1432. goto out;
  1433. r = -EFAULT;
  1434. if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
  1435. goto out;
  1436. r = 0;
  1437. break;
  1438. }
  1439. case KVM_GET_MSRS:
  1440. r = msr_io(vcpu, argp, kvm_get_msr, 1);
  1441. break;
  1442. case KVM_SET_MSRS:
  1443. r = msr_io(vcpu, argp, do_set_msr, 0);
  1444. break;
  1445. case KVM_TPR_ACCESS_REPORTING: {
  1446. struct kvm_tpr_access_ctl tac;
  1447. r = -EFAULT;
  1448. if (copy_from_user(&tac, argp, sizeof tac))
  1449. goto out;
  1450. r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
  1451. if (r)
  1452. goto out;
  1453. r = -EFAULT;
  1454. if (copy_to_user(argp, &tac, sizeof tac))
  1455. goto out;
  1456. r = 0;
  1457. break;
  1458. };
  1459. case KVM_SET_VAPIC_ADDR: {
  1460. struct kvm_vapic_addr va;
  1461. r = -EINVAL;
  1462. if (!irqchip_in_kernel(vcpu->kvm))
  1463. goto out;
  1464. r = -EFAULT;
  1465. if (copy_from_user(&va, argp, sizeof va))
  1466. goto out;
  1467. r = 0;
  1468. kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
  1469. break;
  1470. }
  1471. default:
  1472. r = -EINVAL;
  1473. }
  1474. out:
  1475. if (lapic)
  1476. kfree(lapic);
  1477. return r;
  1478. }
  1479. static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
  1480. {
  1481. int ret;
  1482. if (addr > (unsigned int)(-3 * PAGE_SIZE))
  1483. return -1;
  1484. ret = kvm_x86_ops->set_tss_addr(kvm, addr);
  1485. return ret;
  1486. }
  1487. static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
  1488. u32 kvm_nr_mmu_pages)
  1489. {
  1490. if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
  1491. return -EINVAL;
  1492. down_write(&kvm->slots_lock);
  1493. kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
  1494. kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
  1495. up_write(&kvm->slots_lock);
  1496. return 0;
  1497. }
  1498. static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
  1499. {
  1500. return kvm->arch.n_alloc_mmu_pages;
  1501. }
  1502. gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
  1503. {
  1504. int i;
  1505. struct kvm_mem_alias *alias;
  1506. for (i = 0; i < kvm->arch.naliases; ++i) {
  1507. alias = &kvm->arch.aliases[i];
  1508. if (gfn >= alias->base_gfn
  1509. && gfn < alias->base_gfn + alias->npages)
  1510. return alias->target_gfn + gfn - alias->base_gfn;
  1511. }
  1512. return gfn;
  1513. }
  1514. /*
  1515. * Set a new alias region. Aliases map a portion of physical memory into
  1516. * another portion. This is useful for memory windows, for example the PC
  1517. * VGA region.
  1518. */
  1519. static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
  1520. struct kvm_memory_alias *alias)
  1521. {
  1522. int r, n;
  1523. struct kvm_mem_alias *p;
  1524. r = -EINVAL;
  1525. /* General sanity checks */
  1526. if (alias->memory_size & (PAGE_SIZE - 1))
  1527. goto out;
  1528. if (alias->guest_phys_addr & (PAGE_SIZE - 1))
  1529. goto out;
  1530. if (alias->slot >= KVM_ALIAS_SLOTS)
  1531. goto out;
  1532. if (alias->guest_phys_addr + alias->memory_size
  1533. < alias->guest_phys_addr)
  1534. goto out;
  1535. if (alias->target_phys_addr + alias->memory_size
  1536. < alias->target_phys_addr)
  1537. goto out;
  1538. down_write(&kvm->slots_lock);
  1539. spin_lock(&kvm->mmu_lock);
  1540. p = &kvm->arch.aliases[alias->slot];
  1541. p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
  1542. p->npages = alias->memory_size >> PAGE_SHIFT;
  1543. p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
  1544. for (n = KVM_ALIAS_SLOTS; n > 0; --n)
  1545. if (kvm->arch.aliases[n - 1].npages)
  1546. break;
  1547. kvm->arch.naliases = n;
  1548. spin_unlock(&kvm->mmu_lock);
  1549. kvm_mmu_zap_all(kvm);
  1550. up_write(&kvm->slots_lock);
  1551. return 0;
  1552. out:
  1553. return r;
  1554. }
  1555. static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
  1556. {
  1557. int r;
  1558. r = 0;
  1559. switch (chip->chip_id) {
  1560. case KVM_IRQCHIP_PIC_MASTER:
  1561. memcpy(&chip->chip.pic,
  1562. &pic_irqchip(kvm)->pics[0],
  1563. sizeof(struct kvm_pic_state));
  1564. break;
  1565. case KVM_IRQCHIP_PIC_SLAVE:
  1566. memcpy(&chip->chip.pic,
  1567. &pic_irqchip(kvm)->pics[1],
  1568. sizeof(struct kvm_pic_state));
  1569. break;
  1570. case KVM_IRQCHIP_IOAPIC:
  1571. memcpy(&chip->chip.ioapic,
  1572. ioapic_irqchip(kvm),
  1573. sizeof(struct kvm_ioapic_state));
  1574. break;
  1575. default:
  1576. r = -EINVAL;
  1577. break;
  1578. }
  1579. return r;
  1580. }
  1581. static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
  1582. {
  1583. int r;
  1584. r = 0;
  1585. switch (chip->chip_id) {
  1586. case KVM_IRQCHIP_PIC_MASTER:
  1587. memcpy(&pic_irqchip(kvm)->pics[0],
  1588. &chip->chip.pic,
  1589. sizeof(struct kvm_pic_state));
  1590. break;
  1591. case KVM_IRQCHIP_PIC_SLAVE:
  1592. memcpy(&pic_irqchip(kvm)->pics[1],
  1593. &chip->chip.pic,
  1594. sizeof(struct kvm_pic_state));
  1595. break;
  1596. case KVM_IRQCHIP_IOAPIC:
  1597. memcpy(ioapic_irqchip(kvm),
  1598. &chip->chip.ioapic,
  1599. sizeof(struct kvm_ioapic_state));
  1600. break;
  1601. default:
  1602. r = -EINVAL;
  1603. break;
  1604. }
  1605. kvm_pic_update_irq(pic_irqchip(kvm));
  1606. return r;
  1607. }
  1608. static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
  1609. {
  1610. int r = 0;
  1611. memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
  1612. return r;
  1613. }
  1614. static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
  1615. {
  1616. int r = 0;
  1617. memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
  1618. kvm_pit_load_count(kvm, 0, ps->channels[0].count);
  1619. return r;
  1620. }
  1621. /*
  1622. * Get (and clear) the dirty memory log for a memory slot.
  1623. */
  1624. int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
  1625. struct kvm_dirty_log *log)
  1626. {
  1627. int r;
  1628. int n;
  1629. struct kvm_memory_slot *memslot;
  1630. int is_dirty = 0;
  1631. down_write(&kvm->slots_lock);
  1632. r = kvm_get_dirty_log(kvm, log, &is_dirty);
  1633. if (r)
  1634. goto out;
  1635. /* If nothing is dirty, don't bother messing with page tables. */
  1636. if (is_dirty) {
  1637. kvm_mmu_slot_remove_write_access(kvm, log->slot);
  1638. kvm_flush_remote_tlbs(kvm);
  1639. memslot = &kvm->memslots[log->slot];
  1640. n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
  1641. memset(memslot->dirty_bitmap, 0, n);
  1642. }
  1643. r = 0;
  1644. out:
  1645. up_write(&kvm->slots_lock);
  1646. return r;
  1647. }
  1648. long kvm_arch_vm_ioctl(struct file *filp,
  1649. unsigned int ioctl, unsigned long arg)
  1650. {
  1651. struct kvm *kvm = filp->private_data;
  1652. void __user *argp = (void __user *)arg;
  1653. int r = -EINVAL;
  1654. /*
  1655. * This union makes it completely explicit to gcc-3.x
  1656. * that these two variables' stack usage should be
  1657. * combined, not added together.
  1658. */
  1659. union {
  1660. struct kvm_pit_state ps;
  1661. struct kvm_memory_alias alias;
  1662. } u;
  1663. switch (ioctl) {
  1664. case KVM_SET_TSS_ADDR:
  1665. r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
  1666. if (r < 0)
  1667. goto out;
  1668. break;
  1669. case KVM_SET_MEMORY_REGION: {
  1670. struct kvm_memory_region kvm_mem;
  1671. struct kvm_userspace_memory_region kvm_userspace_mem;
  1672. r = -EFAULT;
  1673. if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
  1674. goto out;
  1675. kvm_userspace_mem.slot = kvm_mem.slot;
  1676. kvm_userspace_mem.flags = kvm_mem.flags;
  1677. kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
  1678. kvm_userspace_mem.memory_size = kvm_mem.memory_size;
  1679. r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
  1680. if (r)
  1681. goto out;
  1682. break;
  1683. }
  1684. case KVM_SET_NR_MMU_PAGES:
  1685. r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
  1686. if (r)
  1687. goto out;
  1688. break;
  1689. case KVM_GET_NR_MMU_PAGES:
  1690. r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
  1691. break;
  1692. case KVM_SET_MEMORY_ALIAS:
  1693. r = -EFAULT;
  1694. if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
  1695. goto out;
  1696. r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
  1697. if (r)
  1698. goto out;
  1699. break;
  1700. case KVM_CREATE_IRQCHIP:
  1701. r = -ENOMEM;
  1702. kvm->arch.vpic = kvm_create_pic(kvm);
  1703. if (kvm->arch.vpic) {
  1704. r = kvm_ioapic_init(kvm);
  1705. if (r) {
  1706. kfree(kvm->arch.vpic);
  1707. kvm->arch.vpic = NULL;
  1708. goto out;
  1709. }
  1710. } else
  1711. goto out;
  1712. break;
  1713. case KVM_CREATE_PIT:
  1714. r = -ENOMEM;
  1715. kvm->arch.vpit = kvm_create_pit(kvm);
  1716. if (kvm->arch.vpit)
  1717. r = 0;
  1718. break;
  1719. case KVM_IRQ_LINE: {
  1720. struct kvm_irq_level irq_event;
  1721. r = -EFAULT;
  1722. if (copy_from_user(&irq_event, argp, sizeof irq_event))
  1723. goto out;
  1724. if (irqchip_in_kernel(kvm)) {
  1725. mutex_lock(&kvm->lock);
  1726. kvm_set_irq(kvm, irq_event.irq, irq_event.level);
  1727. mutex_unlock(&kvm->lock);
  1728. r = 0;
  1729. }
  1730. break;
  1731. }
  1732. case KVM_GET_IRQCHIP: {
  1733. /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
  1734. struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
  1735. r = -ENOMEM;
  1736. if (!chip)
  1737. goto out;
  1738. r = -EFAULT;
  1739. if (copy_from_user(chip, argp, sizeof *chip))
  1740. goto get_irqchip_out;
  1741. r = -ENXIO;
  1742. if (!irqchip_in_kernel(kvm))
  1743. goto get_irqchip_out;
  1744. r = kvm_vm_ioctl_get_irqchip(kvm, chip);
  1745. if (r)
  1746. goto get_irqchip_out;
  1747. r = -EFAULT;
  1748. if (copy_to_user(argp, chip, sizeof *chip))
  1749. goto get_irqchip_out;
  1750. r = 0;
  1751. get_irqchip_out:
  1752. kfree(chip);
  1753. if (r)
  1754. goto out;
  1755. break;
  1756. }
  1757. case KVM_SET_IRQCHIP: {
  1758. /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
  1759. struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
  1760. r = -ENOMEM;
  1761. if (!chip)
  1762. goto out;
  1763. r = -EFAULT;
  1764. if (copy_from_user(chip, argp, sizeof *chip))
  1765. goto set_irqchip_out;
  1766. r = -ENXIO;
  1767. if (!irqchip_in_kernel(kvm))
  1768. goto set_irqchip_out;
  1769. r = kvm_vm_ioctl_set_irqchip(kvm, chip);
  1770. if (r)
  1771. goto set_irqchip_out;
  1772. r = 0;
  1773. set_irqchip_out:
  1774. kfree(chip);
  1775. if (r)
  1776. goto out;
  1777. break;
  1778. }
  1779. case KVM_ASSIGN_PCI_DEVICE: {
  1780. struct kvm_assigned_pci_dev assigned_dev;
  1781. r = -EFAULT;
  1782. if (copy_from_user(&assigned_dev, argp, sizeof assigned_dev))
  1783. goto out;
  1784. r = kvm_vm_ioctl_assign_device(kvm, &assigned_dev);
  1785. if (r)
  1786. goto out;
  1787. break;
  1788. }
  1789. case KVM_ASSIGN_IRQ: {
  1790. struct kvm_assigned_irq assigned_irq;
  1791. r = -EFAULT;
  1792. if (copy_from_user(&assigned_irq, argp, sizeof assigned_irq))
  1793. goto out;
  1794. r = kvm_vm_ioctl_assign_irq(kvm, &assigned_irq);
  1795. if (r)
  1796. goto out;
  1797. break;
  1798. }
  1799. case KVM_GET_PIT: {
  1800. r = -EFAULT;
  1801. if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
  1802. goto out;
  1803. r = -ENXIO;
  1804. if (!kvm->arch.vpit)
  1805. goto out;
  1806. r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
  1807. if (r)
  1808. goto out;
  1809. r = -EFAULT;
  1810. if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
  1811. goto out;
  1812. r = 0;
  1813. break;
  1814. }
  1815. case KVM_SET_PIT: {
  1816. r = -EFAULT;
  1817. if (copy_from_user(&u.ps, argp, sizeof u.ps))
  1818. goto out;
  1819. r = -ENXIO;
  1820. if (!kvm->arch.vpit)
  1821. goto out;
  1822. r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
  1823. if (r)
  1824. goto out;
  1825. r = 0;
  1826. break;
  1827. }
  1828. default:
  1829. ;
  1830. }
  1831. out:
  1832. return r;
  1833. }
  1834. static void kvm_init_msr_list(void)
  1835. {
  1836. u32 dummy[2];
  1837. unsigned i, j;
  1838. for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
  1839. if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
  1840. continue;
  1841. if (j < i)
  1842. msrs_to_save[j] = msrs_to_save[i];
  1843. j++;
  1844. }
  1845. num_msrs_to_save = j;
  1846. }
  1847. /*
  1848. * Only apic need an MMIO device hook, so shortcut now..
  1849. */
  1850. static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu,
  1851. gpa_t addr, int len,
  1852. int is_write)
  1853. {
  1854. struct kvm_io_device *dev;
  1855. if (vcpu->arch.apic) {
  1856. dev = &vcpu->arch.apic->dev;
  1857. if (dev->in_range(dev, addr, len, is_write))
  1858. return dev;
  1859. }
  1860. return NULL;
  1861. }
  1862. static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
  1863. gpa_t addr, int len,
  1864. int is_write)
  1865. {
  1866. struct kvm_io_device *dev;
  1867. dev = vcpu_find_pervcpu_dev(vcpu, addr, len, is_write);
  1868. if (dev == NULL)
  1869. dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr, len,
  1870. is_write);
  1871. return dev;
  1872. }
  1873. int emulator_read_std(unsigned long addr,
  1874. void *val,
  1875. unsigned int bytes,
  1876. struct kvm_vcpu *vcpu)
  1877. {
  1878. void *data = val;
  1879. int r = X86EMUL_CONTINUE;
  1880. while (bytes) {
  1881. gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
  1882. unsigned offset = addr & (PAGE_SIZE-1);
  1883. unsigned tocopy = min(bytes, (unsigned)PAGE_SIZE - offset);
  1884. int ret;
  1885. if (gpa == UNMAPPED_GVA) {
  1886. r = X86EMUL_PROPAGATE_FAULT;
  1887. goto out;
  1888. }
  1889. ret = kvm_read_guest(vcpu->kvm, gpa, data, tocopy);
  1890. if (ret < 0) {
  1891. r = X86EMUL_UNHANDLEABLE;
  1892. goto out;
  1893. }
  1894. bytes -= tocopy;
  1895. data += tocopy;
  1896. addr += tocopy;
  1897. }
  1898. out:
  1899. return r;
  1900. }
  1901. EXPORT_SYMBOL_GPL(emulator_read_std);
  1902. static int emulator_read_emulated(unsigned long addr,
  1903. void *val,
  1904. unsigned int bytes,
  1905. struct kvm_vcpu *vcpu)
  1906. {
  1907. struct kvm_io_device *mmio_dev;
  1908. gpa_t gpa;
  1909. if (vcpu->mmio_read_completed) {
  1910. memcpy(val, vcpu->mmio_data, bytes);
  1911. vcpu->mmio_read_completed = 0;
  1912. return X86EMUL_CONTINUE;
  1913. }
  1914. gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
  1915. /* For APIC access vmexit */
  1916. if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
  1917. goto mmio;
  1918. if (emulator_read_std(addr, val, bytes, vcpu)
  1919. == X86EMUL_CONTINUE)
  1920. return X86EMUL_CONTINUE;
  1921. if (gpa == UNMAPPED_GVA)
  1922. return X86EMUL_PROPAGATE_FAULT;
  1923. mmio:
  1924. /*
  1925. * Is this MMIO handled locally?
  1926. */
  1927. mutex_lock(&vcpu->kvm->lock);
  1928. mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 0);
  1929. if (mmio_dev) {
  1930. kvm_iodevice_read(mmio_dev, gpa, bytes, val);
  1931. mutex_unlock(&vcpu->kvm->lock);
  1932. return X86EMUL_CONTINUE;
  1933. }
  1934. mutex_unlock(&vcpu->kvm->lock);
  1935. vcpu->mmio_needed = 1;
  1936. vcpu->mmio_phys_addr = gpa;
  1937. vcpu->mmio_size = bytes;
  1938. vcpu->mmio_is_write = 0;
  1939. return X86EMUL_UNHANDLEABLE;
  1940. }
  1941. int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
  1942. const void *val, int bytes)
  1943. {
  1944. int ret;
  1945. ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
  1946. if (ret < 0)
  1947. return 0;
  1948. kvm_mmu_pte_write(vcpu, gpa, val, bytes);
  1949. return 1;
  1950. }
  1951. static int emulator_write_emulated_onepage(unsigned long addr,
  1952. const void *val,
  1953. unsigned int bytes,
  1954. struct kvm_vcpu *vcpu)
  1955. {
  1956. struct kvm_io_device *mmio_dev;
  1957. gpa_t gpa;
  1958. gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
  1959. if (gpa == UNMAPPED_GVA) {
  1960. kvm_inject_page_fault(vcpu, addr, 2);
  1961. return X86EMUL_PROPAGATE_FAULT;
  1962. }
  1963. /* For APIC access vmexit */
  1964. if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
  1965. goto mmio;
  1966. if (emulator_write_phys(vcpu, gpa, val, bytes))
  1967. return X86EMUL_CONTINUE;
  1968. mmio:
  1969. /*
  1970. * Is this MMIO handled locally?
  1971. */
  1972. mutex_lock(&vcpu->kvm->lock);
  1973. mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 1);
  1974. if (mmio_dev) {
  1975. kvm_iodevice_write(mmio_dev, gpa, bytes, val);
  1976. mutex_unlock(&vcpu->kvm->lock);
  1977. return X86EMUL_CONTINUE;
  1978. }
  1979. mutex_unlock(&vcpu->kvm->lock);
  1980. vcpu->mmio_needed = 1;
  1981. vcpu->mmio_phys_addr = gpa;
  1982. vcpu->mmio_size = bytes;
  1983. vcpu->mmio_is_write = 1;
  1984. memcpy(vcpu->mmio_data, val, bytes);
  1985. return X86EMUL_CONTINUE;
  1986. }
  1987. int emulator_write_emulated(unsigned long addr,
  1988. const void *val,
  1989. unsigned int bytes,
  1990. struct kvm_vcpu *vcpu)
  1991. {
  1992. /* Crossing a page boundary? */
  1993. if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
  1994. int rc, now;
  1995. now = -addr & ~PAGE_MASK;
  1996. rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
  1997. if (rc != X86EMUL_CONTINUE)
  1998. return rc;
  1999. addr += now;
  2000. val += now;
  2001. bytes -= now;
  2002. }
  2003. return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
  2004. }
  2005. EXPORT_SYMBOL_GPL(emulator_write_emulated);
  2006. static int emulator_cmpxchg_emulated(unsigned long addr,
  2007. const void *old,
  2008. const void *new,
  2009. unsigned int bytes,
  2010. struct kvm_vcpu *vcpu)
  2011. {
  2012. static int reported;
  2013. if (!reported) {
  2014. reported = 1;
  2015. printk(KERN_WARNING "kvm: emulating exchange as write\n");
  2016. }
  2017. #ifndef CONFIG_X86_64
  2018. /* guests cmpxchg8b have to be emulated atomically */
  2019. if (bytes == 8) {
  2020. gpa_t gpa;
  2021. struct page *page;
  2022. char *kaddr;
  2023. u64 val;
  2024. gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
  2025. if (gpa == UNMAPPED_GVA ||
  2026. (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
  2027. goto emul_write;
  2028. if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
  2029. goto emul_write;
  2030. val = *(u64 *)new;
  2031. down_read(&current->mm->mmap_sem);
  2032. page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  2033. up_read(&current->mm->mmap_sem);
  2034. kaddr = kmap_atomic(page, KM_USER0);
  2035. set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
  2036. kunmap_atomic(kaddr, KM_USER0);
  2037. kvm_release_page_dirty(page);
  2038. }
  2039. emul_write:
  2040. #endif
  2041. return emulator_write_emulated(addr, new, bytes, vcpu);
  2042. }
  2043. static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
  2044. {
  2045. return kvm_x86_ops->get_segment_base(vcpu, seg);
  2046. }
  2047. int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
  2048. {
  2049. return X86EMUL_CONTINUE;
  2050. }
  2051. int emulate_clts(struct kvm_vcpu *vcpu)
  2052. {
  2053. KVMTRACE_0D(CLTS, vcpu, handler);
  2054. kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
  2055. return X86EMUL_CONTINUE;
  2056. }
  2057. int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
  2058. {
  2059. struct kvm_vcpu *vcpu = ctxt->vcpu;
  2060. switch (dr) {
  2061. case 0 ... 3:
  2062. *dest = kvm_x86_ops->get_dr(vcpu, dr);
  2063. return X86EMUL_CONTINUE;
  2064. default:
  2065. pr_unimpl(vcpu, "%s: unexpected dr %u\n", __func__, dr);
  2066. return X86EMUL_UNHANDLEABLE;
  2067. }
  2068. }
  2069. int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
  2070. {
  2071. unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
  2072. int exception;
  2073. kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
  2074. if (exception) {
  2075. /* FIXME: better handling */
  2076. return X86EMUL_UNHANDLEABLE;
  2077. }
  2078. return X86EMUL_CONTINUE;
  2079. }
  2080. void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
  2081. {
  2082. u8 opcodes[4];
  2083. unsigned long rip = kvm_rip_read(vcpu);
  2084. unsigned long rip_linear;
  2085. if (!printk_ratelimit())
  2086. return;
  2087. rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
  2088. emulator_read_std(rip_linear, (void *)opcodes, 4, vcpu);
  2089. printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
  2090. context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
  2091. }
  2092. EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
  2093. static struct x86_emulate_ops emulate_ops = {
  2094. .read_std = emulator_read_std,
  2095. .read_emulated = emulator_read_emulated,
  2096. .write_emulated = emulator_write_emulated,
  2097. .cmpxchg_emulated = emulator_cmpxchg_emulated,
  2098. };
  2099. static void cache_all_regs(struct kvm_vcpu *vcpu)
  2100. {
  2101. kvm_register_read(vcpu, VCPU_REGS_RAX);
  2102. kvm_register_read(vcpu, VCPU_REGS_RSP);
  2103. kvm_register_read(vcpu, VCPU_REGS_RIP);
  2104. vcpu->arch.regs_dirty = ~0;
  2105. }
  2106. int emulate_instruction(struct kvm_vcpu *vcpu,
  2107. struct kvm_run *run,
  2108. unsigned long cr2,
  2109. u16 error_code,
  2110. int emulation_type)
  2111. {
  2112. int r;
  2113. struct decode_cache *c;
  2114. kvm_clear_exception_queue(vcpu);
  2115. vcpu->arch.mmio_fault_cr2 = cr2;
  2116. /*
  2117. * TODO: fix x86_emulate.c to use guest_read/write_register
  2118. * instead of direct ->regs accesses, can save hundred cycles
  2119. * on Intel for instructions that don't read/change RSP, for
  2120. * for example.
  2121. */
  2122. cache_all_regs(vcpu);
  2123. vcpu->mmio_is_write = 0;
  2124. vcpu->arch.pio.string = 0;
  2125. if (!(emulation_type & EMULTYPE_NO_DECODE)) {
  2126. int cs_db, cs_l;
  2127. kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
  2128. vcpu->arch.emulate_ctxt.vcpu = vcpu;
  2129. vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
  2130. vcpu->arch.emulate_ctxt.mode =
  2131. (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
  2132. ? X86EMUL_MODE_REAL : cs_l
  2133. ? X86EMUL_MODE_PROT64 : cs_db
  2134. ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
  2135. r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
  2136. /* Reject the instructions other than VMCALL/VMMCALL when
  2137. * try to emulate invalid opcode */
  2138. c = &vcpu->arch.emulate_ctxt.decode;
  2139. if ((emulation_type & EMULTYPE_TRAP_UD) &&
  2140. (!(c->twobyte && c->b == 0x01 &&
  2141. (c->modrm_reg == 0 || c->modrm_reg == 3) &&
  2142. c->modrm_mod == 3 && c->modrm_rm == 1)))
  2143. return EMULATE_FAIL;
  2144. ++vcpu->stat.insn_emulation;
  2145. if (r) {
  2146. ++vcpu->stat.insn_emulation_fail;
  2147. if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
  2148. return EMULATE_DONE;
  2149. return EMULATE_FAIL;
  2150. }
  2151. }
  2152. r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
  2153. if (vcpu->arch.pio.string)
  2154. return EMULATE_DO_MMIO;
  2155. if ((r || vcpu->mmio_is_write) && run) {
  2156. run->exit_reason = KVM_EXIT_MMIO;
  2157. run->mmio.phys_addr = vcpu->mmio_phys_addr;
  2158. memcpy(run->mmio.data, vcpu->mmio_data, 8);
  2159. run->mmio.len = vcpu->mmio_size;
  2160. run->mmio.is_write = vcpu->mmio_is_write;
  2161. }
  2162. if (r) {
  2163. if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
  2164. return EMULATE_DONE;
  2165. if (!vcpu->mmio_needed) {
  2166. kvm_report_emulation_failure(vcpu, "mmio");
  2167. return EMULATE_FAIL;
  2168. }
  2169. return EMULATE_DO_MMIO;
  2170. }
  2171. kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
  2172. if (vcpu->mmio_is_write) {
  2173. vcpu->mmio_needed = 0;
  2174. return EMULATE_DO_MMIO;
  2175. }
  2176. return EMULATE_DONE;
  2177. }
  2178. EXPORT_SYMBOL_GPL(emulate_instruction);
  2179. static void free_pio_guest_pages(struct kvm_vcpu *vcpu)
  2180. {
  2181. int i;
  2182. for (i = 0; i < ARRAY_SIZE(vcpu->arch.pio.guest_pages); ++i)
  2183. if (vcpu->arch.pio.guest_pages[i]) {
  2184. kvm_release_page_dirty(vcpu->arch.pio.guest_pages[i]);
  2185. vcpu->arch.pio.guest_pages[i] = NULL;
  2186. }
  2187. }
  2188. static int pio_copy_data(struct kvm_vcpu *vcpu)
  2189. {
  2190. void *p = vcpu->arch.pio_data;
  2191. void *q;
  2192. unsigned bytes;
  2193. int nr_pages = vcpu->arch.pio.guest_pages[1] ? 2 : 1;
  2194. q = vmap(vcpu->arch.pio.guest_pages, nr_pages, VM_READ|VM_WRITE,
  2195. PAGE_KERNEL);
  2196. if (!q) {
  2197. free_pio_guest_pages(vcpu);
  2198. return -ENOMEM;
  2199. }
  2200. q += vcpu->arch.pio.guest_page_offset;
  2201. bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
  2202. if (vcpu->arch.pio.in)
  2203. memcpy(q, p, bytes);
  2204. else
  2205. memcpy(p, q, bytes);
  2206. q -= vcpu->arch.pio.guest_page_offset;
  2207. vunmap(q);
  2208. free_pio_guest_pages(vcpu);
  2209. return 0;
  2210. }
  2211. int complete_pio(struct kvm_vcpu *vcpu)
  2212. {
  2213. struct kvm_pio_request *io = &vcpu->arch.pio;
  2214. long delta;
  2215. int r;
  2216. unsigned long val;
  2217. if (!io->string) {
  2218. if (io->in) {
  2219. val = kvm_register_read(vcpu, VCPU_REGS_RAX);
  2220. memcpy(&val, vcpu->arch.pio_data, io->size);
  2221. kvm_register_write(vcpu, VCPU_REGS_RAX, val);
  2222. }
  2223. } else {
  2224. if (io->in) {
  2225. r = pio_copy_data(vcpu);
  2226. if (r)
  2227. return r;
  2228. }
  2229. delta = 1;
  2230. if (io->rep) {
  2231. delta *= io->cur_count;
  2232. /*
  2233. * The size of the register should really depend on
  2234. * current address size.
  2235. */
  2236. val = kvm_register_read(vcpu, VCPU_REGS_RCX);
  2237. val -= delta;
  2238. kvm_register_write(vcpu, VCPU_REGS_RCX, val);
  2239. }
  2240. if (io->down)
  2241. delta = -delta;
  2242. delta *= io->size;
  2243. if (io->in) {
  2244. val = kvm_register_read(vcpu, VCPU_REGS_RDI);
  2245. val += delta;
  2246. kvm_register_write(vcpu, VCPU_REGS_RDI, val);
  2247. } else {
  2248. val = kvm_register_read(vcpu, VCPU_REGS_RSI);
  2249. val += delta;
  2250. kvm_register_write(vcpu, VCPU_REGS_RSI, val);
  2251. }
  2252. }
  2253. io->count -= io->cur_count;
  2254. io->cur_count = 0;
  2255. return 0;
  2256. }
  2257. static void kernel_pio(struct kvm_io_device *pio_dev,
  2258. struct kvm_vcpu *vcpu,
  2259. void *pd)
  2260. {
  2261. /* TODO: String I/O for in kernel device */
  2262. mutex_lock(&vcpu->kvm->lock);
  2263. if (vcpu->arch.pio.in)
  2264. kvm_iodevice_read(pio_dev, vcpu->arch.pio.port,
  2265. vcpu->arch.pio.size,
  2266. pd);
  2267. else
  2268. kvm_iodevice_write(pio_dev, vcpu->arch.pio.port,
  2269. vcpu->arch.pio.size,
  2270. pd);
  2271. mutex_unlock(&vcpu->kvm->lock);
  2272. }
  2273. static void pio_string_write(struct kvm_io_device *pio_dev,
  2274. struct kvm_vcpu *vcpu)
  2275. {
  2276. struct kvm_pio_request *io = &vcpu->arch.pio;
  2277. void *pd = vcpu->arch.pio_data;
  2278. int i;
  2279. mutex_lock(&vcpu->kvm->lock);
  2280. for (i = 0; i < io->cur_count; i++) {
  2281. kvm_iodevice_write(pio_dev, io->port,
  2282. io->size,
  2283. pd);
  2284. pd += io->size;
  2285. }
  2286. mutex_unlock(&vcpu->kvm->lock);
  2287. }
  2288. static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu,
  2289. gpa_t addr, int len,
  2290. int is_write)
  2291. {
  2292. return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr, len, is_write);
  2293. }
  2294. int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
  2295. int size, unsigned port)
  2296. {
  2297. struct kvm_io_device *pio_dev;
  2298. unsigned long val;
  2299. vcpu->run->exit_reason = KVM_EXIT_IO;
  2300. vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
  2301. vcpu->run->io.size = vcpu->arch.pio.size = size;
  2302. vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
  2303. vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
  2304. vcpu->run->io.port = vcpu->arch.pio.port = port;
  2305. vcpu->arch.pio.in = in;
  2306. vcpu->arch.pio.string = 0;
  2307. vcpu->arch.pio.down = 0;
  2308. vcpu->arch.pio.guest_page_offset = 0;
  2309. vcpu->arch.pio.rep = 0;
  2310. if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
  2311. KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
  2312. handler);
  2313. else
  2314. KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
  2315. handler);
  2316. val = kvm_register_read(vcpu, VCPU_REGS_RAX);
  2317. memcpy(vcpu->arch.pio_data, &val, 4);
  2318. kvm_x86_ops->skip_emulated_instruction(vcpu);
  2319. pio_dev = vcpu_find_pio_dev(vcpu, port, size, !in);
  2320. if (pio_dev) {
  2321. kernel_pio(pio_dev, vcpu, vcpu->arch.pio_data);
  2322. complete_pio(vcpu);
  2323. return 1;
  2324. }
  2325. return 0;
  2326. }
  2327. EXPORT_SYMBOL_GPL(kvm_emulate_pio);
  2328. int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
  2329. int size, unsigned long count, int down,
  2330. gva_t address, int rep, unsigned port)
  2331. {
  2332. unsigned now, in_page;
  2333. int i, ret = 0;
  2334. int nr_pages = 1;
  2335. struct page *page;
  2336. struct kvm_io_device *pio_dev;
  2337. vcpu->run->exit_reason = KVM_EXIT_IO;
  2338. vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
  2339. vcpu->run->io.size = vcpu->arch.pio.size = size;
  2340. vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
  2341. vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
  2342. vcpu->run->io.port = vcpu->arch.pio.port = port;
  2343. vcpu->arch.pio.in = in;
  2344. vcpu->arch.pio.string = 1;
  2345. vcpu->arch.pio.down = down;
  2346. vcpu->arch.pio.guest_page_offset = offset_in_page(address);
  2347. vcpu->arch.pio.rep = rep;
  2348. if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
  2349. KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
  2350. handler);
  2351. else
  2352. KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
  2353. handler);
  2354. if (!count) {
  2355. kvm_x86_ops->skip_emulated_instruction(vcpu);
  2356. return 1;
  2357. }
  2358. if (!down)
  2359. in_page = PAGE_SIZE - offset_in_page(address);
  2360. else
  2361. in_page = offset_in_page(address) + size;
  2362. now = min(count, (unsigned long)in_page / size);
  2363. if (!now) {
  2364. /*
  2365. * String I/O straddles page boundary. Pin two guest pages
  2366. * so that we satisfy atomicity constraints. Do just one
  2367. * transaction to avoid complexity.
  2368. */
  2369. nr_pages = 2;
  2370. now = 1;
  2371. }
  2372. if (down) {
  2373. /*
  2374. * String I/O in reverse. Yuck. Kill the guest, fix later.
  2375. */
  2376. pr_unimpl(vcpu, "guest string pio down\n");
  2377. kvm_inject_gp(vcpu, 0);
  2378. return 1;
  2379. }
  2380. vcpu->run->io.count = now;
  2381. vcpu->arch.pio.cur_count = now;
  2382. if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
  2383. kvm_x86_ops->skip_emulated_instruction(vcpu);
  2384. for (i = 0; i < nr_pages; ++i) {
  2385. page = gva_to_page(vcpu, address + i * PAGE_SIZE);
  2386. vcpu->arch.pio.guest_pages[i] = page;
  2387. if (!page) {
  2388. kvm_inject_gp(vcpu, 0);
  2389. free_pio_guest_pages(vcpu);
  2390. return 1;
  2391. }
  2392. }
  2393. pio_dev = vcpu_find_pio_dev(vcpu, port,
  2394. vcpu->arch.pio.cur_count,
  2395. !vcpu->arch.pio.in);
  2396. if (!vcpu->arch.pio.in) {
  2397. /* string PIO write */
  2398. ret = pio_copy_data(vcpu);
  2399. if (ret >= 0 && pio_dev) {
  2400. pio_string_write(pio_dev, vcpu);
  2401. complete_pio(vcpu);
  2402. if (vcpu->arch.pio.count == 0)
  2403. ret = 1;
  2404. }
  2405. } else if (pio_dev)
  2406. pr_unimpl(vcpu, "no string pio read support yet, "
  2407. "port %x size %d count %ld\n",
  2408. port, size, count);
  2409. return ret;
  2410. }
  2411. EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
  2412. int kvm_arch_init(void *opaque)
  2413. {
  2414. int r;
  2415. struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
  2416. if (kvm_x86_ops) {
  2417. printk(KERN_ERR "kvm: already loaded the other module\n");
  2418. r = -EEXIST;
  2419. goto out;
  2420. }
  2421. if (!ops->cpu_has_kvm_support()) {
  2422. printk(KERN_ERR "kvm: no hardware support\n");
  2423. r = -EOPNOTSUPP;
  2424. goto out;
  2425. }
  2426. if (ops->disabled_by_bios()) {
  2427. printk(KERN_ERR "kvm: disabled by bios\n");
  2428. r = -EOPNOTSUPP;
  2429. goto out;
  2430. }
  2431. r = kvm_mmu_module_init();
  2432. if (r)
  2433. goto out;
  2434. kvm_init_msr_list();
  2435. kvm_x86_ops = ops;
  2436. kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
  2437. kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
  2438. kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
  2439. PT_DIRTY_MASK, PT64_NX_MASK, 0);
  2440. return 0;
  2441. out:
  2442. return r;
  2443. }
  2444. void kvm_arch_exit(void)
  2445. {
  2446. kvm_x86_ops = NULL;
  2447. kvm_mmu_module_exit();
  2448. }
  2449. int kvm_emulate_halt(struct kvm_vcpu *vcpu)
  2450. {
  2451. ++vcpu->stat.halt_exits;
  2452. KVMTRACE_0D(HLT, vcpu, handler);
  2453. if (irqchip_in_kernel(vcpu->kvm)) {
  2454. vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
  2455. up_read(&vcpu->kvm->slots_lock);
  2456. kvm_vcpu_block(vcpu);
  2457. down_read(&vcpu->kvm->slots_lock);
  2458. if (vcpu->arch.mp_state != KVM_MP_STATE_RUNNABLE)
  2459. return -EINTR;
  2460. return 1;
  2461. } else {
  2462. vcpu->run->exit_reason = KVM_EXIT_HLT;
  2463. return 0;
  2464. }
  2465. }
  2466. EXPORT_SYMBOL_GPL(kvm_emulate_halt);
  2467. static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
  2468. unsigned long a1)
  2469. {
  2470. if (is_long_mode(vcpu))
  2471. return a0;
  2472. else
  2473. return a0 | ((gpa_t)a1 << 32);
  2474. }
  2475. int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
  2476. {
  2477. unsigned long nr, a0, a1, a2, a3, ret;
  2478. int r = 1;
  2479. nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
  2480. a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
  2481. a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
  2482. a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
  2483. a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
  2484. KVMTRACE_1D(VMMCALL, vcpu, (u32)nr, handler);
  2485. if (!is_long_mode(vcpu)) {
  2486. nr &= 0xFFFFFFFF;
  2487. a0 &= 0xFFFFFFFF;
  2488. a1 &= 0xFFFFFFFF;
  2489. a2 &= 0xFFFFFFFF;
  2490. a3 &= 0xFFFFFFFF;
  2491. }
  2492. switch (nr) {
  2493. case KVM_HC_VAPIC_POLL_IRQ:
  2494. ret = 0;
  2495. break;
  2496. case KVM_HC_MMU_OP:
  2497. r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
  2498. break;
  2499. default:
  2500. ret = -KVM_ENOSYS;
  2501. break;
  2502. }
  2503. kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
  2504. ++vcpu->stat.hypercalls;
  2505. return r;
  2506. }
  2507. EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
  2508. int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
  2509. {
  2510. char instruction[3];
  2511. int ret = 0;
  2512. unsigned long rip = kvm_rip_read(vcpu);
  2513. /*
  2514. * Blow out the MMU to ensure that no other VCPU has an active mapping
  2515. * to ensure that the updated hypercall appears atomically across all
  2516. * VCPUs.
  2517. */
  2518. kvm_mmu_zap_all(vcpu->kvm);
  2519. kvm_x86_ops->patch_hypercall(vcpu, instruction);
  2520. if (emulator_write_emulated(rip, instruction, 3, vcpu)
  2521. != X86EMUL_CONTINUE)
  2522. ret = -EFAULT;
  2523. return ret;
  2524. }
  2525. static u64 mk_cr_64(u64 curr_cr, u32 new_val)
  2526. {
  2527. return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
  2528. }
  2529. void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
  2530. {
  2531. struct descriptor_table dt = { limit, base };
  2532. kvm_x86_ops->set_gdt(vcpu, &dt);
  2533. }
  2534. void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
  2535. {
  2536. struct descriptor_table dt = { limit, base };
  2537. kvm_x86_ops->set_idt(vcpu, &dt);
  2538. }
  2539. void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
  2540. unsigned long *rflags)
  2541. {
  2542. kvm_lmsw(vcpu, msw);
  2543. *rflags = kvm_x86_ops->get_rflags(vcpu);
  2544. }
  2545. unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
  2546. {
  2547. unsigned long value;
  2548. kvm_x86_ops->decache_cr4_guest_bits(vcpu);
  2549. switch (cr) {
  2550. case 0:
  2551. value = vcpu->arch.cr0;
  2552. break;
  2553. case 2:
  2554. value = vcpu->arch.cr2;
  2555. break;
  2556. case 3:
  2557. value = vcpu->arch.cr3;
  2558. break;
  2559. case 4:
  2560. value = vcpu->arch.cr4;
  2561. break;
  2562. case 8:
  2563. value = kvm_get_cr8(vcpu);
  2564. break;
  2565. default:
  2566. vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
  2567. return 0;
  2568. }
  2569. KVMTRACE_3D(CR_READ, vcpu, (u32)cr, (u32)value,
  2570. (u32)((u64)value >> 32), handler);
  2571. return value;
  2572. }
  2573. void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
  2574. unsigned long *rflags)
  2575. {
  2576. KVMTRACE_3D(CR_WRITE, vcpu, (u32)cr, (u32)val,
  2577. (u32)((u64)val >> 32), handler);
  2578. switch (cr) {
  2579. case 0:
  2580. kvm_set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
  2581. *rflags = kvm_x86_ops->get_rflags(vcpu);
  2582. break;
  2583. case 2:
  2584. vcpu->arch.cr2 = val;
  2585. break;
  2586. case 3:
  2587. kvm_set_cr3(vcpu, val);
  2588. break;
  2589. case 4:
  2590. kvm_set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
  2591. break;
  2592. case 8:
  2593. kvm_set_cr8(vcpu, val & 0xfUL);
  2594. break;
  2595. default:
  2596. vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
  2597. }
  2598. }
  2599. static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
  2600. {
  2601. struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
  2602. int j, nent = vcpu->arch.cpuid_nent;
  2603. e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
  2604. /* when no next entry is found, the current entry[i] is reselected */
  2605. for (j = i + 1; j == i; j = (j + 1) % nent) {
  2606. struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
  2607. if (ej->function == e->function) {
  2608. ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
  2609. return j;
  2610. }
  2611. }
  2612. return 0; /* silence gcc, even though control never reaches here */
  2613. }
  2614. /* find an entry with matching function, matching index (if needed), and that
  2615. * should be read next (if it's stateful) */
  2616. static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
  2617. u32 function, u32 index)
  2618. {
  2619. if (e->function != function)
  2620. return 0;
  2621. if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
  2622. return 0;
  2623. if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
  2624. !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
  2625. return 0;
  2626. return 1;
  2627. }
  2628. void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
  2629. {
  2630. int i;
  2631. u32 function, index;
  2632. struct kvm_cpuid_entry2 *e, *best;
  2633. function = kvm_register_read(vcpu, VCPU_REGS_RAX);
  2634. index = kvm_register_read(vcpu, VCPU_REGS_RCX);
  2635. kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
  2636. kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
  2637. kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
  2638. kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
  2639. best = NULL;
  2640. for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
  2641. e = &vcpu->arch.cpuid_entries[i];
  2642. if (is_matching_cpuid_entry(e, function, index)) {
  2643. if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
  2644. move_to_next_stateful_cpuid_entry(vcpu, i);
  2645. best = e;
  2646. break;
  2647. }
  2648. /*
  2649. * Both basic or both extended?
  2650. */
  2651. if (((e->function ^ function) & 0x80000000) == 0)
  2652. if (!best || e->function > best->function)
  2653. best = e;
  2654. }
  2655. if (best) {
  2656. kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
  2657. kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
  2658. kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
  2659. kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
  2660. }
  2661. kvm_x86_ops->skip_emulated_instruction(vcpu);
  2662. KVMTRACE_5D(CPUID, vcpu, function,
  2663. (u32)kvm_register_read(vcpu, VCPU_REGS_RAX),
  2664. (u32)kvm_register_read(vcpu, VCPU_REGS_RBX),
  2665. (u32)kvm_register_read(vcpu, VCPU_REGS_RCX),
  2666. (u32)kvm_register_read(vcpu, VCPU_REGS_RDX), handler);
  2667. }
  2668. EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
  2669. /*
  2670. * Check if userspace requested an interrupt window, and that the
  2671. * interrupt window is open.
  2672. *
  2673. * No need to exit to userspace if we already have an interrupt queued.
  2674. */
  2675. static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
  2676. struct kvm_run *kvm_run)
  2677. {
  2678. return (!vcpu->arch.irq_summary &&
  2679. kvm_run->request_interrupt_window &&
  2680. vcpu->arch.interrupt_window_open &&
  2681. (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF));
  2682. }
  2683. static void post_kvm_run_save(struct kvm_vcpu *vcpu,
  2684. struct kvm_run *kvm_run)
  2685. {
  2686. kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
  2687. kvm_run->cr8 = kvm_get_cr8(vcpu);
  2688. kvm_run->apic_base = kvm_get_apic_base(vcpu);
  2689. if (irqchip_in_kernel(vcpu->kvm))
  2690. kvm_run->ready_for_interrupt_injection = 1;
  2691. else
  2692. kvm_run->ready_for_interrupt_injection =
  2693. (vcpu->arch.interrupt_window_open &&
  2694. vcpu->arch.irq_summary == 0);
  2695. }
  2696. static void vapic_enter(struct kvm_vcpu *vcpu)
  2697. {
  2698. struct kvm_lapic *apic = vcpu->arch.apic;
  2699. struct page *page;
  2700. if (!apic || !apic->vapic_addr)
  2701. return;
  2702. down_read(&current->mm->mmap_sem);
  2703. page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
  2704. up_read(&current->mm->mmap_sem);
  2705. vcpu->arch.apic->vapic_page = page;
  2706. }
  2707. static void vapic_exit(struct kvm_vcpu *vcpu)
  2708. {
  2709. struct kvm_lapic *apic = vcpu->arch.apic;
  2710. if (!apic || !apic->vapic_addr)
  2711. return;
  2712. down_read(&vcpu->kvm->slots_lock);
  2713. kvm_release_page_dirty(apic->vapic_page);
  2714. mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
  2715. up_read(&vcpu->kvm->slots_lock);
  2716. }
  2717. static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
  2718. {
  2719. int r;
  2720. if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
  2721. pr_debug("vcpu %d received sipi with vector # %x\n",
  2722. vcpu->vcpu_id, vcpu->arch.sipi_vector);
  2723. kvm_lapic_reset(vcpu);
  2724. r = kvm_x86_ops->vcpu_reset(vcpu);
  2725. if (r)
  2726. return r;
  2727. vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
  2728. }
  2729. down_read(&vcpu->kvm->slots_lock);
  2730. vapic_enter(vcpu);
  2731. again:
  2732. if (vcpu->requests)
  2733. if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
  2734. kvm_mmu_unload(vcpu);
  2735. r = kvm_mmu_reload(vcpu);
  2736. if (unlikely(r))
  2737. goto out;
  2738. if (vcpu->requests) {
  2739. if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
  2740. __kvm_migrate_timers(vcpu);
  2741. if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
  2742. kvm_x86_ops->tlb_flush(vcpu);
  2743. if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
  2744. &vcpu->requests)) {
  2745. kvm_run->exit_reason = KVM_EXIT_TPR_ACCESS;
  2746. r = 0;
  2747. goto out;
  2748. }
  2749. if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
  2750. kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
  2751. r = 0;
  2752. goto out;
  2753. }
  2754. }
  2755. clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
  2756. kvm_inject_pending_timer_irqs(vcpu);
  2757. preempt_disable();
  2758. kvm_x86_ops->prepare_guest_switch(vcpu);
  2759. kvm_load_guest_fpu(vcpu);
  2760. local_irq_disable();
  2761. if (vcpu->requests || need_resched()) {
  2762. local_irq_enable();
  2763. preempt_enable();
  2764. r = 1;
  2765. goto out;
  2766. }
  2767. if (signal_pending(current)) {
  2768. local_irq_enable();
  2769. preempt_enable();
  2770. r = -EINTR;
  2771. kvm_run->exit_reason = KVM_EXIT_INTR;
  2772. ++vcpu->stat.signal_exits;
  2773. goto out;
  2774. }
  2775. if (vcpu->guest_debug.enabled)
  2776. kvm_x86_ops->guest_debug_pre(vcpu);
  2777. vcpu->guest_mode = 1;
  2778. /*
  2779. * Make sure that guest_mode assignment won't happen after
  2780. * testing the pending IRQ vector bitmap.
  2781. */
  2782. smp_wmb();
  2783. if (vcpu->arch.exception.pending)
  2784. __queue_exception(vcpu);
  2785. else if (irqchip_in_kernel(vcpu->kvm))
  2786. kvm_x86_ops->inject_pending_irq(vcpu);
  2787. else
  2788. kvm_x86_ops->inject_pending_vectors(vcpu, kvm_run);
  2789. kvm_lapic_sync_to_vapic(vcpu);
  2790. up_read(&vcpu->kvm->slots_lock);
  2791. kvm_guest_enter();
  2792. KVMTRACE_0D(VMENTRY, vcpu, entryexit);
  2793. kvm_x86_ops->run(vcpu, kvm_run);
  2794. vcpu->guest_mode = 0;
  2795. local_irq_enable();
  2796. ++vcpu->stat.exits;
  2797. /*
  2798. * We must have an instruction between local_irq_enable() and
  2799. * kvm_guest_exit(), so the timer interrupt isn't delayed by
  2800. * the interrupt shadow. The stat.exits increment will do nicely.
  2801. * But we need to prevent reordering, hence this barrier():
  2802. */
  2803. barrier();
  2804. kvm_guest_exit();
  2805. preempt_enable();
  2806. down_read(&vcpu->kvm->slots_lock);
  2807. /*
  2808. * Profile KVM exit RIPs:
  2809. */
  2810. if (unlikely(prof_on == KVM_PROFILING)) {
  2811. unsigned long rip = kvm_rip_read(vcpu);
  2812. profile_hit(KVM_PROFILING, (void *)rip);
  2813. }
  2814. if (vcpu->arch.exception.pending && kvm_x86_ops->exception_injected(vcpu))
  2815. vcpu->arch.exception.pending = false;
  2816. kvm_lapic_sync_from_vapic(vcpu);
  2817. r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
  2818. if (r > 0) {
  2819. if (dm_request_for_irq_injection(vcpu, kvm_run)) {
  2820. r = -EINTR;
  2821. kvm_run->exit_reason = KVM_EXIT_INTR;
  2822. ++vcpu->stat.request_irq_exits;
  2823. goto out;
  2824. }
  2825. if (!need_resched())
  2826. goto again;
  2827. }
  2828. out:
  2829. up_read(&vcpu->kvm->slots_lock);
  2830. if (r > 0) {
  2831. kvm_resched(vcpu);
  2832. down_read(&vcpu->kvm->slots_lock);
  2833. goto again;
  2834. }
  2835. post_kvm_run_save(vcpu, kvm_run);
  2836. vapic_exit(vcpu);
  2837. return r;
  2838. }
  2839. int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
  2840. {
  2841. int r;
  2842. sigset_t sigsaved;
  2843. vcpu_load(vcpu);
  2844. if (vcpu->sigset_active)
  2845. sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
  2846. if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
  2847. kvm_vcpu_block(vcpu);
  2848. r = -EAGAIN;
  2849. goto out;
  2850. }
  2851. /* re-sync apic's tpr */
  2852. if (!irqchip_in_kernel(vcpu->kvm))
  2853. kvm_set_cr8(vcpu, kvm_run->cr8);
  2854. if (vcpu->arch.pio.cur_count) {
  2855. r = complete_pio(vcpu);
  2856. if (r)
  2857. goto out;
  2858. }
  2859. #if CONFIG_HAS_IOMEM
  2860. if (vcpu->mmio_needed) {
  2861. memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
  2862. vcpu->mmio_read_completed = 1;
  2863. vcpu->mmio_needed = 0;
  2864. down_read(&vcpu->kvm->slots_lock);
  2865. r = emulate_instruction(vcpu, kvm_run,
  2866. vcpu->arch.mmio_fault_cr2, 0,
  2867. EMULTYPE_NO_DECODE);
  2868. up_read(&vcpu->kvm->slots_lock);
  2869. if (r == EMULATE_DO_MMIO) {
  2870. /*
  2871. * Read-modify-write. Back to userspace.
  2872. */
  2873. r = 0;
  2874. goto out;
  2875. }
  2876. }
  2877. #endif
  2878. if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
  2879. kvm_register_write(vcpu, VCPU_REGS_RAX,
  2880. kvm_run->hypercall.ret);
  2881. r = __vcpu_run(vcpu, kvm_run);
  2882. out:
  2883. if (vcpu->sigset_active)
  2884. sigprocmask(SIG_SETMASK, &sigsaved, NULL);
  2885. vcpu_put(vcpu);
  2886. return r;
  2887. }
  2888. int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
  2889. {
  2890. vcpu_load(vcpu);
  2891. regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
  2892. regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
  2893. regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
  2894. regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
  2895. regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
  2896. regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
  2897. regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
  2898. regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
  2899. #ifdef CONFIG_X86_64
  2900. regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
  2901. regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
  2902. regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
  2903. regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
  2904. regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
  2905. regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
  2906. regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
  2907. regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
  2908. #endif
  2909. regs->rip = kvm_rip_read(vcpu);
  2910. regs->rflags = kvm_x86_ops->get_rflags(vcpu);
  2911. /*
  2912. * Don't leak debug flags in case they were set for guest debugging
  2913. */
  2914. if (vcpu->guest_debug.enabled && vcpu->guest_debug.singlestep)
  2915. regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
  2916. vcpu_put(vcpu);
  2917. return 0;
  2918. }
  2919. int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
  2920. {
  2921. vcpu_load(vcpu);
  2922. kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
  2923. kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
  2924. kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
  2925. kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
  2926. kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
  2927. kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
  2928. kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
  2929. kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
  2930. #ifdef CONFIG_X86_64
  2931. kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
  2932. kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
  2933. kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
  2934. kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
  2935. kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
  2936. kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
  2937. kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
  2938. kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
  2939. #endif
  2940. kvm_rip_write(vcpu, regs->rip);
  2941. kvm_x86_ops->set_rflags(vcpu, regs->rflags);
  2942. vcpu->arch.exception.pending = false;
  2943. vcpu_put(vcpu);
  2944. return 0;
  2945. }
  2946. void kvm_get_segment(struct kvm_vcpu *vcpu,
  2947. struct kvm_segment *var, int seg)
  2948. {
  2949. kvm_x86_ops->get_segment(vcpu, var, seg);
  2950. }
  2951. void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
  2952. {
  2953. struct kvm_segment cs;
  2954. kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
  2955. *db = cs.db;
  2956. *l = cs.l;
  2957. }
  2958. EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
  2959. int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
  2960. struct kvm_sregs *sregs)
  2961. {
  2962. struct descriptor_table dt;
  2963. int pending_vec;
  2964. vcpu_load(vcpu);
  2965. kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
  2966. kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
  2967. kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
  2968. kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
  2969. kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
  2970. kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
  2971. kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
  2972. kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
  2973. kvm_x86_ops->get_idt(vcpu, &dt);
  2974. sregs->idt.limit = dt.limit;
  2975. sregs->idt.base = dt.base;
  2976. kvm_x86_ops->get_gdt(vcpu, &dt);
  2977. sregs->gdt.limit = dt.limit;
  2978. sregs->gdt.base = dt.base;
  2979. kvm_x86_ops->decache_cr4_guest_bits(vcpu);
  2980. sregs->cr0 = vcpu->arch.cr0;
  2981. sregs->cr2 = vcpu->arch.cr2;
  2982. sregs->cr3 = vcpu->arch.cr3;
  2983. sregs->cr4 = vcpu->arch.cr4;
  2984. sregs->cr8 = kvm_get_cr8(vcpu);
  2985. sregs->efer = vcpu->arch.shadow_efer;
  2986. sregs->apic_base = kvm_get_apic_base(vcpu);
  2987. if (irqchip_in_kernel(vcpu->kvm)) {
  2988. memset(sregs->interrupt_bitmap, 0,
  2989. sizeof sregs->interrupt_bitmap);
  2990. pending_vec = kvm_x86_ops->get_irq(vcpu);
  2991. if (pending_vec >= 0)
  2992. set_bit(pending_vec,
  2993. (unsigned long *)sregs->interrupt_bitmap);
  2994. } else
  2995. memcpy(sregs->interrupt_bitmap, vcpu->arch.irq_pending,
  2996. sizeof sregs->interrupt_bitmap);
  2997. vcpu_put(vcpu);
  2998. return 0;
  2999. }
  3000. int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
  3001. struct kvm_mp_state *mp_state)
  3002. {
  3003. vcpu_load(vcpu);
  3004. mp_state->mp_state = vcpu->arch.mp_state;
  3005. vcpu_put(vcpu);
  3006. return 0;
  3007. }
  3008. int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
  3009. struct kvm_mp_state *mp_state)
  3010. {
  3011. vcpu_load(vcpu);
  3012. vcpu->arch.mp_state = mp_state->mp_state;
  3013. vcpu_put(vcpu);
  3014. return 0;
  3015. }
  3016. static void kvm_set_segment(struct kvm_vcpu *vcpu,
  3017. struct kvm_segment *var, int seg)
  3018. {
  3019. kvm_x86_ops->set_segment(vcpu, var, seg);
  3020. }
  3021. static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector,
  3022. struct kvm_segment *kvm_desct)
  3023. {
  3024. kvm_desct->base = seg_desc->base0;
  3025. kvm_desct->base |= seg_desc->base1 << 16;
  3026. kvm_desct->base |= seg_desc->base2 << 24;
  3027. kvm_desct->limit = seg_desc->limit0;
  3028. kvm_desct->limit |= seg_desc->limit << 16;
  3029. if (seg_desc->g) {
  3030. kvm_desct->limit <<= 12;
  3031. kvm_desct->limit |= 0xfff;
  3032. }
  3033. kvm_desct->selector = selector;
  3034. kvm_desct->type = seg_desc->type;
  3035. kvm_desct->present = seg_desc->p;
  3036. kvm_desct->dpl = seg_desc->dpl;
  3037. kvm_desct->db = seg_desc->d;
  3038. kvm_desct->s = seg_desc->s;
  3039. kvm_desct->l = seg_desc->l;
  3040. kvm_desct->g = seg_desc->g;
  3041. kvm_desct->avl = seg_desc->avl;
  3042. if (!selector)
  3043. kvm_desct->unusable = 1;
  3044. else
  3045. kvm_desct->unusable = 0;
  3046. kvm_desct->padding = 0;
  3047. }
  3048. static void get_segment_descritptor_dtable(struct kvm_vcpu *vcpu,
  3049. u16 selector,
  3050. struct descriptor_table *dtable)
  3051. {
  3052. if (selector & 1 << 2) {
  3053. struct kvm_segment kvm_seg;
  3054. kvm_get_segment(vcpu, &kvm_seg, VCPU_SREG_LDTR);
  3055. if (kvm_seg.unusable)
  3056. dtable->limit = 0;
  3057. else
  3058. dtable->limit = kvm_seg.limit;
  3059. dtable->base = kvm_seg.base;
  3060. }
  3061. else
  3062. kvm_x86_ops->get_gdt(vcpu, dtable);
  3063. }
  3064. /* allowed just for 8 bytes segments */
  3065. static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
  3066. struct desc_struct *seg_desc)
  3067. {
  3068. gpa_t gpa;
  3069. struct descriptor_table dtable;
  3070. u16 index = selector >> 3;
  3071. get_segment_descritptor_dtable(vcpu, selector, &dtable);
  3072. if (dtable.limit < index * 8 + 7) {
  3073. kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
  3074. return 1;
  3075. }
  3076. gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
  3077. gpa += index * 8;
  3078. return kvm_read_guest(vcpu->kvm, gpa, seg_desc, 8);
  3079. }
  3080. /* allowed just for 8 bytes segments */
  3081. static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
  3082. struct desc_struct *seg_desc)
  3083. {
  3084. gpa_t gpa;
  3085. struct descriptor_table dtable;
  3086. u16 index = selector >> 3;
  3087. get_segment_descritptor_dtable(vcpu, selector, &dtable);
  3088. if (dtable.limit < index * 8 + 7)
  3089. return 1;
  3090. gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
  3091. gpa += index * 8;
  3092. return kvm_write_guest(vcpu->kvm, gpa, seg_desc, 8);
  3093. }
  3094. static u32 get_tss_base_addr(struct kvm_vcpu *vcpu,
  3095. struct desc_struct *seg_desc)
  3096. {
  3097. u32 base_addr;
  3098. base_addr = seg_desc->base0;
  3099. base_addr |= (seg_desc->base1 << 16);
  3100. base_addr |= (seg_desc->base2 << 24);
  3101. return vcpu->arch.mmu.gva_to_gpa(vcpu, base_addr);
  3102. }
  3103. static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
  3104. {
  3105. struct kvm_segment kvm_seg;
  3106. kvm_get_segment(vcpu, &kvm_seg, seg);
  3107. return kvm_seg.selector;
  3108. }
  3109. static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu *vcpu,
  3110. u16 selector,
  3111. struct kvm_segment *kvm_seg)
  3112. {
  3113. struct desc_struct seg_desc;
  3114. if (load_guest_segment_descriptor(vcpu, selector, &seg_desc))
  3115. return 1;
  3116. seg_desct_to_kvm_desct(&seg_desc, selector, kvm_seg);
  3117. return 0;
  3118. }
  3119. int kvm_load_realmode_segment(struct kvm_vcpu *vcpu, u16 selector, int seg)
  3120. {
  3121. struct kvm_segment segvar = {
  3122. .base = selector << 4,
  3123. .limit = 0xffff,
  3124. .selector = selector,
  3125. .type = 3,
  3126. .present = 1,
  3127. .dpl = 3,
  3128. .db = 0,
  3129. .s = 1,
  3130. .l = 0,
  3131. .g = 0,
  3132. .avl = 0,
  3133. .unusable = 0,
  3134. };
  3135. kvm_x86_ops->set_segment(vcpu, &segvar, seg);
  3136. return 0;
  3137. }
  3138. int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
  3139. int type_bits, int seg)
  3140. {
  3141. struct kvm_segment kvm_seg;
  3142. if (!(vcpu->arch.cr0 & X86_CR0_PE))
  3143. return kvm_load_realmode_segment(vcpu, selector, seg);
  3144. if (load_segment_descriptor_to_kvm_desct(vcpu, selector, &kvm_seg))
  3145. return 1;
  3146. kvm_seg.type |= type_bits;
  3147. if (seg != VCPU_SREG_SS && seg != VCPU_SREG_CS &&
  3148. seg != VCPU_SREG_LDTR)
  3149. if (!kvm_seg.s)
  3150. kvm_seg.unusable = 1;
  3151. kvm_set_segment(vcpu, &kvm_seg, seg);
  3152. return 0;
  3153. }
  3154. static void save_state_to_tss32(struct kvm_vcpu *vcpu,
  3155. struct tss_segment_32 *tss)
  3156. {
  3157. tss->cr3 = vcpu->arch.cr3;
  3158. tss->eip = kvm_rip_read(vcpu);
  3159. tss->eflags = kvm_x86_ops->get_rflags(vcpu);
  3160. tss->eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
  3161. tss->ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
  3162. tss->edx = kvm_register_read(vcpu, VCPU_REGS_RDX);
  3163. tss->ebx = kvm_register_read(vcpu, VCPU_REGS_RBX);
  3164. tss->esp = kvm_register_read(vcpu, VCPU_REGS_RSP);
  3165. tss->ebp = kvm_register_read(vcpu, VCPU_REGS_RBP);
  3166. tss->esi = kvm_register_read(vcpu, VCPU_REGS_RSI);
  3167. tss->edi = kvm_register_read(vcpu, VCPU_REGS_RDI);
  3168. tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
  3169. tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
  3170. tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
  3171. tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
  3172. tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS);
  3173. tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS);
  3174. tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
  3175. tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
  3176. }
  3177. static int load_state_from_tss32(struct kvm_vcpu *vcpu,
  3178. struct tss_segment_32 *tss)
  3179. {
  3180. kvm_set_cr3(vcpu, tss->cr3);
  3181. kvm_rip_write(vcpu, tss->eip);
  3182. kvm_x86_ops->set_rflags(vcpu, tss->eflags | 2);
  3183. kvm_register_write(vcpu, VCPU_REGS_RAX, tss->eax);
  3184. kvm_register_write(vcpu, VCPU_REGS_RCX, tss->ecx);
  3185. kvm_register_write(vcpu, VCPU_REGS_RDX, tss->edx);
  3186. kvm_register_write(vcpu, VCPU_REGS_RBX, tss->ebx);
  3187. kvm_register_write(vcpu, VCPU_REGS_RSP, tss->esp);
  3188. kvm_register_write(vcpu, VCPU_REGS_RBP, tss->ebp);
  3189. kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi);
  3190. kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi);
  3191. if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, 0, VCPU_SREG_LDTR))
  3192. return 1;
  3193. if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
  3194. return 1;
  3195. if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
  3196. return 1;
  3197. if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
  3198. return 1;
  3199. if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
  3200. return 1;
  3201. if (kvm_load_segment_descriptor(vcpu, tss->fs, 1, VCPU_SREG_FS))
  3202. return 1;
  3203. if (kvm_load_segment_descriptor(vcpu, tss->gs, 1, VCPU_SREG_GS))
  3204. return 1;
  3205. return 0;
  3206. }
  3207. static void save_state_to_tss16(struct kvm_vcpu *vcpu,
  3208. struct tss_segment_16 *tss)
  3209. {
  3210. tss->ip = kvm_rip_read(vcpu);
  3211. tss->flag = kvm_x86_ops->get_rflags(vcpu);
  3212. tss->ax = kvm_register_read(vcpu, VCPU_REGS_RAX);
  3213. tss->cx = kvm_register_read(vcpu, VCPU_REGS_RCX);
  3214. tss->dx = kvm_register_read(vcpu, VCPU_REGS_RDX);
  3215. tss->bx = kvm_register_read(vcpu, VCPU_REGS_RBX);
  3216. tss->sp = kvm_register_read(vcpu, VCPU_REGS_RSP);
  3217. tss->bp = kvm_register_read(vcpu, VCPU_REGS_RBP);
  3218. tss->si = kvm_register_read(vcpu, VCPU_REGS_RSI);
  3219. tss->di = kvm_register_read(vcpu, VCPU_REGS_RDI);
  3220. tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
  3221. tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
  3222. tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
  3223. tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
  3224. tss->ldt = get_segment_selector(vcpu, VCPU_SREG_LDTR);
  3225. tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
  3226. }
  3227. static int load_state_from_tss16(struct kvm_vcpu *vcpu,
  3228. struct tss_segment_16 *tss)
  3229. {
  3230. kvm_rip_write(vcpu, tss->ip);
  3231. kvm_x86_ops->set_rflags(vcpu, tss->flag | 2);
  3232. kvm_register_write(vcpu, VCPU_REGS_RAX, tss->ax);
  3233. kvm_register_write(vcpu, VCPU_REGS_RCX, tss->cx);
  3234. kvm_register_write(vcpu, VCPU_REGS_RDX, tss->dx);
  3235. kvm_register_write(vcpu, VCPU_REGS_RBX, tss->bx);
  3236. kvm_register_write(vcpu, VCPU_REGS_RSP, tss->sp);
  3237. kvm_register_write(vcpu, VCPU_REGS_RBP, tss->bp);
  3238. kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si);
  3239. kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di);
  3240. if (kvm_load_segment_descriptor(vcpu, tss->ldt, 0, VCPU_SREG_LDTR))
  3241. return 1;
  3242. if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
  3243. return 1;
  3244. if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
  3245. return 1;
  3246. if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
  3247. return 1;
  3248. if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
  3249. return 1;
  3250. return 0;
  3251. }
  3252. static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
  3253. u32 old_tss_base,
  3254. struct desc_struct *nseg_desc)
  3255. {
  3256. struct tss_segment_16 tss_segment_16;
  3257. int ret = 0;
  3258. if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
  3259. sizeof tss_segment_16))
  3260. goto out;
  3261. save_state_to_tss16(vcpu, &tss_segment_16);
  3262. if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
  3263. sizeof tss_segment_16))
  3264. goto out;
  3265. if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
  3266. &tss_segment_16, sizeof tss_segment_16))
  3267. goto out;
  3268. if (load_state_from_tss16(vcpu, &tss_segment_16))
  3269. goto out;
  3270. ret = 1;
  3271. out:
  3272. return ret;
  3273. }
  3274. static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
  3275. u32 old_tss_base,
  3276. struct desc_struct *nseg_desc)
  3277. {
  3278. struct tss_segment_32 tss_segment_32;
  3279. int ret = 0;
  3280. if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
  3281. sizeof tss_segment_32))
  3282. goto out;
  3283. save_state_to_tss32(vcpu, &tss_segment_32);
  3284. if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
  3285. sizeof tss_segment_32))
  3286. goto out;
  3287. if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
  3288. &tss_segment_32, sizeof tss_segment_32))
  3289. goto out;
  3290. if (load_state_from_tss32(vcpu, &tss_segment_32))
  3291. goto out;
  3292. ret = 1;
  3293. out:
  3294. return ret;
  3295. }
  3296. int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
  3297. {
  3298. struct kvm_segment tr_seg;
  3299. struct desc_struct cseg_desc;
  3300. struct desc_struct nseg_desc;
  3301. int ret = 0;
  3302. u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR);
  3303. u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR);
  3304. old_tss_base = vcpu->arch.mmu.gva_to_gpa(vcpu, old_tss_base);
  3305. /* FIXME: Handle errors. Failure to read either TSS or their
  3306. * descriptors should generate a pagefault.
  3307. */
  3308. if (load_guest_segment_descriptor(vcpu, tss_selector, &nseg_desc))
  3309. goto out;
  3310. if (load_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc))
  3311. goto out;
  3312. if (reason != TASK_SWITCH_IRET) {
  3313. int cpl;
  3314. cpl = kvm_x86_ops->get_cpl(vcpu);
  3315. if ((tss_selector & 3) > nseg_desc.dpl || cpl > nseg_desc.dpl) {
  3316. kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
  3317. return 1;
  3318. }
  3319. }
  3320. if (!nseg_desc.p || (nseg_desc.limit0 | nseg_desc.limit << 16) < 0x67) {
  3321. kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc);
  3322. return 1;
  3323. }
  3324. if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) {
  3325. cseg_desc.type &= ~(1 << 1); //clear the B flag
  3326. save_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc);
  3327. }
  3328. if (reason == TASK_SWITCH_IRET) {
  3329. u32 eflags = kvm_x86_ops->get_rflags(vcpu);
  3330. kvm_x86_ops->set_rflags(vcpu, eflags & ~X86_EFLAGS_NT);
  3331. }
  3332. kvm_x86_ops->skip_emulated_instruction(vcpu);
  3333. if (nseg_desc.type & 8)
  3334. ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_base,
  3335. &nseg_desc);
  3336. else
  3337. ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_base,
  3338. &nseg_desc);
  3339. if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) {
  3340. u32 eflags = kvm_x86_ops->get_rflags(vcpu);
  3341. kvm_x86_ops->set_rflags(vcpu, eflags | X86_EFLAGS_NT);
  3342. }
  3343. if (reason != TASK_SWITCH_IRET) {
  3344. nseg_desc.type |= (1 << 1);
  3345. save_guest_segment_descriptor(vcpu, tss_selector,
  3346. &nseg_desc);
  3347. }
  3348. kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 | X86_CR0_TS);
  3349. seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg);
  3350. tr_seg.type = 11;
  3351. kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR);
  3352. out:
  3353. return ret;
  3354. }
  3355. EXPORT_SYMBOL_GPL(kvm_task_switch);
  3356. int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
  3357. struct kvm_sregs *sregs)
  3358. {
  3359. int mmu_reset_needed = 0;
  3360. int i, pending_vec, max_bits;
  3361. struct descriptor_table dt;
  3362. vcpu_load(vcpu);
  3363. dt.limit = sregs->idt.limit;
  3364. dt.base = sregs->idt.base;
  3365. kvm_x86_ops->set_idt(vcpu, &dt);
  3366. dt.limit = sregs->gdt.limit;
  3367. dt.base = sregs->gdt.base;
  3368. kvm_x86_ops->set_gdt(vcpu, &dt);
  3369. vcpu->arch.cr2 = sregs->cr2;
  3370. mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
  3371. vcpu->arch.cr3 = sregs->cr3;
  3372. kvm_set_cr8(vcpu, sregs->cr8);
  3373. mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
  3374. kvm_x86_ops->set_efer(vcpu, sregs->efer);
  3375. kvm_set_apic_base(vcpu, sregs->apic_base);
  3376. kvm_x86_ops->decache_cr4_guest_bits(vcpu);
  3377. mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
  3378. kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
  3379. vcpu->arch.cr0 = sregs->cr0;
  3380. mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
  3381. kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
  3382. if (!is_long_mode(vcpu) && is_pae(vcpu))
  3383. load_pdptrs(vcpu, vcpu->arch.cr3);
  3384. if (mmu_reset_needed)
  3385. kvm_mmu_reset_context(vcpu);
  3386. if (!irqchip_in_kernel(vcpu->kvm)) {
  3387. memcpy(vcpu->arch.irq_pending, sregs->interrupt_bitmap,
  3388. sizeof vcpu->arch.irq_pending);
  3389. vcpu->arch.irq_summary = 0;
  3390. for (i = 0; i < ARRAY_SIZE(vcpu->arch.irq_pending); ++i)
  3391. if (vcpu->arch.irq_pending[i])
  3392. __set_bit(i, &vcpu->arch.irq_summary);
  3393. } else {
  3394. max_bits = (sizeof sregs->interrupt_bitmap) << 3;
  3395. pending_vec = find_first_bit(
  3396. (const unsigned long *)sregs->interrupt_bitmap,
  3397. max_bits);
  3398. /* Only pending external irq is handled here */
  3399. if (pending_vec < max_bits) {
  3400. kvm_x86_ops->set_irq(vcpu, pending_vec);
  3401. pr_debug("Set back pending irq %d\n",
  3402. pending_vec);
  3403. }
  3404. }
  3405. kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
  3406. kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
  3407. kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
  3408. kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
  3409. kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
  3410. kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
  3411. kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
  3412. kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
  3413. vcpu_put(vcpu);
  3414. return 0;
  3415. }
  3416. int kvm_arch_vcpu_ioctl_debug_guest(struct kvm_vcpu *vcpu,
  3417. struct kvm_debug_guest *dbg)
  3418. {
  3419. int r;
  3420. vcpu_load(vcpu);
  3421. r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
  3422. vcpu_put(vcpu);
  3423. return r;
  3424. }
  3425. /*
  3426. * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
  3427. * we have asm/x86/processor.h
  3428. */
  3429. struct fxsave {
  3430. u16 cwd;
  3431. u16 swd;
  3432. u16 twd;
  3433. u16 fop;
  3434. u64 rip;
  3435. u64 rdp;
  3436. u32 mxcsr;
  3437. u32 mxcsr_mask;
  3438. u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
  3439. #ifdef CONFIG_X86_64
  3440. u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
  3441. #else
  3442. u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
  3443. #endif
  3444. };
  3445. /*
  3446. * Translate a guest virtual address to a guest physical address.
  3447. */
  3448. int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
  3449. struct kvm_translation *tr)
  3450. {
  3451. unsigned long vaddr = tr->linear_address;
  3452. gpa_t gpa;
  3453. vcpu_load(vcpu);
  3454. down_read(&vcpu->kvm->slots_lock);
  3455. gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
  3456. up_read(&vcpu->kvm->slots_lock);
  3457. tr->physical_address = gpa;
  3458. tr->valid = gpa != UNMAPPED_GVA;
  3459. tr->writeable = 1;
  3460. tr->usermode = 0;
  3461. vcpu_put(vcpu);
  3462. return 0;
  3463. }
  3464. int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
  3465. {
  3466. struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
  3467. vcpu_load(vcpu);
  3468. memcpy(fpu->fpr, fxsave->st_space, 128);
  3469. fpu->fcw = fxsave->cwd;
  3470. fpu->fsw = fxsave->swd;
  3471. fpu->ftwx = fxsave->twd;
  3472. fpu->last_opcode = fxsave->fop;
  3473. fpu->last_ip = fxsave->rip;
  3474. fpu->last_dp = fxsave->rdp;
  3475. memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
  3476. vcpu_put(vcpu);
  3477. return 0;
  3478. }
  3479. int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
  3480. {
  3481. struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
  3482. vcpu_load(vcpu);
  3483. memcpy(fxsave->st_space, fpu->fpr, 128);
  3484. fxsave->cwd = fpu->fcw;
  3485. fxsave->swd = fpu->fsw;
  3486. fxsave->twd = fpu->ftwx;
  3487. fxsave->fop = fpu->last_opcode;
  3488. fxsave->rip = fpu->last_ip;
  3489. fxsave->rdp = fpu->last_dp;
  3490. memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
  3491. vcpu_put(vcpu);
  3492. return 0;
  3493. }
  3494. void fx_init(struct kvm_vcpu *vcpu)
  3495. {
  3496. unsigned after_mxcsr_mask;
  3497. /*
  3498. * Touch the fpu the first time in non atomic context as if
  3499. * this is the first fpu instruction the exception handler
  3500. * will fire before the instruction returns and it'll have to
  3501. * allocate ram with GFP_KERNEL.
  3502. */
  3503. if (!used_math())
  3504. kvm_fx_save(&vcpu->arch.host_fx_image);
  3505. /* Initialize guest FPU by resetting ours and saving into guest's */
  3506. preempt_disable();
  3507. kvm_fx_save(&vcpu->arch.host_fx_image);
  3508. kvm_fx_finit();
  3509. kvm_fx_save(&vcpu->arch.guest_fx_image);
  3510. kvm_fx_restore(&vcpu->arch.host_fx_image);
  3511. preempt_enable();
  3512. vcpu->arch.cr0 |= X86_CR0_ET;
  3513. after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
  3514. vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
  3515. memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
  3516. 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
  3517. }
  3518. EXPORT_SYMBOL_GPL(fx_init);
  3519. void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
  3520. {
  3521. if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
  3522. return;
  3523. vcpu->guest_fpu_loaded = 1;
  3524. kvm_fx_save(&vcpu->arch.host_fx_image);
  3525. kvm_fx_restore(&vcpu->arch.guest_fx_image);
  3526. }
  3527. EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
  3528. void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
  3529. {
  3530. if (!vcpu->guest_fpu_loaded)
  3531. return;
  3532. vcpu->guest_fpu_loaded = 0;
  3533. kvm_fx_save(&vcpu->arch.guest_fx_image);
  3534. kvm_fx_restore(&vcpu->arch.host_fx_image);
  3535. ++vcpu->stat.fpu_reload;
  3536. }
  3537. EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
  3538. void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
  3539. {
  3540. kvm_x86_ops->vcpu_free(vcpu);
  3541. }
  3542. struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
  3543. unsigned int id)
  3544. {
  3545. return kvm_x86_ops->vcpu_create(kvm, id);
  3546. }
  3547. int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
  3548. {
  3549. int r;
  3550. /* We do fxsave: this must be aligned. */
  3551. BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
  3552. vcpu_load(vcpu);
  3553. r = kvm_arch_vcpu_reset(vcpu);
  3554. if (r == 0)
  3555. r = kvm_mmu_setup(vcpu);
  3556. vcpu_put(vcpu);
  3557. if (r < 0)
  3558. goto free_vcpu;
  3559. return 0;
  3560. free_vcpu:
  3561. kvm_x86_ops->vcpu_free(vcpu);
  3562. return r;
  3563. }
  3564. void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
  3565. {
  3566. vcpu_load(vcpu);
  3567. kvm_mmu_unload(vcpu);
  3568. vcpu_put(vcpu);
  3569. kvm_x86_ops->vcpu_free(vcpu);
  3570. }
  3571. int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
  3572. {
  3573. return kvm_x86_ops->vcpu_reset(vcpu);
  3574. }
  3575. void kvm_arch_hardware_enable(void *garbage)
  3576. {
  3577. kvm_x86_ops->hardware_enable(garbage);
  3578. }
  3579. void kvm_arch_hardware_disable(void *garbage)
  3580. {
  3581. kvm_x86_ops->hardware_disable(garbage);
  3582. }
  3583. int kvm_arch_hardware_setup(void)
  3584. {
  3585. return kvm_x86_ops->hardware_setup();
  3586. }
  3587. void kvm_arch_hardware_unsetup(void)
  3588. {
  3589. kvm_x86_ops->hardware_unsetup();
  3590. }
  3591. void kvm_arch_check_processor_compat(void *rtn)
  3592. {
  3593. kvm_x86_ops->check_processor_compatibility(rtn);
  3594. }
  3595. int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
  3596. {
  3597. struct page *page;
  3598. struct kvm *kvm;
  3599. int r;
  3600. BUG_ON(vcpu->kvm == NULL);
  3601. kvm = vcpu->kvm;
  3602. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  3603. if (!irqchip_in_kernel(kvm) || vcpu->vcpu_id == 0)
  3604. vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
  3605. else
  3606. vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
  3607. page = alloc_page(GFP_KERNEL | __GFP_ZERO);
  3608. if (!page) {
  3609. r = -ENOMEM;
  3610. goto fail;
  3611. }
  3612. vcpu->arch.pio_data = page_address(page);
  3613. r = kvm_mmu_create(vcpu);
  3614. if (r < 0)
  3615. goto fail_free_pio_data;
  3616. if (irqchip_in_kernel(kvm)) {
  3617. r = kvm_create_lapic(vcpu);
  3618. if (r < 0)
  3619. goto fail_mmu_destroy;
  3620. }
  3621. return 0;
  3622. fail_mmu_destroy:
  3623. kvm_mmu_destroy(vcpu);
  3624. fail_free_pio_data:
  3625. free_page((unsigned long)vcpu->arch.pio_data);
  3626. fail:
  3627. return r;
  3628. }
  3629. void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
  3630. {
  3631. kvm_free_lapic(vcpu);
  3632. down_read(&vcpu->kvm->slots_lock);
  3633. kvm_mmu_destroy(vcpu);
  3634. up_read(&vcpu->kvm->slots_lock);
  3635. free_page((unsigned long)vcpu->arch.pio_data);
  3636. }
  3637. struct kvm *kvm_arch_create_vm(void)
  3638. {
  3639. struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
  3640. if (!kvm)
  3641. return ERR_PTR(-ENOMEM);
  3642. INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
  3643. INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
  3644. return kvm;
  3645. }
  3646. static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
  3647. {
  3648. vcpu_load(vcpu);
  3649. kvm_mmu_unload(vcpu);
  3650. vcpu_put(vcpu);
  3651. }
  3652. static void kvm_free_vcpus(struct kvm *kvm)
  3653. {
  3654. unsigned int i;
  3655. /*
  3656. * Unpin any mmu pages first.
  3657. */
  3658. for (i = 0; i < KVM_MAX_VCPUS; ++i)
  3659. if (kvm->vcpus[i])
  3660. kvm_unload_vcpu_mmu(kvm->vcpus[i]);
  3661. for (i = 0; i < KVM_MAX_VCPUS; ++i) {
  3662. if (kvm->vcpus[i]) {
  3663. kvm_arch_vcpu_free(kvm->vcpus[i]);
  3664. kvm->vcpus[i] = NULL;
  3665. }
  3666. }
  3667. }
  3668. void kvm_arch_destroy_vm(struct kvm *kvm)
  3669. {
  3670. kvm_free_assigned_devices(kvm);
  3671. kvm_free_pit(kvm);
  3672. kfree(kvm->arch.vpic);
  3673. kfree(kvm->arch.vioapic);
  3674. kvm_free_vcpus(kvm);
  3675. kvm_free_physmem(kvm);
  3676. if (kvm->arch.apic_access_page)
  3677. put_page(kvm->arch.apic_access_page);
  3678. if (kvm->arch.ept_identity_pagetable)
  3679. put_page(kvm->arch.ept_identity_pagetable);
  3680. kfree(kvm);
  3681. }
  3682. int kvm_arch_set_memory_region(struct kvm *kvm,
  3683. struct kvm_userspace_memory_region *mem,
  3684. struct kvm_memory_slot old,
  3685. int user_alloc)
  3686. {
  3687. int npages = mem->memory_size >> PAGE_SHIFT;
  3688. struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
  3689. /*To keep backward compatibility with older userspace,
  3690. *x86 needs to hanlde !user_alloc case.
  3691. */
  3692. if (!user_alloc) {
  3693. if (npages && !old.rmap) {
  3694. unsigned long userspace_addr;
  3695. down_write(&current->mm->mmap_sem);
  3696. userspace_addr = do_mmap(NULL, 0,
  3697. npages * PAGE_SIZE,
  3698. PROT_READ | PROT_WRITE,
  3699. MAP_PRIVATE | MAP_ANONYMOUS,
  3700. 0);
  3701. up_write(&current->mm->mmap_sem);
  3702. if (IS_ERR((void *)userspace_addr))
  3703. return PTR_ERR((void *)userspace_addr);
  3704. /* set userspace_addr atomically for kvm_hva_to_rmapp */
  3705. spin_lock(&kvm->mmu_lock);
  3706. memslot->userspace_addr = userspace_addr;
  3707. spin_unlock(&kvm->mmu_lock);
  3708. } else {
  3709. if (!old.user_alloc && old.rmap) {
  3710. int ret;
  3711. down_write(&current->mm->mmap_sem);
  3712. ret = do_munmap(current->mm, old.userspace_addr,
  3713. old.npages * PAGE_SIZE);
  3714. up_write(&current->mm->mmap_sem);
  3715. if (ret < 0)
  3716. printk(KERN_WARNING
  3717. "kvm_vm_ioctl_set_memory_region: "
  3718. "failed to munmap memory\n");
  3719. }
  3720. }
  3721. }
  3722. if (!kvm->arch.n_requested_mmu_pages) {
  3723. unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
  3724. kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
  3725. }
  3726. kvm_mmu_slot_remove_write_access(kvm, mem->slot);
  3727. kvm_flush_remote_tlbs(kvm);
  3728. return 0;
  3729. }
  3730. void kvm_arch_flush_shadow(struct kvm *kvm)
  3731. {
  3732. kvm_mmu_zap_all(kvm);
  3733. }
  3734. int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
  3735. {
  3736. return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
  3737. || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED;
  3738. }
  3739. static void vcpu_kick_intr(void *info)
  3740. {
  3741. #ifdef DEBUG
  3742. struct kvm_vcpu *vcpu = (struct kvm_vcpu *)info;
  3743. printk(KERN_DEBUG "vcpu_kick_intr %p \n", vcpu);
  3744. #endif
  3745. }
  3746. void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
  3747. {
  3748. int ipi_pcpu = vcpu->cpu;
  3749. int cpu = get_cpu();
  3750. if (waitqueue_active(&vcpu->wq)) {
  3751. wake_up_interruptible(&vcpu->wq);
  3752. ++vcpu->stat.halt_wakeup;
  3753. }
  3754. /*
  3755. * We may be called synchronously with irqs disabled in guest mode,
  3756. * So need not to call smp_call_function_single() in that case.
  3757. */
  3758. if (vcpu->guest_mode && vcpu->cpu != cpu)
  3759. smp_call_function_single(ipi_pcpu, vcpu_kick_intr, vcpu, 0);
  3760. put_cpu();
  3761. }