ste-dma40.txt 1.8 KB

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  1. * DMA40 DMA Controller
  2. Required properties:
  3. - compatible: "stericsson,dma40"
  4. - reg: Address range of the DMAC registers
  5. - reg-names: Names of the above areas to use during resource look-up
  6. - interrupt: Should contain the DMAC interrupt number
  7. - #dma-cells: must be <3>
  8. Optional properties:
  9. - dma-channels: Number of channels supported by hardware - if not present
  10. the driver will attempt to obtain the information from H/W
  11. Example:
  12. dma: dma-controller@801C0000 {
  13. compatible = "stericsson,db8500-dma40", "stericsson,dma40";
  14. reg = <0x801C0000 0x1000 0x40010000 0x800>;
  15. reg-names = "base", "lcpa";
  16. interrupt-parent = <&intc>;
  17. interrupts = <0 25 0x4>;
  18. #dma-cells = <2>;
  19. dma-channels = <8>;
  20. };
  21. Clients
  22. Required properties:
  23. - dmas: Comma separated list of dma channel requests
  24. - dma-names: Names of the aforementioned requested channels
  25. Each dmas request consists of 4 cells:
  26. 1. A phandle pointing to the DMA controller
  27. 2. Device Type
  28. 3. The DMA request line number (only when 'use fixed channel' is set)
  29. 4. A 32bit mask specifying; mode, direction and endianess [NB: This list will grow]
  30. 0x00000001: Mode:
  31. Logical channel when unset
  32. Physical channel when set
  33. 0x00000002: Direction:
  34. Memory to Device when unset
  35. Device to Memory when set
  36. 0x00000004: Endianess:
  37. Little endian when unset
  38. Big endian when set
  39. 0x00000008: Use fixed channel:
  40. Use automatic channel selection when unset
  41. Use DMA request line number when set
  42. Example:
  43. uart@80120000 {
  44. compatible = "arm,pl011", "arm,primecell";
  45. reg = <0x80120000 0x1000>;
  46. interrupts = <0 11 0x4>;
  47. dmas = <&dma 13 0 0x2>, /* Logical - DevToMem */
  48. <&dma 13 0 0x0>; /* Logical - MemToDev */
  49. dma-names = "rx", "rx";
  50. status = "disabled";
  51. };