mvebu-corediv-clock.txt 571 B

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  1. * Core Divider Clock bindings for Marvell MVEBU SoCs
  2. The following is a list of provided IDs and clock names on Armada 370/XP:
  3. 0 = nand (NAND clock)
  4. Required properties:
  5. - compatible : must be "marvell,armada-370-corediv-clock"
  6. - reg : must be the register address of Core Divider control register
  7. - #clock-cells : from common clock binding; shall be set to 1
  8. - clocks : must be set to the parent's phandle
  9. Example:
  10. corediv_clk: corediv-clocks@18740 {
  11. compatible = "marvell,armada-370-corediv-clock";
  12. reg = <0x18740 0xc>;
  13. #clock-cells = <1>;
  14. clocks = <&pll>;
  15. };