tda18271-fe.c 28 KB

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  1. /*
  2. tda18271-fe.c - driver for the Philips / NXP TDA18271 silicon tuner
  3. Copyright (C) 2007, 2008 Michael Krufky <mkrufky@linuxtv.org>
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. */
  16. #include <linux/delay.h>
  17. #include <linux/videodev2.h>
  18. #include "tda18271-priv.h"
  19. int tda18271_debug;
  20. module_param_named(debug, tda18271_debug, int, 0644);
  21. MODULE_PARM_DESC(debug, "set debug level "
  22. "(info=1, map=2, reg=4, adv=8, cal=16 (or-able))");
  23. static int tda18271_cal_on_startup;
  24. module_param_named(cal, tda18271_cal_on_startup, int, 0644);
  25. MODULE_PARM_DESC(cal, "perform RF tracking filter calibration on startup");
  26. static DEFINE_MUTEX(tda18271_list_mutex);
  27. static LIST_HEAD(hybrid_tuner_instance_list);
  28. /*---------------------------------------------------------------------*/
  29. static int tda18271_ir_cal_init(struct dvb_frontend *fe)
  30. {
  31. struct tda18271_priv *priv = fe->tuner_priv;
  32. unsigned char *regs = priv->tda18271_regs;
  33. tda18271_read_regs(fe);
  34. /* test IR_CAL_OK to see if we need init */
  35. if ((regs[R_EP1] & 0x08) == 0)
  36. tda18271_init_regs(fe);
  37. return 0;
  38. }
  39. /* ------------------------------------------------------------------ */
  40. static int tda18271_channel_configuration(struct dvb_frontend *fe,
  41. u32 ifc, u32 freq, u32 bw, u8 std,
  42. int radio)
  43. {
  44. struct tda18271_priv *priv = fe->tuner_priv;
  45. unsigned char *regs = priv->tda18271_regs;
  46. u32 N;
  47. /* update TV broadcast parameters */
  48. /* set standard */
  49. regs[R_EP3] &= ~0x1f; /* clear std bits */
  50. regs[R_EP3] |= std;
  51. /* set cal mode to normal */
  52. regs[R_EP4] &= ~0x03;
  53. /* update IF output level & IF notch frequency */
  54. regs[R_EP4] &= ~0x1c; /* clear if level bits */
  55. switch (priv->mode) {
  56. case TDA18271_ANALOG:
  57. regs[R_MPD] &= ~0x80; /* IF notch = 0 */
  58. break;
  59. case TDA18271_DIGITAL:
  60. regs[R_EP4] |= 0x04; /* IF level = 1 */
  61. regs[R_MPD] |= 0x80; /* IF notch = 1 */
  62. break;
  63. }
  64. if (radio)
  65. regs[R_EP4] |= 0x80;
  66. else
  67. regs[R_EP4] &= ~0x80;
  68. /* update RF_TOP / IF_TOP */
  69. switch (priv->mode) {
  70. case TDA18271_ANALOG:
  71. regs[R_EB22] = 0x2c;
  72. break;
  73. case TDA18271_DIGITAL:
  74. regs[R_EB22] = 0x37;
  75. break;
  76. }
  77. tda18271_write_regs(fe, R_EB22, 1);
  78. /* --------------------------------------------------------------- */
  79. /* disable Power Level Indicator */
  80. regs[R_EP1] |= 0x40;
  81. /* frequency dependent parameters */
  82. tda18271_calc_ir_measure(fe, &freq);
  83. tda18271_calc_bp_filter(fe, &freq);
  84. tda18271_calc_rf_band(fe, &freq);
  85. tda18271_calc_gain_taper(fe, &freq);
  86. /* --------------------------------------------------------------- */
  87. /* dual tuner and agc1 extra configuration */
  88. /* main vco when Master, cal vco when slave */
  89. regs[R_EB1] |= 0x04; /* FIXME: assumes master */
  90. /* agc1 always active */
  91. regs[R_EB1] &= ~0x02;
  92. /* agc1 has priority on agc2 */
  93. regs[R_EB1] &= ~0x01;
  94. tda18271_write_regs(fe, R_EB1, 1);
  95. /* --------------------------------------------------------------- */
  96. N = freq + ifc;
  97. /* FIXME: assumes master */
  98. tda18271_calc_main_pll(fe, N);
  99. tda18271_write_regs(fe, R_MPD, 4);
  100. tda18271_write_regs(fe, R_TM, 7);
  101. /* main pll charge pump source */
  102. regs[R_EB4] |= 0x20;
  103. tda18271_write_regs(fe, R_EB4, 1);
  104. msleep(1);
  105. /* normal operation for the main pll */
  106. regs[R_EB4] &= ~0x20;
  107. tda18271_write_regs(fe, R_EB4, 1);
  108. msleep(5);
  109. return 0;
  110. }
  111. static int tda18271_read_thermometer(struct dvb_frontend *fe)
  112. {
  113. struct tda18271_priv *priv = fe->tuner_priv;
  114. unsigned char *regs = priv->tda18271_regs;
  115. int tm;
  116. /* switch thermometer on */
  117. regs[R_TM] |= 0x10;
  118. tda18271_write_regs(fe, R_TM, 1);
  119. /* read thermometer info */
  120. tda18271_read_regs(fe);
  121. if ((((regs[R_TM] & 0x0f) == 0x00) && ((regs[R_TM] & 0x20) == 0x20)) ||
  122. (((regs[R_TM] & 0x0f) == 0x08) && ((regs[R_TM] & 0x20) == 0x00))) {
  123. if ((regs[R_TM] & 0x20) == 0x20)
  124. regs[R_TM] &= ~0x20;
  125. else
  126. regs[R_TM] |= 0x20;
  127. tda18271_write_regs(fe, R_TM, 1);
  128. msleep(10); /* temperature sensing */
  129. /* read thermometer info */
  130. tda18271_read_regs(fe);
  131. }
  132. tm = tda18271_lookup_thermometer(fe);
  133. /* switch thermometer off */
  134. regs[R_TM] &= ~0x10;
  135. tda18271_write_regs(fe, R_TM, 1);
  136. /* set CAL mode to normal */
  137. regs[R_EP4] &= ~0x03;
  138. tda18271_write_regs(fe, R_EP4, 1);
  139. return tm;
  140. }
  141. static int tda18271_rf_tracking_filters_correction(struct dvb_frontend *fe,
  142. u32 freq)
  143. {
  144. struct tda18271_priv *priv = fe->tuner_priv;
  145. struct tda18271_rf_tracking_filter_cal *map = priv->rf_cal_state;
  146. unsigned char *regs = priv->tda18271_regs;
  147. int tm_current, rfcal_comp, approx, i;
  148. u8 dc_over_dt, rf_tab;
  149. /* power up */
  150. tda18271_set_standby_mode(fe, 0, 0, 0);
  151. /* read die current temperature */
  152. tm_current = tda18271_read_thermometer(fe);
  153. /* frequency dependent parameters */
  154. tda18271_calc_rf_cal(fe, &freq);
  155. rf_tab = regs[R_EB14];
  156. i = tda18271_lookup_rf_band(fe, &freq, NULL);
  157. if (i < 0)
  158. return -EINVAL;
  159. if ((0 == map[i].rf3) || (freq / 1000 < map[i].rf2)) {
  160. approx = map[i].rf_a1 *
  161. (freq / 1000 - map[i].rf1) + map[i].rf_b1 + rf_tab;
  162. } else {
  163. approx = map[i].rf_a2 *
  164. (freq / 1000 - map[i].rf2) + map[i].rf_b2 + rf_tab;
  165. }
  166. if (approx < 0)
  167. approx = 0;
  168. if (approx > 255)
  169. approx = 255;
  170. tda18271_lookup_map(fe, RF_CAL_DC_OVER_DT, &freq, &dc_over_dt);
  171. /* calculate temperature compensation */
  172. rfcal_comp = dc_over_dt * (tm_current - priv->tm_rfcal);
  173. regs[R_EB14] = approx + rfcal_comp;
  174. tda18271_write_regs(fe, R_EB14, 1);
  175. return 0;
  176. }
  177. static int tda18271_por(struct dvb_frontend *fe)
  178. {
  179. struct tda18271_priv *priv = fe->tuner_priv;
  180. unsigned char *regs = priv->tda18271_regs;
  181. /* power up detector 1 */
  182. regs[R_EB12] &= ~0x20;
  183. tda18271_write_regs(fe, R_EB12, 1);
  184. regs[R_EB18] &= ~0x80; /* turn agc1 loop on */
  185. regs[R_EB18] &= ~0x03; /* set agc1_gain to 6 dB */
  186. tda18271_write_regs(fe, R_EB18, 1);
  187. regs[R_EB21] |= 0x03; /* set agc2_gain to -6 dB */
  188. /* POR mode */
  189. tda18271_set_standby_mode(fe, 1, 0, 0);
  190. /* disable 1.5 MHz low pass filter */
  191. regs[R_EB23] &= ~0x04; /* forcelp_fc2_en = 0 */
  192. regs[R_EB23] &= ~0x02; /* XXX: lp_fc[2] = 0 */
  193. tda18271_write_regs(fe, R_EB21, 3);
  194. return 0;
  195. }
  196. static int tda18271_calibrate_rf(struct dvb_frontend *fe, u32 freq)
  197. {
  198. struct tda18271_priv *priv = fe->tuner_priv;
  199. unsigned char *regs = priv->tda18271_regs;
  200. u32 N;
  201. /* set CAL mode to normal */
  202. regs[R_EP4] &= ~0x03;
  203. tda18271_write_regs(fe, R_EP4, 1);
  204. /* switch off agc1 */
  205. regs[R_EP3] |= 0x40; /* sm_lt = 1 */
  206. regs[R_EB18] |= 0x03; /* set agc1_gain to 15 dB */
  207. tda18271_write_regs(fe, R_EB18, 1);
  208. /* frequency dependent parameters */
  209. tda18271_calc_bp_filter(fe, &freq);
  210. tda18271_calc_gain_taper(fe, &freq);
  211. tda18271_calc_rf_band(fe, &freq);
  212. tda18271_calc_km(fe, &freq);
  213. tda18271_write_regs(fe, R_EP1, 3);
  214. tda18271_write_regs(fe, R_EB13, 1);
  215. /* main pll charge pump source */
  216. regs[R_EB4] |= 0x20;
  217. tda18271_write_regs(fe, R_EB4, 1);
  218. /* cal pll charge pump source */
  219. regs[R_EB7] |= 0x20;
  220. tda18271_write_regs(fe, R_EB7, 1);
  221. /* force dcdc converter to 0 V */
  222. regs[R_EB14] = 0x00;
  223. tda18271_write_regs(fe, R_EB14, 1);
  224. /* disable plls lock */
  225. regs[R_EB20] &= ~0x20;
  226. tda18271_write_regs(fe, R_EB20, 1);
  227. /* set CAL mode to RF tracking filter calibration */
  228. regs[R_EP4] |= 0x03;
  229. tda18271_write_regs(fe, R_EP4, 2);
  230. /* --------------------------------------------------------------- */
  231. /* set the internal calibration signal */
  232. N = freq;
  233. tda18271_calc_main_pll(fe, N);
  234. tda18271_write_regs(fe, R_MPD, 4);
  235. /* downconvert internal calibration */
  236. N += 1000000;
  237. tda18271_calc_main_pll(fe, N);
  238. tda18271_write_regs(fe, R_MPD, 4);
  239. msleep(5);
  240. tda18271_write_regs(fe, R_EP2, 1);
  241. tda18271_write_regs(fe, R_EP1, 1);
  242. tda18271_write_regs(fe, R_EP2, 1);
  243. tda18271_write_regs(fe, R_EP1, 1);
  244. /* --------------------------------------------------------------- */
  245. /* normal operation for the main pll */
  246. regs[R_EB4] &= ~0x20;
  247. tda18271_write_regs(fe, R_EB4, 1);
  248. /* normal operation for the cal pll */
  249. regs[R_EB7] &= ~0x20;
  250. tda18271_write_regs(fe, R_EB7, 1);
  251. msleep(5); /* plls locking */
  252. /* launch the rf tracking filters calibration */
  253. regs[R_EB20] |= 0x20;
  254. tda18271_write_regs(fe, R_EB20, 1);
  255. msleep(60); /* calibration */
  256. /* --------------------------------------------------------------- */
  257. /* set CAL mode to normal */
  258. regs[R_EP4] &= ~0x03;
  259. /* switch on agc1 */
  260. regs[R_EP3] &= ~0x40; /* sm_lt = 0 */
  261. regs[R_EB18] &= ~0x03; /* set agc1_gain to 6 dB */
  262. tda18271_write_regs(fe, R_EB18, 1);
  263. tda18271_write_regs(fe, R_EP3, 2);
  264. /* synchronization */
  265. tda18271_write_regs(fe, R_EP1, 1);
  266. /* get calibration result */
  267. tda18271_read_extended(fe);
  268. return regs[R_EB14];
  269. }
  270. static int tda18271_powerscan(struct dvb_frontend *fe,
  271. u32 *freq_in, u32 *freq_out)
  272. {
  273. struct tda18271_priv *priv = fe->tuner_priv;
  274. unsigned char *regs = priv->tda18271_regs;
  275. int sgn, bcal, count, wait;
  276. u8 cid_target;
  277. u16 count_limit;
  278. u32 freq;
  279. freq = *freq_in;
  280. tda18271_calc_rf_band(fe, &freq);
  281. tda18271_calc_rf_cal(fe, &freq);
  282. tda18271_calc_gain_taper(fe, &freq);
  283. tda18271_lookup_cid_target(fe, &freq, &cid_target, &count_limit);
  284. tda18271_write_regs(fe, R_EP2, 1);
  285. tda18271_write_regs(fe, R_EB14, 1);
  286. /* downconvert frequency */
  287. freq += 1000000;
  288. tda18271_calc_main_pll(fe, freq);
  289. tda18271_write_regs(fe, R_MPD, 4);
  290. msleep(5); /* pll locking */
  291. /* detection mode */
  292. regs[R_EP4] &= ~0x03;
  293. regs[R_EP4] |= 0x01;
  294. tda18271_write_regs(fe, R_EP4, 1);
  295. /* launch power detection measurement */
  296. tda18271_write_regs(fe, R_EP2, 1);
  297. /* read power detection info, stored in EB10 */
  298. tda18271_read_extended(fe);
  299. /* algorithm initialization */
  300. sgn = 1;
  301. *freq_out = *freq_in;
  302. bcal = 0;
  303. count = 0;
  304. wait = false;
  305. while ((regs[R_EB10] & 0x3f) < cid_target) {
  306. /* downconvert updated freq to 1 MHz */
  307. freq = *freq_in + (sgn * count) + 1000000;
  308. tda18271_calc_main_pll(fe, freq);
  309. tda18271_write_regs(fe, R_MPD, 4);
  310. if (wait) {
  311. msleep(5); /* pll locking */
  312. wait = false;
  313. } else
  314. udelay(100); /* pll locking */
  315. /* launch power detection measurement */
  316. tda18271_write_regs(fe, R_EP2, 1);
  317. /* read power detection info, stored in EB10 */
  318. tda18271_read_extended(fe);
  319. count += 200;
  320. if (count < count_limit)
  321. continue;
  322. if (sgn <= 0)
  323. break;
  324. sgn = -1 * sgn;
  325. count = 200;
  326. wait = true;
  327. }
  328. if ((regs[R_EB10] & 0x3f) >= cid_target) {
  329. bcal = 1;
  330. *freq_out = freq - 1000000;
  331. } else
  332. bcal = 0;
  333. tda_cal("bcal = %d, freq_in = %d, freq_out = %d (freq = %d)\n",
  334. bcal, *freq_in, *freq_out, freq);
  335. return bcal;
  336. }
  337. static int tda18271_powerscan_init(struct dvb_frontend *fe)
  338. {
  339. struct tda18271_priv *priv = fe->tuner_priv;
  340. unsigned char *regs = priv->tda18271_regs;
  341. /* set standard to digital */
  342. regs[R_EP3] &= ~0x1f; /* clear std bits */
  343. regs[R_EP3] |= 0x12;
  344. /* set cal mode to normal */
  345. regs[R_EP4] &= ~0x03;
  346. /* update IF output level & IF notch frequency */
  347. regs[R_EP4] &= ~0x1c; /* clear if level bits */
  348. tda18271_write_regs(fe, R_EP3, 2);
  349. regs[R_EB18] &= ~0x03; /* set agc1_gain to 6 dB */
  350. tda18271_write_regs(fe, R_EB18, 1);
  351. regs[R_EB21] &= ~0x03; /* set agc2_gain to -15 dB */
  352. /* 1.5 MHz low pass filter */
  353. regs[R_EB23] |= 0x04; /* forcelp_fc2_en = 1 */
  354. regs[R_EB23] |= 0x02; /* lp_fc[2] = 1 */
  355. tda18271_write_regs(fe, R_EB21, 3);
  356. return 0;
  357. }
  358. static int tda18271_rf_tracking_filters_init(struct dvb_frontend *fe, u32 freq)
  359. {
  360. struct tda18271_priv *priv = fe->tuner_priv;
  361. struct tda18271_rf_tracking_filter_cal *map = priv->rf_cal_state;
  362. unsigned char *regs = priv->tda18271_regs;
  363. int bcal, rf, i;
  364. #define RF1 0
  365. #define RF2 1
  366. #define RF3 2
  367. u32 rf_default[3];
  368. u32 rf_freq[3];
  369. u8 prog_cal[3];
  370. u8 prog_tab[3];
  371. i = tda18271_lookup_rf_band(fe, &freq, NULL);
  372. if (i < 0)
  373. return i;
  374. rf_default[RF1] = 1000 * map[i].rf1_def;
  375. rf_default[RF2] = 1000 * map[i].rf2_def;
  376. rf_default[RF3] = 1000 * map[i].rf3_def;
  377. for (rf = RF1; rf <= RF3; rf++) {
  378. if (0 == rf_default[rf])
  379. return 0;
  380. tda_cal("freq = %d, rf = %d\n", freq, rf);
  381. /* look for optimized calibration frequency */
  382. bcal = tda18271_powerscan(fe, &rf_default[rf], &rf_freq[rf]);
  383. tda18271_calc_rf_cal(fe, &rf_freq[rf]);
  384. prog_tab[rf] = regs[R_EB14];
  385. if (1 == bcal)
  386. prog_cal[rf] = tda18271_calibrate_rf(fe, rf_freq[rf]);
  387. else
  388. prog_cal[rf] = prog_tab[rf];
  389. switch (rf) {
  390. case RF1:
  391. map[i].rf_a1 = 0;
  392. map[i].rf_b1 = prog_cal[RF1] - prog_tab[RF1];
  393. map[i].rf1 = rf_freq[RF1] / 1000;
  394. break;
  395. case RF2:
  396. map[i].rf_a1 = (prog_cal[RF2] - prog_tab[RF2] -
  397. prog_cal[RF1] + prog_tab[RF1]) /
  398. ((rf_freq[RF2] - rf_freq[RF1]) / 1000);
  399. map[i].rf2 = rf_freq[RF2] / 1000;
  400. break;
  401. case RF3:
  402. map[i].rf_a2 = (prog_cal[RF3] - prog_tab[RF3] -
  403. prog_cal[RF2] + prog_tab[RF2]) /
  404. ((rf_freq[RF3] - rf_freq[RF2]) / 1000);
  405. map[i].rf_b2 = prog_cal[RF2] - prog_tab[RF2];
  406. map[i].rf3 = rf_freq[RF3] / 1000;
  407. break;
  408. default:
  409. BUG();
  410. }
  411. }
  412. return 0;
  413. }
  414. static int tda18271_calc_rf_filter_curve(struct dvb_frontend *fe)
  415. {
  416. struct tda18271_priv *priv = fe->tuner_priv;
  417. unsigned int i;
  418. tda_info("tda18271: performing RF tracking filter calibration\n");
  419. /* wait for die temperature stabilization */
  420. msleep(200);
  421. tda18271_powerscan_init(fe);
  422. /* rf band calibration */
  423. for (i = 0; priv->rf_cal_state[i].rfmax != 0; i++)
  424. tda18271_rf_tracking_filters_init(fe, 1000 *
  425. priv->rf_cal_state[i].rfmax);
  426. priv->tm_rfcal = tda18271_read_thermometer(fe);
  427. return 0;
  428. }
  429. /* ------------------------------------------------------------------ */
  430. static int tda18271_rf_cal_init(struct dvb_frontend *fe)
  431. {
  432. struct tda18271_priv *priv = fe->tuner_priv;
  433. unsigned char *regs = priv->tda18271_regs;
  434. /* test RF_CAL_OK to see if we need init */
  435. if ((regs[R_EP1] & 0x10) == 0)
  436. priv->cal_initialized = false;
  437. if (priv->cal_initialized)
  438. return 0;
  439. tda18271_calc_rf_filter_curve(fe);
  440. tda18271_por(fe);
  441. tda_info("tda18271: RF tracking filter calibration complete\n");
  442. priv->cal_initialized = true;
  443. return 0;
  444. }
  445. static int tda18271_init(struct dvb_frontend *fe)
  446. {
  447. struct tda18271_priv *priv = fe->tuner_priv;
  448. mutex_lock(&priv->lock);
  449. /* power up */
  450. tda18271_set_standby_mode(fe, 0, 0, 0);
  451. /* initialization */
  452. tda18271_ir_cal_init(fe);
  453. if (priv->id == TDA18271HDC2)
  454. tda18271_rf_cal_init(fe);
  455. mutex_unlock(&priv->lock);
  456. return 0;
  457. }
  458. static int tda18271c2_tune(struct dvb_frontend *fe,
  459. u32 ifc, u32 freq, u32 bw, u8 std, int radio)
  460. {
  461. struct tda18271_priv *priv = fe->tuner_priv;
  462. tda_dbg("freq = %d, ifc = %d\n", freq, ifc);
  463. tda18271_init(fe);
  464. mutex_lock(&priv->lock);
  465. tda18271_rf_tracking_filters_correction(fe, freq);
  466. tda18271_channel_configuration(fe, ifc, freq, bw, std, radio);
  467. mutex_unlock(&priv->lock);
  468. return 0;
  469. }
  470. /* ------------------------------------------------------------------ */
  471. static int tda18271c1_tune(struct dvb_frontend *fe,
  472. u32 ifc, u32 freq, u32 bw, u8 std, int radio)
  473. {
  474. struct tda18271_priv *priv = fe->tuner_priv;
  475. unsigned char *regs = priv->tda18271_regs;
  476. u32 N = 0;
  477. tda18271_init(fe);
  478. mutex_lock(&priv->lock);
  479. tda_dbg("freq = %d, ifc = %d\n", freq, ifc);
  480. /* RF tracking filter calibration */
  481. /* calculate bp filter */
  482. tda18271_calc_bp_filter(fe, &freq);
  483. tda18271_write_regs(fe, R_EP1, 1);
  484. regs[R_EB4] &= 0x07;
  485. regs[R_EB4] |= 0x60;
  486. tda18271_write_regs(fe, R_EB4, 1);
  487. regs[R_EB7] = 0x60;
  488. tda18271_write_regs(fe, R_EB7, 1);
  489. regs[R_EB14] = 0x00;
  490. tda18271_write_regs(fe, R_EB14, 1);
  491. regs[R_EB20] = 0xcc;
  492. tda18271_write_regs(fe, R_EB20, 1);
  493. /* set cal mode to RF tracking filter calibration */
  494. regs[R_EP4] |= 0x03;
  495. /* calculate cal pll */
  496. switch (priv->mode) {
  497. case TDA18271_ANALOG:
  498. N = freq - 1250000;
  499. break;
  500. case TDA18271_DIGITAL:
  501. N = freq + bw / 2;
  502. break;
  503. }
  504. tda18271_calc_cal_pll(fe, N);
  505. /* calculate main pll */
  506. switch (priv->mode) {
  507. case TDA18271_ANALOG:
  508. N = freq - 250000;
  509. break;
  510. case TDA18271_DIGITAL:
  511. N = freq + bw / 2 + 1000000;
  512. break;
  513. }
  514. tda18271_calc_main_pll(fe, N);
  515. tda18271_write_regs(fe, R_EP3, 11);
  516. msleep(5); /* RF tracking filter calibration initialization */
  517. /* search for K,M,CO for RF calibration */
  518. tda18271_calc_km(fe, &freq);
  519. tda18271_write_regs(fe, R_EB13, 1);
  520. /* search for rf band */
  521. tda18271_calc_rf_band(fe, &freq);
  522. /* search for gain taper */
  523. tda18271_calc_gain_taper(fe, &freq);
  524. tda18271_write_regs(fe, R_EP2, 1);
  525. tda18271_write_regs(fe, R_EP1, 1);
  526. tda18271_write_regs(fe, R_EP2, 1);
  527. tda18271_write_regs(fe, R_EP1, 1);
  528. regs[R_EB4] &= 0x07;
  529. regs[R_EB4] |= 0x40;
  530. tda18271_write_regs(fe, R_EB4, 1);
  531. regs[R_EB7] = 0x40;
  532. tda18271_write_regs(fe, R_EB7, 1);
  533. msleep(10);
  534. regs[R_EB20] = 0xec;
  535. tda18271_write_regs(fe, R_EB20, 1);
  536. msleep(60); /* RF tracking filter calibration completion */
  537. regs[R_EP4] &= ~0x03; /* set cal mode to normal */
  538. tda18271_write_regs(fe, R_EP4, 1);
  539. tda18271_write_regs(fe, R_EP1, 1);
  540. /* RF tracking filter correction for VHF_Low band */
  541. if (0 == tda18271_calc_rf_cal(fe, &freq))
  542. tda18271_write_regs(fe, R_EB14, 1);
  543. /* Channel Configuration */
  544. switch (priv->mode) {
  545. case TDA18271_ANALOG:
  546. regs[R_EB22] = 0x2c;
  547. break;
  548. case TDA18271_DIGITAL:
  549. regs[R_EB22] = 0x37;
  550. break;
  551. }
  552. tda18271_write_regs(fe, R_EB22, 1);
  553. regs[R_EP1] |= 0x40; /* set dis power level on */
  554. /* set standard */
  555. regs[R_EP3] &= ~0x1f; /* clear std bits */
  556. /* see table 22 */
  557. regs[R_EP3] |= std;
  558. regs[R_EP4] &= ~0x03; /* set cal mode to normal */
  559. regs[R_EP4] &= ~0x1c; /* clear if level bits */
  560. switch (priv->mode) {
  561. case TDA18271_ANALOG:
  562. regs[R_MPD] &= ~0x80; /* IF notch = 0 */
  563. break;
  564. case TDA18271_DIGITAL:
  565. regs[R_EP4] |= 0x04;
  566. regs[R_MPD] |= 0x80;
  567. break;
  568. }
  569. if (radio)
  570. regs[R_EP4] |= 0x80;
  571. else
  572. regs[R_EP4] &= ~0x80;
  573. /* image rejection validity */
  574. tda18271_calc_ir_measure(fe, &freq);
  575. /* calculate MAIN PLL */
  576. N = freq + ifc;
  577. tda18271_calc_main_pll(fe, N);
  578. tda18271_write_regs(fe, R_TM, 15);
  579. msleep(5);
  580. mutex_unlock(&priv->lock);
  581. return 0;
  582. }
  583. static inline int tda18271_tune(struct dvb_frontend *fe,
  584. u32 ifc, u32 freq, u32 bw, u8 std, int radio)
  585. {
  586. struct tda18271_priv *priv = fe->tuner_priv;
  587. int ret = -EINVAL;
  588. switch (priv->id) {
  589. case TDA18271HDC1:
  590. ret = tda18271c1_tune(fe, ifc, freq, bw, std, radio);
  591. break;
  592. case TDA18271HDC2:
  593. ret = tda18271c2_tune(fe, ifc, freq, bw, std, radio);
  594. break;
  595. }
  596. return ret;
  597. }
  598. /* ------------------------------------------------------------------ */
  599. static int tda18271_set_params(struct dvb_frontend *fe,
  600. struct dvb_frontend_parameters *params)
  601. {
  602. struct tda18271_priv *priv = fe->tuner_priv;
  603. struct tda18271_std_map *std_map = &priv->std;
  604. int ret;
  605. u8 std;
  606. u16 sgIF;
  607. u32 bw, freq = params->frequency;
  608. priv->mode = TDA18271_DIGITAL;
  609. if (fe->ops.info.type == FE_ATSC) {
  610. switch (params->u.vsb.modulation) {
  611. case VSB_8:
  612. case VSB_16:
  613. std = std_map->atsc_6.std_bits;
  614. sgIF = std_map->atsc_6.if_freq;
  615. break;
  616. case QAM_64:
  617. case QAM_256:
  618. std = std_map->qam_6.std_bits;
  619. sgIF = std_map->qam_6.if_freq;
  620. break;
  621. default:
  622. tda_warn("modulation not set!\n");
  623. return -EINVAL;
  624. }
  625. #if 0
  626. /* userspace request is already center adjusted */
  627. freq += 1750000; /* Adjust to center (+1.75MHZ) */
  628. #endif
  629. bw = 6000000;
  630. } else if (fe->ops.info.type == FE_OFDM) {
  631. switch (params->u.ofdm.bandwidth) {
  632. case BANDWIDTH_6_MHZ:
  633. bw = 6000000;
  634. std = std_map->dvbt_6.std_bits;
  635. sgIF = std_map->dvbt_6.if_freq;
  636. break;
  637. case BANDWIDTH_7_MHZ:
  638. bw = 7000000;
  639. std = std_map->dvbt_7.std_bits;
  640. sgIF = std_map->dvbt_7.if_freq;
  641. break;
  642. case BANDWIDTH_8_MHZ:
  643. bw = 8000000;
  644. std = std_map->dvbt_8.std_bits;
  645. sgIF = std_map->dvbt_8.if_freq;
  646. break;
  647. default:
  648. tda_warn("bandwidth not set!\n");
  649. return -EINVAL;
  650. }
  651. } else {
  652. tda_warn("modulation type not supported!\n");
  653. return -EINVAL;
  654. }
  655. /* When tuning digital, the analog demod must be tri-stated */
  656. if (fe->ops.analog_ops.standby)
  657. fe->ops.analog_ops.standby(fe);
  658. ret = tda18271_tune(fe, sgIF * 1000, freq, bw, std, 0);
  659. if (ret < 0)
  660. goto fail;
  661. priv->frequency = freq;
  662. priv->bandwidth = (fe->ops.info.type == FE_OFDM) ?
  663. params->u.ofdm.bandwidth : 0;
  664. fail:
  665. return ret;
  666. }
  667. static int tda18271_set_analog_params(struct dvb_frontend *fe,
  668. struct analog_parameters *params)
  669. {
  670. struct tda18271_priv *priv = fe->tuner_priv;
  671. struct tda18271_std_map *std_map = &priv->std;
  672. char *mode;
  673. int ret, radio = 0;
  674. u8 std;
  675. u16 sgIF;
  676. u32 freq = params->frequency * 62500;
  677. priv->mode = TDA18271_ANALOG;
  678. if (params->mode == V4L2_TUNER_RADIO) {
  679. radio = 1;
  680. freq = freq / 1000;
  681. std = std_map->fm_radio.std_bits;
  682. sgIF = std_map->fm_radio.if_freq;
  683. mode = "fm";
  684. } else if (params->std & V4L2_STD_MN) {
  685. std = std_map->atv_mn.std_bits;
  686. sgIF = std_map->atv_mn.if_freq;
  687. mode = "MN";
  688. } else if (params->std & V4L2_STD_B) {
  689. std = std_map->atv_b.std_bits;
  690. sgIF = std_map->atv_b.if_freq;
  691. mode = "B";
  692. } else if (params->std & V4L2_STD_GH) {
  693. std = std_map->atv_gh.std_bits;
  694. sgIF = std_map->atv_gh.if_freq;
  695. mode = "GH";
  696. } else if (params->std & V4L2_STD_PAL_I) {
  697. std = std_map->atv_i.std_bits;
  698. sgIF = std_map->atv_i.if_freq;
  699. mode = "I";
  700. } else if (params->std & V4L2_STD_DK) {
  701. std = std_map->atv_dk.std_bits;
  702. sgIF = std_map->atv_dk.if_freq;
  703. mode = "DK";
  704. } else if (params->std & V4L2_STD_SECAM_L) {
  705. std = std_map->atv_l.std_bits;
  706. sgIF = std_map->atv_l.if_freq;
  707. mode = "L";
  708. } else if (params->std & V4L2_STD_SECAM_LC) {
  709. std = std_map->atv_lc.std_bits;
  710. sgIF = std_map->atv_lc.if_freq;
  711. mode = "L'";
  712. } else {
  713. std = std_map->atv_i.std_bits;
  714. sgIF = std_map->atv_i.if_freq;
  715. mode = "xx";
  716. }
  717. tda_dbg("setting tda18271 to system %s\n", mode);
  718. ret = tda18271_tune(fe, sgIF * 1000, freq, 0, std, radio);
  719. if (ret < 0)
  720. goto fail;
  721. priv->frequency = freq;
  722. priv->bandwidth = 0;
  723. fail:
  724. return ret;
  725. }
  726. static int tda18271_sleep(struct dvb_frontend *fe)
  727. {
  728. struct tda18271_priv *priv = fe->tuner_priv;
  729. mutex_lock(&priv->lock);
  730. /* standby mode w/ slave tuner output
  731. * & loop thru & xtal oscillator on */
  732. tda18271_set_standby_mode(fe, 1, 0, 0);
  733. mutex_unlock(&priv->lock);
  734. return 0;
  735. }
  736. static int tda18271_release(struct dvb_frontend *fe)
  737. {
  738. struct tda18271_priv *priv = fe->tuner_priv;
  739. mutex_lock(&tda18271_list_mutex);
  740. if (priv)
  741. hybrid_tuner_release_state(priv);
  742. mutex_unlock(&tda18271_list_mutex);
  743. fe->tuner_priv = NULL;
  744. return 0;
  745. }
  746. static int tda18271_get_frequency(struct dvb_frontend *fe, u32 *frequency)
  747. {
  748. struct tda18271_priv *priv = fe->tuner_priv;
  749. *frequency = priv->frequency;
  750. return 0;
  751. }
  752. static int tda18271_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
  753. {
  754. struct tda18271_priv *priv = fe->tuner_priv;
  755. *bandwidth = priv->bandwidth;
  756. return 0;
  757. }
  758. /* ------------------------------------------------------------------ */
  759. #define tda18271_update_std(std_cfg, name) do { \
  760. if (map->std_cfg.if_freq + map->std_cfg.std_bits > 0) { \
  761. tda_dbg("Using custom std config for %s\n", name); \
  762. memcpy(&std->std_cfg, &map->std_cfg, \
  763. sizeof(struct tda18271_std_map_item)); \
  764. } } while (0)
  765. #define tda18271_dump_std_item(std_cfg, name) do { \
  766. tda_dbg("(%s) if freq = %d, std bits = 0x%02x\n", \
  767. name, std->std_cfg.if_freq, std->std_cfg.std_bits); \
  768. } while (0)
  769. static int tda18271_dump_std_map(struct dvb_frontend *fe)
  770. {
  771. struct tda18271_priv *priv = fe->tuner_priv;
  772. struct tda18271_std_map *std = &priv->std;
  773. tda_dbg("========== STANDARD MAP SETTINGS ==========\n");
  774. tda18271_dump_std_item(fm_radio, "fm");
  775. tda18271_dump_std_item(atv_b, "pal b");
  776. tda18271_dump_std_item(atv_dk, "pal dk");
  777. tda18271_dump_std_item(atv_gh, "pal gh");
  778. tda18271_dump_std_item(atv_i, "pal i");
  779. tda18271_dump_std_item(atv_l, "pal l");
  780. tda18271_dump_std_item(atv_lc, "pal l'");
  781. tda18271_dump_std_item(atv_mn, "atv mn");
  782. tda18271_dump_std_item(atsc_6, "atsc 6");
  783. tda18271_dump_std_item(dvbt_6, "dvbt 6");
  784. tda18271_dump_std_item(dvbt_7, "dvbt 7");
  785. tda18271_dump_std_item(dvbt_8, "dvbt 8");
  786. tda18271_dump_std_item(qam_6, "qam 6");
  787. tda18271_dump_std_item(qam_8, "qam 8");
  788. return 0;
  789. }
  790. static int tda18271_update_std_map(struct dvb_frontend *fe,
  791. struct tda18271_std_map *map)
  792. {
  793. struct tda18271_priv *priv = fe->tuner_priv;
  794. struct tda18271_std_map *std = &priv->std;
  795. if (!map)
  796. return -EINVAL;
  797. tda18271_update_std(fm_radio, "fm");
  798. tda18271_update_std(atv_b, "atv b");
  799. tda18271_update_std(atv_dk, "atv dk");
  800. tda18271_update_std(atv_gh, "atv gh");
  801. tda18271_update_std(atv_i, "atv i");
  802. tda18271_update_std(atv_l, "atv l");
  803. tda18271_update_std(atv_lc, "atv l'");
  804. tda18271_update_std(atv_mn, "atv mn");
  805. tda18271_update_std(atsc_6, "atsc 6");
  806. tda18271_update_std(dvbt_6, "dvbt 6");
  807. tda18271_update_std(dvbt_7, "dvbt 7");
  808. tda18271_update_std(dvbt_8, "dvbt 8");
  809. tda18271_update_std(qam_6, "qam 6");
  810. tda18271_update_std(qam_8, "qam 8");
  811. return 0;
  812. }
  813. static int tda18271_get_id(struct dvb_frontend *fe)
  814. {
  815. struct tda18271_priv *priv = fe->tuner_priv;
  816. unsigned char *regs = priv->tda18271_regs;
  817. char *name;
  818. int ret = 0;
  819. mutex_lock(&priv->lock);
  820. tda18271_read_regs(fe);
  821. mutex_unlock(&priv->lock);
  822. switch (regs[R_ID] & 0x7f) {
  823. case 3:
  824. name = "TDA18271HD/C1";
  825. priv->id = TDA18271HDC1;
  826. break;
  827. case 4:
  828. name = "TDA18271HD/C2";
  829. priv->id = TDA18271HDC2;
  830. break;
  831. default:
  832. name = "Unknown device";
  833. ret = -EINVAL;
  834. break;
  835. }
  836. tda_info("%s detected @ %d-%04x%s\n", name,
  837. i2c_adapter_id(priv->i2c_props.adap),
  838. priv->i2c_props.addr,
  839. (0 == ret) ? "" : ", device not supported.");
  840. return ret;
  841. }
  842. static struct dvb_tuner_ops tda18271_tuner_ops = {
  843. .info = {
  844. .name = "NXP TDA18271HD",
  845. .frequency_min = 45000000,
  846. .frequency_max = 864000000,
  847. .frequency_step = 62500
  848. },
  849. .init = tda18271_init,
  850. .sleep = tda18271_sleep,
  851. .set_params = tda18271_set_params,
  852. .set_analog_params = tda18271_set_analog_params,
  853. .release = tda18271_release,
  854. .get_frequency = tda18271_get_frequency,
  855. .get_bandwidth = tda18271_get_bandwidth,
  856. };
  857. struct dvb_frontend *tda18271_attach(struct dvb_frontend *fe, u8 addr,
  858. struct i2c_adapter *i2c,
  859. struct tda18271_config *cfg)
  860. {
  861. struct tda18271_priv *priv = NULL;
  862. int instance;
  863. mutex_lock(&tda18271_list_mutex);
  864. instance = hybrid_tuner_request_state(struct tda18271_priv, priv,
  865. hybrid_tuner_instance_list,
  866. i2c, addr, "tda18271");
  867. switch (instance) {
  868. case 0:
  869. goto fail;
  870. break;
  871. case 1:
  872. /* new tuner instance */
  873. priv->gate = (cfg) ? cfg->gate : TDA18271_GATE_AUTO;
  874. priv->cal_initialized = false;
  875. mutex_init(&priv->lock);
  876. fe->tuner_priv = priv;
  877. if (tda18271_get_id(fe) < 0)
  878. goto fail;
  879. if (tda18271_assign_map_layout(fe) < 0)
  880. goto fail;
  881. mutex_lock(&priv->lock);
  882. tda18271_init_regs(fe);
  883. if ((tda18271_cal_on_startup) && (priv->id == TDA18271HDC2))
  884. tda18271_rf_cal_init(fe);
  885. mutex_unlock(&priv->lock);
  886. break;
  887. default:
  888. /* existing tuner instance */
  889. fe->tuner_priv = priv;
  890. /* allow dvb driver to override i2c gate setting */
  891. if ((cfg) && (cfg->gate != TDA18271_GATE_ANALOG))
  892. priv->gate = cfg->gate;
  893. break;
  894. }
  895. /* override default std map with values in config struct */
  896. if ((cfg) && (cfg->std_map))
  897. tda18271_update_std_map(fe, cfg->std_map);
  898. mutex_unlock(&tda18271_list_mutex);
  899. memcpy(&fe->ops.tuner_ops, &tda18271_tuner_ops,
  900. sizeof(struct dvb_tuner_ops));
  901. if (tda18271_debug & DBG_MAP)
  902. tda18271_dump_std_map(fe);
  903. return fe;
  904. fail:
  905. mutex_unlock(&tda18271_list_mutex);
  906. tda18271_release(fe);
  907. return NULL;
  908. }
  909. EXPORT_SYMBOL_GPL(tda18271_attach);
  910. MODULE_DESCRIPTION("NXP TDA18271HD analog / digital tuner driver");
  911. MODULE_AUTHOR("Michael Krufky <mkrufky@linuxtv.org>");
  912. MODULE_LICENSE("GPL");
  913. MODULE_VERSION("0.2");
  914. /*
  915. * Overrides for Emacs so that we follow Linus's tabbing style.
  916. * ---------------------------------------------------------------------------
  917. * Local variables:
  918. * c-basic-offset: 8
  919. * End:
  920. */