mpi2.h 47 KB

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  1. /*
  2. * Copyright (c) 2000-2011 LSI Corporation.
  3. *
  4. *
  5. * Name: mpi2.h
  6. * Title: MPI Message independent structures and definitions
  7. * including System Interface Register Set and
  8. * scatter/gather formats.
  9. * Creation Date: June 21, 2006
  10. *
  11. * mpi2.h Version: 02.00.20
  12. *
  13. * Version History
  14. * ---------------
  15. *
  16. * Date Version Description
  17. * -------- -------- ------------------------------------------------------
  18. * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
  19. * 06-04-07 02.00.01 Bumped MPI2_HEADER_VERSION_UNIT.
  20. * 06-26-07 02.00.02 Bumped MPI2_HEADER_VERSION_UNIT.
  21. * 08-31-07 02.00.03 Bumped MPI2_HEADER_VERSION_UNIT.
  22. * Moved ReplyPostHostIndex register to offset 0x6C of the
  23. * MPI2_SYSTEM_INTERFACE_REGS and modified the define for
  24. * MPI2_REPLY_POST_HOST_INDEX_OFFSET.
  25. * Added union of request descriptors.
  26. * Added union of reply descriptors.
  27. * 10-31-07 02.00.04 Bumped MPI2_HEADER_VERSION_UNIT.
  28. * Added define for MPI2_VERSION_02_00.
  29. * Fixed the size of the FunctionDependent5 field in the
  30. * MPI2_DEFAULT_REPLY structure.
  31. * 12-18-07 02.00.05 Bumped MPI2_HEADER_VERSION_UNIT.
  32. * Removed the MPI-defined Fault Codes and extended the
  33. * product specific codes up to 0xEFFF.
  34. * Added a sixth key value for the WriteSequence register
  35. * and changed the flush value to 0x0.
  36. * Added message function codes for Diagnostic Buffer Post
  37. * and Diagnsotic Release.
  38. * New IOCStatus define: MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED
  39. * Moved MPI2_VERSION_UNION from mpi2_ioc.h.
  40. * 02-29-08 02.00.06 Bumped MPI2_HEADER_VERSION_UNIT.
  41. * 03-03-08 02.00.07 Bumped MPI2_HEADER_VERSION_UNIT.
  42. * 05-21-08 02.00.08 Bumped MPI2_HEADER_VERSION_UNIT.
  43. * Added #defines for marking a reply descriptor as unused.
  44. * 06-27-08 02.00.09 Bumped MPI2_HEADER_VERSION_UNIT.
  45. * 10-02-08 02.00.10 Bumped MPI2_HEADER_VERSION_UNIT.
  46. * Moved LUN field defines from mpi2_init.h.
  47. * 01-19-09 02.00.11 Bumped MPI2_HEADER_VERSION_UNIT.
  48. * 05-06-09 02.00.12 Bumped MPI2_HEADER_VERSION_UNIT.
  49. * In all request and reply descriptors, replaced VF_ID
  50. * field with MSIxIndex field.
  51. * Removed DevHandle field from
  52. * MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR and made those
  53. * bytes reserved.
  54. * Added RAID Accelerator functionality.
  55. * 07-30-09 02.00.13 Bumped MPI2_HEADER_VERSION_UNIT.
  56. * 10-28-09 02.00.14 Bumped MPI2_HEADER_VERSION_UNIT.
  57. * Added MSI-x index mask and shift for Reply Post Host
  58. * Index register.
  59. * Added function code for Host Based Discovery Action.
  60. * 02-10-10 02.00.15 Bumped MPI2_HEADER_VERSION_UNIT.
  61. * Added define for MPI2_FUNCTION_PWR_MGMT_CONTROL.
  62. * Added defines for product-specific range of message
  63. * function codes, 0xF0 to 0xFF.
  64. * 05-12-10 02.00.16 Bumped MPI2_HEADER_VERSION_UNIT.
  65. * Added alternative defines for the SGE Direction bit.
  66. * 08-11-10 02.00.17 Bumped MPI2_HEADER_VERSION_UNIT.
  67. * 11-10-10 02.00.18 Bumped MPI2_HEADER_VERSION_UNIT.
  68. * Added MPI2_IEEE_SGE_FLAGS_SYSTEMPLBCPI_ADDR define.
  69. * 02-23-11 02.00.19 Bumped MPI2_HEADER_VERSION_UNIT.
  70. * Added MPI2_FUNCTION_SEND_HOST_MESSAGE.
  71. * 03-09-11 02.00.20 Bumped MPI2_HEADER_VERSION_UNIT.
  72. * --------------------------------------------------------------------------
  73. */
  74. #ifndef MPI2_H
  75. #define MPI2_H
  76. /*****************************************************************************
  77. *
  78. * MPI Version Definitions
  79. *
  80. *****************************************************************************/
  81. #define MPI2_VERSION_MAJOR (0x02)
  82. #define MPI2_VERSION_MINOR (0x00)
  83. #define MPI2_VERSION_MAJOR_MASK (0xFF00)
  84. #define MPI2_VERSION_MAJOR_SHIFT (8)
  85. #define MPI2_VERSION_MINOR_MASK (0x00FF)
  86. #define MPI2_VERSION_MINOR_SHIFT (0)
  87. #define MPI2_VERSION ((MPI2_VERSION_MAJOR << MPI2_VERSION_MAJOR_SHIFT) | \
  88. MPI2_VERSION_MINOR)
  89. #define MPI2_VERSION_02_00 (0x0200)
  90. /* versioning for this MPI header set */
  91. #define MPI2_HEADER_VERSION_UNIT (0x14)
  92. #define MPI2_HEADER_VERSION_DEV (0x00)
  93. #define MPI2_HEADER_VERSION_UNIT_MASK (0xFF00)
  94. #define MPI2_HEADER_VERSION_UNIT_SHIFT (8)
  95. #define MPI2_HEADER_VERSION_DEV_MASK (0x00FF)
  96. #define MPI2_HEADER_VERSION_DEV_SHIFT (0)
  97. #define MPI2_HEADER_VERSION ((MPI2_HEADER_VERSION_UNIT << 8) | MPI2_HEADER_VERSION_DEV)
  98. /*****************************************************************************
  99. *
  100. * IOC State Definitions
  101. *
  102. *****************************************************************************/
  103. #define MPI2_IOC_STATE_RESET (0x00000000)
  104. #define MPI2_IOC_STATE_READY (0x10000000)
  105. #define MPI2_IOC_STATE_OPERATIONAL (0x20000000)
  106. #define MPI2_IOC_STATE_FAULT (0x40000000)
  107. #define MPI2_IOC_STATE_MASK (0xF0000000)
  108. #define MPI2_IOC_STATE_SHIFT (28)
  109. /* Fault state range for prodcut specific codes */
  110. #define MPI2_FAULT_PRODUCT_SPECIFIC_MIN (0x0000)
  111. #define MPI2_FAULT_PRODUCT_SPECIFIC_MAX (0xEFFF)
  112. /*****************************************************************************
  113. *
  114. * System Interface Register Definitions
  115. *
  116. *****************************************************************************/
  117. typedef volatile struct _MPI2_SYSTEM_INTERFACE_REGS
  118. {
  119. U32 Doorbell; /* 0x00 */
  120. U32 WriteSequence; /* 0x04 */
  121. U32 HostDiagnostic; /* 0x08 */
  122. U32 Reserved1; /* 0x0C */
  123. U32 DiagRWData; /* 0x10 */
  124. U32 DiagRWAddressLow; /* 0x14 */
  125. U32 DiagRWAddressHigh; /* 0x18 */
  126. U32 Reserved2[5]; /* 0x1C */
  127. U32 HostInterruptStatus; /* 0x30 */
  128. U32 HostInterruptMask; /* 0x34 */
  129. U32 DCRData; /* 0x38 */
  130. U32 DCRAddress; /* 0x3C */
  131. U32 Reserved3[2]; /* 0x40 */
  132. U32 ReplyFreeHostIndex; /* 0x48 */
  133. U32 Reserved4[8]; /* 0x4C */
  134. U32 ReplyPostHostIndex; /* 0x6C */
  135. U32 Reserved5; /* 0x70 */
  136. U32 HCBSize; /* 0x74 */
  137. U32 HCBAddressLow; /* 0x78 */
  138. U32 HCBAddressHigh; /* 0x7C */
  139. U32 Reserved6[16]; /* 0x80 */
  140. U32 RequestDescriptorPostLow; /* 0xC0 */
  141. U32 RequestDescriptorPostHigh; /* 0xC4 */
  142. U32 Reserved7[14]; /* 0xC8 */
  143. } MPI2_SYSTEM_INTERFACE_REGS, MPI2_POINTER PTR_MPI2_SYSTEM_INTERFACE_REGS,
  144. Mpi2SystemInterfaceRegs_t, MPI2_POINTER pMpi2SystemInterfaceRegs_t;
  145. /*
  146. * Defines for working with the Doorbell register.
  147. */
  148. #define MPI2_DOORBELL_OFFSET (0x00000000)
  149. /* IOC --> System values */
  150. #define MPI2_DOORBELL_USED (0x08000000)
  151. #define MPI2_DOORBELL_WHO_INIT_MASK (0x07000000)
  152. #define MPI2_DOORBELL_WHO_INIT_SHIFT (24)
  153. #define MPI2_DOORBELL_FAULT_CODE_MASK (0x0000FFFF)
  154. #define MPI2_DOORBELL_DATA_MASK (0x0000FFFF)
  155. /* System --> IOC values */
  156. #define MPI2_DOORBELL_FUNCTION_MASK (0xFF000000)
  157. #define MPI2_DOORBELL_FUNCTION_SHIFT (24)
  158. #define MPI2_DOORBELL_ADD_DWORDS_MASK (0x00FF0000)
  159. #define MPI2_DOORBELL_ADD_DWORDS_SHIFT (16)
  160. /*
  161. * Defines for the WriteSequence register
  162. */
  163. #define MPI2_WRITE_SEQUENCE_OFFSET (0x00000004)
  164. #define MPI2_WRSEQ_KEY_VALUE_MASK (0x0000000F)
  165. #define MPI2_WRSEQ_FLUSH_KEY_VALUE (0x0)
  166. #define MPI2_WRSEQ_1ST_KEY_VALUE (0xF)
  167. #define MPI2_WRSEQ_2ND_KEY_VALUE (0x4)
  168. #define MPI2_WRSEQ_3RD_KEY_VALUE (0xB)
  169. #define MPI2_WRSEQ_4TH_KEY_VALUE (0x2)
  170. #define MPI2_WRSEQ_5TH_KEY_VALUE (0x7)
  171. #define MPI2_WRSEQ_6TH_KEY_VALUE (0xD)
  172. /*
  173. * Defines for the HostDiagnostic register
  174. */
  175. #define MPI2_HOST_DIAGNOSTIC_OFFSET (0x00000008)
  176. #define MPI2_DIAG_BOOT_DEVICE_SELECT_MASK (0x00001800)
  177. #define MPI2_DIAG_BOOT_DEVICE_SELECT_DEFAULT (0x00000000)
  178. #define MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW (0x00000800)
  179. #define MPI2_DIAG_CLEAR_FLASH_BAD_SIG (0x00000400)
  180. #define MPI2_DIAG_FORCE_HCB_ON_RESET (0x00000200)
  181. #define MPI2_DIAG_HCB_MODE (0x00000100)
  182. #define MPI2_DIAG_DIAG_WRITE_ENABLE (0x00000080)
  183. #define MPI2_DIAG_FLASH_BAD_SIG (0x00000040)
  184. #define MPI2_DIAG_RESET_HISTORY (0x00000020)
  185. #define MPI2_DIAG_DIAG_RW_ENABLE (0x00000010)
  186. #define MPI2_DIAG_RESET_ADAPTER (0x00000004)
  187. #define MPI2_DIAG_HOLD_IOC_RESET (0x00000002)
  188. /*
  189. * Offsets for DiagRWData and address
  190. */
  191. #define MPI2_DIAG_RW_DATA_OFFSET (0x00000010)
  192. #define MPI2_DIAG_RW_ADDRESS_LOW_OFFSET (0x00000014)
  193. #define MPI2_DIAG_RW_ADDRESS_HIGH_OFFSET (0x00000018)
  194. /*
  195. * Defines for the HostInterruptStatus register
  196. */
  197. #define MPI2_HOST_INTERRUPT_STATUS_OFFSET (0x00000030)
  198. #define MPI2_HIS_SYS2IOC_DB_STATUS (0x80000000)
  199. #define MPI2_HIS_IOP_DOORBELL_STATUS MPI2_HIS_SYS2IOC_DB_STATUS
  200. #define MPI2_HIS_RESET_IRQ_STATUS (0x40000000)
  201. #define MPI2_HIS_REPLY_DESCRIPTOR_INTERRUPT (0x00000008)
  202. #define MPI2_HIS_IOC2SYS_DB_STATUS (0x00000001)
  203. #define MPI2_HIS_DOORBELL_INTERRUPT MPI2_HIS_IOC2SYS_DB_STATUS
  204. /*
  205. * Defines for the HostInterruptMask register
  206. */
  207. #define MPI2_HOST_INTERRUPT_MASK_OFFSET (0x00000034)
  208. #define MPI2_HIM_RESET_IRQ_MASK (0x40000000)
  209. #define MPI2_HIM_REPLY_INT_MASK (0x00000008)
  210. #define MPI2_HIM_RIM MPI2_HIM_REPLY_INT_MASK
  211. #define MPI2_HIM_IOC2SYS_DB_MASK (0x00000001)
  212. #define MPI2_HIM_DIM MPI2_HIM_IOC2SYS_DB_MASK
  213. /*
  214. * Offsets for DCRData and address
  215. */
  216. #define MPI2_DCR_DATA_OFFSET (0x00000038)
  217. #define MPI2_DCR_ADDRESS_OFFSET (0x0000003C)
  218. /*
  219. * Offset for the Reply Free Queue
  220. */
  221. #define MPI2_REPLY_FREE_HOST_INDEX_OFFSET (0x00000048)
  222. /*
  223. * Defines for the Reply Descriptor Post Queue
  224. */
  225. #define MPI2_REPLY_POST_HOST_INDEX_OFFSET (0x0000006C)
  226. #define MPI2_REPLY_POST_HOST_INDEX_MASK (0x00FFFFFF)
  227. #define MPI2_RPHI_MSIX_INDEX_MASK (0xFF000000)
  228. #define MPI2_RPHI_MSIX_INDEX_SHIFT (24)
  229. /*
  230. * Defines for the HCBSize and address
  231. */
  232. #define MPI2_HCB_SIZE_OFFSET (0x00000074)
  233. #define MPI2_HCB_SIZE_SIZE_MASK (0xFFFFF000)
  234. #define MPI2_HCB_SIZE_HCB_ENABLE (0x00000001)
  235. #define MPI2_HCB_ADDRESS_LOW_OFFSET (0x00000078)
  236. #define MPI2_HCB_ADDRESS_HIGH_OFFSET (0x0000007C)
  237. /*
  238. * Offsets for the Request Queue
  239. */
  240. #define MPI2_REQUEST_DESCRIPTOR_POST_LOW_OFFSET (0x000000C0)
  241. #define MPI2_REQUEST_DESCRIPTOR_POST_HIGH_OFFSET (0x000000C4)
  242. /*****************************************************************************
  243. *
  244. * Message Descriptors
  245. *
  246. *****************************************************************************/
  247. /* Request Descriptors */
  248. /* Default Request Descriptor */
  249. typedef struct _MPI2_DEFAULT_REQUEST_DESCRIPTOR
  250. {
  251. U8 RequestFlags; /* 0x00 */
  252. U8 MSIxIndex; /* 0x01 */
  253. U16 SMID; /* 0x02 */
  254. U16 LMID; /* 0x04 */
  255. U16 DescriptorTypeDependent; /* 0x06 */
  256. } MPI2_DEFAULT_REQUEST_DESCRIPTOR,
  257. MPI2_POINTER PTR_MPI2_DEFAULT_REQUEST_DESCRIPTOR,
  258. Mpi2DefaultRequestDescriptor_t, MPI2_POINTER pMpi2DefaultRequestDescriptor_t;
  259. /* defines for the RequestFlags field */
  260. #define MPI2_REQ_DESCRIPT_FLAGS_TYPE_MASK (0x0E)
  261. #define MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO (0x00)
  262. #define MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET (0x02)
  263. #define MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY (0x06)
  264. #define MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE (0x08)
  265. #define MPI2_REQ_DESCRIPT_FLAGS_RAID_ACCELERATOR (0x0A)
  266. #define MPI2_REQ_DESCRIPT_FLAGS_IOC_FIFO_MARKER (0x01)
  267. /* High Priority Request Descriptor */
  268. typedef struct _MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR
  269. {
  270. U8 RequestFlags; /* 0x00 */
  271. U8 MSIxIndex; /* 0x01 */
  272. U16 SMID; /* 0x02 */
  273. U16 LMID; /* 0x04 */
  274. U16 Reserved1; /* 0x06 */
  275. } MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR,
  276. MPI2_POINTER PTR_MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR,
  277. Mpi2HighPriorityRequestDescriptor_t,
  278. MPI2_POINTER pMpi2HighPriorityRequestDescriptor_t;
  279. /* SCSI IO Request Descriptor */
  280. typedef struct _MPI2_SCSI_IO_REQUEST_DESCRIPTOR
  281. {
  282. U8 RequestFlags; /* 0x00 */
  283. U8 MSIxIndex; /* 0x01 */
  284. U16 SMID; /* 0x02 */
  285. U16 LMID; /* 0x04 */
  286. U16 DevHandle; /* 0x06 */
  287. } MPI2_SCSI_IO_REQUEST_DESCRIPTOR,
  288. MPI2_POINTER PTR_MPI2_SCSI_IO_REQUEST_DESCRIPTOR,
  289. Mpi2SCSIIORequestDescriptor_t, MPI2_POINTER pMpi2SCSIIORequestDescriptor_t;
  290. /* SCSI Target Request Descriptor */
  291. typedef struct _MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR
  292. {
  293. U8 RequestFlags; /* 0x00 */
  294. U8 MSIxIndex; /* 0x01 */
  295. U16 SMID; /* 0x02 */
  296. U16 LMID; /* 0x04 */
  297. U16 IoIndex; /* 0x06 */
  298. } MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR,
  299. MPI2_POINTER PTR_MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR,
  300. Mpi2SCSITargetRequestDescriptor_t,
  301. MPI2_POINTER pMpi2SCSITargetRequestDescriptor_t;
  302. /* RAID Accelerator Request Descriptor */
  303. typedef struct _MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR {
  304. U8 RequestFlags; /* 0x00 */
  305. U8 MSIxIndex; /* 0x01 */
  306. U16 SMID; /* 0x02 */
  307. U16 LMID; /* 0x04 */
  308. U16 Reserved; /* 0x06 */
  309. } MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR,
  310. MPI2_POINTER PTR_MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR,
  311. Mpi2RAIDAcceleratorRequestDescriptor_t,
  312. MPI2_POINTER pMpi2RAIDAcceleratorRequestDescriptor_t;
  313. /* union of Request Descriptors */
  314. typedef union _MPI2_REQUEST_DESCRIPTOR_UNION
  315. {
  316. MPI2_DEFAULT_REQUEST_DESCRIPTOR Default;
  317. MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR HighPriority;
  318. MPI2_SCSI_IO_REQUEST_DESCRIPTOR SCSIIO;
  319. MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR SCSITarget;
  320. MPI2_RAID_ACCEL_REQUEST_DESCRIPTOR RAIDAccelerator;
  321. U64 Words;
  322. } MPI2_REQUEST_DESCRIPTOR_UNION, MPI2_POINTER PTR_MPI2_REQUEST_DESCRIPTOR_UNION,
  323. Mpi2RequestDescriptorUnion_t, MPI2_POINTER pMpi2RequestDescriptorUnion_t;
  324. /* Reply Descriptors */
  325. /* Default Reply Descriptor */
  326. typedef struct _MPI2_DEFAULT_REPLY_DESCRIPTOR
  327. {
  328. U8 ReplyFlags; /* 0x00 */
  329. U8 MSIxIndex; /* 0x01 */
  330. U16 DescriptorTypeDependent1; /* 0x02 */
  331. U32 DescriptorTypeDependent2; /* 0x04 */
  332. } MPI2_DEFAULT_REPLY_DESCRIPTOR, MPI2_POINTER PTR_MPI2_DEFAULT_REPLY_DESCRIPTOR,
  333. Mpi2DefaultReplyDescriptor_t, MPI2_POINTER pMpi2DefaultReplyDescriptor_t;
  334. /* defines for the ReplyFlags field */
  335. #define MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK (0x0F)
  336. #define MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS (0x00)
  337. #define MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY (0x01)
  338. #define MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS (0x02)
  339. #define MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER (0x03)
  340. #define MPI2_RPY_DESCRIPT_FLAGS_RAID_ACCELERATOR_SUCCESS (0x05)
  341. #define MPI2_RPY_DESCRIPT_FLAGS_UNUSED (0x0F)
  342. /* values for marking a reply descriptor as unused */
  343. #define MPI2_RPY_DESCRIPT_UNUSED_WORD0_MARK (0xFFFFFFFF)
  344. #define MPI2_RPY_DESCRIPT_UNUSED_WORD1_MARK (0xFFFFFFFF)
  345. /* Address Reply Descriptor */
  346. typedef struct _MPI2_ADDRESS_REPLY_DESCRIPTOR
  347. {
  348. U8 ReplyFlags; /* 0x00 */
  349. U8 MSIxIndex; /* 0x01 */
  350. U16 SMID; /* 0x02 */
  351. U32 ReplyFrameAddress; /* 0x04 */
  352. } MPI2_ADDRESS_REPLY_DESCRIPTOR, MPI2_POINTER PTR_MPI2_ADDRESS_REPLY_DESCRIPTOR,
  353. Mpi2AddressReplyDescriptor_t, MPI2_POINTER pMpi2AddressReplyDescriptor_t;
  354. #define MPI2_ADDRESS_REPLY_SMID_INVALID (0x00)
  355. /* SCSI IO Success Reply Descriptor */
  356. typedef struct _MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR
  357. {
  358. U8 ReplyFlags; /* 0x00 */
  359. U8 MSIxIndex; /* 0x01 */
  360. U16 SMID; /* 0x02 */
  361. U16 TaskTag; /* 0x04 */
  362. U16 Reserved1; /* 0x06 */
  363. } MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR,
  364. MPI2_POINTER PTR_MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR,
  365. Mpi2SCSIIOSuccessReplyDescriptor_t,
  366. MPI2_POINTER pMpi2SCSIIOSuccessReplyDescriptor_t;
  367. /* TargetAssist Success Reply Descriptor */
  368. typedef struct _MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR
  369. {
  370. U8 ReplyFlags; /* 0x00 */
  371. U8 MSIxIndex; /* 0x01 */
  372. U16 SMID; /* 0x02 */
  373. U8 SequenceNumber; /* 0x04 */
  374. U8 Reserved1; /* 0x05 */
  375. U16 IoIndex; /* 0x06 */
  376. } MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR,
  377. MPI2_POINTER PTR_MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR,
  378. Mpi2TargetAssistSuccessReplyDescriptor_t,
  379. MPI2_POINTER pMpi2TargetAssistSuccessReplyDescriptor_t;
  380. /* Target Command Buffer Reply Descriptor */
  381. typedef struct _MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR
  382. {
  383. U8 ReplyFlags; /* 0x00 */
  384. U8 MSIxIndex; /* 0x01 */
  385. U8 VP_ID; /* 0x02 */
  386. U8 Flags; /* 0x03 */
  387. U16 InitiatorDevHandle; /* 0x04 */
  388. U16 IoIndex; /* 0x06 */
  389. } MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR,
  390. MPI2_POINTER PTR_MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR,
  391. Mpi2TargetCommandBufferReplyDescriptor_t,
  392. MPI2_POINTER pMpi2TargetCommandBufferReplyDescriptor_t;
  393. /* defines for Flags field */
  394. #define MPI2_RPY_DESCRIPT_TCB_FLAGS_PHYNUM_MASK (0x3F)
  395. /* RAID Accelerator Success Reply Descriptor */
  396. typedef struct _MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR {
  397. U8 ReplyFlags; /* 0x00 */
  398. U8 MSIxIndex; /* 0x01 */
  399. U16 SMID; /* 0x02 */
  400. U32 Reserved; /* 0x04 */
  401. } MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR,
  402. MPI2_POINTER PTR_MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR,
  403. Mpi2RAIDAcceleratorSuccessReplyDescriptor_t,
  404. MPI2_POINTER pMpi2RAIDAcceleratorSuccessReplyDescriptor_t;
  405. /* union of Reply Descriptors */
  406. typedef union _MPI2_REPLY_DESCRIPTORS_UNION
  407. {
  408. MPI2_DEFAULT_REPLY_DESCRIPTOR Default;
  409. MPI2_ADDRESS_REPLY_DESCRIPTOR AddressReply;
  410. MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR SCSIIOSuccess;
  411. MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR TargetAssistSuccess;
  412. MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR TargetCommandBuffer;
  413. MPI2_RAID_ACCELERATOR_SUCCESS_REPLY_DESCRIPTOR RAIDAcceleratorSuccess;
  414. U64 Words;
  415. } MPI2_REPLY_DESCRIPTORS_UNION, MPI2_POINTER PTR_MPI2_REPLY_DESCRIPTORS_UNION,
  416. Mpi2ReplyDescriptorsUnion_t, MPI2_POINTER pMpi2ReplyDescriptorsUnion_t;
  417. /*****************************************************************************
  418. *
  419. * Message Functions
  420. *
  421. *****************************************************************************/
  422. #define MPI2_FUNCTION_SCSI_IO_REQUEST (0x00) /* SCSI IO */
  423. #define MPI2_FUNCTION_SCSI_TASK_MGMT (0x01) /* SCSI Task Management */
  424. #define MPI2_FUNCTION_IOC_INIT (0x02) /* IOC Init */
  425. #define MPI2_FUNCTION_IOC_FACTS (0x03) /* IOC Facts */
  426. #define MPI2_FUNCTION_CONFIG (0x04) /* Configuration */
  427. #define MPI2_FUNCTION_PORT_FACTS (0x05) /* Port Facts */
  428. #define MPI2_FUNCTION_PORT_ENABLE (0x06) /* Port Enable */
  429. #define MPI2_FUNCTION_EVENT_NOTIFICATION (0x07) /* Event Notification */
  430. #define MPI2_FUNCTION_EVENT_ACK (0x08) /* Event Acknowledge */
  431. #define MPI2_FUNCTION_FW_DOWNLOAD (0x09) /* FW Download */
  432. #define MPI2_FUNCTION_TARGET_ASSIST (0x0B) /* Target Assist */
  433. #define MPI2_FUNCTION_TARGET_STATUS_SEND (0x0C) /* Target Status Send */
  434. #define MPI2_FUNCTION_TARGET_MODE_ABORT (0x0D) /* Target Mode Abort */
  435. #define MPI2_FUNCTION_FW_UPLOAD (0x12) /* FW Upload */
  436. #define MPI2_FUNCTION_RAID_ACTION (0x15) /* RAID Action */
  437. #define MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH (0x16) /* SCSI IO RAID Passthrough */
  438. #define MPI2_FUNCTION_TOOLBOX (0x17) /* Toolbox */
  439. #define MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR (0x18) /* SCSI Enclosure Processor */
  440. #define MPI2_FUNCTION_SMP_PASSTHROUGH (0x1A) /* SMP Passthrough */
  441. #define MPI2_FUNCTION_SAS_IO_UNIT_CONTROL (0x1B) /* SAS IO Unit Control */
  442. #define MPI2_FUNCTION_SATA_PASSTHROUGH (0x1C) /* SATA Passthrough */
  443. #define MPI2_FUNCTION_DIAG_BUFFER_POST (0x1D) /* Diagnostic Buffer Post */
  444. #define MPI2_FUNCTION_DIAG_RELEASE (0x1E) /* Diagnostic Release */
  445. #define MPI2_FUNCTION_TARGET_CMD_BUF_BASE_POST (0x24) /* Target Command Buffer Post Base */
  446. #define MPI2_FUNCTION_TARGET_CMD_BUF_LIST_POST (0x25) /* Target Command Buffer Post List */
  447. #define MPI2_FUNCTION_RAID_ACCELERATOR (0x2C) /* RAID Accelerator*/
  448. /* Host Based Discovery Action */
  449. #define MPI2_FUNCTION_HOST_BASED_DISCOVERY_ACTION (0x2F)
  450. /* Power Management Control */
  451. #define MPI2_FUNCTION_PWR_MGMT_CONTROL (0x30)
  452. /* Send Host Message */
  453. #define MPI2_FUNCTION_SEND_HOST_MESSAGE (0x31)
  454. /* beginning of product-specific range */
  455. #define MPI2_FUNCTION_MIN_PRODUCT_SPECIFIC (0xF0)
  456. /* end of product-specific range */
  457. #define MPI2_FUNCTION_MAX_PRODUCT_SPECIFIC (0xFF)
  458. /* Doorbell functions */
  459. #define MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET (0x40)
  460. #define MPI2_FUNCTION_HANDSHAKE (0x42)
  461. /*****************************************************************************
  462. *
  463. * IOC Status Values
  464. *
  465. *****************************************************************************/
  466. /* mask for IOCStatus status value */
  467. #define MPI2_IOCSTATUS_MASK (0x7FFF)
  468. /****************************************************************************
  469. * Common IOCStatus values for all replies
  470. ****************************************************************************/
  471. #define MPI2_IOCSTATUS_SUCCESS (0x0000)
  472. #define MPI2_IOCSTATUS_INVALID_FUNCTION (0x0001)
  473. #define MPI2_IOCSTATUS_BUSY (0x0002)
  474. #define MPI2_IOCSTATUS_INVALID_SGL (0x0003)
  475. #define MPI2_IOCSTATUS_INTERNAL_ERROR (0x0004)
  476. #define MPI2_IOCSTATUS_INVALID_VPID (0x0005)
  477. #define MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES (0x0006)
  478. #define MPI2_IOCSTATUS_INVALID_FIELD (0x0007)
  479. #define MPI2_IOCSTATUS_INVALID_STATE (0x0008)
  480. #define MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED (0x0009)
  481. /****************************************************************************
  482. * Config IOCStatus values
  483. ****************************************************************************/
  484. #define MPI2_IOCSTATUS_CONFIG_INVALID_ACTION (0x0020)
  485. #define MPI2_IOCSTATUS_CONFIG_INVALID_TYPE (0x0021)
  486. #define MPI2_IOCSTATUS_CONFIG_INVALID_PAGE (0x0022)
  487. #define MPI2_IOCSTATUS_CONFIG_INVALID_DATA (0x0023)
  488. #define MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS (0x0024)
  489. #define MPI2_IOCSTATUS_CONFIG_CANT_COMMIT (0x0025)
  490. /****************************************************************************
  491. * SCSI IO Reply
  492. ****************************************************************************/
  493. #define MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR (0x0040)
  494. #define MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE (0x0042)
  495. #define MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE (0x0043)
  496. #define MPI2_IOCSTATUS_SCSI_DATA_OVERRUN (0x0044)
  497. #define MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN (0x0045)
  498. #define MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR (0x0046)
  499. #define MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR (0x0047)
  500. #define MPI2_IOCSTATUS_SCSI_TASK_TERMINATED (0x0048)
  501. #define MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH (0x0049)
  502. #define MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED (0x004A)
  503. #define MPI2_IOCSTATUS_SCSI_IOC_TERMINATED (0x004B)
  504. #define MPI2_IOCSTATUS_SCSI_EXT_TERMINATED (0x004C)
  505. /****************************************************************************
  506. * For use by SCSI Initiator and SCSI Target end-to-end data protection
  507. ****************************************************************************/
  508. #define MPI2_IOCSTATUS_EEDP_GUARD_ERROR (0x004D)
  509. #define MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR (0x004E)
  510. #define MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR (0x004F)
  511. /****************************************************************************
  512. * SCSI Target values
  513. ****************************************************************************/
  514. #define MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX (0x0062)
  515. #define MPI2_IOCSTATUS_TARGET_ABORTED (0x0063)
  516. #define MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE (0x0064)
  517. #define MPI2_IOCSTATUS_TARGET_NO_CONNECTION (0x0065)
  518. #define MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH (0x006A)
  519. #define MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR (0x006D)
  520. #define MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA (0x006E)
  521. #define MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT (0x006F)
  522. #define MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT (0x0070)
  523. #define MPI2_IOCSTATUS_TARGET_NAK_RECEIVED (0x0071)
  524. /****************************************************************************
  525. * Serial Attached SCSI values
  526. ****************************************************************************/
  527. #define MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED (0x0090)
  528. #define MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN (0x0091)
  529. /****************************************************************************
  530. * Diagnostic Buffer Post / Diagnostic Release values
  531. ****************************************************************************/
  532. #define MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED (0x00A0)
  533. /****************************************************************************
  534. * RAID Accelerator values
  535. ****************************************************************************/
  536. #define MPI2_IOCSTATUS_RAID_ACCEL_ERROR (0x00B0)
  537. /****************************************************************************
  538. * IOCStatus flag to indicate that log info is available
  539. ****************************************************************************/
  540. #define MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE (0x8000)
  541. /****************************************************************************
  542. * IOCLogInfo Types
  543. ****************************************************************************/
  544. #define MPI2_IOCLOGINFO_TYPE_MASK (0xF0000000)
  545. #define MPI2_IOCLOGINFO_TYPE_SHIFT (28)
  546. #define MPI2_IOCLOGINFO_TYPE_NONE (0x0)
  547. #define MPI2_IOCLOGINFO_TYPE_SCSI (0x1)
  548. #define MPI2_IOCLOGINFO_TYPE_FC (0x2)
  549. #define MPI2_IOCLOGINFO_TYPE_SAS (0x3)
  550. #define MPI2_IOCLOGINFO_TYPE_ISCSI (0x4)
  551. #define MPI2_IOCLOGINFO_LOG_DATA_MASK (0x0FFFFFFF)
  552. /*****************************************************************************
  553. *
  554. * Standard Message Structures
  555. *
  556. *****************************************************************************/
  557. /****************************************************************************
  558. * Request Message Header for all request messages
  559. ****************************************************************************/
  560. typedef struct _MPI2_REQUEST_HEADER
  561. {
  562. U16 FunctionDependent1; /* 0x00 */
  563. U8 ChainOffset; /* 0x02 */
  564. U8 Function; /* 0x03 */
  565. U16 FunctionDependent2; /* 0x04 */
  566. U8 FunctionDependent3; /* 0x06 */
  567. U8 MsgFlags; /* 0x07 */
  568. U8 VP_ID; /* 0x08 */
  569. U8 VF_ID; /* 0x09 */
  570. U16 Reserved1; /* 0x0A */
  571. } MPI2_REQUEST_HEADER, MPI2_POINTER PTR_MPI2_REQUEST_HEADER,
  572. MPI2RequestHeader_t, MPI2_POINTER pMPI2RequestHeader_t;
  573. /****************************************************************************
  574. * Default Reply
  575. ****************************************************************************/
  576. typedef struct _MPI2_DEFAULT_REPLY
  577. {
  578. U16 FunctionDependent1; /* 0x00 */
  579. U8 MsgLength; /* 0x02 */
  580. U8 Function; /* 0x03 */
  581. U16 FunctionDependent2; /* 0x04 */
  582. U8 FunctionDependent3; /* 0x06 */
  583. U8 MsgFlags; /* 0x07 */
  584. U8 VP_ID; /* 0x08 */
  585. U8 VF_ID; /* 0x09 */
  586. U16 Reserved1; /* 0x0A */
  587. U16 FunctionDependent5; /* 0x0C */
  588. U16 IOCStatus; /* 0x0E */
  589. U32 IOCLogInfo; /* 0x10 */
  590. } MPI2_DEFAULT_REPLY, MPI2_POINTER PTR_MPI2_DEFAULT_REPLY,
  591. MPI2DefaultReply_t, MPI2_POINTER pMPI2DefaultReply_t;
  592. /* common version structure/union used in messages and configuration pages */
  593. typedef struct _MPI2_VERSION_STRUCT
  594. {
  595. U8 Dev; /* 0x00 */
  596. U8 Unit; /* 0x01 */
  597. U8 Minor; /* 0x02 */
  598. U8 Major; /* 0x03 */
  599. } MPI2_VERSION_STRUCT;
  600. typedef union _MPI2_VERSION_UNION
  601. {
  602. MPI2_VERSION_STRUCT Struct;
  603. U32 Word;
  604. } MPI2_VERSION_UNION;
  605. /* LUN field defines, common to many structures */
  606. #define MPI2_LUN_FIRST_LEVEL_ADDRESSING (0x0000FFFF)
  607. #define MPI2_LUN_SECOND_LEVEL_ADDRESSING (0xFFFF0000)
  608. #define MPI2_LUN_THIRD_LEVEL_ADDRESSING (0x0000FFFF)
  609. #define MPI2_LUN_FOURTH_LEVEL_ADDRESSING (0xFFFF0000)
  610. #define MPI2_LUN_LEVEL_1_WORD (0xFF00)
  611. #define MPI2_LUN_LEVEL_1_DWORD (0x0000FF00)
  612. /*****************************************************************************
  613. *
  614. * Fusion-MPT MPI Scatter Gather Elements
  615. *
  616. *****************************************************************************/
  617. /****************************************************************************
  618. * MPI Simple Element structures
  619. ****************************************************************************/
  620. typedef struct _MPI2_SGE_SIMPLE32
  621. {
  622. U32 FlagsLength;
  623. U32 Address;
  624. } MPI2_SGE_SIMPLE32, MPI2_POINTER PTR_MPI2_SGE_SIMPLE32,
  625. Mpi2SGESimple32_t, MPI2_POINTER pMpi2SGESimple32_t;
  626. typedef struct _MPI2_SGE_SIMPLE64
  627. {
  628. U32 FlagsLength;
  629. U64 Address;
  630. } MPI2_SGE_SIMPLE64, MPI2_POINTER PTR_MPI2_SGE_SIMPLE64,
  631. Mpi2SGESimple64_t, MPI2_POINTER pMpi2SGESimple64_t;
  632. typedef struct _MPI2_SGE_SIMPLE_UNION
  633. {
  634. U32 FlagsLength;
  635. union
  636. {
  637. U32 Address32;
  638. U64 Address64;
  639. } u;
  640. } MPI2_SGE_SIMPLE_UNION, MPI2_POINTER PTR_MPI2_SGE_SIMPLE_UNION,
  641. Mpi2SGESimpleUnion_t, MPI2_POINTER pMpi2SGESimpleUnion_t;
  642. /****************************************************************************
  643. * MPI Chain Element structures
  644. ****************************************************************************/
  645. typedef struct _MPI2_SGE_CHAIN32
  646. {
  647. U16 Length;
  648. U8 NextChainOffset;
  649. U8 Flags;
  650. U32 Address;
  651. } MPI2_SGE_CHAIN32, MPI2_POINTER PTR_MPI2_SGE_CHAIN32,
  652. Mpi2SGEChain32_t, MPI2_POINTER pMpi2SGEChain32_t;
  653. typedef struct _MPI2_SGE_CHAIN64
  654. {
  655. U16 Length;
  656. U8 NextChainOffset;
  657. U8 Flags;
  658. U64 Address;
  659. } MPI2_SGE_CHAIN64, MPI2_POINTER PTR_MPI2_SGE_CHAIN64,
  660. Mpi2SGEChain64_t, MPI2_POINTER pMpi2SGEChain64_t;
  661. typedef struct _MPI2_SGE_CHAIN_UNION
  662. {
  663. U16 Length;
  664. U8 NextChainOffset;
  665. U8 Flags;
  666. union
  667. {
  668. U32 Address32;
  669. U64 Address64;
  670. } u;
  671. } MPI2_SGE_CHAIN_UNION, MPI2_POINTER PTR_MPI2_SGE_CHAIN_UNION,
  672. Mpi2SGEChainUnion_t, MPI2_POINTER pMpi2SGEChainUnion_t;
  673. /****************************************************************************
  674. * MPI Transaction Context Element structures
  675. ****************************************************************************/
  676. typedef struct _MPI2_SGE_TRANSACTION32
  677. {
  678. U8 Reserved;
  679. U8 ContextSize;
  680. U8 DetailsLength;
  681. U8 Flags;
  682. U32 TransactionContext[1];
  683. U32 TransactionDetails[1];
  684. } MPI2_SGE_TRANSACTION32, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION32,
  685. Mpi2SGETransaction32_t, MPI2_POINTER pMpi2SGETransaction32_t;
  686. typedef struct _MPI2_SGE_TRANSACTION64
  687. {
  688. U8 Reserved;
  689. U8 ContextSize;
  690. U8 DetailsLength;
  691. U8 Flags;
  692. U32 TransactionContext[2];
  693. U32 TransactionDetails[1];
  694. } MPI2_SGE_TRANSACTION64, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION64,
  695. Mpi2SGETransaction64_t, MPI2_POINTER pMpi2SGETransaction64_t;
  696. typedef struct _MPI2_SGE_TRANSACTION96
  697. {
  698. U8 Reserved;
  699. U8 ContextSize;
  700. U8 DetailsLength;
  701. U8 Flags;
  702. U32 TransactionContext[3];
  703. U32 TransactionDetails[1];
  704. } MPI2_SGE_TRANSACTION96, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION96,
  705. Mpi2SGETransaction96_t, MPI2_POINTER pMpi2SGETransaction96_t;
  706. typedef struct _MPI2_SGE_TRANSACTION128
  707. {
  708. U8 Reserved;
  709. U8 ContextSize;
  710. U8 DetailsLength;
  711. U8 Flags;
  712. U32 TransactionContext[4];
  713. U32 TransactionDetails[1];
  714. } MPI2_SGE_TRANSACTION128, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION128,
  715. Mpi2SGETransaction_t128, MPI2_POINTER pMpi2SGETransaction_t128;
  716. typedef struct _MPI2_SGE_TRANSACTION_UNION
  717. {
  718. U8 Reserved;
  719. U8 ContextSize;
  720. U8 DetailsLength;
  721. U8 Flags;
  722. union
  723. {
  724. U32 TransactionContext32[1];
  725. U32 TransactionContext64[2];
  726. U32 TransactionContext96[3];
  727. U32 TransactionContext128[4];
  728. } u;
  729. U32 TransactionDetails[1];
  730. } MPI2_SGE_TRANSACTION_UNION, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION_UNION,
  731. Mpi2SGETransactionUnion_t, MPI2_POINTER pMpi2SGETransactionUnion_t;
  732. /****************************************************************************
  733. * MPI SGE union for IO SGL's
  734. ****************************************************************************/
  735. typedef struct _MPI2_MPI_SGE_IO_UNION
  736. {
  737. union
  738. {
  739. MPI2_SGE_SIMPLE_UNION Simple;
  740. MPI2_SGE_CHAIN_UNION Chain;
  741. } u;
  742. } MPI2_MPI_SGE_IO_UNION, MPI2_POINTER PTR_MPI2_MPI_SGE_IO_UNION,
  743. Mpi2MpiSGEIOUnion_t, MPI2_POINTER pMpi2MpiSGEIOUnion_t;
  744. /****************************************************************************
  745. * MPI SGE union for SGL's with Simple and Transaction elements
  746. ****************************************************************************/
  747. typedef struct _MPI2_SGE_TRANS_SIMPLE_UNION
  748. {
  749. union
  750. {
  751. MPI2_SGE_SIMPLE_UNION Simple;
  752. MPI2_SGE_TRANSACTION_UNION Transaction;
  753. } u;
  754. } MPI2_SGE_TRANS_SIMPLE_UNION, MPI2_POINTER PTR_MPI2_SGE_TRANS_SIMPLE_UNION,
  755. Mpi2SGETransSimpleUnion_t, MPI2_POINTER pMpi2SGETransSimpleUnion_t;
  756. /****************************************************************************
  757. * All MPI SGE types union
  758. ****************************************************************************/
  759. typedef struct _MPI2_MPI_SGE_UNION
  760. {
  761. union
  762. {
  763. MPI2_SGE_SIMPLE_UNION Simple;
  764. MPI2_SGE_CHAIN_UNION Chain;
  765. MPI2_SGE_TRANSACTION_UNION Transaction;
  766. } u;
  767. } MPI2_MPI_SGE_UNION, MPI2_POINTER PTR_MPI2_MPI_SGE_UNION,
  768. Mpi2MpiSgeUnion_t, MPI2_POINTER pMpi2MpiSgeUnion_t;
  769. /****************************************************************************
  770. * MPI SGE field definition and masks
  771. ****************************************************************************/
  772. /* Flags field bit definitions */
  773. #define MPI2_SGE_FLAGS_LAST_ELEMENT (0x80)
  774. #define MPI2_SGE_FLAGS_END_OF_BUFFER (0x40)
  775. #define MPI2_SGE_FLAGS_ELEMENT_TYPE_MASK (0x30)
  776. #define MPI2_SGE_FLAGS_LOCAL_ADDRESS (0x08)
  777. #define MPI2_SGE_FLAGS_DIRECTION (0x04)
  778. #define MPI2_SGE_FLAGS_ADDRESS_SIZE (0x02)
  779. #define MPI2_SGE_FLAGS_END_OF_LIST (0x01)
  780. #define MPI2_SGE_FLAGS_SHIFT (24)
  781. #define MPI2_SGE_LENGTH_MASK (0x00FFFFFF)
  782. #define MPI2_SGE_CHAIN_LENGTH_MASK (0x0000FFFF)
  783. /* Element Type */
  784. #define MPI2_SGE_FLAGS_TRANSACTION_ELEMENT (0x00)
  785. #define MPI2_SGE_FLAGS_SIMPLE_ELEMENT (0x10)
  786. #define MPI2_SGE_FLAGS_CHAIN_ELEMENT (0x30)
  787. #define MPI2_SGE_FLAGS_ELEMENT_MASK (0x30)
  788. /* Address location */
  789. #define MPI2_SGE_FLAGS_SYSTEM_ADDRESS (0x00)
  790. /* Direction */
  791. #define MPI2_SGE_FLAGS_IOC_TO_HOST (0x00)
  792. #define MPI2_SGE_FLAGS_HOST_TO_IOC (0x04)
  793. #define MPI2_SGE_FLAGS_DEST (MPI2_SGE_FLAGS_IOC_TO_HOST)
  794. #define MPI2_SGE_FLAGS_SOURCE (MPI2_SGE_FLAGS_HOST_TO_IOC)
  795. /* Address Size */
  796. #define MPI2_SGE_FLAGS_32_BIT_ADDRESSING (0x00)
  797. #define MPI2_SGE_FLAGS_64_BIT_ADDRESSING (0x02)
  798. /* Context Size */
  799. #define MPI2_SGE_FLAGS_32_BIT_CONTEXT (0x00)
  800. #define MPI2_SGE_FLAGS_64_BIT_CONTEXT (0x02)
  801. #define MPI2_SGE_FLAGS_96_BIT_CONTEXT (0x04)
  802. #define MPI2_SGE_FLAGS_128_BIT_CONTEXT (0x06)
  803. #define MPI2_SGE_CHAIN_OFFSET_MASK (0x00FF0000)
  804. #define MPI2_SGE_CHAIN_OFFSET_SHIFT (16)
  805. /****************************************************************************
  806. * MPI SGE operation Macros
  807. ****************************************************************************/
  808. /* SIMPLE FlagsLength manipulations... */
  809. #define MPI2_SGE_SET_FLAGS(f) ((U32)(f) << MPI2_SGE_FLAGS_SHIFT)
  810. #define MPI2_SGE_GET_FLAGS(f) (((f) & ~MPI2_SGE_LENGTH_MASK) >> MPI2_SGE_FLAGS_SHIFT)
  811. #define MPI2_SGE_LENGTH(f) ((f) & MPI2_SGE_LENGTH_MASK)
  812. #define MPI2_SGE_CHAIN_LENGTH(f) ((f) & MPI2_SGE_CHAIN_LENGTH_MASK)
  813. #define MPI2_SGE_SET_FLAGS_LENGTH(f,l) (MPI2_SGE_SET_FLAGS(f) | MPI2_SGE_LENGTH(l))
  814. #define MPI2_pSGE_GET_FLAGS(psg) MPI2_SGE_GET_FLAGS((psg)->FlagsLength)
  815. #define MPI2_pSGE_GET_LENGTH(psg) MPI2_SGE_LENGTH((psg)->FlagsLength)
  816. #define MPI2_pSGE_SET_FLAGS_LENGTH(psg,f,l) (psg)->FlagsLength = MPI2_SGE_SET_FLAGS_LENGTH(f,l)
  817. /* CAUTION - The following are READ-MODIFY-WRITE! */
  818. #define MPI2_pSGE_SET_FLAGS(psg,f) (psg)->FlagsLength |= MPI2_SGE_SET_FLAGS(f)
  819. #define MPI2_pSGE_SET_LENGTH(psg,l) (psg)->FlagsLength |= MPI2_SGE_LENGTH(l)
  820. #define MPI2_GET_CHAIN_OFFSET(x) ((x & MPI2_SGE_CHAIN_OFFSET_MASK) >> MPI2_SGE_CHAIN_OFFSET_SHIFT)
  821. /*****************************************************************************
  822. *
  823. * Fusion-MPT IEEE Scatter Gather Elements
  824. *
  825. *****************************************************************************/
  826. /****************************************************************************
  827. * IEEE Simple Element structures
  828. ****************************************************************************/
  829. typedef struct _MPI2_IEEE_SGE_SIMPLE32
  830. {
  831. U32 Address;
  832. U32 FlagsLength;
  833. } MPI2_IEEE_SGE_SIMPLE32, MPI2_POINTER PTR_MPI2_IEEE_SGE_SIMPLE32,
  834. Mpi2IeeeSgeSimple32_t, MPI2_POINTER pMpi2IeeeSgeSimple32_t;
  835. typedef struct _MPI2_IEEE_SGE_SIMPLE64
  836. {
  837. U64 Address;
  838. U32 Length;
  839. U16 Reserved1;
  840. U8 Reserved2;
  841. U8 Flags;
  842. } MPI2_IEEE_SGE_SIMPLE64, MPI2_POINTER PTR_MPI2_IEEE_SGE_SIMPLE64,
  843. Mpi2IeeeSgeSimple64_t, MPI2_POINTER pMpi2IeeeSgeSimple64_t;
  844. typedef union _MPI2_IEEE_SGE_SIMPLE_UNION
  845. {
  846. MPI2_IEEE_SGE_SIMPLE32 Simple32;
  847. MPI2_IEEE_SGE_SIMPLE64 Simple64;
  848. } MPI2_IEEE_SGE_SIMPLE_UNION, MPI2_POINTER PTR_MPI2_IEEE_SGE_SIMPLE_UNION,
  849. Mpi2IeeeSgeSimpleUnion_t, MPI2_POINTER pMpi2IeeeSgeSimpleUnion_t;
  850. /****************************************************************************
  851. * IEEE Chain Element structures
  852. ****************************************************************************/
  853. typedef MPI2_IEEE_SGE_SIMPLE32 MPI2_IEEE_SGE_CHAIN32;
  854. typedef MPI2_IEEE_SGE_SIMPLE64 MPI2_IEEE_SGE_CHAIN64;
  855. typedef union _MPI2_IEEE_SGE_CHAIN_UNION
  856. {
  857. MPI2_IEEE_SGE_CHAIN32 Chain32;
  858. MPI2_IEEE_SGE_CHAIN64 Chain64;
  859. } MPI2_IEEE_SGE_CHAIN_UNION, MPI2_POINTER PTR_MPI2_IEEE_SGE_CHAIN_UNION,
  860. Mpi2IeeeSgeChainUnion_t, MPI2_POINTER pMpi2IeeeSgeChainUnion_t;
  861. /****************************************************************************
  862. * All IEEE SGE types union
  863. ****************************************************************************/
  864. typedef struct _MPI2_IEEE_SGE_UNION
  865. {
  866. union
  867. {
  868. MPI2_IEEE_SGE_SIMPLE_UNION Simple;
  869. MPI2_IEEE_SGE_CHAIN_UNION Chain;
  870. } u;
  871. } MPI2_IEEE_SGE_UNION, MPI2_POINTER PTR_MPI2_IEEE_SGE_UNION,
  872. Mpi2IeeeSgeUnion_t, MPI2_POINTER pMpi2IeeeSgeUnion_t;
  873. /****************************************************************************
  874. * IEEE SGE field definitions and masks
  875. ****************************************************************************/
  876. /* Flags field bit definitions */
  877. #define MPI2_IEEE_SGE_FLAGS_ELEMENT_TYPE_MASK (0x80)
  878. #define MPI2_IEEE32_SGE_FLAGS_SHIFT (24)
  879. #define MPI2_IEEE32_SGE_LENGTH_MASK (0x00FFFFFF)
  880. /* Element Type */
  881. #define MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT (0x00)
  882. #define MPI2_IEEE_SGE_FLAGS_CHAIN_ELEMENT (0x80)
  883. /* Data Location Address Space */
  884. #define MPI2_IEEE_SGE_FLAGS_ADDR_MASK (0x03)
  885. #define MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR (0x00)
  886. /* IEEE Simple Element only */
  887. #define MPI2_IEEE_SGE_FLAGS_IOCDDR_ADDR (0x01)
  888. /* IEEE Simple Element only */
  889. #define MPI2_IEEE_SGE_FLAGS_IOCPLB_ADDR (0x02)
  890. #define MPI2_IEEE_SGE_FLAGS_IOCPLBNTA_ADDR (0x03)
  891. /* IEEE Simple Element only */
  892. #define MPI2_IEEE_SGE_FLAGS_SYSTEMPLBCPI_ADDR (0x03)
  893. /* IEEE Chain Element only */
  894. /****************************************************************************
  895. * IEEE SGE operation Macros
  896. ****************************************************************************/
  897. /* SIMPLE FlagsLength manipulations... */
  898. #define MPI2_IEEE32_SGE_SET_FLAGS(f) ((U32)(f) << MPI2_IEEE32_SGE_FLAGS_SHIFT)
  899. #define MPI2_IEEE32_SGE_GET_FLAGS(f) (((f) & ~MPI2_IEEE32_SGE_LENGTH_MASK) >> MPI2_IEEE32_SGE_FLAGS_SHIFT)
  900. #define MPI2_IEEE32_SGE_LENGTH(f) ((f) & MPI2_IEEE32_SGE_LENGTH_MASK)
  901. #define MPI2_IEEE32_SGE_SET_FLAGS_LENGTH(f, l) (MPI2_IEEE32_SGE_SET_FLAGS(f) | MPI2_IEEE32_SGE_LENGTH(l))
  902. #define MPI2_IEEE32_pSGE_GET_FLAGS(psg) MPI2_IEEE32_SGE_GET_FLAGS((psg)->FlagsLength)
  903. #define MPI2_IEEE32_pSGE_GET_LENGTH(psg) MPI2_IEEE32_SGE_LENGTH((psg)->FlagsLength)
  904. #define MPI2_IEEE32_pSGE_SET_FLAGS_LENGTH(psg,f,l) (psg)->FlagsLength = MPI2_IEEE32_SGE_SET_FLAGS_LENGTH(f,l)
  905. /* CAUTION - The following are READ-MODIFY-WRITE! */
  906. #define MPI2_IEEE32_pSGE_SET_FLAGS(psg,f) (psg)->FlagsLength |= MPI2_IEEE32_SGE_SET_FLAGS(f)
  907. #define MPI2_IEEE32_pSGE_SET_LENGTH(psg,l) (psg)->FlagsLength |= MPI2_IEEE32_SGE_LENGTH(l)
  908. /*****************************************************************************
  909. *
  910. * Fusion-MPT MPI/IEEE Scatter Gather Unions
  911. *
  912. *****************************************************************************/
  913. typedef union _MPI2_SIMPLE_SGE_UNION
  914. {
  915. MPI2_SGE_SIMPLE_UNION MpiSimple;
  916. MPI2_IEEE_SGE_SIMPLE_UNION IeeeSimple;
  917. } MPI2_SIMPLE_SGE_UNION, MPI2_POINTER PTR_MPI2_SIMPLE_SGE_UNION,
  918. Mpi2SimpleSgeUntion_t, MPI2_POINTER pMpi2SimpleSgeUntion_t;
  919. typedef union _MPI2_SGE_IO_UNION
  920. {
  921. MPI2_SGE_SIMPLE_UNION MpiSimple;
  922. MPI2_SGE_CHAIN_UNION MpiChain;
  923. MPI2_IEEE_SGE_SIMPLE_UNION IeeeSimple;
  924. MPI2_IEEE_SGE_CHAIN_UNION IeeeChain;
  925. } MPI2_SGE_IO_UNION, MPI2_POINTER PTR_MPI2_SGE_IO_UNION,
  926. Mpi2SGEIOUnion_t, MPI2_POINTER pMpi2SGEIOUnion_t;
  927. /****************************************************************************
  928. *
  929. * Values for SGLFlags field, used in many request messages with an SGL
  930. *
  931. ****************************************************************************/
  932. /* values for MPI SGL Data Location Address Space subfield */
  933. #define MPI2_SGLFLAGS_ADDRESS_SPACE_MASK (0x0C)
  934. #define MPI2_SGLFLAGS_SYSTEM_ADDRESS_SPACE (0x00)
  935. #define MPI2_SGLFLAGS_IOCDDR_ADDRESS_SPACE (0x04)
  936. #define MPI2_SGLFLAGS_IOCPLB_ADDRESS_SPACE (0x08)
  937. #define MPI2_SGLFLAGS_IOCPLBNTA_ADDRESS_SPACE (0x0C)
  938. /* values for SGL Type subfield */
  939. #define MPI2_SGLFLAGS_SGL_TYPE_MASK (0x03)
  940. #define MPI2_SGLFLAGS_SGL_TYPE_MPI (0x00)
  941. #define MPI2_SGLFLAGS_SGL_TYPE_IEEE32 (0x01)
  942. #define MPI2_SGLFLAGS_SGL_TYPE_IEEE64 (0x02)
  943. #endif