omap_hwmod.c 75 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517251825192520252125222523252425252526252725282529253025312532253325342535253625372538253925402541254225432544254525462547254825492550255125522553255425552556255725582559256025612562256325642565256625672568256925702571257225732574257525762577257825792580258125822583258425852586258725882589259025912592259325942595259625972598259926002601260226032604260526062607260826092610261126122613261426152616261726182619262026212622262326242625262626272628262926302631263226332634263526362637263826392640264126422643264426452646264726482649265026512652265326542655265626572658265926602661266226632664266526662667266826692670267126722673267426752676267726782679268026812682268326842685268626872688268926902691269226932694269526962697269826992700270127022703270427052706270727082709271027112712271327142715271627172718271927202721272227232724272527262727272827292730273127322733273427352736273727382739274027412742274327442745274627472748274927502751275227532754275527562757275827592760276127622763276427652766276727682769277027712772277327742775
  1. /*
  2. * omap_hwmod implementation for OMAP2/3/4
  3. *
  4. * Copyright (C) 2009-2011 Nokia Corporation
  5. * Copyright (C) 2011 Texas Instruments, Inc.
  6. *
  7. * Paul Walmsley, Benoît Cousson, Kevin Hilman
  8. *
  9. * Created in collaboration with (alphabetical order): Thara Gopinath,
  10. * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
  11. * Sawant, Santosh Shilimkar, Richard Woodruff
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License version 2 as
  15. * published by the Free Software Foundation.
  16. *
  17. * Introduction
  18. * ------------
  19. * One way to view an OMAP SoC is as a collection of largely unrelated
  20. * IP blocks connected by interconnects. The IP blocks include
  21. * devices such as ARM processors, audio serial interfaces, UARTs,
  22. * etc. Some of these devices, like the DSP, are created by TI;
  23. * others, like the SGX, largely originate from external vendors. In
  24. * TI's documentation, on-chip devices are referred to as "OMAP
  25. * modules." Some of these IP blocks are identical across several
  26. * OMAP versions. Others are revised frequently.
  27. *
  28. * These OMAP modules are tied together by various interconnects.
  29. * Most of the address and data flow between modules is via OCP-based
  30. * interconnects such as the L3 and L4 buses; but there are other
  31. * interconnects that distribute the hardware clock tree, handle idle
  32. * and reset signaling, supply power, and connect the modules to
  33. * various pads or balls on the OMAP package.
  34. *
  35. * OMAP hwmod provides a consistent way to describe the on-chip
  36. * hardware blocks and their integration into the rest of the chip.
  37. * This description can be automatically generated from the TI
  38. * hardware database. OMAP hwmod provides a standard, consistent API
  39. * to reset, enable, idle, and disable these hardware blocks. And
  40. * hwmod provides a way for other core code, such as the Linux device
  41. * code or the OMAP power management and address space mapping code,
  42. * to query the hardware database.
  43. *
  44. * Using hwmod
  45. * -----------
  46. * Drivers won't call hwmod functions directly. That is done by the
  47. * omap_device code, and in rare occasions, by custom integration code
  48. * in arch/arm/ *omap*. The omap_device code includes functions to
  49. * build a struct platform_device using omap_hwmod data, and that is
  50. * currently how hwmod data is communicated to drivers and to the
  51. * Linux driver model. Most drivers will call omap_hwmod functions only
  52. * indirectly, via pm_runtime*() functions.
  53. *
  54. * From a layering perspective, here is where the OMAP hwmod code
  55. * fits into the kernel software stack:
  56. *
  57. * +-------------------------------+
  58. * | Device driver code |
  59. * | (e.g., drivers/) |
  60. * +-------------------------------+
  61. * | Linux driver model |
  62. * | (platform_device / |
  63. * | platform_driver data/code) |
  64. * +-------------------------------+
  65. * | OMAP core-driver integration |
  66. * |(arch/arm/mach-omap2/devices.c)|
  67. * +-------------------------------+
  68. * | omap_device code |
  69. * | (../plat-omap/omap_device.c) |
  70. * +-------------------------------+
  71. * ----> | omap_hwmod code/data | <-----
  72. * | (../mach-omap2/omap_hwmod*) |
  73. * +-------------------------------+
  74. * | OMAP clock/PRCM/register fns |
  75. * | (__raw_{read,write}l, clk*) |
  76. * +-------------------------------+
  77. *
  78. * Device drivers should not contain any OMAP-specific code or data in
  79. * them. They should only contain code to operate the IP block that
  80. * the driver is responsible for. This is because these IP blocks can
  81. * also appear in other SoCs, either from TI (such as DaVinci) or from
  82. * other manufacturers; and drivers should be reusable across other
  83. * platforms.
  84. *
  85. * The OMAP hwmod code also will attempt to reset and idle all on-chip
  86. * devices upon boot. The goal here is for the kernel to be
  87. * completely self-reliant and independent from bootloaders. This is
  88. * to ensure a repeatable configuration, both to ensure consistent
  89. * runtime behavior, and to make it easier for others to reproduce
  90. * bugs.
  91. *
  92. * OMAP module activity states
  93. * ---------------------------
  94. * The hwmod code considers modules to be in one of several activity
  95. * states. IP blocks start out in an UNKNOWN state, then once they
  96. * are registered via the hwmod code, proceed to the REGISTERED state.
  97. * Once their clock names are resolved to clock pointers, the module
  98. * enters the CLKS_INITED state; and finally, once the module has been
  99. * reset and the integration registers programmed, the INITIALIZED state
  100. * is entered. The hwmod code will then place the module into either
  101. * the IDLE state to save power, or in the case of a critical system
  102. * module, the ENABLED state.
  103. *
  104. * OMAP core integration code can then call omap_hwmod*() functions
  105. * directly to move the module between the IDLE, ENABLED, and DISABLED
  106. * states, as needed. This is done during both the PM idle loop, and
  107. * in the OMAP core integration code's implementation of the PM runtime
  108. * functions.
  109. *
  110. * References
  111. * ----------
  112. * This is a partial list.
  113. * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
  114. * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
  115. * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
  116. * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
  117. * - Open Core Protocol Specification 2.2
  118. *
  119. * To do:
  120. * - handle IO mapping
  121. * - bus throughput & module latency measurement code
  122. *
  123. * XXX add tests at the beginning of each function to ensure the hwmod is
  124. * in the appropriate state
  125. * XXX error return values should be checked to ensure that they are
  126. * appropriate
  127. */
  128. #undef DEBUG
  129. #include <linux/kernel.h>
  130. #include <linux/errno.h>
  131. #include <linux/io.h>
  132. #include <linux/clk.h>
  133. #include <linux/delay.h>
  134. #include <linux/err.h>
  135. #include <linux/list.h>
  136. #include <linux/mutex.h>
  137. #include <linux/spinlock.h>
  138. #include <linux/slab.h>
  139. #include "common.h"
  140. #include <plat/cpu.h>
  141. #include "clockdomain.h"
  142. #include "powerdomain.h"
  143. #include <plat/clock.h>
  144. #include <plat/omap_hwmod.h>
  145. #include <plat/prcm.h>
  146. #include "cm2xxx_3xxx.h"
  147. #include "cminst44xx.h"
  148. #include "prm2xxx_3xxx.h"
  149. #include "prm44xx.h"
  150. #include "prminst44xx.h"
  151. #include "mux.h"
  152. /* Maximum microseconds to wait for OMAP module to softreset */
  153. #define MAX_MODULE_SOFTRESET_WAIT 10000
  154. /* Name of the OMAP hwmod for the MPU */
  155. #define MPU_INITIATOR_NAME "mpu"
  156. /* omap_hwmod_list contains all registered struct omap_hwmods */
  157. static LIST_HEAD(omap_hwmod_list);
  158. /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
  159. static struct omap_hwmod *mpu_oh;
  160. /* Private functions */
  161. /**
  162. * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
  163. * @oh: struct omap_hwmod *
  164. *
  165. * Load the current value of the hwmod OCP_SYSCONFIG register into the
  166. * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
  167. * OCP_SYSCONFIG register or 0 upon success.
  168. */
  169. static int _update_sysc_cache(struct omap_hwmod *oh)
  170. {
  171. if (!oh->class->sysc) {
  172. WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  173. return -EINVAL;
  174. }
  175. /* XXX ensure module interface clock is up */
  176. oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  177. if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
  178. oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
  179. return 0;
  180. }
  181. /**
  182. * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
  183. * @v: OCP_SYSCONFIG value to write
  184. * @oh: struct omap_hwmod *
  185. *
  186. * Write @v into the module class' OCP_SYSCONFIG register, if it has
  187. * one. No return value.
  188. */
  189. static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
  190. {
  191. if (!oh->class->sysc) {
  192. WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  193. return;
  194. }
  195. /* XXX ensure module interface clock is up */
  196. /* Module might have lost context, always update cache and register */
  197. oh->_sysc_cache = v;
  198. omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
  199. }
  200. /**
  201. * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
  202. * @oh: struct omap_hwmod *
  203. * @standbymode: MIDLEMODE field bits
  204. * @v: pointer to register contents to modify
  205. *
  206. * Update the master standby mode bits in @v to be @standbymode for
  207. * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
  208. * upon error or 0 upon success.
  209. */
  210. static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
  211. u32 *v)
  212. {
  213. u32 mstandby_mask;
  214. u8 mstandby_shift;
  215. if (!oh->class->sysc ||
  216. !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
  217. return -EINVAL;
  218. if (!oh->class->sysc->sysc_fields) {
  219. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  220. return -EINVAL;
  221. }
  222. mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
  223. mstandby_mask = (0x3 << mstandby_shift);
  224. *v &= ~mstandby_mask;
  225. *v |= __ffs(standbymode) << mstandby_shift;
  226. return 0;
  227. }
  228. /**
  229. * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
  230. * @oh: struct omap_hwmod *
  231. * @idlemode: SIDLEMODE field bits
  232. * @v: pointer to register contents to modify
  233. *
  234. * Update the slave idle mode bits in @v to be @idlemode for the @oh
  235. * hwmod. Does not write to the hardware. Returns -EINVAL upon error
  236. * or 0 upon success.
  237. */
  238. static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
  239. {
  240. u32 sidle_mask;
  241. u8 sidle_shift;
  242. if (!oh->class->sysc ||
  243. !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
  244. return -EINVAL;
  245. if (!oh->class->sysc->sysc_fields) {
  246. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  247. return -EINVAL;
  248. }
  249. sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
  250. sidle_mask = (0x3 << sidle_shift);
  251. *v &= ~sidle_mask;
  252. *v |= __ffs(idlemode) << sidle_shift;
  253. return 0;
  254. }
  255. /**
  256. * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  257. * @oh: struct omap_hwmod *
  258. * @clockact: CLOCKACTIVITY field bits
  259. * @v: pointer to register contents to modify
  260. *
  261. * Update the clockactivity mode bits in @v to be @clockact for the
  262. * @oh hwmod. Used for additional powersaving on some modules. Does
  263. * not write to the hardware. Returns -EINVAL upon error or 0 upon
  264. * success.
  265. */
  266. static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
  267. {
  268. u32 clkact_mask;
  269. u8 clkact_shift;
  270. if (!oh->class->sysc ||
  271. !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
  272. return -EINVAL;
  273. if (!oh->class->sysc->sysc_fields) {
  274. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  275. return -EINVAL;
  276. }
  277. clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
  278. clkact_mask = (0x3 << clkact_shift);
  279. *v &= ~clkact_mask;
  280. *v |= clockact << clkact_shift;
  281. return 0;
  282. }
  283. /**
  284. * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  285. * @oh: struct omap_hwmod *
  286. * @v: pointer to register contents to modify
  287. *
  288. * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
  289. * error or 0 upon success.
  290. */
  291. static int _set_softreset(struct omap_hwmod *oh, u32 *v)
  292. {
  293. u32 softrst_mask;
  294. if (!oh->class->sysc ||
  295. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  296. return -EINVAL;
  297. if (!oh->class->sysc->sysc_fields) {
  298. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  299. return -EINVAL;
  300. }
  301. softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
  302. *v |= softrst_mask;
  303. return 0;
  304. }
  305. /**
  306. * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
  307. * @oh: struct omap_hwmod *
  308. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  309. * @v: pointer to register contents to modify
  310. *
  311. * Update the module autoidle bit in @v to be @autoidle for the @oh
  312. * hwmod. The autoidle bit controls whether the module can gate
  313. * internal clocks automatically when it isn't doing anything; the
  314. * exact function of this bit varies on a per-module basis. This
  315. * function does not write to the hardware. Returns -EINVAL upon
  316. * error or 0 upon success.
  317. */
  318. static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
  319. u32 *v)
  320. {
  321. u32 autoidle_mask;
  322. u8 autoidle_shift;
  323. if (!oh->class->sysc ||
  324. !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
  325. return -EINVAL;
  326. if (!oh->class->sysc->sysc_fields) {
  327. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  328. return -EINVAL;
  329. }
  330. autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
  331. autoidle_mask = (0x1 << autoidle_shift);
  332. *v &= ~autoidle_mask;
  333. *v |= autoidle << autoidle_shift;
  334. return 0;
  335. }
  336. /**
  337. * _set_idle_ioring_wakeup - enable/disable IO pad wakeup on hwmod idle for mux
  338. * @oh: struct omap_hwmod *
  339. * @set_wake: bool value indicating to set (true) or clear (false) wakeup enable
  340. *
  341. * Set or clear the I/O pad wakeup flag in the mux entries for the
  342. * hwmod @oh. This function changes the @oh->mux->pads_dynamic array
  343. * in memory. If the hwmod is currently idled, and the new idle
  344. * values don't match the previous ones, this function will also
  345. * update the SCM PADCTRL registers. Otherwise, if the hwmod is not
  346. * currently idled, this function won't touch the hardware: the new
  347. * mux settings are written to the SCM PADCTRL registers when the
  348. * hwmod is idled. No return value.
  349. */
  350. static void _set_idle_ioring_wakeup(struct omap_hwmod *oh, bool set_wake)
  351. {
  352. struct omap_device_pad *pad;
  353. bool change = false;
  354. u16 prev_idle;
  355. int j;
  356. if (!oh->mux || !oh->mux->enabled)
  357. return;
  358. for (j = 0; j < oh->mux->nr_pads_dynamic; j++) {
  359. pad = oh->mux->pads_dynamic[j];
  360. if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP))
  361. continue;
  362. prev_idle = pad->idle;
  363. if (set_wake)
  364. pad->idle |= OMAP_WAKEUP_EN;
  365. else
  366. pad->idle &= ~OMAP_WAKEUP_EN;
  367. if (prev_idle != pad->idle)
  368. change = true;
  369. }
  370. if (change && oh->_state == _HWMOD_STATE_IDLE)
  371. omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
  372. }
  373. /**
  374. * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  375. * @oh: struct omap_hwmod *
  376. *
  377. * Allow the hardware module @oh to send wakeups. Returns -EINVAL
  378. * upon error or 0 upon success.
  379. */
  380. static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
  381. {
  382. if (!oh->class->sysc ||
  383. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  384. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
  385. (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
  386. return -EINVAL;
  387. if (!oh->class->sysc->sysc_fields) {
  388. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  389. return -EINVAL;
  390. }
  391. if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
  392. *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
  393. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  394. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  395. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  396. _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  397. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  398. oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
  399. return 0;
  400. }
  401. /**
  402. * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  403. * @oh: struct omap_hwmod *
  404. *
  405. * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
  406. * upon error or 0 upon success.
  407. */
  408. static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
  409. {
  410. if (!oh->class->sysc ||
  411. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  412. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
  413. (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
  414. return -EINVAL;
  415. if (!oh->class->sysc->sysc_fields) {
  416. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  417. return -EINVAL;
  418. }
  419. if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
  420. *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
  421. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  422. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
  423. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  424. _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  425. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  426. oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
  427. return 0;
  428. }
  429. /**
  430. * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
  431. * @oh: struct omap_hwmod *
  432. *
  433. * Prevent the hardware module @oh from entering idle while the
  434. * hardare module initiator @init_oh is active. Useful when a module
  435. * will be accessed by a particular initiator (e.g., if a module will
  436. * be accessed by the IVA, there should be a sleepdep between the IVA
  437. * initiator and the module). Only applies to modules in smart-idle
  438. * mode. If the clockdomain is marked as not needing autodeps, return
  439. * 0 without doing anything. Otherwise, returns -EINVAL upon error or
  440. * passes along clkdm_add_sleepdep() value upon success.
  441. */
  442. static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  443. {
  444. if (!oh->_clk)
  445. return -EINVAL;
  446. if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
  447. return 0;
  448. return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  449. }
  450. /**
  451. * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
  452. * @oh: struct omap_hwmod *
  453. *
  454. * Allow the hardware module @oh to enter idle while the hardare
  455. * module initiator @init_oh is active. Useful when a module will not
  456. * be accessed by a particular initiator (e.g., if a module will not
  457. * be accessed by the IVA, there should be no sleepdep between the IVA
  458. * initiator and the module). Only applies to modules in smart-idle
  459. * mode. If the clockdomain is marked as not needing autodeps, return
  460. * 0 without doing anything. Returns -EINVAL upon error or passes
  461. * along clkdm_del_sleepdep() value upon success.
  462. */
  463. static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  464. {
  465. if (!oh->_clk)
  466. return -EINVAL;
  467. if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
  468. return 0;
  469. return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  470. }
  471. /**
  472. * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
  473. * @oh: struct omap_hwmod *
  474. *
  475. * Called from _init_clocks(). Populates the @oh _clk (main
  476. * functional clock pointer) if a main_clk is present. Returns 0 on
  477. * success or -EINVAL on error.
  478. */
  479. static int _init_main_clk(struct omap_hwmod *oh)
  480. {
  481. int ret = 0;
  482. if (!oh->main_clk)
  483. return 0;
  484. oh->_clk = omap_clk_get_by_name(oh->main_clk);
  485. if (!oh->_clk) {
  486. pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
  487. oh->name, oh->main_clk);
  488. return -EINVAL;
  489. }
  490. if (!oh->_clk->clkdm)
  491. pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
  492. oh->main_clk, oh->_clk->name);
  493. return ret;
  494. }
  495. /**
  496. * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
  497. * @oh: struct omap_hwmod *
  498. *
  499. * Called from _init_clocks(). Populates the @oh OCP slave interface
  500. * clock pointers. Returns 0 on success or -EINVAL on error.
  501. */
  502. static int _init_interface_clks(struct omap_hwmod *oh)
  503. {
  504. struct clk *c;
  505. int i;
  506. int ret = 0;
  507. if (oh->slaves_cnt == 0)
  508. return 0;
  509. for (i = 0; i < oh->slaves_cnt; i++) {
  510. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  511. if (!os->clk)
  512. continue;
  513. c = omap_clk_get_by_name(os->clk);
  514. if (!c) {
  515. pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
  516. oh->name, os->clk);
  517. ret = -EINVAL;
  518. }
  519. os->_clk = c;
  520. }
  521. return ret;
  522. }
  523. /**
  524. * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
  525. * @oh: struct omap_hwmod *
  526. *
  527. * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
  528. * clock pointers. Returns 0 on success or -EINVAL on error.
  529. */
  530. static int _init_opt_clks(struct omap_hwmod *oh)
  531. {
  532. struct omap_hwmod_opt_clk *oc;
  533. struct clk *c;
  534. int i;
  535. int ret = 0;
  536. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
  537. c = omap_clk_get_by_name(oc->clk);
  538. if (!c) {
  539. pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
  540. oh->name, oc->clk);
  541. ret = -EINVAL;
  542. }
  543. oc->_clk = c;
  544. }
  545. return ret;
  546. }
  547. /**
  548. * _enable_clocks - enable hwmod main clock and interface clocks
  549. * @oh: struct omap_hwmod *
  550. *
  551. * Enables all clocks necessary for register reads and writes to succeed
  552. * on the hwmod @oh. Returns 0.
  553. */
  554. static int _enable_clocks(struct omap_hwmod *oh)
  555. {
  556. int i;
  557. pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
  558. if (oh->_clk)
  559. clk_enable(oh->_clk);
  560. if (oh->slaves_cnt > 0) {
  561. for (i = 0; i < oh->slaves_cnt; i++) {
  562. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  563. struct clk *c = os->_clk;
  564. if (c && (os->flags & OCPIF_SWSUP_IDLE))
  565. clk_enable(c);
  566. }
  567. }
  568. /* The opt clocks are controlled by the device driver. */
  569. return 0;
  570. }
  571. /**
  572. * _disable_clocks - disable hwmod main clock and interface clocks
  573. * @oh: struct omap_hwmod *
  574. *
  575. * Disables the hwmod @oh main functional and interface clocks. Returns 0.
  576. */
  577. static int _disable_clocks(struct omap_hwmod *oh)
  578. {
  579. int i;
  580. pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
  581. if (oh->_clk)
  582. clk_disable(oh->_clk);
  583. if (oh->slaves_cnt > 0) {
  584. for (i = 0; i < oh->slaves_cnt; i++) {
  585. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  586. struct clk *c = os->_clk;
  587. if (c && (os->flags & OCPIF_SWSUP_IDLE))
  588. clk_disable(c);
  589. }
  590. }
  591. /* The opt clocks are controlled by the device driver. */
  592. return 0;
  593. }
  594. static void _enable_optional_clocks(struct omap_hwmod *oh)
  595. {
  596. struct omap_hwmod_opt_clk *oc;
  597. int i;
  598. pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
  599. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  600. if (oc->_clk) {
  601. pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
  602. oc->_clk->name);
  603. clk_enable(oc->_clk);
  604. }
  605. }
  606. static void _disable_optional_clocks(struct omap_hwmod *oh)
  607. {
  608. struct omap_hwmod_opt_clk *oc;
  609. int i;
  610. pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
  611. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  612. if (oc->_clk) {
  613. pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
  614. oc->_clk->name);
  615. clk_disable(oc->_clk);
  616. }
  617. }
  618. /**
  619. * _enable_module - enable CLKCTRL modulemode on OMAP4
  620. * @oh: struct omap_hwmod *
  621. *
  622. * Enables the PRCM module mode related to the hwmod @oh.
  623. * No return value.
  624. */
  625. static void _enable_module(struct omap_hwmod *oh)
  626. {
  627. /* The module mode does not exist prior OMAP4 */
  628. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  629. return;
  630. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  631. return;
  632. pr_debug("omap_hwmod: %s: _enable_module: %d\n",
  633. oh->name, oh->prcm.omap4.modulemode);
  634. omap4_cminst_module_enable(oh->prcm.omap4.modulemode,
  635. oh->clkdm->prcm_partition,
  636. oh->clkdm->cm_inst,
  637. oh->clkdm->clkdm_offs,
  638. oh->prcm.omap4.clkctrl_offs);
  639. }
  640. /**
  641. * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
  642. * @oh: struct omap_hwmod *
  643. *
  644. * Wait for a module @oh to enter slave idle. Returns 0 if the module
  645. * does not have an IDLEST bit or if the module successfully enters
  646. * slave idle; otherwise, pass along the return value of the
  647. * appropriate *_cm*_wait_module_idle() function.
  648. */
  649. static int _omap4_wait_target_disable(struct omap_hwmod *oh)
  650. {
  651. if (!cpu_is_omap44xx())
  652. return 0;
  653. if (!oh)
  654. return -EINVAL;
  655. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  656. return 0;
  657. if (oh->flags & HWMOD_NO_IDLEST)
  658. return 0;
  659. return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
  660. oh->clkdm->cm_inst,
  661. oh->clkdm->clkdm_offs,
  662. oh->prcm.omap4.clkctrl_offs);
  663. }
  664. /**
  665. * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
  666. * @oh: struct omap_hwmod *
  667. *
  668. * Disable the PRCM module mode related to the hwmod @oh.
  669. * Return EINVAL if the modulemode is not supported and 0 in case of success.
  670. */
  671. static int _omap4_disable_module(struct omap_hwmod *oh)
  672. {
  673. int v;
  674. /* The module mode does not exist prior OMAP4 */
  675. if (!cpu_is_omap44xx())
  676. return -EINVAL;
  677. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  678. return -EINVAL;
  679. pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
  680. omap4_cminst_module_disable(oh->clkdm->prcm_partition,
  681. oh->clkdm->cm_inst,
  682. oh->clkdm->clkdm_offs,
  683. oh->prcm.omap4.clkctrl_offs);
  684. v = _omap4_wait_target_disable(oh);
  685. if (v)
  686. pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
  687. oh->name);
  688. return 0;
  689. }
  690. /**
  691. * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
  692. * @oh: struct omap_hwmod *oh
  693. *
  694. * Count and return the number of MPU IRQs associated with the hwmod
  695. * @oh. Used to allocate struct resource data. Returns 0 if @oh is
  696. * NULL.
  697. */
  698. static int _count_mpu_irqs(struct omap_hwmod *oh)
  699. {
  700. struct omap_hwmod_irq_info *ohii;
  701. int i = 0;
  702. if (!oh || !oh->mpu_irqs)
  703. return 0;
  704. do {
  705. ohii = &oh->mpu_irqs[i++];
  706. } while (ohii->irq != -1);
  707. return i-1;
  708. }
  709. /**
  710. * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
  711. * @oh: struct omap_hwmod *oh
  712. *
  713. * Count and return the number of SDMA request lines associated with
  714. * the hwmod @oh. Used to allocate struct resource data. Returns 0
  715. * if @oh is NULL.
  716. */
  717. static int _count_sdma_reqs(struct omap_hwmod *oh)
  718. {
  719. struct omap_hwmod_dma_info *ohdi;
  720. int i = 0;
  721. if (!oh || !oh->sdma_reqs)
  722. return 0;
  723. do {
  724. ohdi = &oh->sdma_reqs[i++];
  725. } while (ohdi->dma_req != -1);
  726. return i-1;
  727. }
  728. /**
  729. * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
  730. * @oh: struct omap_hwmod *oh
  731. *
  732. * Count and return the number of address space ranges associated with
  733. * the hwmod @oh. Used to allocate struct resource data. Returns 0
  734. * if @oh is NULL.
  735. */
  736. static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
  737. {
  738. struct omap_hwmod_addr_space *mem;
  739. int i = 0;
  740. if (!os || !os->addr)
  741. return 0;
  742. do {
  743. mem = &os->addr[i++];
  744. } while (mem->pa_start != mem->pa_end);
  745. return i-1;
  746. }
  747. /**
  748. * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
  749. * @oh: struct omap_hwmod *
  750. *
  751. * Returns the array index of the OCP slave port that the MPU
  752. * addresses the device on, or -EINVAL upon error or not found.
  753. */
  754. static int __init _find_mpu_port_index(struct omap_hwmod *oh)
  755. {
  756. int i;
  757. int found = 0;
  758. if (!oh || oh->slaves_cnt == 0)
  759. return -EINVAL;
  760. for (i = 0; i < oh->slaves_cnt; i++) {
  761. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  762. if (os->user & OCP_USER_MPU) {
  763. found = 1;
  764. break;
  765. }
  766. }
  767. if (found)
  768. pr_debug("omap_hwmod: %s: MPU OCP slave port ID %d\n",
  769. oh->name, i);
  770. else
  771. pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n",
  772. oh->name);
  773. return (found) ? i : -EINVAL;
  774. }
  775. /**
  776. * _find_mpu_rt_base - find hwmod register target base addr accessible by MPU
  777. * @oh: struct omap_hwmod *
  778. *
  779. * Return the virtual address of the base of the register target of
  780. * device @oh, or NULL on error.
  781. */
  782. static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
  783. {
  784. struct omap_hwmod_ocp_if *os;
  785. struct omap_hwmod_addr_space *mem;
  786. int i = 0, found = 0;
  787. void __iomem *va_start;
  788. if (!oh || oh->slaves_cnt == 0)
  789. return NULL;
  790. os = oh->slaves[index];
  791. if (!os->addr)
  792. return NULL;
  793. do {
  794. mem = &os->addr[i++];
  795. if (mem->flags & ADDR_TYPE_RT)
  796. found = 1;
  797. } while (!found && mem->pa_start != mem->pa_end);
  798. if (found) {
  799. va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
  800. if (!va_start) {
  801. pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
  802. return NULL;
  803. }
  804. pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
  805. oh->name, va_start);
  806. } else {
  807. pr_debug("omap_hwmod: %s: no MPU register target found\n",
  808. oh->name);
  809. }
  810. return (found) ? va_start : NULL;
  811. }
  812. /**
  813. * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
  814. * @oh: struct omap_hwmod *
  815. *
  816. * If module is marked as SWSUP_SIDLE, force the module out of slave
  817. * idle; otherwise, configure it for smart-idle. If module is marked
  818. * as SWSUP_MSUSPEND, force the module out of master standby;
  819. * otherwise, configure it for smart-standby. No return value.
  820. */
  821. static void _enable_sysc(struct omap_hwmod *oh)
  822. {
  823. u8 idlemode, sf;
  824. u32 v;
  825. if (!oh->class->sysc)
  826. return;
  827. v = oh->_sysc_cache;
  828. sf = oh->class->sysc->sysc_flags;
  829. if (sf & SYSC_HAS_SIDLEMODE) {
  830. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  831. HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
  832. _set_slave_idlemode(oh, idlemode, &v);
  833. }
  834. if (sf & SYSC_HAS_MIDLEMODE) {
  835. if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
  836. idlemode = HWMOD_IDLEMODE_NO;
  837. } else {
  838. if (sf & SYSC_HAS_ENAWAKEUP)
  839. _enable_wakeup(oh, &v);
  840. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  841. idlemode = HWMOD_IDLEMODE_SMART_WKUP;
  842. else
  843. idlemode = HWMOD_IDLEMODE_SMART;
  844. }
  845. _set_master_standbymode(oh, idlemode, &v);
  846. }
  847. /*
  848. * XXX The clock framework should handle this, by
  849. * calling into this code. But this must wait until the
  850. * clock structures are tagged with omap_hwmod entries
  851. */
  852. if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
  853. (sf & SYSC_HAS_CLOCKACTIVITY))
  854. _set_clockactivity(oh, oh->class->sysc->clockact, &v);
  855. /* If slave is in SMARTIDLE, also enable wakeup */
  856. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  857. _enable_wakeup(oh, &v);
  858. _write_sysconfig(v, oh);
  859. /*
  860. * Set the autoidle bit only after setting the smartidle bit
  861. * Setting this will not have any impact on the other modules.
  862. */
  863. if (sf & SYSC_HAS_AUTOIDLE) {
  864. idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
  865. 0 : 1;
  866. _set_module_autoidle(oh, idlemode, &v);
  867. _write_sysconfig(v, oh);
  868. }
  869. }
  870. /**
  871. * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
  872. * @oh: struct omap_hwmod *
  873. *
  874. * If module is marked as SWSUP_SIDLE, force the module into slave
  875. * idle; otherwise, configure it for smart-idle. If module is marked
  876. * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
  877. * configure it for smart-standby. No return value.
  878. */
  879. static void _idle_sysc(struct omap_hwmod *oh)
  880. {
  881. u8 idlemode, sf;
  882. u32 v;
  883. if (!oh->class->sysc)
  884. return;
  885. v = oh->_sysc_cache;
  886. sf = oh->class->sysc->sysc_flags;
  887. if (sf & SYSC_HAS_SIDLEMODE) {
  888. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  889. HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
  890. _set_slave_idlemode(oh, idlemode, &v);
  891. }
  892. if (sf & SYSC_HAS_MIDLEMODE) {
  893. if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
  894. idlemode = HWMOD_IDLEMODE_FORCE;
  895. } else {
  896. if (sf & SYSC_HAS_ENAWAKEUP)
  897. _enable_wakeup(oh, &v);
  898. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  899. idlemode = HWMOD_IDLEMODE_SMART_WKUP;
  900. else
  901. idlemode = HWMOD_IDLEMODE_SMART;
  902. }
  903. _set_master_standbymode(oh, idlemode, &v);
  904. }
  905. /* If slave is in SMARTIDLE, also enable wakeup */
  906. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  907. _enable_wakeup(oh, &v);
  908. _write_sysconfig(v, oh);
  909. }
  910. /**
  911. * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
  912. * @oh: struct omap_hwmod *
  913. *
  914. * Force the module into slave idle and master suspend. No return
  915. * value.
  916. */
  917. static void _shutdown_sysc(struct omap_hwmod *oh)
  918. {
  919. u32 v;
  920. u8 sf;
  921. if (!oh->class->sysc)
  922. return;
  923. v = oh->_sysc_cache;
  924. sf = oh->class->sysc->sysc_flags;
  925. if (sf & SYSC_HAS_SIDLEMODE)
  926. _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
  927. if (sf & SYSC_HAS_MIDLEMODE)
  928. _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
  929. if (sf & SYSC_HAS_AUTOIDLE)
  930. _set_module_autoidle(oh, 1, &v);
  931. _write_sysconfig(v, oh);
  932. }
  933. /**
  934. * _lookup - find an omap_hwmod by name
  935. * @name: find an omap_hwmod by name
  936. *
  937. * Return a pointer to an omap_hwmod by name, or NULL if not found.
  938. */
  939. static struct omap_hwmod *_lookup(const char *name)
  940. {
  941. struct omap_hwmod *oh, *temp_oh;
  942. oh = NULL;
  943. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  944. if (!strcmp(name, temp_oh->name)) {
  945. oh = temp_oh;
  946. break;
  947. }
  948. }
  949. return oh;
  950. }
  951. /**
  952. * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
  953. * @oh: struct omap_hwmod *
  954. *
  955. * Convert a clockdomain name stored in a struct omap_hwmod into a
  956. * clockdomain pointer, and save it into the struct omap_hwmod.
  957. * return -EINVAL if clkdm_name does not exist or if the lookup failed.
  958. */
  959. static int _init_clkdm(struct omap_hwmod *oh)
  960. {
  961. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  962. return 0;
  963. if (!oh->clkdm_name) {
  964. pr_warning("omap_hwmod: %s: no clkdm_name\n", oh->name);
  965. return -EINVAL;
  966. }
  967. oh->clkdm = clkdm_lookup(oh->clkdm_name);
  968. if (!oh->clkdm) {
  969. pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n",
  970. oh->name, oh->clkdm_name);
  971. return -EINVAL;
  972. }
  973. pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
  974. oh->name, oh->clkdm_name);
  975. return 0;
  976. }
  977. /**
  978. * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
  979. * well the clockdomain.
  980. * @oh: struct omap_hwmod *
  981. * @data: not used; pass NULL
  982. *
  983. * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
  984. * Resolves all clock names embedded in the hwmod. Returns 0 on
  985. * success, or a negative error code on failure.
  986. */
  987. static int _init_clocks(struct omap_hwmod *oh, void *data)
  988. {
  989. int ret = 0;
  990. if (oh->_state != _HWMOD_STATE_REGISTERED)
  991. return 0;
  992. pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
  993. ret |= _init_main_clk(oh);
  994. ret |= _init_interface_clks(oh);
  995. ret |= _init_opt_clks(oh);
  996. ret |= _init_clkdm(oh);
  997. if (!ret)
  998. oh->_state = _HWMOD_STATE_CLKS_INITED;
  999. else
  1000. pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
  1001. return ret;
  1002. }
  1003. /**
  1004. * _wait_target_ready - wait for a module to leave slave idle
  1005. * @oh: struct omap_hwmod *
  1006. *
  1007. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  1008. * does not have an IDLEST bit or if the module successfully leaves
  1009. * slave idle; otherwise, pass along the return value of the
  1010. * appropriate *_cm*_wait_module_ready() function.
  1011. */
  1012. static int _wait_target_ready(struct omap_hwmod *oh)
  1013. {
  1014. struct omap_hwmod_ocp_if *os;
  1015. int ret;
  1016. if (!oh)
  1017. return -EINVAL;
  1018. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1019. return 0;
  1020. os = oh->slaves[oh->_mpu_port_index];
  1021. if (oh->flags & HWMOD_NO_IDLEST)
  1022. return 0;
  1023. /* XXX check module SIDLEMODE */
  1024. /* XXX check clock enable states */
  1025. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  1026. ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
  1027. oh->prcm.omap2.idlest_reg_id,
  1028. oh->prcm.omap2.idlest_idle_bit);
  1029. } else if (cpu_is_omap44xx()) {
  1030. if (!oh->clkdm)
  1031. return -EINVAL;
  1032. ret = omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
  1033. oh->clkdm->cm_inst,
  1034. oh->clkdm->clkdm_offs,
  1035. oh->prcm.omap4.clkctrl_offs);
  1036. } else {
  1037. BUG();
  1038. };
  1039. return ret;
  1040. }
  1041. /**
  1042. * _lookup_hardreset - fill register bit info for this hwmod/reset line
  1043. * @oh: struct omap_hwmod *
  1044. * @name: name of the reset line in the context of this hwmod
  1045. * @ohri: struct omap_hwmod_rst_info * that this function will fill in
  1046. *
  1047. * Return the bit position of the reset line that match the
  1048. * input name. Return -ENOENT if not found.
  1049. */
  1050. static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name,
  1051. struct omap_hwmod_rst_info *ohri)
  1052. {
  1053. int i;
  1054. for (i = 0; i < oh->rst_lines_cnt; i++) {
  1055. const char *rst_line = oh->rst_lines[i].name;
  1056. if (!strcmp(rst_line, name)) {
  1057. ohri->rst_shift = oh->rst_lines[i].rst_shift;
  1058. ohri->st_shift = oh->rst_lines[i].st_shift;
  1059. pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
  1060. oh->name, __func__, rst_line, ohri->rst_shift,
  1061. ohri->st_shift);
  1062. return 0;
  1063. }
  1064. }
  1065. return -ENOENT;
  1066. }
  1067. /**
  1068. * _assert_hardreset - assert the HW reset line of submodules
  1069. * contained in the hwmod module.
  1070. * @oh: struct omap_hwmod *
  1071. * @name: name of the reset line to lookup and assert
  1072. *
  1073. * Some IP like dsp, ipu or iva contain processor that require
  1074. * an HW reset line to be assert / deassert in order to enable fully
  1075. * the IP.
  1076. */
  1077. static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
  1078. {
  1079. struct omap_hwmod_rst_info ohri;
  1080. u8 ret;
  1081. if (!oh)
  1082. return -EINVAL;
  1083. ret = _lookup_hardreset(oh, name, &ohri);
  1084. if (IS_ERR_VALUE(ret))
  1085. return ret;
  1086. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  1087. return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
  1088. ohri.rst_shift);
  1089. else if (cpu_is_omap44xx())
  1090. return omap4_prminst_assert_hardreset(ohri.rst_shift,
  1091. oh->clkdm->pwrdm.ptr->prcm_partition,
  1092. oh->clkdm->pwrdm.ptr->prcm_offs,
  1093. oh->prcm.omap4.rstctrl_offs);
  1094. else
  1095. return -EINVAL;
  1096. }
  1097. /**
  1098. * _deassert_hardreset - deassert the HW reset line of submodules contained
  1099. * in the hwmod module.
  1100. * @oh: struct omap_hwmod *
  1101. * @name: name of the reset line to look up and deassert
  1102. *
  1103. * Some IP like dsp, ipu or iva contain processor that require
  1104. * an HW reset line to be assert / deassert in order to enable fully
  1105. * the IP.
  1106. */
  1107. static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
  1108. {
  1109. struct omap_hwmod_rst_info ohri;
  1110. int ret;
  1111. if (!oh)
  1112. return -EINVAL;
  1113. ret = _lookup_hardreset(oh, name, &ohri);
  1114. if (IS_ERR_VALUE(ret))
  1115. return ret;
  1116. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  1117. ret = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
  1118. ohri.rst_shift,
  1119. ohri.st_shift);
  1120. } else if (cpu_is_omap44xx()) {
  1121. if (ohri.st_shift)
  1122. pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
  1123. oh->name, name);
  1124. ret = omap4_prminst_deassert_hardreset(ohri.rst_shift,
  1125. oh->clkdm->pwrdm.ptr->prcm_partition,
  1126. oh->clkdm->pwrdm.ptr->prcm_offs,
  1127. oh->prcm.omap4.rstctrl_offs);
  1128. } else {
  1129. return -EINVAL;
  1130. }
  1131. if (ret == -EBUSY)
  1132. pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
  1133. return ret;
  1134. }
  1135. /**
  1136. * _read_hardreset - read the HW reset line state of submodules
  1137. * contained in the hwmod module
  1138. * @oh: struct omap_hwmod *
  1139. * @name: name of the reset line to look up and read
  1140. *
  1141. * Return the state of the reset line.
  1142. */
  1143. static int _read_hardreset(struct omap_hwmod *oh, const char *name)
  1144. {
  1145. struct omap_hwmod_rst_info ohri;
  1146. u8 ret;
  1147. if (!oh)
  1148. return -EINVAL;
  1149. ret = _lookup_hardreset(oh, name, &ohri);
  1150. if (IS_ERR_VALUE(ret))
  1151. return ret;
  1152. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  1153. return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
  1154. ohri.st_shift);
  1155. } else if (cpu_is_omap44xx()) {
  1156. return omap4_prminst_is_hardreset_asserted(ohri.rst_shift,
  1157. oh->clkdm->pwrdm.ptr->prcm_partition,
  1158. oh->clkdm->pwrdm.ptr->prcm_offs,
  1159. oh->prcm.omap4.rstctrl_offs);
  1160. } else {
  1161. return -EINVAL;
  1162. }
  1163. }
  1164. /**
  1165. * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
  1166. * @oh: struct omap_hwmod *
  1167. *
  1168. * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
  1169. * enabled for this to work. Returns -EINVAL if the hwmod cannot be
  1170. * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
  1171. * the module did not reset in time, or 0 upon success.
  1172. *
  1173. * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
  1174. * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
  1175. * use the SYSCONFIG softreset bit to provide the status.
  1176. *
  1177. * Note that some IP like McBSP do have reset control but don't have
  1178. * reset status.
  1179. */
  1180. static int _ocp_softreset(struct omap_hwmod *oh)
  1181. {
  1182. u32 v;
  1183. int c = 0;
  1184. int ret = 0;
  1185. if (!oh->class->sysc ||
  1186. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  1187. return -EINVAL;
  1188. /* clocks must be on for this operation */
  1189. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1190. pr_warning("omap_hwmod: %s: reset can only be entered from "
  1191. "enabled state\n", oh->name);
  1192. return -EINVAL;
  1193. }
  1194. /* For some modules, all optionnal clocks need to be enabled as well */
  1195. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1196. _enable_optional_clocks(oh);
  1197. pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
  1198. v = oh->_sysc_cache;
  1199. ret = _set_softreset(oh, &v);
  1200. if (ret)
  1201. goto dis_opt_clks;
  1202. _write_sysconfig(v, oh);
  1203. if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
  1204. omap_test_timeout((omap_hwmod_read(oh,
  1205. oh->class->sysc->syss_offs)
  1206. & SYSS_RESETDONE_MASK),
  1207. MAX_MODULE_SOFTRESET_WAIT, c);
  1208. else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS)
  1209. omap_test_timeout(!(omap_hwmod_read(oh,
  1210. oh->class->sysc->sysc_offs)
  1211. & SYSC_TYPE2_SOFTRESET_MASK),
  1212. MAX_MODULE_SOFTRESET_WAIT, c);
  1213. if (c == MAX_MODULE_SOFTRESET_WAIT)
  1214. pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
  1215. oh->name, MAX_MODULE_SOFTRESET_WAIT);
  1216. else
  1217. pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
  1218. /*
  1219. * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
  1220. * _wait_target_ready() or _reset()
  1221. */
  1222. ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
  1223. dis_opt_clks:
  1224. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1225. _disable_optional_clocks(oh);
  1226. return ret;
  1227. }
  1228. /**
  1229. * _reset - reset an omap_hwmod
  1230. * @oh: struct omap_hwmod *
  1231. *
  1232. * Resets an omap_hwmod @oh. The default software reset mechanism for
  1233. * most OMAP IP blocks is triggered via the OCP_SYSCONFIG.SOFTRESET
  1234. * bit. However, some hwmods cannot be reset via this method: some
  1235. * are not targets and therefore have no OCP header registers to
  1236. * access; others (like the IVA) have idiosyncratic reset sequences.
  1237. * So for these relatively rare cases, custom reset code can be
  1238. * supplied in the struct omap_hwmod_class .reset function pointer.
  1239. * Passes along the return value from either _reset() or the custom
  1240. * reset function - these must return -EINVAL if the hwmod cannot be
  1241. * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
  1242. * the module did not reset in time, or 0 upon success.
  1243. */
  1244. static int _reset(struct omap_hwmod *oh)
  1245. {
  1246. int ret;
  1247. pr_debug("omap_hwmod: %s: resetting\n", oh->name);
  1248. ret = (oh->class->reset) ? oh->class->reset(oh) : _ocp_softreset(oh);
  1249. if (oh->class->sysc) {
  1250. _update_sysc_cache(oh);
  1251. _enable_sysc(oh);
  1252. }
  1253. return ret;
  1254. }
  1255. /**
  1256. * _enable - enable an omap_hwmod
  1257. * @oh: struct omap_hwmod *
  1258. *
  1259. * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
  1260. * register target. Returns -EINVAL if the hwmod is in the wrong
  1261. * state or passes along the return value of _wait_target_ready().
  1262. */
  1263. static int _enable(struct omap_hwmod *oh)
  1264. {
  1265. int r;
  1266. int hwsup = 0;
  1267. pr_debug("omap_hwmod: %s: enabling\n", oh->name);
  1268. /*
  1269. * hwmods with HWMOD_INIT_NO_IDLE flag set are left
  1270. * in enabled state at init.
  1271. * Now that someone is really trying to enable them,
  1272. * just ensure that the hwmod mux is set.
  1273. */
  1274. if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
  1275. /*
  1276. * If the caller has mux data populated, do the mux'ing
  1277. * which wouldn't have been done as part of the _enable()
  1278. * done during setup.
  1279. */
  1280. if (oh->mux)
  1281. omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
  1282. oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
  1283. return 0;
  1284. }
  1285. if (oh->_state != _HWMOD_STATE_INITIALIZED &&
  1286. oh->_state != _HWMOD_STATE_IDLE &&
  1287. oh->_state != _HWMOD_STATE_DISABLED) {
  1288. WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
  1289. oh->name);
  1290. return -EINVAL;
  1291. }
  1292. /*
  1293. * If an IP contains only one HW reset line, then de-assert it in order
  1294. * to allow the module state transition. Otherwise the PRCM will return
  1295. * Intransition status, and the init will failed.
  1296. */
  1297. if ((oh->_state == _HWMOD_STATE_INITIALIZED ||
  1298. oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1)
  1299. _deassert_hardreset(oh, oh->rst_lines[0].name);
  1300. /* Mux pins for device runtime if populated */
  1301. if (oh->mux && (!oh->mux->enabled ||
  1302. ((oh->_state == _HWMOD_STATE_IDLE) &&
  1303. oh->mux->pads_dynamic)))
  1304. omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
  1305. _add_initiator_dep(oh, mpu_oh);
  1306. if (oh->clkdm) {
  1307. /*
  1308. * A clockdomain must be in SW_SUP before enabling
  1309. * completely the module. The clockdomain can be set
  1310. * in HW_AUTO only when the module become ready.
  1311. */
  1312. hwsup = clkdm_in_hwsup(oh->clkdm);
  1313. r = clkdm_hwmod_enable(oh->clkdm, oh);
  1314. if (r) {
  1315. WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
  1316. oh->name, oh->clkdm->name, r);
  1317. return r;
  1318. }
  1319. }
  1320. _enable_clocks(oh);
  1321. _enable_module(oh);
  1322. r = _wait_target_ready(oh);
  1323. if (!r) {
  1324. /*
  1325. * Set the clockdomain to HW_AUTO only if the target is ready,
  1326. * assuming that the previous state was HW_AUTO
  1327. */
  1328. if (oh->clkdm && hwsup)
  1329. clkdm_allow_idle(oh->clkdm);
  1330. oh->_state = _HWMOD_STATE_ENABLED;
  1331. /* Access the sysconfig only if the target is ready */
  1332. if (oh->class->sysc) {
  1333. if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
  1334. _update_sysc_cache(oh);
  1335. _enable_sysc(oh);
  1336. }
  1337. } else {
  1338. _disable_clocks(oh);
  1339. pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
  1340. oh->name, r);
  1341. if (oh->clkdm)
  1342. clkdm_hwmod_disable(oh->clkdm, oh);
  1343. }
  1344. return r;
  1345. }
  1346. /**
  1347. * _idle - idle an omap_hwmod
  1348. * @oh: struct omap_hwmod *
  1349. *
  1350. * Idles an omap_hwmod @oh. This should be called once the hwmod has
  1351. * no further work. Returns -EINVAL if the hwmod is in the wrong
  1352. * state or returns 0.
  1353. */
  1354. static int _idle(struct omap_hwmod *oh)
  1355. {
  1356. pr_debug("omap_hwmod: %s: idling\n", oh->name);
  1357. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1358. WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
  1359. oh->name);
  1360. return -EINVAL;
  1361. }
  1362. if (oh->class->sysc)
  1363. _idle_sysc(oh);
  1364. _del_initiator_dep(oh, mpu_oh);
  1365. _omap4_disable_module(oh);
  1366. /*
  1367. * The module must be in idle mode before disabling any parents
  1368. * clocks. Otherwise, the parent clock might be disabled before
  1369. * the module transition is done, and thus will prevent the
  1370. * transition to complete properly.
  1371. */
  1372. _disable_clocks(oh);
  1373. if (oh->clkdm)
  1374. clkdm_hwmod_disable(oh->clkdm, oh);
  1375. /* Mux pins for device idle if populated */
  1376. if (oh->mux && oh->mux->pads_dynamic)
  1377. omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
  1378. oh->_state = _HWMOD_STATE_IDLE;
  1379. return 0;
  1380. }
  1381. /**
  1382. * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
  1383. * @oh: struct omap_hwmod *
  1384. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  1385. *
  1386. * Sets the IP block's OCP autoidle bit in hardware, and updates our
  1387. * local copy. Intended to be used by drivers that require
  1388. * direct manipulation of the AUTOIDLE bits.
  1389. * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
  1390. * along the return value from _set_module_autoidle().
  1391. *
  1392. * Any users of this function should be scrutinized carefully.
  1393. */
  1394. int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
  1395. {
  1396. u32 v;
  1397. int retval = 0;
  1398. unsigned long flags;
  1399. if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
  1400. return -EINVAL;
  1401. spin_lock_irqsave(&oh->_lock, flags);
  1402. v = oh->_sysc_cache;
  1403. retval = _set_module_autoidle(oh, autoidle, &v);
  1404. if (!retval)
  1405. _write_sysconfig(v, oh);
  1406. spin_unlock_irqrestore(&oh->_lock, flags);
  1407. return retval;
  1408. }
  1409. /**
  1410. * _shutdown - shutdown an omap_hwmod
  1411. * @oh: struct omap_hwmod *
  1412. *
  1413. * Shut down an omap_hwmod @oh. This should be called when the driver
  1414. * used for the hwmod is removed or unloaded or if the driver is not
  1415. * used by the system. Returns -EINVAL if the hwmod is in the wrong
  1416. * state or returns 0.
  1417. */
  1418. static int _shutdown(struct omap_hwmod *oh)
  1419. {
  1420. int ret;
  1421. u8 prev_state;
  1422. if (oh->_state != _HWMOD_STATE_IDLE &&
  1423. oh->_state != _HWMOD_STATE_ENABLED) {
  1424. WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
  1425. oh->name);
  1426. return -EINVAL;
  1427. }
  1428. pr_debug("omap_hwmod: %s: disabling\n", oh->name);
  1429. if (oh->class->pre_shutdown) {
  1430. prev_state = oh->_state;
  1431. if (oh->_state == _HWMOD_STATE_IDLE)
  1432. _enable(oh);
  1433. ret = oh->class->pre_shutdown(oh);
  1434. if (ret) {
  1435. if (prev_state == _HWMOD_STATE_IDLE)
  1436. _idle(oh);
  1437. return ret;
  1438. }
  1439. }
  1440. if (oh->class->sysc) {
  1441. if (oh->_state == _HWMOD_STATE_IDLE)
  1442. _enable(oh);
  1443. _shutdown_sysc(oh);
  1444. }
  1445. /* clocks and deps are already disabled in idle */
  1446. if (oh->_state == _HWMOD_STATE_ENABLED) {
  1447. _del_initiator_dep(oh, mpu_oh);
  1448. /* XXX what about the other system initiators here? dma, dsp */
  1449. _omap4_disable_module(oh);
  1450. _disable_clocks(oh);
  1451. if (oh->clkdm)
  1452. clkdm_hwmod_disable(oh->clkdm, oh);
  1453. }
  1454. /* XXX Should this code also force-disable the optional clocks? */
  1455. /*
  1456. * If an IP contains only one HW reset line, then assert it
  1457. * after disabling the clocks and before shutting down the IP.
  1458. */
  1459. if (oh->rst_lines_cnt == 1)
  1460. _assert_hardreset(oh, oh->rst_lines[0].name);
  1461. /* Mux pins to safe mode or use populated off mode values */
  1462. if (oh->mux)
  1463. omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
  1464. oh->_state = _HWMOD_STATE_DISABLED;
  1465. return 0;
  1466. }
  1467. /**
  1468. * _setup - do initial configuration of omap_hwmod
  1469. * @oh: struct omap_hwmod *
  1470. *
  1471. * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh
  1472. * OCP_SYSCONFIG register. Returns 0.
  1473. */
  1474. static int _setup(struct omap_hwmod *oh, void *data)
  1475. {
  1476. int i, r;
  1477. u8 postsetup_state;
  1478. if (oh->_state != _HWMOD_STATE_CLKS_INITED)
  1479. return 0;
  1480. /* Set iclk autoidle mode */
  1481. if (oh->slaves_cnt > 0) {
  1482. for (i = 0; i < oh->slaves_cnt; i++) {
  1483. struct omap_hwmod_ocp_if *os = oh->slaves[i];
  1484. struct clk *c = os->_clk;
  1485. if (!c)
  1486. continue;
  1487. if (os->flags & OCPIF_SWSUP_IDLE) {
  1488. /* XXX omap_iclk_deny_idle(c); */
  1489. } else {
  1490. /* XXX omap_iclk_allow_idle(c); */
  1491. clk_enable(c);
  1492. }
  1493. }
  1494. }
  1495. oh->_state = _HWMOD_STATE_INITIALIZED;
  1496. /*
  1497. * In the case of hwmod with hardreset that should not be
  1498. * de-assert at boot time, we have to keep the module
  1499. * initialized, because we cannot enable it properly with the
  1500. * reset asserted. Exit without warning because that behavior is
  1501. * expected.
  1502. */
  1503. if ((oh->flags & HWMOD_INIT_NO_RESET) && oh->rst_lines_cnt == 1)
  1504. return 0;
  1505. r = _enable(oh);
  1506. if (r) {
  1507. pr_warning("omap_hwmod: %s: cannot be enabled (%d)\n",
  1508. oh->name, oh->_state);
  1509. return 0;
  1510. }
  1511. if (!(oh->flags & HWMOD_INIT_NO_RESET))
  1512. _reset(oh);
  1513. postsetup_state = oh->_postsetup_state;
  1514. if (postsetup_state == _HWMOD_STATE_UNKNOWN)
  1515. postsetup_state = _HWMOD_STATE_ENABLED;
  1516. /*
  1517. * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
  1518. * it should be set by the core code as a runtime flag during startup
  1519. */
  1520. if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
  1521. (postsetup_state == _HWMOD_STATE_IDLE)) {
  1522. oh->_int_flags |= _HWMOD_SKIP_ENABLE;
  1523. postsetup_state = _HWMOD_STATE_ENABLED;
  1524. }
  1525. if (postsetup_state == _HWMOD_STATE_IDLE)
  1526. _idle(oh);
  1527. else if (postsetup_state == _HWMOD_STATE_DISABLED)
  1528. _shutdown(oh);
  1529. else if (postsetup_state != _HWMOD_STATE_ENABLED)
  1530. WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
  1531. oh->name, postsetup_state);
  1532. return 0;
  1533. }
  1534. /**
  1535. * _register - register a struct omap_hwmod
  1536. * @oh: struct omap_hwmod *
  1537. *
  1538. * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
  1539. * already has been registered by the same name; -EINVAL if the
  1540. * omap_hwmod is in the wrong state, if @oh is NULL, if the
  1541. * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
  1542. * name, or if the omap_hwmod's class is missing a name; or 0 upon
  1543. * success.
  1544. *
  1545. * XXX The data should be copied into bootmem, so the original data
  1546. * should be marked __initdata and freed after init. This would allow
  1547. * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
  1548. * that the copy process would be relatively complex due to the large number
  1549. * of substructures.
  1550. */
  1551. static int __init _register(struct omap_hwmod *oh)
  1552. {
  1553. int ms_id;
  1554. if (!oh || !oh->name || !oh->class || !oh->class->name ||
  1555. (oh->_state != _HWMOD_STATE_UNKNOWN))
  1556. return -EINVAL;
  1557. pr_debug("omap_hwmod: %s: registering\n", oh->name);
  1558. if (_lookup(oh->name))
  1559. return -EEXIST;
  1560. ms_id = _find_mpu_port_index(oh);
  1561. if (!IS_ERR_VALUE(ms_id))
  1562. oh->_mpu_port_index = ms_id;
  1563. else
  1564. oh->_int_flags |= _HWMOD_NO_MPU_PORT;
  1565. list_add_tail(&oh->node, &omap_hwmod_list);
  1566. spin_lock_init(&oh->_lock);
  1567. oh->_state = _HWMOD_STATE_REGISTERED;
  1568. /*
  1569. * XXX Rather than doing a strcmp(), this should test a flag
  1570. * set in the hwmod data, inserted by the autogenerator code.
  1571. */
  1572. if (!strcmp(oh->name, MPU_INITIATOR_NAME))
  1573. mpu_oh = oh;
  1574. return 0;
  1575. }
  1576. /* Public functions */
  1577. u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
  1578. {
  1579. if (oh->flags & HWMOD_16BIT_REG)
  1580. return __raw_readw(oh->_mpu_rt_va + reg_offs);
  1581. else
  1582. return __raw_readl(oh->_mpu_rt_va + reg_offs);
  1583. }
  1584. void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
  1585. {
  1586. if (oh->flags & HWMOD_16BIT_REG)
  1587. __raw_writew(v, oh->_mpu_rt_va + reg_offs);
  1588. else
  1589. __raw_writel(v, oh->_mpu_rt_va + reg_offs);
  1590. }
  1591. /**
  1592. * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
  1593. * @oh: struct omap_hwmod *
  1594. *
  1595. * This is a public function exposed to drivers. Some drivers may need to do
  1596. * some settings before and after resetting the device. Those drivers after
  1597. * doing the necessary settings could use this function to start a reset by
  1598. * setting the SYSCONFIG.SOFTRESET bit.
  1599. */
  1600. int omap_hwmod_softreset(struct omap_hwmod *oh)
  1601. {
  1602. if (!oh)
  1603. return -EINVAL;
  1604. return _ocp_softreset(oh);
  1605. }
  1606. /**
  1607. * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
  1608. * @oh: struct omap_hwmod *
  1609. * @idlemode: SIDLEMODE field bits (shifted to bit 0)
  1610. *
  1611. * Sets the IP block's OCP slave idlemode in hardware, and updates our
  1612. * local copy. Intended to be used by drivers that have some erratum
  1613. * that requires direct manipulation of the SIDLEMODE bits. Returns
  1614. * -EINVAL if @oh is null, or passes along the return value from
  1615. * _set_slave_idlemode().
  1616. *
  1617. * XXX Does this function have any current users? If not, we should
  1618. * remove it; it is better to let the rest of the hwmod code handle this.
  1619. * Any users of this function should be scrutinized carefully.
  1620. */
  1621. int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
  1622. {
  1623. u32 v;
  1624. int retval = 0;
  1625. if (!oh)
  1626. return -EINVAL;
  1627. v = oh->_sysc_cache;
  1628. retval = _set_slave_idlemode(oh, idlemode, &v);
  1629. if (!retval)
  1630. _write_sysconfig(v, oh);
  1631. return retval;
  1632. }
  1633. /**
  1634. * omap_hwmod_lookup - look up a registered omap_hwmod by name
  1635. * @name: name of the omap_hwmod to look up
  1636. *
  1637. * Given a @name of an omap_hwmod, return a pointer to the registered
  1638. * struct omap_hwmod *, or NULL upon error.
  1639. */
  1640. struct omap_hwmod *omap_hwmod_lookup(const char *name)
  1641. {
  1642. struct omap_hwmod *oh;
  1643. if (!name)
  1644. return NULL;
  1645. oh = _lookup(name);
  1646. return oh;
  1647. }
  1648. /**
  1649. * omap_hwmod_for_each - call function for each registered omap_hwmod
  1650. * @fn: pointer to a callback function
  1651. * @data: void * data to pass to callback function
  1652. *
  1653. * Call @fn for each registered omap_hwmod, passing @data to each
  1654. * function. @fn must return 0 for success or any other value for
  1655. * failure. If @fn returns non-zero, the iteration across omap_hwmods
  1656. * will stop and the non-zero return value will be passed to the
  1657. * caller of omap_hwmod_for_each(). @fn is called with
  1658. * omap_hwmod_for_each() held.
  1659. */
  1660. int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
  1661. void *data)
  1662. {
  1663. struct omap_hwmod *temp_oh;
  1664. int ret = 0;
  1665. if (!fn)
  1666. return -EINVAL;
  1667. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  1668. ret = (*fn)(temp_oh, data);
  1669. if (ret)
  1670. break;
  1671. }
  1672. return ret;
  1673. }
  1674. /**
  1675. * omap_hwmod_register - register an array of hwmods
  1676. * @ohs: pointer to an array of omap_hwmods to register
  1677. *
  1678. * Intended to be called early in boot before the clock framework is
  1679. * initialized. If @ohs is not null, will register all omap_hwmods
  1680. * listed in @ohs that are valid for this chip. Returns 0.
  1681. */
  1682. int __init omap_hwmod_register(struct omap_hwmod **ohs)
  1683. {
  1684. int r, i;
  1685. if (!ohs)
  1686. return 0;
  1687. i = 0;
  1688. do {
  1689. r = _register(ohs[i]);
  1690. WARN(r, "omap_hwmod: %s: _register returned %d\n", ohs[i]->name,
  1691. r);
  1692. } while (ohs[++i]);
  1693. return 0;
  1694. }
  1695. /*
  1696. * _populate_mpu_rt_base - populate the virtual address for a hwmod
  1697. *
  1698. * Must be called only from omap_hwmod_setup_*() so ioremap works properly.
  1699. * Assumes the caller takes care of locking if needed.
  1700. */
  1701. static int __init _populate_mpu_rt_base(struct omap_hwmod *oh, void *data)
  1702. {
  1703. if (oh->_state != _HWMOD_STATE_REGISTERED)
  1704. return 0;
  1705. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1706. return 0;
  1707. oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index);
  1708. return 0;
  1709. }
  1710. /**
  1711. * omap_hwmod_setup_one - set up a single hwmod
  1712. * @oh_name: const char * name of the already-registered hwmod to set up
  1713. *
  1714. * Must be called after omap2_clk_init(). Resolves the struct clk
  1715. * names to struct clk pointers for each registered omap_hwmod. Also
  1716. * calls _setup() on each hwmod. Returns -EINVAL upon error or 0 upon
  1717. * success.
  1718. */
  1719. int __init omap_hwmod_setup_one(const char *oh_name)
  1720. {
  1721. struct omap_hwmod *oh;
  1722. int r;
  1723. pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
  1724. if (!mpu_oh) {
  1725. pr_err("omap_hwmod: %s: cannot setup_one: MPU initiator hwmod %s not yet registered\n",
  1726. oh_name, MPU_INITIATOR_NAME);
  1727. return -EINVAL;
  1728. }
  1729. oh = _lookup(oh_name);
  1730. if (!oh) {
  1731. WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
  1732. return -EINVAL;
  1733. }
  1734. if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
  1735. omap_hwmod_setup_one(MPU_INITIATOR_NAME);
  1736. r = _populate_mpu_rt_base(oh, NULL);
  1737. if (IS_ERR_VALUE(r)) {
  1738. WARN(1, "omap_hwmod: %s: couldn't set mpu_rt_base\n", oh_name);
  1739. return -EINVAL;
  1740. }
  1741. r = _init_clocks(oh, NULL);
  1742. if (IS_ERR_VALUE(r)) {
  1743. WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh_name);
  1744. return -EINVAL;
  1745. }
  1746. _setup(oh, NULL);
  1747. return 0;
  1748. }
  1749. /**
  1750. * omap_hwmod_setup - do some post-clock framework initialization
  1751. *
  1752. * Must be called after omap2_clk_init(). Resolves the struct clk names
  1753. * to struct clk pointers for each registered omap_hwmod. Also calls
  1754. * _setup() on each hwmod. Returns 0 upon success.
  1755. */
  1756. static int __init omap_hwmod_setup_all(void)
  1757. {
  1758. int r;
  1759. if (!mpu_oh) {
  1760. pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
  1761. __func__, MPU_INITIATOR_NAME);
  1762. return -EINVAL;
  1763. }
  1764. r = omap_hwmod_for_each(_populate_mpu_rt_base, NULL);
  1765. r = omap_hwmod_for_each(_init_clocks, NULL);
  1766. WARN(IS_ERR_VALUE(r),
  1767. "omap_hwmod: %s: _init_clocks failed\n", __func__);
  1768. omap_hwmod_for_each(_setup, NULL);
  1769. return 0;
  1770. }
  1771. core_initcall(omap_hwmod_setup_all);
  1772. /**
  1773. * omap_hwmod_enable - enable an omap_hwmod
  1774. * @oh: struct omap_hwmod *
  1775. *
  1776. * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
  1777. * Returns -EINVAL on error or passes along the return value from _enable().
  1778. */
  1779. int omap_hwmod_enable(struct omap_hwmod *oh)
  1780. {
  1781. int r;
  1782. unsigned long flags;
  1783. if (!oh)
  1784. return -EINVAL;
  1785. spin_lock_irqsave(&oh->_lock, flags);
  1786. r = _enable(oh);
  1787. spin_unlock_irqrestore(&oh->_lock, flags);
  1788. return r;
  1789. }
  1790. /**
  1791. * omap_hwmod_idle - idle an omap_hwmod
  1792. * @oh: struct omap_hwmod *
  1793. *
  1794. * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
  1795. * Returns -EINVAL on error or passes along the return value from _idle().
  1796. */
  1797. int omap_hwmod_idle(struct omap_hwmod *oh)
  1798. {
  1799. unsigned long flags;
  1800. if (!oh)
  1801. return -EINVAL;
  1802. spin_lock_irqsave(&oh->_lock, flags);
  1803. _idle(oh);
  1804. spin_unlock_irqrestore(&oh->_lock, flags);
  1805. return 0;
  1806. }
  1807. /**
  1808. * omap_hwmod_shutdown - shutdown an omap_hwmod
  1809. * @oh: struct omap_hwmod *
  1810. *
  1811. * Shutdown an omap_hwmod @oh. Intended to be called by
  1812. * omap_device_shutdown(). Returns -EINVAL on error or passes along
  1813. * the return value from _shutdown().
  1814. */
  1815. int omap_hwmod_shutdown(struct omap_hwmod *oh)
  1816. {
  1817. unsigned long flags;
  1818. if (!oh)
  1819. return -EINVAL;
  1820. spin_lock_irqsave(&oh->_lock, flags);
  1821. _shutdown(oh);
  1822. spin_unlock_irqrestore(&oh->_lock, flags);
  1823. return 0;
  1824. }
  1825. /**
  1826. * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
  1827. * @oh: struct omap_hwmod *oh
  1828. *
  1829. * Intended to be called by the omap_device code.
  1830. */
  1831. int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
  1832. {
  1833. unsigned long flags;
  1834. spin_lock_irqsave(&oh->_lock, flags);
  1835. _enable_clocks(oh);
  1836. spin_unlock_irqrestore(&oh->_lock, flags);
  1837. return 0;
  1838. }
  1839. /**
  1840. * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
  1841. * @oh: struct omap_hwmod *oh
  1842. *
  1843. * Intended to be called by the omap_device code.
  1844. */
  1845. int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
  1846. {
  1847. unsigned long flags;
  1848. spin_lock_irqsave(&oh->_lock, flags);
  1849. _disable_clocks(oh);
  1850. spin_unlock_irqrestore(&oh->_lock, flags);
  1851. return 0;
  1852. }
  1853. /**
  1854. * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
  1855. * @oh: struct omap_hwmod *oh
  1856. *
  1857. * Intended to be called by drivers and core code when all posted
  1858. * writes to a device must complete before continuing further
  1859. * execution (for example, after clearing some device IRQSTATUS
  1860. * register bits)
  1861. *
  1862. * XXX what about targets with multiple OCP threads?
  1863. */
  1864. void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
  1865. {
  1866. BUG_ON(!oh);
  1867. if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
  1868. WARN(1, "omap_device: %s: OCP barrier impossible due to device configuration\n",
  1869. oh->name);
  1870. return;
  1871. }
  1872. /*
  1873. * Forces posted writes to complete on the OCP thread handling
  1874. * register writes
  1875. */
  1876. omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  1877. }
  1878. /**
  1879. * omap_hwmod_reset - reset the hwmod
  1880. * @oh: struct omap_hwmod *
  1881. *
  1882. * Under some conditions, a driver may wish to reset the entire device.
  1883. * Called from omap_device code. Returns -EINVAL on error or passes along
  1884. * the return value from _reset().
  1885. */
  1886. int omap_hwmod_reset(struct omap_hwmod *oh)
  1887. {
  1888. int r;
  1889. unsigned long flags;
  1890. if (!oh)
  1891. return -EINVAL;
  1892. spin_lock_irqsave(&oh->_lock, flags);
  1893. r = _reset(oh);
  1894. spin_unlock_irqrestore(&oh->_lock, flags);
  1895. return r;
  1896. }
  1897. /**
  1898. * omap_hwmod_count_resources - count number of struct resources needed by hwmod
  1899. * @oh: struct omap_hwmod *
  1900. * @res: pointer to the first element of an array of struct resource to fill
  1901. *
  1902. * Count the number of struct resource array elements necessary to
  1903. * contain omap_hwmod @oh resources. Intended to be called by code
  1904. * that registers omap_devices. Intended to be used to determine the
  1905. * size of a dynamically-allocated struct resource array, before
  1906. * calling omap_hwmod_fill_resources(). Returns the number of struct
  1907. * resource array elements needed.
  1908. *
  1909. * XXX This code is not optimized. It could attempt to merge adjacent
  1910. * resource IDs.
  1911. *
  1912. */
  1913. int omap_hwmod_count_resources(struct omap_hwmod *oh)
  1914. {
  1915. int ret, i;
  1916. ret = _count_mpu_irqs(oh) + _count_sdma_reqs(oh);
  1917. for (i = 0; i < oh->slaves_cnt; i++)
  1918. ret += _count_ocp_if_addr_spaces(oh->slaves[i]);
  1919. return ret;
  1920. }
  1921. /**
  1922. * omap_hwmod_fill_resources - fill struct resource array with hwmod data
  1923. * @oh: struct omap_hwmod *
  1924. * @res: pointer to the first element of an array of struct resource to fill
  1925. *
  1926. * Fill the struct resource array @res with resource data from the
  1927. * omap_hwmod @oh. Intended to be called by code that registers
  1928. * omap_devices. See also omap_hwmod_count_resources(). Returns the
  1929. * number of array elements filled.
  1930. */
  1931. int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
  1932. {
  1933. int i, j, mpu_irqs_cnt, sdma_reqs_cnt;
  1934. int r = 0;
  1935. /* For each IRQ, DMA, memory area, fill in array.*/
  1936. mpu_irqs_cnt = _count_mpu_irqs(oh);
  1937. for (i = 0; i < mpu_irqs_cnt; i++) {
  1938. (res + r)->name = (oh->mpu_irqs + i)->name;
  1939. (res + r)->start = (oh->mpu_irqs + i)->irq;
  1940. (res + r)->end = (oh->mpu_irqs + i)->irq;
  1941. (res + r)->flags = IORESOURCE_IRQ;
  1942. r++;
  1943. }
  1944. sdma_reqs_cnt = _count_sdma_reqs(oh);
  1945. for (i = 0; i < sdma_reqs_cnt; i++) {
  1946. (res + r)->name = (oh->sdma_reqs + i)->name;
  1947. (res + r)->start = (oh->sdma_reqs + i)->dma_req;
  1948. (res + r)->end = (oh->sdma_reqs + i)->dma_req;
  1949. (res + r)->flags = IORESOURCE_DMA;
  1950. r++;
  1951. }
  1952. for (i = 0; i < oh->slaves_cnt; i++) {
  1953. struct omap_hwmod_ocp_if *os;
  1954. int addr_cnt;
  1955. os = oh->slaves[i];
  1956. addr_cnt = _count_ocp_if_addr_spaces(os);
  1957. for (j = 0; j < addr_cnt; j++) {
  1958. (res + r)->name = (os->addr + j)->name;
  1959. (res + r)->start = (os->addr + j)->pa_start;
  1960. (res + r)->end = (os->addr + j)->pa_end;
  1961. (res + r)->flags = IORESOURCE_MEM;
  1962. r++;
  1963. }
  1964. }
  1965. return r;
  1966. }
  1967. /**
  1968. * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
  1969. * @oh: struct omap_hwmod *
  1970. *
  1971. * Return the powerdomain pointer associated with the OMAP module
  1972. * @oh's main clock. If @oh does not have a main clk, return the
  1973. * powerdomain associated with the interface clock associated with the
  1974. * module's MPU port. (XXX Perhaps this should use the SDMA port
  1975. * instead?) Returns NULL on error, or a struct powerdomain * on
  1976. * success.
  1977. */
  1978. struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
  1979. {
  1980. struct clk *c;
  1981. if (!oh)
  1982. return NULL;
  1983. if (oh->_clk) {
  1984. c = oh->_clk;
  1985. } else {
  1986. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1987. return NULL;
  1988. c = oh->slaves[oh->_mpu_port_index]->_clk;
  1989. }
  1990. if (!c->clkdm)
  1991. return NULL;
  1992. return c->clkdm->pwrdm.ptr;
  1993. }
  1994. /**
  1995. * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
  1996. * @oh: struct omap_hwmod *
  1997. *
  1998. * Returns the virtual address corresponding to the beginning of the
  1999. * module's register target, in the address range that is intended to
  2000. * be used by the MPU. Returns the virtual address upon success or NULL
  2001. * upon error.
  2002. */
  2003. void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
  2004. {
  2005. if (!oh)
  2006. return NULL;
  2007. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  2008. return NULL;
  2009. if (oh->_state == _HWMOD_STATE_UNKNOWN)
  2010. return NULL;
  2011. return oh->_mpu_rt_va;
  2012. }
  2013. /**
  2014. * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
  2015. * @oh: struct omap_hwmod *
  2016. * @init_oh: struct omap_hwmod * (initiator)
  2017. *
  2018. * Add a sleep dependency between the initiator @init_oh and @oh.
  2019. * Intended to be called by DSP/Bridge code via platform_data for the
  2020. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  2021. * code needs to add/del initiator dependencies dynamically
  2022. * before/after accessing a device. Returns the return value from
  2023. * _add_initiator_dep().
  2024. *
  2025. * XXX Keep a usecount in the clockdomain code
  2026. */
  2027. int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
  2028. struct omap_hwmod *init_oh)
  2029. {
  2030. return _add_initiator_dep(oh, init_oh);
  2031. }
  2032. /*
  2033. * XXX what about functions for drivers to save/restore ocp_sysconfig
  2034. * for context save/restore operations?
  2035. */
  2036. /**
  2037. * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
  2038. * @oh: struct omap_hwmod *
  2039. * @init_oh: struct omap_hwmod * (initiator)
  2040. *
  2041. * Remove a sleep dependency between the initiator @init_oh and @oh.
  2042. * Intended to be called by DSP/Bridge code via platform_data for the
  2043. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  2044. * code needs to add/del initiator dependencies dynamically
  2045. * before/after accessing a device. Returns the return value from
  2046. * _del_initiator_dep().
  2047. *
  2048. * XXX Keep a usecount in the clockdomain code
  2049. */
  2050. int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
  2051. struct omap_hwmod *init_oh)
  2052. {
  2053. return _del_initiator_dep(oh, init_oh);
  2054. }
  2055. /**
  2056. * omap_hwmod_enable_wakeup - allow device to wake up the system
  2057. * @oh: struct omap_hwmod *
  2058. *
  2059. * Sets the module OCP socket ENAWAKEUP bit to allow the module to
  2060. * send wakeups to the PRCM, and enable I/O ring wakeup events for
  2061. * this IP block if it has dynamic mux entries. Eventually this
  2062. * should set PRCM wakeup registers to cause the PRCM to receive
  2063. * wakeup events from the module. Does not set any wakeup routing
  2064. * registers beyond this point - if the module is to wake up any other
  2065. * module or subsystem, that must be set separately. Called by
  2066. * omap_device code. Returns -EINVAL on error or 0 upon success.
  2067. */
  2068. int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
  2069. {
  2070. unsigned long flags;
  2071. u32 v;
  2072. spin_lock_irqsave(&oh->_lock, flags);
  2073. if (oh->class->sysc &&
  2074. (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
  2075. v = oh->_sysc_cache;
  2076. _enable_wakeup(oh, &v);
  2077. _write_sysconfig(v, oh);
  2078. }
  2079. _set_idle_ioring_wakeup(oh, true);
  2080. spin_unlock_irqrestore(&oh->_lock, flags);
  2081. return 0;
  2082. }
  2083. /**
  2084. * omap_hwmod_disable_wakeup - prevent device from waking the system
  2085. * @oh: struct omap_hwmod *
  2086. *
  2087. * Clears the module OCP socket ENAWAKEUP bit to prevent the module
  2088. * from sending wakeups to the PRCM, and disable I/O ring wakeup
  2089. * events for this IP block if it has dynamic mux entries. Eventually
  2090. * this should clear PRCM wakeup registers to cause the PRCM to ignore
  2091. * wakeup events from the module. Does not set any wakeup routing
  2092. * registers beyond this point - if the module is to wake up any other
  2093. * module or subsystem, that must be set separately. Called by
  2094. * omap_device code. Returns -EINVAL on error or 0 upon success.
  2095. */
  2096. int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
  2097. {
  2098. unsigned long flags;
  2099. u32 v;
  2100. spin_lock_irqsave(&oh->_lock, flags);
  2101. if (oh->class->sysc &&
  2102. (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
  2103. v = oh->_sysc_cache;
  2104. _disable_wakeup(oh, &v);
  2105. _write_sysconfig(v, oh);
  2106. }
  2107. _set_idle_ioring_wakeup(oh, false);
  2108. spin_unlock_irqrestore(&oh->_lock, flags);
  2109. return 0;
  2110. }
  2111. /**
  2112. * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
  2113. * contained in the hwmod module.
  2114. * @oh: struct omap_hwmod *
  2115. * @name: name of the reset line to lookup and assert
  2116. *
  2117. * Some IP like dsp, ipu or iva contain processor that require
  2118. * an HW reset line to be assert / deassert in order to enable fully
  2119. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  2120. * yet supported on this OMAP; otherwise, passes along the return value
  2121. * from _assert_hardreset().
  2122. */
  2123. int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
  2124. {
  2125. int ret;
  2126. unsigned long flags;
  2127. if (!oh)
  2128. return -EINVAL;
  2129. spin_lock_irqsave(&oh->_lock, flags);
  2130. ret = _assert_hardreset(oh, name);
  2131. spin_unlock_irqrestore(&oh->_lock, flags);
  2132. return ret;
  2133. }
  2134. /**
  2135. * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
  2136. * contained in the hwmod module.
  2137. * @oh: struct omap_hwmod *
  2138. * @name: name of the reset line to look up and deassert
  2139. *
  2140. * Some IP like dsp, ipu or iva contain processor that require
  2141. * an HW reset line to be assert / deassert in order to enable fully
  2142. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  2143. * yet supported on this OMAP; otherwise, passes along the return value
  2144. * from _deassert_hardreset().
  2145. */
  2146. int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
  2147. {
  2148. int ret;
  2149. unsigned long flags;
  2150. if (!oh)
  2151. return -EINVAL;
  2152. spin_lock_irqsave(&oh->_lock, flags);
  2153. ret = _deassert_hardreset(oh, name);
  2154. spin_unlock_irqrestore(&oh->_lock, flags);
  2155. return ret;
  2156. }
  2157. /**
  2158. * omap_hwmod_read_hardreset - read the HW reset line state of submodules
  2159. * contained in the hwmod module
  2160. * @oh: struct omap_hwmod *
  2161. * @name: name of the reset line to look up and read
  2162. *
  2163. * Return the current state of the hwmod @oh's reset line named @name:
  2164. * returns -EINVAL upon parameter error or if this operation
  2165. * is unsupported on the current OMAP; otherwise, passes along the return
  2166. * value from _read_hardreset().
  2167. */
  2168. int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
  2169. {
  2170. int ret;
  2171. unsigned long flags;
  2172. if (!oh)
  2173. return -EINVAL;
  2174. spin_lock_irqsave(&oh->_lock, flags);
  2175. ret = _read_hardreset(oh, name);
  2176. spin_unlock_irqrestore(&oh->_lock, flags);
  2177. return ret;
  2178. }
  2179. /**
  2180. * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
  2181. * @classname: struct omap_hwmod_class name to search for
  2182. * @fn: callback function pointer to call for each hwmod in class @classname
  2183. * @user: arbitrary context data to pass to the callback function
  2184. *
  2185. * For each omap_hwmod of class @classname, call @fn.
  2186. * If the callback function returns something other than
  2187. * zero, the iterator is terminated, and the callback function's return
  2188. * value is passed back to the caller. Returns 0 upon success, -EINVAL
  2189. * if @classname or @fn are NULL, or passes back the error code from @fn.
  2190. */
  2191. int omap_hwmod_for_each_by_class(const char *classname,
  2192. int (*fn)(struct omap_hwmod *oh,
  2193. void *user),
  2194. void *user)
  2195. {
  2196. struct omap_hwmod *temp_oh;
  2197. int ret = 0;
  2198. if (!classname || !fn)
  2199. return -EINVAL;
  2200. pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
  2201. __func__, classname);
  2202. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  2203. if (!strcmp(temp_oh->class->name, classname)) {
  2204. pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
  2205. __func__, temp_oh->name);
  2206. ret = (*fn)(temp_oh, user);
  2207. if (ret)
  2208. break;
  2209. }
  2210. }
  2211. if (ret)
  2212. pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
  2213. __func__, ret);
  2214. return ret;
  2215. }
  2216. /**
  2217. * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
  2218. * @oh: struct omap_hwmod *
  2219. * @state: state that _setup() should leave the hwmod in
  2220. *
  2221. * Sets the hwmod state that @oh will enter at the end of _setup()
  2222. * (called by omap_hwmod_setup_*()). Only valid to call between
  2223. * calling omap_hwmod_register() and omap_hwmod_setup_*(). Returns
  2224. * 0 upon success or -EINVAL if there is a problem with the arguments
  2225. * or if the hwmod is in the wrong state.
  2226. */
  2227. int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
  2228. {
  2229. int ret;
  2230. unsigned long flags;
  2231. if (!oh)
  2232. return -EINVAL;
  2233. if (state != _HWMOD_STATE_DISABLED &&
  2234. state != _HWMOD_STATE_ENABLED &&
  2235. state != _HWMOD_STATE_IDLE)
  2236. return -EINVAL;
  2237. spin_lock_irqsave(&oh->_lock, flags);
  2238. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  2239. ret = -EINVAL;
  2240. goto ohsps_unlock;
  2241. }
  2242. oh->_postsetup_state = state;
  2243. ret = 0;
  2244. ohsps_unlock:
  2245. spin_unlock_irqrestore(&oh->_lock, flags);
  2246. return ret;
  2247. }
  2248. /**
  2249. * omap_hwmod_get_context_loss_count - get lost context count
  2250. * @oh: struct omap_hwmod *
  2251. *
  2252. * Query the powerdomain of of @oh to get the context loss
  2253. * count for this device.
  2254. *
  2255. * Returns the context loss count of the powerdomain assocated with @oh
  2256. * upon success, or zero if no powerdomain exists for @oh.
  2257. */
  2258. int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
  2259. {
  2260. struct powerdomain *pwrdm;
  2261. int ret = 0;
  2262. pwrdm = omap_hwmod_get_pwrdm(oh);
  2263. if (pwrdm)
  2264. ret = pwrdm_get_context_loss_count(pwrdm);
  2265. return ret;
  2266. }
  2267. /**
  2268. * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
  2269. * @oh: struct omap_hwmod *
  2270. *
  2271. * Prevent the hwmod @oh from being reset during the setup process.
  2272. * Intended for use by board-*.c files on boards with devices that
  2273. * cannot tolerate being reset. Must be called before the hwmod has
  2274. * been set up. Returns 0 upon success or negative error code upon
  2275. * failure.
  2276. */
  2277. int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
  2278. {
  2279. if (!oh)
  2280. return -EINVAL;
  2281. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  2282. pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
  2283. oh->name);
  2284. return -EINVAL;
  2285. }
  2286. oh->flags |= HWMOD_INIT_NO_RESET;
  2287. return 0;
  2288. }
  2289. /**
  2290. * omap_hwmod_pad_route_irq - route an I/O pad wakeup to a particular MPU IRQ
  2291. * @oh: struct omap_hwmod * containing hwmod mux entries
  2292. * @pad_idx: array index in oh->mux of the hwmod mux entry to route wakeup
  2293. * @irq_idx: the hwmod mpu_irqs array index of the IRQ to trigger on wakeup
  2294. *
  2295. * When an I/O pad wakeup arrives for the dynamic or wakeup hwmod mux
  2296. * entry number @pad_idx for the hwmod @oh, trigger the interrupt
  2297. * service routine for the hwmod's mpu_irqs array index @irq_idx. If
  2298. * this function is not called for a given pad_idx, then the ISR
  2299. * associated with @oh's first MPU IRQ will be triggered when an I/O
  2300. * pad wakeup occurs on that pad. Note that @pad_idx is the index of
  2301. * the _dynamic or wakeup_ entry: if there are other entries not
  2302. * marked with OMAP_DEVICE_PAD_WAKEUP or OMAP_DEVICE_PAD_REMUX, these
  2303. * entries are NOT COUNTED in the dynamic pad index. This function
  2304. * must be called separately for each pad that requires its interrupt
  2305. * to be re-routed this way. Returns -EINVAL if there is an argument
  2306. * problem or if @oh does not have hwmod mux entries or MPU IRQs;
  2307. * returns -ENOMEM if memory cannot be allocated; or 0 upon success.
  2308. *
  2309. * XXX This function interface is fragile. Rather than using array
  2310. * indexes, which are subject to unpredictable change, it should be
  2311. * using hwmod IRQ names, and some other stable key for the hwmod mux
  2312. * pad records.
  2313. */
  2314. int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx)
  2315. {
  2316. int nr_irqs;
  2317. might_sleep();
  2318. if (!oh || !oh->mux || !oh->mpu_irqs || pad_idx < 0 ||
  2319. pad_idx >= oh->mux->nr_pads_dynamic)
  2320. return -EINVAL;
  2321. /* Check the number of available mpu_irqs */
  2322. for (nr_irqs = 0; oh->mpu_irqs[nr_irqs].irq >= 0; nr_irqs++)
  2323. ;
  2324. if (irq_idx >= nr_irqs)
  2325. return -EINVAL;
  2326. if (!oh->mux->irqs) {
  2327. /* XXX What frees this? */
  2328. oh->mux->irqs = kzalloc(sizeof(int) * oh->mux->nr_pads_dynamic,
  2329. GFP_KERNEL);
  2330. if (!oh->mux->irqs)
  2331. return -ENOMEM;
  2332. }
  2333. oh->mux->irqs[pad_idx] = irq_idx;
  2334. return 0;
  2335. }