imx23.dtsi 7.1 KB

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  1. /*
  2. * Copyright 2012 Freescale Semiconductor, Inc.
  3. *
  4. * The code contained herein is licensed under the GNU General Public
  5. * License. You may obtain a copy of the GNU General Public License
  6. * Version 2 or later at the following locations:
  7. *
  8. * http://www.opensource.org/licenses/gpl-license.html
  9. * http://www.gnu.org/copyleft/gpl.html
  10. */
  11. /include/ "skeleton.dtsi"
  12. / {
  13. interrupt-parent = <&icoll>;
  14. aliases {
  15. gpio0 = &gpio0;
  16. gpio1 = &gpio1;
  17. gpio2 = &gpio2;
  18. serial0 = &auart0;
  19. serial1 = &auart1;
  20. };
  21. cpus {
  22. cpu@0 {
  23. compatible = "arm,arm926ejs";
  24. };
  25. };
  26. apb@80000000 {
  27. compatible = "simple-bus";
  28. #address-cells = <1>;
  29. #size-cells = <1>;
  30. reg = <0x80000000 0x80000>;
  31. ranges;
  32. apbh@80000000 {
  33. compatible = "simple-bus";
  34. #address-cells = <1>;
  35. #size-cells = <1>;
  36. reg = <0x80000000 0x40000>;
  37. ranges;
  38. icoll: interrupt-controller@80000000 {
  39. compatible = "fsl,imx23-icoll", "fsl,mxs-icoll";
  40. interrupt-controller;
  41. #interrupt-cells = <1>;
  42. reg = <0x80000000 0x2000>;
  43. };
  44. dma-apbh@80004000 {
  45. compatible = "fsl,imx23-dma-apbh";
  46. reg = <0x80004000 2000>;
  47. };
  48. ecc@80008000 {
  49. reg = <0x80008000 2000>;
  50. status = "disabled";
  51. };
  52. bch@8000a000 {
  53. reg = <0x8000a000 2000>;
  54. status = "disabled";
  55. };
  56. gpmi-nand@8000c000 {
  57. reg = <0x8000c000 2000>;
  58. status = "disabled";
  59. };
  60. ssp0: ssp@80010000 {
  61. reg = <0x80010000 2000>;
  62. interrupts = <15 14>;
  63. fsl,ssp-dma-channel = <1>;
  64. status = "disabled";
  65. };
  66. etm@80014000 {
  67. reg = <0x80014000 2000>;
  68. status = "disabled";
  69. };
  70. pinctrl@80018000 {
  71. #address-cells = <1>;
  72. #size-cells = <0>;
  73. compatible = "fsl,imx23-pinctrl", "simple-bus";
  74. reg = <0x80018000 2000>;
  75. gpio0: gpio@0 {
  76. compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
  77. interrupts = <16>;
  78. gpio-controller;
  79. #gpio-cells = <2>;
  80. interrupt-controller;
  81. #interrupt-cells = <2>;
  82. };
  83. gpio1: gpio@1 {
  84. compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
  85. interrupts = <17>;
  86. gpio-controller;
  87. #gpio-cells = <2>;
  88. interrupt-controller;
  89. #interrupt-cells = <2>;
  90. };
  91. gpio2: gpio@2 {
  92. compatible = "fsl,imx23-gpio", "fsl,mxs-gpio";
  93. interrupts = <18>;
  94. gpio-controller;
  95. #gpio-cells = <2>;
  96. interrupt-controller;
  97. #interrupt-cells = <2>;
  98. };
  99. duart_pins_a: duart@0 {
  100. reg = <0>;
  101. fsl,pinmux-ids = <
  102. 0x11a2 /* MX23_PAD_PWM0__DUART_RX */
  103. 0x11b2 /* MX23_PAD_PWM1__DUART_TX */
  104. >;
  105. fsl,drive-strength = <0>;
  106. fsl,voltage = <1>;
  107. fsl,pull-up = <0>;
  108. };
  109. auart0_pins_a: auart0@0 {
  110. reg = <0>;
  111. fsl,pinmux-ids = <
  112. 0x01c0 /* MX23_PAD_AUART1_RX__AUART1_RX */
  113. 0x01d0 /* MX23_PAD_AUART1_TX__AUART1_TX */
  114. 0x01a0 /* MX23_PAD_AUART1_CTS__AUART1_CTS */
  115. 0x01b0 /* MX23_PAD_AUART1_RTS__AUART1_RTS */
  116. >;
  117. fsl,drive-strength = <0>;
  118. fsl,voltage = <1>;
  119. fsl,pull-up = <0>;
  120. };
  121. mmc0_4bit_pins_a: mmc0-4bit@0 {
  122. reg = <0>;
  123. fsl,pinmux-ids = <
  124. 0x2020 /* MX23_PAD_SSP1_DATA0__SSP1_DATA0 */
  125. 0x2030 /* MX23_PAD_SSP1_DATA1__SSP1_DATA1 */
  126. 0x2040 /* MX23_PAD_SSP1_DATA2__SSP1_DATA2 */
  127. 0x2050 /* MX23_PAD_SSP1_DATA3__SSP1_DATA3 */
  128. 0x2000 /* MX23_PAD_SSP1_CMD__SSP1_CMD */
  129. 0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */
  130. 0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */
  131. >;
  132. fsl,drive-strength = <1>;
  133. fsl,voltage = <1>;
  134. fsl,pull-up = <1>;
  135. };
  136. mmc0_8bit_pins_a: mmc0-8bit@0 {
  137. reg = <0>;
  138. fsl,pinmux-ids = <
  139. 0x2020 /* MX23_PAD_SSP1_DATA0__SSP1_DATA0 */
  140. 0x2030 /* MX23_PAD_SSP1_DATA1__SSP1_DATA1 */
  141. 0x2040 /* MX23_PAD_SSP1_DATA2__SSP1_DATA2 */
  142. 0x2050 /* MX23_PAD_SSP1_DATA3__SSP1_DATA3 */
  143. 0x0082 /* MX23_PAD_GPMI_D08__SSP1_DATA4 */
  144. 0x0092 /* MX23_PAD_GPMI_D09__SSP1_DATA5 */
  145. 0x00a2 /* MX23_PAD_GPMI_D10__SSP1_DATA6 */
  146. 0x00b2 /* MX23_PAD_GPMI_D11__SSP1_DATA7 */
  147. 0x2000 /* MX23_PAD_SSP1_CMD__SSP1_CMD */
  148. 0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */
  149. 0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */
  150. >;
  151. fsl,drive-strength = <1>;
  152. fsl,voltage = <1>;
  153. fsl,pull-up = <1>;
  154. };
  155. mmc0_pins_fixup: mmc0-pins-fixup {
  156. fsl,pinmux-ids = <
  157. 0x2010 /* MX23_PAD_SSP1_DETECT__SSP1_DETECT */
  158. 0x2060 /* MX23_PAD_SSP1_SCK__SSP1_SCK */
  159. >;
  160. fsl,pull-up = <0>;
  161. };
  162. };
  163. digctl@8001c000 {
  164. reg = <0x8001c000 2000>;
  165. status = "disabled";
  166. };
  167. emi@80020000 {
  168. reg = <0x80020000 2000>;
  169. status = "disabled";
  170. };
  171. dma-apbx@80024000 {
  172. compatible = "fsl,imx23-dma-apbx";
  173. reg = <0x80024000 2000>;
  174. };
  175. dcp@80028000 {
  176. reg = <0x80028000 2000>;
  177. status = "disabled";
  178. };
  179. pxp@8002a000 {
  180. reg = <0x8002a000 2000>;
  181. status = "disabled";
  182. };
  183. ocotp@8002c000 {
  184. reg = <0x8002c000 2000>;
  185. status = "disabled";
  186. };
  187. axi-ahb@8002e000 {
  188. reg = <0x8002e000 2000>;
  189. status = "disabled";
  190. };
  191. lcdif@80030000 {
  192. reg = <0x80030000 2000>;
  193. status = "disabled";
  194. };
  195. ssp1: ssp@80034000 {
  196. reg = <0x80034000 2000>;
  197. interrupts = <2 20>;
  198. fsl,ssp-dma-channel = <2>;
  199. status = "disabled";
  200. };
  201. tvenc@80038000 {
  202. reg = <0x80038000 2000>;
  203. status = "disabled";
  204. };
  205. };
  206. apbx@80040000 {
  207. compatible = "simple-bus";
  208. #address-cells = <1>;
  209. #size-cells = <1>;
  210. reg = <0x80040000 0x40000>;
  211. ranges;
  212. clkctl@80040000 {
  213. reg = <0x80040000 2000>;
  214. status = "disabled";
  215. };
  216. saif0: saif@80042000 {
  217. reg = <0x80042000 2000>;
  218. status = "disabled";
  219. };
  220. power@80044000 {
  221. reg = <0x80044000 2000>;
  222. status = "disabled";
  223. };
  224. saif1: saif@80046000 {
  225. reg = <0x80046000 2000>;
  226. status = "disabled";
  227. };
  228. audio-out@80048000 {
  229. reg = <0x80048000 2000>;
  230. status = "disabled";
  231. };
  232. audio-in@8004c000 {
  233. reg = <0x8004c000 2000>;
  234. status = "disabled";
  235. };
  236. lradc@80050000 {
  237. reg = <0x80050000 2000>;
  238. status = "disabled";
  239. };
  240. spdif@80054000 {
  241. reg = <0x80054000 2000>;
  242. status = "disabled";
  243. };
  244. i2c@80058000 {
  245. reg = <0x80058000 2000>;
  246. status = "disabled";
  247. };
  248. rtc@8005c000 {
  249. compatible = "fsl,imx23-rtc", "fsl,stmp3xxx-rtc";
  250. reg = <0x8005c000 2000>;
  251. interrupts = <22>;
  252. };
  253. pwm@80064000 {
  254. reg = <0x80064000 2000>;
  255. status = "disabled";
  256. };
  257. timrot@80068000 {
  258. reg = <0x80068000 2000>;
  259. status = "disabled";
  260. };
  261. auart0: serial@8006c000 {
  262. compatible = "fsl,imx23-auart";
  263. reg = <0x8006c000 0x2000>;
  264. interrupts = <24 25 23>;
  265. status = "disabled";
  266. };
  267. auart1: serial@8006e000 {
  268. compatible = "fsl,imx23-auart";
  269. reg = <0x8006e000 0x2000>;
  270. interrupts = <59 60 58>;
  271. status = "disabled";
  272. };
  273. duart: serial@80070000 {
  274. compatible = "arm,pl011", "arm,primecell";
  275. reg = <0x80070000 0x2000>;
  276. interrupts = <0>;
  277. status = "disabled";
  278. };
  279. usbphy@8007c000 {
  280. reg = <0x8007c000 0x2000>;
  281. status = "disabled";
  282. };
  283. };
  284. };
  285. ahb@80080000 {
  286. compatible = "simple-bus";
  287. #address-cells = <1>;
  288. #size-cells = <1>;
  289. reg = <0x80080000 0x80000>;
  290. ranges;
  291. usbctrl@80080000 {
  292. reg = <0x80080000 0x10000>;
  293. status = "disabled";
  294. };
  295. };
  296. };