io_apic.h 4.4 KB

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  1. #ifndef ASM_X86__IO_APIC_H
  2. #define ASM_X86__IO_APIC_H
  3. #include <linux/types.h>
  4. #include <asm/mpspec.h>
  5. #include <asm/apicdef.h>
  6. /*
  7. * Intel IO-APIC support for SMP and UP systems.
  8. *
  9. * Copyright (C) 1997, 1998, 1999, 2000 Ingo Molnar
  10. */
  11. /* I/O Unit Redirection Table */
  12. #define IO_APIC_REDIR_VECTOR_MASK 0x000FF
  13. #define IO_APIC_REDIR_DEST_LOGICAL 0x00800
  14. #define IO_APIC_REDIR_DEST_PHYSICAL 0x00000
  15. #define IO_APIC_REDIR_SEND_PENDING (1 << 12)
  16. #define IO_APIC_REDIR_REMOTE_IRR (1 << 14)
  17. #define IO_APIC_REDIR_LEVEL_TRIGGER (1 << 15)
  18. #define IO_APIC_REDIR_MASKED (1 << 16)
  19. /*
  20. * The structure of the IO-APIC:
  21. */
  22. union IO_APIC_reg_00 {
  23. u32 raw;
  24. struct {
  25. u32 __reserved_2 : 14,
  26. LTS : 1,
  27. delivery_type : 1,
  28. __reserved_1 : 8,
  29. ID : 8;
  30. } __attribute__ ((packed)) bits;
  31. };
  32. union IO_APIC_reg_01 {
  33. u32 raw;
  34. struct {
  35. u32 version : 8,
  36. __reserved_2 : 7,
  37. PRQ : 1,
  38. entries : 8,
  39. __reserved_1 : 8;
  40. } __attribute__ ((packed)) bits;
  41. };
  42. union IO_APIC_reg_02 {
  43. u32 raw;
  44. struct {
  45. u32 __reserved_2 : 24,
  46. arbitration : 4,
  47. __reserved_1 : 4;
  48. } __attribute__ ((packed)) bits;
  49. };
  50. union IO_APIC_reg_03 {
  51. u32 raw;
  52. struct {
  53. u32 boot_DT : 1,
  54. __reserved_1 : 31;
  55. } __attribute__ ((packed)) bits;
  56. };
  57. enum ioapic_irq_destination_types {
  58. dest_Fixed = 0,
  59. dest_LowestPrio = 1,
  60. dest_SMI = 2,
  61. dest__reserved_1 = 3,
  62. dest_NMI = 4,
  63. dest_INIT = 5,
  64. dest__reserved_2 = 6,
  65. dest_ExtINT = 7
  66. };
  67. struct IO_APIC_route_entry {
  68. __u32 vector : 8,
  69. delivery_mode : 3, /* 000: FIXED
  70. * 001: lowest prio
  71. * 111: ExtINT
  72. */
  73. dest_mode : 1, /* 0: physical, 1: logical */
  74. delivery_status : 1,
  75. polarity : 1,
  76. irr : 1,
  77. trigger : 1, /* 0: edge, 1: level */
  78. mask : 1, /* 0: enabled, 1: disabled */
  79. __reserved_2 : 15;
  80. #ifdef CONFIG_X86_32
  81. union {
  82. struct {
  83. __u32 __reserved_1 : 24,
  84. physical_dest : 4,
  85. __reserved_2 : 4;
  86. } physical;
  87. struct {
  88. __u32 __reserved_1 : 24,
  89. logical_dest : 8;
  90. } logical;
  91. } dest;
  92. #else
  93. __u32 __reserved_3 : 24,
  94. dest : 8;
  95. #endif
  96. } __attribute__ ((packed));
  97. struct IR_IO_APIC_route_entry {
  98. __u64 vector : 8,
  99. zero : 3,
  100. index2 : 1,
  101. delivery_status : 1,
  102. polarity : 1,
  103. irr : 1,
  104. trigger : 1,
  105. mask : 1,
  106. reserved : 31,
  107. format : 1,
  108. index : 15;
  109. } __attribute__ ((packed));
  110. #ifdef CONFIG_X86_IO_APIC
  111. /*
  112. * # of IO-APICs and # of IRQ routing registers
  113. */
  114. extern int nr_ioapics;
  115. extern int nr_ioapic_registers[MAX_IO_APICS];
  116. /*
  117. * MP-BIOS irq configuration table structures:
  118. */
  119. #define MP_MAX_IOAPIC_PIN 127
  120. struct mp_config_ioapic {
  121. unsigned long mp_apicaddr;
  122. unsigned int mp_apicid;
  123. unsigned char mp_type;
  124. unsigned char mp_apicver;
  125. unsigned char mp_flags;
  126. };
  127. struct mp_config_intsrc {
  128. unsigned int mp_dstapic;
  129. unsigned char mp_type;
  130. unsigned char mp_irqtype;
  131. unsigned short mp_irqflag;
  132. unsigned char mp_srcbus;
  133. unsigned char mp_srcbusirq;
  134. unsigned char mp_dstirq;
  135. };
  136. /* I/O APIC entries */
  137. extern struct mp_config_ioapic mp_ioapics[MAX_IO_APICS];
  138. /* # of MP IRQ source entries */
  139. extern int mp_irq_entries;
  140. /* MP IRQ source entries */
  141. extern struct mp_config_intsrc mp_irqs[MAX_IRQ_SOURCES];
  142. /* non-0 if default (table-less) MP configuration */
  143. extern int mpc_default_type;
  144. /* Older SiS APIC requires we rewrite the index register */
  145. extern int sis_apic_bug;
  146. /* 1 if "noapic" boot option passed */
  147. extern int skip_ioapic_setup;
  148. /* 1 if the timer IRQ uses the '8259A Virtual Wire' mode */
  149. extern int timer_through_8259;
  150. static inline void disable_ioapic_setup(void)
  151. {
  152. skip_ioapic_setup = 1;
  153. }
  154. /*
  155. * If we use the IO-APIC for IRQ routing, disable automatic
  156. * assignment of PCI IRQ's.
  157. */
  158. #define io_apic_assign_pci_irqs \
  159. (mp_irq_entries && !skip_ioapic_setup && io_apic_irqs)
  160. #ifdef CONFIG_ACPI
  161. extern int io_apic_get_unique_id(int ioapic, int apic_id);
  162. extern int io_apic_get_version(int ioapic);
  163. extern int io_apic_get_redir_entries(int ioapic);
  164. extern int io_apic_set_pci_routing(int ioapic, int pin, int irq,
  165. int edge_level, int active_high_low);
  166. #endif /* CONFIG_ACPI */
  167. extern int (*ioapic_renumber_irq)(int ioapic, int irq);
  168. extern void ioapic_init_mappings(void);
  169. #ifdef CONFIG_X86_64
  170. extern int save_mask_IO_APIC_setup(void);
  171. extern void restore_IO_APIC_setup(void);
  172. extern void reinit_intr_remapped_IO_APIC(int);
  173. #endif
  174. #else /* !CONFIG_X86_IO_APIC */
  175. #define io_apic_assign_pci_irqs 0
  176. static const int timer_through_8259 = 0;
  177. static inline void ioapic_init_mappings(void) { }
  178. #endif
  179. #endif /* ASM_X86__IO_APIC_H */