events.c 19 KB

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  1. /*
  2. * Xen event channels
  3. *
  4. * Xen models interrupts with abstract event channels. Because each
  5. * domain gets 1024 event channels, but NR_IRQ is not that large, we
  6. * must dynamically map irqs<->event channels. The event channels
  7. * interface with the rest of the kernel by defining a xen interrupt
  8. * chip. When an event is recieved, it is mapped to an irq and sent
  9. * through the normal interrupt processing path.
  10. *
  11. * There are four kinds of events which can be mapped to an event
  12. * channel:
  13. *
  14. * 1. Inter-domain notifications. This includes all the virtual
  15. * device events, since they're driven by front-ends in another domain
  16. * (typically dom0).
  17. * 2. VIRQs, typically used for timers. These are per-cpu events.
  18. * 3. IPIs.
  19. * 4. Hardware interrupts. Not supported at present.
  20. *
  21. * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
  22. */
  23. #include <linux/linkage.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/irq.h>
  26. #include <linux/module.h>
  27. #include <linux/string.h>
  28. #include <asm/ptrace.h>
  29. #include <asm/irq.h>
  30. #include <asm/sync_bitops.h>
  31. #include <asm/xen/hypercall.h>
  32. #include <asm/xen/hypervisor.h>
  33. #include <xen/xen-ops.h>
  34. #include <xen/events.h>
  35. #include <xen/interface/xen.h>
  36. #include <xen/interface/event_channel.h>
  37. /*
  38. * This lock protects updates to the following mapping and reference-count
  39. * arrays. The lock does not need to be acquired to read the mapping tables.
  40. */
  41. static DEFINE_SPINLOCK(irq_mapping_update_lock);
  42. /* IRQ <-> VIRQ mapping. */
  43. static DEFINE_PER_CPU(int, virq_to_irq[NR_VIRQS]) = {[0 ... NR_VIRQS-1] = -1};
  44. /* IRQ <-> IPI mapping */
  45. static DEFINE_PER_CPU(int, ipi_to_irq[XEN_NR_IPIS]) = {[0 ... XEN_NR_IPIS-1] = -1};
  46. /* Packed IRQ information: binding type, sub-type index, and event channel. */
  47. struct packed_irq
  48. {
  49. unsigned short evtchn;
  50. unsigned char index;
  51. unsigned char type;
  52. };
  53. static struct packed_irq irq_info[NR_IRQS];
  54. /* Binding types. */
  55. enum {
  56. IRQT_UNBOUND,
  57. IRQT_PIRQ,
  58. IRQT_VIRQ,
  59. IRQT_IPI,
  60. IRQT_EVTCHN
  61. };
  62. /* Convenient shorthand for packed representation of an unbound IRQ. */
  63. #define IRQ_UNBOUND mk_irq_info(IRQT_UNBOUND, 0, 0)
  64. static int evtchn_to_irq[NR_EVENT_CHANNELS] = {
  65. [0 ... NR_EVENT_CHANNELS-1] = -1
  66. };
  67. static unsigned long cpu_evtchn_mask[NR_CPUS][NR_EVENT_CHANNELS/BITS_PER_LONG];
  68. static u8 cpu_evtchn[NR_EVENT_CHANNELS];
  69. /* Reference counts for bindings to IRQs. */
  70. static int irq_bindcount[NR_IRQS];
  71. /* Xen will never allocate port zero for any purpose. */
  72. #define VALID_EVTCHN(chn) ((chn) != 0)
  73. static struct irq_chip xen_dynamic_chip;
  74. /* Constructor for packed IRQ information. */
  75. static inline struct packed_irq mk_irq_info(u32 type, u32 index, u32 evtchn)
  76. {
  77. return (struct packed_irq) { evtchn, index, type };
  78. }
  79. /*
  80. * Accessors for packed IRQ information.
  81. */
  82. static inline unsigned int evtchn_from_irq(int irq)
  83. {
  84. return irq_info[irq].evtchn;
  85. }
  86. static inline unsigned int index_from_irq(int irq)
  87. {
  88. return irq_info[irq].index;
  89. }
  90. static inline unsigned int type_from_irq(int irq)
  91. {
  92. return irq_info[irq].type;
  93. }
  94. static inline unsigned long active_evtchns(unsigned int cpu,
  95. struct shared_info *sh,
  96. unsigned int idx)
  97. {
  98. return (sh->evtchn_pending[idx] &
  99. cpu_evtchn_mask[cpu][idx] &
  100. ~sh->evtchn_mask[idx]);
  101. }
  102. static void bind_evtchn_to_cpu(unsigned int chn, unsigned int cpu)
  103. {
  104. int irq = evtchn_to_irq[chn];
  105. BUG_ON(irq == -1);
  106. #ifdef CONFIG_SMP
  107. irq_desc[irq].affinity = cpumask_of_cpu(cpu);
  108. #endif
  109. __clear_bit(chn, cpu_evtchn_mask[cpu_evtchn[chn]]);
  110. __set_bit(chn, cpu_evtchn_mask[cpu]);
  111. cpu_evtchn[chn] = cpu;
  112. }
  113. static void init_evtchn_cpu_bindings(void)
  114. {
  115. #ifdef CONFIG_SMP
  116. int i;
  117. /* By default all event channels notify CPU#0. */
  118. for (i = 0; i < NR_IRQS; i++)
  119. irq_desc[i].affinity = cpumask_of_cpu(0);
  120. #endif
  121. memset(cpu_evtchn, 0, sizeof(cpu_evtchn));
  122. memset(cpu_evtchn_mask[0], ~0, sizeof(cpu_evtchn_mask[0]));
  123. }
  124. static inline unsigned int cpu_from_evtchn(unsigned int evtchn)
  125. {
  126. return cpu_evtchn[evtchn];
  127. }
  128. static inline void clear_evtchn(int port)
  129. {
  130. struct shared_info *s = HYPERVISOR_shared_info;
  131. sync_clear_bit(port, &s->evtchn_pending[0]);
  132. }
  133. static inline void set_evtchn(int port)
  134. {
  135. struct shared_info *s = HYPERVISOR_shared_info;
  136. sync_set_bit(port, &s->evtchn_pending[0]);
  137. }
  138. static inline int test_evtchn(int port)
  139. {
  140. struct shared_info *s = HYPERVISOR_shared_info;
  141. return sync_test_bit(port, &s->evtchn_pending[0]);
  142. }
  143. /**
  144. * notify_remote_via_irq - send event to remote end of event channel via irq
  145. * @irq: irq of event channel to send event to
  146. *
  147. * Unlike notify_remote_via_evtchn(), this is safe to use across
  148. * save/restore. Notifications on a broken connection are silently
  149. * dropped.
  150. */
  151. void notify_remote_via_irq(int irq)
  152. {
  153. int evtchn = evtchn_from_irq(irq);
  154. if (VALID_EVTCHN(evtchn))
  155. notify_remote_via_evtchn(evtchn);
  156. }
  157. EXPORT_SYMBOL_GPL(notify_remote_via_irq);
  158. static void mask_evtchn(int port)
  159. {
  160. struct shared_info *s = HYPERVISOR_shared_info;
  161. sync_set_bit(port, &s->evtchn_mask[0]);
  162. }
  163. static void unmask_evtchn(int port)
  164. {
  165. struct shared_info *s = HYPERVISOR_shared_info;
  166. unsigned int cpu = get_cpu();
  167. BUG_ON(!irqs_disabled());
  168. /* Slow path (hypercall) if this is a non-local port. */
  169. if (unlikely(cpu != cpu_from_evtchn(port))) {
  170. struct evtchn_unmask unmask = { .port = port };
  171. (void)HYPERVISOR_event_channel_op(EVTCHNOP_unmask, &unmask);
  172. } else {
  173. struct vcpu_info *vcpu_info = __get_cpu_var(xen_vcpu);
  174. sync_clear_bit(port, &s->evtchn_mask[0]);
  175. /*
  176. * The following is basically the equivalent of
  177. * 'hw_resend_irq'. Just like a real IO-APIC we 'lose
  178. * the interrupt edge' if the channel is masked.
  179. */
  180. if (sync_test_bit(port, &s->evtchn_pending[0]) &&
  181. !sync_test_and_set_bit(port / BITS_PER_LONG,
  182. &vcpu_info->evtchn_pending_sel))
  183. vcpu_info->evtchn_upcall_pending = 1;
  184. }
  185. put_cpu();
  186. }
  187. static int find_unbound_irq(void)
  188. {
  189. int irq;
  190. /* Only allocate from dynirq range */
  191. for (irq = 0; irq < NR_IRQS; irq++)
  192. if (irq_bindcount[irq] == 0)
  193. break;
  194. if (irq == NR_IRQS)
  195. panic("No available IRQ to bind to: increase NR_IRQS!\n");
  196. return irq;
  197. }
  198. int bind_evtchn_to_irq(unsigned int evtchn)
  199. {
  200. int irq;
  201. spin_lock(&irq_mapping_update_lock);
  202. irq = evtchn_to_irq[evtchn];
  203. if (irq == -1) {
  204. irq = find_unbound_irq();
  205. dynamic_irq_init(irq);
  206. set_irq_chip_and_handler_name(irq, &xen_dynamic_chip,
  207. handle_level_irq, "event");
  208. evtchn_to_irq[evtchn] = irq;
  209. irq_info[irq] = mk_irq_info(IRQT_EVTCHN, 0, evtchn);
  210. }
  211. irq_bindcount[irq]++;
  212. spin_unlock(&irq_mapping_update_lock);
  213. return irq;
  214. }
  215. EXPORT_SYMBOL_GPL(bind_evtchn_to_irq);
  216. static int bind_ipi_to_irq(unsigned int ipi, unsigned int cpu)
  217. {
  218. struct evtchn_bind_ipi bind_ipi;
  219. int evtchn, irq;
  220. spin_lock(&irq_mapping_update_lock);
  221. irq = per_cpu(ipi_to_irq, cpu)[ipi];
  222. if (irq == -1) {
  223. irq = find_unbound_irq();
  224. if (irq < 0)
  225. goto out;
  226. dynamic_irq_init(irq);
  227. set_irq_chip_and_handler_name(irq, &xen_dynamic_chip,
  228. handle_level_irq, "ipi");
  229. bind_ipi.vcpu = cpu;
  230. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  231. &bind_ipi) != 0)
  232. BUG();
  233. evtchn = bind_ipi.port;
  234. evtchn_to_irq[evtchn] = irq;
  235. irq_info[irq] = mk_irq_info(IRQT_IPI, ipi, evtchn);
  236. per_cpu(ipi_to_irq, cpu)[ipi] = irq;
  237. bind_evtchn_to_cpu(evtchn, cpu);
  238. }
  239. irq_bindcount[irq]++;
  240. out:
  241. spin_unlock(&irq_mapping_update_lock);
  242. return irq;
  243. }
  244. static int bind_virq_to_irq(unsigned int virq, unsigned int cpu)
  245. {
  246. struct evtchn_bind_virq bind_virq;
  247. int evtchn, irq;
  248. spin_lock(&irq_mapping_update_lock);
  249. irq = per_cpu(virq_to_irq, cpu)[virq];
  250. if (irq == -1) {
  251. bind_virq.virq = virq;
  252. bind_virq.vcpu = cpu;
  253. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  254. &bind_virq) != 0)
  255. BUG();
  256. evtchn = bind_virq.port;
  257. irq = find_unbound_irq();
  258. dynamic_irq_init(irq);
  259. set_irq_chip_and_handler_name(irq, &xen_dynamic_chip,
  260. handle_level_irq, "virq");
  261. evtchn_to_irq[evtchn] = irq;
  262. irq_info[irq] = mk_irq_info(IRQT_VIRQ, virq, evtchn);
  263. per_cpu(virq_to_irq, cpu)[virq] = irq;
  264. bind_evtchn_to_cpu(evtchn, cpu);
  265. }
  266. irq_bindcount[irq]++;
  267. spin_unlock(&irq_mapping_update_lock);
  268. return irq;
  269. }
  270. static void unbind_from_irq(unsigned int irq)
  271. {
  272. struct evtchn_close close;
  273. int evtchn = evtchn_from_irq(irq);
  274. spin_lock(&irq_mapping_update_lock);
  275. if ((--irq_bindcount[irq] == 0) && VALID_EVTCHN(evtchn)) {
  276. close.port = evtchn;
  277. if (HYPERVISOR_event_channel_op(EVTCHNOP_close, &close) != 0)
  278. BUG();
  279. switch (type_from_irq(irq)) {
  280. case IRQT_VIRQ:
  281. per_cpu(virq_to_irq, cpu_from_evtchn(evtchn))
  282. [index_from_irq(irq)] = -1;
  283. break;
  284. case IRQT_IPI:
  285. per_cpu(ipi_to_irq, cpu_from_evtchn(evtchn))
  286. [index_from_irq(irq)] = -1;
  287. break;
  288. default:
  289. break;
  290. }
  291. /* Closed ports are implicitly re-bound to VCPU0. */
  292. bind_evtchn_to_cpu(evtchn, 0);
  293. evtchn_to_irq[evtchn] = -1;
  294. irq_info[irq] = IRQ_UNBOUND;
  295. dynamic_irq_cleanup(irq);
  296. }
  297. spin_unlock(&irq_mapping_update_lock);
  298. }
  299. int bind_evtchn_to_irqhandler(unsigned int evtchn,
  300. irq_handler_t handler,
  301. unsigned long irqflags,
  302. const char *devname, void *dev_id)
  303. {
  304. unsigned int irq;
  305. int retval;
  306. irq = bind_evtchn_to_irq(evtchn);
  307. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  308. if (retval != 0) {
  309. unbind_from_irq(irq);
  310. return retval;
  311. }
  312. return irq;
  313. }
  314. EXPORT_SYMBOL_GPL(bind_evtchn_to_irqhandler);
  315. int bind_virq_to_irqhandler(unsigned int virq, unsigned int cpu,
  316. irq_handler_t handler,
  317. unsigned long irqflags, const char *devname, void *dev_id)
  318. {
  319. unsigned int irq;
  320. int retval;
  321. irq = bind_virq_to_irq(virq, cpu);
  322. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  323. if (retval != 0) {
  324. unbind_from_irq(irq);
  325. return retval;
  326. }
  327. return irq;
  328. }
  329. EXPORT_SYMBOL_GPL(bind_virq_to_irqhandler);
  330. int bind_ipi_to_irqhandler(enum ipi_vector ipi,
  331. unsigned int cpu,
  332. irq_handler_t handler,
  333. unsigned long irqflags,
  334. const char *devname,
  335. void *dev_id)
  336. {
  337. int irq, retval;
  338. irq = bind_ipi_to_irq(ipi, cpu);
  339. if (irq < 0)
  340. return irq;
  341. retval = request_irq(irq, handler, irqflags, devname, dev_id);
  342. if (retval != 0) {
  343. unbind_from_irq(irq);
  344. return retval;
  345. }
  346. return irq;
  347. }
  348. void unbind_from_irqhandler(unsigned int irq, void *dev_id)
  349. {
  350. free_irq(irq, dev_id);
  351. unbind_from_irq(irq);
  352. }
  353. EXPORT_SYMBOL_GPL(unbind_from_irqhandler);
  354. void xen_send_IPI_one(unsigned int cpu, enum ipi_vector vector)
  355. {
  356. int irq = per_cpu(ipi_to_irq, cpu)[vector];
  357. BUG_ON(irq < 0);
  358. notify_remote_via_irq(irq);
  359. }
  360. irqreturn_t xen_debug_interrupt(int irq, void *dev_id)
  361. {
  362. struct shared_info *sh = HYPERVISOR_shared_info;
  363. int cpu = smp_processor_id();
  364. int i;
  365. unsigned long flags;
  366. static DEFINE_SPINLOCK(debug_lock);
  367. spin_lock_irqsave(&debug_lock, flags);
  368. printk("vcpu %d\n ", cpu);
  369. for_each_online_cpu(i) {
  370. struct vcpu_info *v = per_cpu(xen_vcpu, i);
  371. printk("%d: masked=%d pending=%d event_sel %08lx\n ", i,
  372. (get_irq_regs() && i == cpu) ? xen_irqs_disabled(get_irq_regs()) : v->evtchn_upcall_mask,
  373. v->evtchn_upcall_pending,
  374. v->evtchn_pending_sel);
  375. }
  376. printk("pending:\n ");
  377. for(i = ARRAY_SIZE(sh->evtchn_pending)-1; i >= 0; i--)
  378. printk("%08lx%s", sh->evtchn_pending[i],
  379. i % 8 == 0 ? "\n " : " ");
  380. printk("\nmasks:\n ");
  381. for(i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  382. printk("%08lx%s", sh->evtchn_mask[i],
  383. i % 8 == 0 ? "\n " : " ");
  384. printk("\nunmasked:\n ");
  385. for(i = ARRAY_SIZE(sh->evtchn_mask)-1; i >= 0; i--)
  386. printk("%08lx%s", sh->evtchn_pending[i] & ~sh->evtchn_mask[i],
  387. i % 8 == 0 ? "\n " : " ");
  388. printk("\npending list:\n");
  389. for(i = 0; i < NR_EVENT_CHANNELS; i++) {
  390. if (sync_test_bit(i, sh->evtchn_pending)) {
  391. printk(" %d: event %d -> irq %d\n",
  392. cpu_evtchn[i], i,
  393. evtchn_to_irq[i]);
  394. }
  395. }
  396. spin_unlock_irqrestore(&debug_lock, flags);
  397. return IRQ_HANDLED;
  398. }
  399. /*
  400. * Search the CPUs pending events bitmasks. For each one found, map
  401. * the event number to an irq, and feed it into do_IRQ() for
  402. * handling.
  403. *
  404. * Xen uses a two-level bitmap to speed searching. The first level is
  405. * a bitset of words which contain pending event bits. The second
  406. * level is a bitset of pending events themselves.
  407. */
  408. void xen_evtchn_do_upcall(struct pt_regs *regs)
  409. {
  410. int cpu = get_cpu();
  411. struct shared_info *s = HYPERVISOR_shared_info;
  412. struct vcpu_info *vcpu_info = __get_cpu_var(xen_vcpu);
  413. static DEFINE_PER_CPU(unsigned, nesting_count);
  414. unsigned count;
  415. do {
  416. unsigned long pending_words;
  417. vcpu_info->evtchn_upcall_pending = 0;
  418. if (__get_cpu_var(nesting_count)++)
  419. goto out;
  420. #ifndef CONFIG_X86 /* No need for a barrier -- XCHG is a barrier on x86. */
  421. /* Clear master flag /before/ clearing selector flag. */
  422. wmb();
  423. #endif
  424. pending_words = xchg(&vcpu_info->evtchn_pending_sel, 0);
  425. while (pending_words != 0) {
  426. unsigned long pending_bits;
  427. int word_idx = __ffs(pending_words);
  428. pending_words &= ~(1UL << word_idx);
  429. while ((pending_bits = active_evtchns(cpu, s, word_idx)) != 0) {
  430. int bit_idx = __ffs(pending_bits);
  431. int port = (word_idx * BITS_PER_LONG) + bit_idx;
  432. int irq = evtchn_to_irq[port];
  433. if (irq != -1)
  434. xen_do_IRQ(irq, regs);
  435. }
  436. }
  437. BUG_ON(!irqs_disabled());
  438. count = __get_cpu_var(nesting_count);
  439. __get_cpu_var(nesting_count) = 0;
  440. } while(count != 1);
  441. out:
  442. put_cpu();
  443. }
  444. /* Rebind a new event channel to an existing irq. */
  445. void rebind_evtchn_irq(int evtchn, int irq)
  446. {
  447. /* Make sure the irq is masked, since the new event channel
  448. will also be masked. */
  449. disable_irq(irq);
  450. spin_lock(&irq_mapping_update_lock);
  451. /* After resume the irq<->evtchn mappings are all cleared out */
  452. BUG_ON(evtchn_to_irq[evtchn] != -1);
  453. /* Expect irq to have been bound before,
  454. so the bindcount should be non-0 */
  455. BUG_ON(irq_bindcount[irq] == 0);
  456. evtchn_to_irq[evtchn] = irq;
  457. irq_info[irq] = mk_irq_info(IRQT_EVTCHN, 0, evtchn);
  458. spin_unlock(&irq_mapping_update_lock);
  459. /* new event channels are always bound to cpu 0 */
  460. irq_set_affinity(irq, cpumask_of_cpu(0));
  461. /* Unmask the event channel. */
  462. enable_irq(irq);
  463. }
  464. /* Rebind an evtchn so that it gets delivered to a specific cpu */
  465. static void rebind_irq_to_cpu(unsigned irq, unsigned tcpu)
  466. {
  467. struct evtchn_bind_vcpu bind_vcpu;
  468. int evtchn = evtchn_from_irq(irq);
  469. if (!VALID_EVTCHN(evtchn))
  470. return;
  471. /* Send future instances of this interrupt to other vcpu. */
  472. bind_vcpu.port = evtchn;
  473. bind_vcpu.vcpu = tcpu;
  474. /*
  475. * If this fails, it usually just indicates that we're dealing with a
  476. * virq or IPI channel, which don't actually need to be rebound. Ignore
  477. * it, but don't do the xenlinux-level rebind in that case.
  478. */
  479. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_vcpu, &bind_vcpu) >= 0)
  480. bind_evtchn_to_cpu(evtchn, tcpu);
  481. }
  482. static void set_affinity_irq(unsigned irq, cpumask_t dest)
  483. {
  484. unsigned tcpu = first_cpu(dest);
  485. rebind_irq_to_cpu(irq, tcpu);
  486. }
  487. int resend_irq_on_evtchn(unsigned int irq)
  488. {
  489. int masked, evtchn = evtchn_from_irq(irq);
  490. struct shared_info *s = HYPERVISOR_shared_info;
  491. if (!VALID_EVTCHN(evtchn))
  492. return 1;
  493. masked = sync_test_and_set_bit(evtchn, s->evtchn_mask);
  494. sync_set_bit(evtchn, s->evtchn_pending);
  495. if (!masked)
  496. unmask_evtchn(evtchn);
  497. return 1;
  498. }
  499. static void enable_dynirq(unsigned int irq)
  500. {
  501. int evtchn = evtchn_from_irq(irq);
  502. if (VALID_EVTCHN(evtchn))
  503. unmask_evtchn(evtchn);
  504. }
  505. static void disable_dynirq(unsigned int irq)
  506. {
  507. int evtchn = evtchn_from_irq(irq);
  508. if (VALID_EVTCHN(evtchn))
  509. mask_evtchn(evtchn);
  510. }
  511. static void ack_dynirq(unsigned int irq)
  512. {
  513. int evtchn = evtchn_from_irq(irq);
  514. move_native_irq(irq);
  515. if (VALID_EVTCHN(evtchn))
  516. clear_evtchn(evtchn);
  517. }
  518. static int retrigger_dynirq(unsigned int irq)
  519. {
  520. int evtchn = evtchn_from_irq(irq);
  521. struct shared_info *sh = HYPERVISOR_shared_info;
  522. int ret = 0;
  523. if (VALID_EVTCHN(evtchn)) {
  524. int masked;
  525. masked = sync_test_and_set_bit(evtchn, sh->evtchn_mask);
  526. sync_set_bit(evtchn, sh->evtchn_pending);
  527. if (!masked)
  528. unmask_evtchn(evtchn);
  529. ret = 1;
  530. }
  531. return ret;
  532. }
  533. static void restore_cpu_virqs(unsigned int cpu)
  534. {
  535. struct evtchn_bind_virq bind_virq;
  536. int virq, irq, evtchn;
  537. for (virq = 0; virq < NR_VIRQS; virq++) {
  538. if ((irq = per_cpu(virq_to_irq, cpu)[virq]) == -1)
  539. continue;
  540. BUG_ON(irq_info[irq].type != IRQT_VIRQ);
  541. BUG_ON(irq_info[irq].index != virq);
  542. /* Get a new binding from Xen. */
  543. bind_virq.virq = virq;
  544. bind_virq.vcpu = cpu;
  545. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_virq,
  546. &bind_virq) != 0)
  547. BUG();
  548. evtchn = bind_virq.port;
  549. /* Record the new mapping. */
  550. evtchn_to_irq[evtchn] = irq;
  551. irq_info[irq] = mk_irq_info(IRQT_VIRQ, virq, evtchn);
  552. bind_evtchn_to_cpu(evtchn, cpu);
  553. /* Ready for use. */
  554. unmask_evtchn(evtchn);
  555. }
  556. }
  557. static void restore_cpu_ipis(unsigned int cpu)
  558. {
  559. struct evtchn_bind_ipi bind_ipi;
  560. int ipi, irq, evtchn;
  561. for (ipi = 0; ipi < XEN_NR_IPIS; ipi++) {
  562. if ((irq = per_cpu(ipi_to_irq, cpu)[ipi]) == -1)
  563. continue;
  564. BUG_ON(irq_info[irq].type != IRQT_IPI);
  565. BUG_ON(irq_info[irq].index != ipi);
  566. /* Get a new binding from Xen. */
  567. bind_ipi.vcpu = cpu;
  568. if (HYPERVISOR_event_channel_op(EVTCHNOP_bind_ipi,
  569. &bind_ipi) != 0)
  570. BUG();
  571. evtchn = bind_ipi.port;
  572. /* Record the new mapping. */
  573. evtchn_to_irq[evtchn] = irq;
  574. irq_info[irq] = mk_irq_info(IRQT_IPI, ipi, evtchn);
  575. bind_evtchn_to_cpu(evtchn, cpu);
  576. /* Ready for use. */
  577. unmask_evtchn(evtchn);
  578. }
  579. }
  580. /* Clear an irq's pending state, in preparation for polling on it */
  581. void xen_clear_irq_pending(int irq)
  582. {
  583. int evtchn = evtchn_from_irq(irq);
  584. if (VALID_EVTCHN(evtchn))
  585. clear_evtchn(evtchn);
  586. }
  587. void xen_set_irq_pending(int irq)
  588. {
  589. int evtchn = evtchn_from_irq(irq);
  590. if (VALID_EVTCHN(evtchn))
  591. set_evtchn(evtchn);
  592. }
  593. bool xen_test_irq_pending(int irq)
  594. {
  595. int evtchn = evtchn_from_irq(irq);
  596. bool ret = false;
  597. if (VALID_EVTCHN(evtchn))
  598. ret = test_evtchn(evtchn);
  599. return ret;
  600. }
  601. /* Poll waiting for an irq to become pending. In the usual case, the
  602. irq will be disabled so it won't deliver an interrupt. */
  603. void xen_poll_irq(int irq)
  604. {
  605. evtchn_port_t evtchn = evtchn_from_irq(irq);
  606. if (VALID_EVTCHN(evtchn)) {
  607. struct sched_poll poll;
  608. poll.nr_ports = 1;
  609. poll.timeout = 0;
  610. poll.ports = &evtchn;
  611. if (HYPERVISOR_sched_op(SCHEDOP_poll, &poll) != 0)
  612. BUG();
  613. }
  614. }
  615. void xen_irq_resume(void)
  616. {
  617. unsigned int cpu, irq, evtchn;
  618. init_evtchn_cpu_bindings();
  619. /* New event-channel space is not 'live' yet. */
  620. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  621. mask_evtchn(evtchn);
  622. /* No IRQ <-> event-channel mappings. */
  623. for (irq = 0; irq < NR_IRQS; irq++)
  624. irq_info[irq].evtchn = 0; /* zap event-channel binding */
  625. for (evtchn = 0; evtchn < NR_EVENT_CHANNELS; evtchn++)
  626. evtchn_to_irq[evtchn] = -1;
  627. for_each_possible_cpu(cpu) {
  628. restore_cpu_virqs(cpu);
  629. restore_cpu_ipis(cpu);
  630. }
  631. }
  632. static struct irq_chip xen_dynamic_chip __read_mostly = {
  633. .name = "xen-dyn",
  634. .mask = disable_dynirq,
  635. .unmask = enable_dynirq,
  636. .ack = ack_dynirq,
  637. .set_affinity = set_affinity_irq,
  638. .retrigger = retrigger_dynirq,
  639. };
  640. void __init xen_init_IRQ(void)
  641. {
  642. int i;
  643. init_evtchn_cpu_bindings();
  644. /* No event channels are 'live' right now. */
  645. for (i = 0; i < NR_EVENT_CHANNELS; i++)
  646. mask_evtchn(i);
  647. /* Dynamic IRQ space is currently unbound. Zero the refcnts. */
  648. for (i = 0; i < NR_IRQS; i++)
  649. irq_bindcount[i] = 0;
  650. irq_ctx_init(smp_processor_id());
  651. }