rtc-m48t59.c 14 KB

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  1. /*
  2. * ST M48T59 RTC driver
  3. *
  4. * Copyright (c) 2007 Wind River Systems, Inc.
  5. *
  6. * Author: Mark Zhan <rongkai.zhan@windriver.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/module.h>
  14. #include <linux/init.h>
  15. #include <linux/io.h>
  16. #include <linux/device.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/rtc.h>
  19. #include <linux/rtc/m48t59.h>
  20. #include <linux/bcd.h>
  21. #ifndef NO_IRQ
  22. #define NO_IRQ (-1)
  23. #endif
  24. #define M48T59_READ(reg) (pdata->read_byte(dev, pdata->offset + reg))
  25. #define M48T59_WRITE(val, reg) \
  26. (pdata->write_byte(dev, pdata->offset + reg, val))
  27. #define M48T59_SET_BITS(mask, reg) \
  28. M48T59_WRITE((M48T59_READ(reg) | (mask)), (reg))
  29. #define M48T59_CLEAR_BITS(mask, reg) \
  30. M48T59_WRITE((M48T59_READ(reg) & ~(mask)), (reg))
  31. struct m48t59_private {
  32. void __iomem *ioaddr;
  33. int irq;
  34. struct rtc_device *rtc;
  35. spinlock_t lock; /* serialize the NVRAM and RTC access */
  36. };
  37. /*
  38. * This is the generic access method when the chip is memory-mapped
  39. */
  40. static void
  41. m48t59_mem_writeb(struct device *dev, u32 ofs, u8 val)
  42. {
  43. struct platform_device *pdev = to_platform_device(dev);
  44. struct m48t59_private *m48t59 = platform_get_drvdata(pdev);
  45. writeb(val, m48t59->ioaddr+ofs);
  46. }
  47. static u8
  48. m48t59_mem_readb(struct device *dev, u32 ofs)
  49. {
  50. struct platform_device *pdev = to_platform_device(dev);
  51. struct m48t59_private *m48t59 = platform_get_drvdata(pdev);
  52. return readb(m48t59->ioaddr+ofs);
  53. }
  54. /*
  55. * NOTE: M48T59 only uses BCD mode
  56. */
  57. static int m48t59_rtc_read_time(struct device *dev, struct rtc_time *tm)
  58. {
  59. struct platform_device *pdev = to_platform_device(dev);
  60. struct m48t59_plat_data *pdata = pdev->dev.platform_data;
  61. struct m48t59_private *m48t59 = platform_get_drvdata(pdev);
  62. unsigned long flags;
  63. u8 val;
  64. spin_lock_irqsave(&m48t59->lock, flags);
  65. /* Issue the READ command */
  66. M48T59_SET_BITS(M48T59_CNTL_READ, M48T59_CNTL);
  67. tm->tm_year = BCD2BIN(M48T59_READ(M48T59_YEAR));
  68. /* tm_mon is 0-11 */
  69. tm->tm_mon = BCD2BIN(M48T59_READ(M48T59_MONTH)) - 1;
  70. tm->tm_mday = BCD2BIN(M48T59_READ(M48T59_MDAY));
  71. val = M48T59_READ(M48T59_WDAY);
  72. if ((pdata->type == M48T59RTC_TYPE_M48T59) &&
  73. (val & M48T59_WDAY_CEB) && (val & M48T59_WDAY_CB)) {
  74. dev_dbg(dev, "Century bit is enabled\n");
  75. tm->tm_year += 100; /* one century */
  76. }
  77. tm->tm_wday = BCD2BIN(val & 0x07);
  78. tm->tm_hour = BCD2BIN(M48T59_READ(M48T59_HOUR) & 0x3F);
  79. tm->tm_min = BCD2BIN(M48T59_READ(M48T59_MIN) & 0x7F);
  80. tm->tm_sec = BCD2BIN(M48T59_READ(M48T59_SEC) & 0x7F);
  81. /* Clear the READ bit */
  82. M48T59_CLEAR_BITS(M48T59_CNTL_READ, M48T59_CNTL);
  83. spin_unlock_irqrestore(&m48t59->lock, flags);
  84. dev_dbg(dev, "RTC read time %04d-%02d-%02d %02d/%02d/%02d\n",
  85. tm->tm_year + 1900, tm->tm_mon, tm->tm_mday,
  86. tm->tm_hour, tm->tm_min, tm->tm_sec);
  87. return 0;
  88. }
  89. static int m48t59_rtc_set_time(struct device *dev, struct rtc_time *tm)
  90. {
  91. struct platform_device *pdev = to_platform_device(dev);
  92. struct m48t59_plat_data *pdata = pdev->dev.platform_data;
  93. struct m48t59_private *m48t59 = platform_get_drvdata(pdev);
  94. unsigned long flags;
  95. u8 val = 0;
  96. dev_dbg(dev, "RTC set time %04d-%02d-%02d %02d/%02d/%02d\n",
  97. tm->tm_year + 1900, tm->tm_mon, tm->tm_mday,
  98. tm->tm_hour, tm->tm_min, tm->tm_sec);
  99. spin_lock_irqsave(&m48t59->lock, flags);
  100. /* Issue the WRITE command */
  101. M48T59_SET_BITS(M48T59_CNTL_WRITE, M48T59_CNTL);
  102. M48T59_WRITE((BIN2BCD(tm->tm_sec) & 0x7F), M48T59_SEC);
  103. M48T59_WRITE((BIN2BCD(tm->tm_min) & 0x7F), M48T59_MIN);
  104. M48T59_WRITE((BIN2BCD(tm->tm_hour) & 0x3F), M48T59_HOUR);
  105. M48T59_WRITE((BIN2BCD(tm->tm_mday) & 0x3F), M48T59_MDAY);
  106. /* tm_mon is 0-11 */
  107. M48T59_WRITE((BIN2BCD(tm->tm_mon + 1) & 0x1F), M48T59_MONTH);
  108. M48T59_WRITE(BIN2BCD(tm->tm_year % 100), M48T59_YEAR);
  109. if (pdata->type == M48T59RTC_TYPE_M48T59 && (tm->tm_year / 100))
  110. val = (M48T59_WDAY_CEB | M48T59_WDAY_CB);
  111. val |= (BIN2BCD(tm->tm_wday) & 0x07);
  112. M48T59_WRITE(val, M48T59_WDAY);
  113. /* Clear the WRITE bit */
  114. M48T59_CLEAR_BITS(M48T59_CNTL_WRITE, M48T59_CNTL);
  115. spin_unlock_irqrestore(&m48t59->lock, flags);
  116. return 0;
  117. }
  118. /*
  119. * Read alarm time and date in RTC
  120. */
  121. static int m48t59_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm)
  122. {
  123. struct platform_device *pdev = to_platform_device(dev);
  124. struct m48t59_plat_data *pdata = pdev->dev.platform_data;
  125. struct m48t59_private *m48t59 = platform_get_drvdata(pdev);
  126. struct rtc_time *tm = &alrm->time;
  127. unsigned long flags;
  128. u8 val;
  129. /* If no irq, we don't support ALARM */
  130. if (m48t59->irq == NO_IRQ)
  131. return -EIO;
  132. spin_lock_irqsave(&m48t59->lock, flags);
  133. /* Issue the READ command */
  134. M48T59_SET_BITS(M48T59_CNTL_READ, M48T59_CNTL);
  135. tm->tm_year = BCD2BIN(M48T59_READ(M48T59_YEAR));
  136. /* tm_mon is 0-11 */
  137. tm->tm_mon = BCD2BIN(M48T59_READ(M48T59_MONTH)) - 1;
  138. val = M48T59_READ(M48T59_WDAY);
  139. if ((val & M48T59_WDAY_CEB) && (val & M48T59_WDAY_CB))
  140. tm->tm_year += 100; /* one century */
  141. tm->tm_mday = BCD2BIN(M48T59_READ(M48T59_ALARM_DATE));
  142. tm->tm_hour = BCD2BIN(M48T59_READ(M48T59_ALARM_HOUR));
  143. tm->tm_min = BCD2BIN(M48T59_READ(M48T59_ALARM_MIN));
  144. tm->tm_sec = BCD2BIN(M48T59_READ(M48T59_ALARM_SEC));
  145. /* Clear the READ bit */
  146. M48T59_CLEAR_BITS(M48T59_CNTL_READ, M48T59_CNTL);
  147. spin_unlock_irqrestore(&m48t59->lock, flags);
  148. dev_dbg(dev, "RTC read alarm time %04d-%02d-%02d %02d/%02d/%02d\n",
  149. tm->tm_year + 1900, tm->tm_mon, tm->tm_mday,
  150. tm->tm_hour, tm->tm_min, tm->tm_sec);
  151. return 0;
  152. }
  153. /*
  154. * Set alarm time and date in RTC
  155. */
  156. static int m48t59_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
  157. {
  158. struct platform_device *pdev = to_platform_device(dev);
  159. struct m48t59_plat_data *pdata = pdev->dev.platform_data;
  160. struct m48t59_private *m48t59 = platform_get_drvdata(pdev);
  161. struct rtc_time *tm = &alrm->time;
  162. u8 mday, hour, min, sec;
  163. unsigned long flags;
  164. /* If no irq, we don't support ALARM */
  165. if (m48t59->irq == NO_IRQ)
  166. return -EIO;
  167. /*
  168. * 0xff means "always match"
  169. */
  170. mday = tm->tm_mday;
  171. mday = (mday >= 1 && mday <= 31) ? BIN2BCD(mday) : 0xff;
  172. if (mday == 0xff)
  173. mday = M48T59_READ(M48T59_MDAY);
  174. hour = tm->tm_hour;
  175. hour = (hour < 24) ? BIN2BCD(hour) : 0x00;
  176. min = tm->tm_min;
  177. min = (min < 60) ? BIN2BCD(min) : 0x00;
  178. sec = tm->tm_sec;
  179. sec = (sec < 60) ? BIN2BCD(sec) : 0x00;
  180. spin_lock_irqsave(&m48t59->lock, flags);
  181. /* Issue the WRITE command */
  182. M48T59_SET_BITS(M48T59_CNTL_WRITE, M48T59_CNTL);
  183. M48T59_WRITE(mday, M48T59_ALARM_DATE);
  184. M48T59_WRITE(hour, M48T59_ALARM_HOUR);
  185. M48T59_WRITE(min, M48T59_ALARM_MIN);
  186. M48T59_WRITE(sec, M48T59_ALARM_SEC);
  187. /* Clear the WRITE bit */
  188. M48T59_CLEAR_BITS(M48T59_CNTL_WRITE, M48T59_CNTL);
  189. spin_unlock_irqrestore(&m48t59->lock, flags);
  190. dev_dbg(dev, "RTC set alarm time %04d-%02d-%02d %02d/%02d/%02d\n",
  191. tm->tm_year + 1900, tm->tm_mon, tm->tm_mday,
  192. tm->tm_hour, tm->tm_min, tm->tm_sec);
  193. return 0;
  194. }
  195. /*
  196. * Handle commands from user-space
  197. */
  198. static int m48t59_rtc_ioctl(struct device *dev, unsigned int cmd,
  199. unsigned long arg)
  200. {
  201. struct platform_device *pdev = to_platform_device(dev);
  202. struct m48t59_plat_data *pdata = pdev->dev.platform_data;
  203. struct m48t59_private *m48t59 = platform_get_drvdata(pdev);
  204. unsigned long flags;
  205. int ret = 0;
  206. spin_lock_irqsave(&m48t59->lock, flags);
  207. switch (cmd) {
  208. case RTC_AIE_OFF: /* alarm interrupt off */
  209. M48T59_WRITE(0x00, M48T59_INTR);
  210. break;
  211. case RTC_AIE_ON: /* alarm interrupt on */
  212. M48T59_WRITE(M48T59_INTR_AFE, M48T59_INTR);
  213. break;
  214. default:
  215. ret = -ENOIOCTLCMD;
  216. break;
  217. }
  218. spin_unlock_irqrestore(&m48t59->lock, flags);
  219. return ret;
  220. }
  221. static int m48t59_rtc_proc(struct device *dev, struct seq_file *seq)
  222. {
  223. struct platform_device *pdev = to_platform_device(dev);
  224. struct m48t59_plat_data *pdata = pdev->dev.platform_data;
  225. struct m48t59_private *m48t59 = platform_get_drvdata(pdev);
  226. unsigned long flags;
  227. u8 val;
  228. spin_lock_irqsave(&m48t59->lock, flags);
  229. val = M48T59_READ(M48T59_FLAGS);
  230. spin_unlock_irqrestore(&m48t59->lock, flags);
  231. seq_printf(seq, "battery\t\t: %s\n",
  232. (val & M48T59_FLAGS_BF) ? "low" : "normal");
  233. return 0;
  234. }
  235. /*
  236. * IRQ handler for the RTC
  237. */
  238. static irqreturn_t m48t59_rtc_interrupt(int irq, void *dev_id)
  239. {
  240. struct device *dev = (struct device *)dev_id;
  241. struct platform_device *pdev = to_platform_device(dev);
  242. struct m48t59_plat_data *pdata = pdev->dev.platform_data;
  243. struct m48t59_private *m48t59 = platform_get_drvdata(pdev);
  244. u8 event;
  245. spin_lock(&m48t59->lock);
  246. event = M48T59_READ(M48T59_FLAGS);
  247. spin_unlock(&m48t59->lock);
  248. if (event & M48T59_FLAGS_AF) {
  249. rtc_update_irq(m48t59->rtc, 1, (RTC_AF | RTC_IRQF));
  250. return IRQ_HANDLED;
  251. }
  252. return IRQ_NONE;
  253. }
  254. static const struct rtc_class_ops m48t59_rtc_ops = {
  255. .ioctl = m48t59_rtc_ioctl,
  256. .read_time = m48t59_rtc_read_time,
  257. .set_time = m48t59_rtc_set_time,
  258. .read_alarm = m48t59_rtc_readalarm,
  259. .set_alarm = m48t59_rtc_setalarm,
  260. .proc = m48t59_rtc_proc,
  261. };
  262. static const struct rtc_class_ops m48t02_rtc_ops = {
  263. .read_time = m48t59_rtc_read_time,
  264. .set_time = m48t59_rtc_set_time,
  265. };
  266. static ssize_t m48t59_nvram_read(struct kobject *kobj,
  267. struct bin_attribute *bin_attr,
  268. char *buf, loff_t pos, size_t size)
  269. {
  270. struct device *dev = container_of(kobj, struct device, kobj);
  271. struct platform_device *pdev = to_platform_device(dev);
  272. struct m48t59_plat_data *pdata = pdev->dev.platform_data;
  273. struct m48t59_private *m48t59 = platform_get_drvdata(pdev);
  274. ssize_t cnt = 0;
  275. unsigned long flags;
  276. for (; size > 0 && pos < pdata->offset; cnt++, size--) {
  277. spin_lock_irqsave(&m48t59->lock, flags);
  278. *buf++ = M48T59_READ(cnt);
  279. spin_unlock_irqrestore(&m48t59->lock, flags);
  280. }
  281. return cnt;
  282. }
  283. static ssize_t m48t59_nvram_write(struct kobject *kobj,
  284. struct bin_attribute *bin_attr,
  285. char *buf, loff_t pos, size_t size)
  286. {
  287. struct device *dev = container_of(kobj, struct device, kobj);
  288. struct platform_device *pdev = to_platform_device(dev);
  289. struct m48t59_plat_data *pdata = pdev->dev.platform_data;
  290. struct m48t59_private *m48t59 = platform_get_drvdata(pdev);
  291. ssize_t cnt = 0;
  292. unsigned long flags;
  293. for (; size > 0 && pos < pdata->offset; cnt++, size--) {
  294. spin_lock_irqsave(&m48t59->lock, flags);
  295. M48T59_WRITE(*buf++, cnt);
  296. spin_unlock_irqrestore(&m48t59->lock, flags);
  297. }
  298. return cnt;
  299. }
  300. static struct bin_attribute m48t59_nvram_attr = {
  301. .attr = {
  302. .name = "nvram",
  303. .mode = S_IRUGO | S_IWUSR,
  304. .owner = THIS_MODULE,
  305. },
  306. .read = m48t59_nvram_read,
  307. .write = m48t59_nvram_write,
  308. };
  309. static int __devinit m48t59_rtc_probe(struct platform_device *pdev)
  310. {
  311. struct m48t59_plat_data *pdata = pdev->dev.platform_data;
  312. struct m48t59_private *m48t59 = NULL;
  313. struct resource *res;
  314. int ret = -ENOMEM;
  315. char *name;
  316. const struct rtc_class_ops *ops;
  317. /* This chip could be memory-mapped or I/O-mapped */
  318. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  319. if (!res) {
  320. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  321. if (!res)
  322. return -EINVAL;
  323. }
  324. if (res->flags & IORESOURCE_IO) {
  325. /* If we are I/O-mapped, the platform should provide
  326. * the operations accessing chip registers.
  327. */
  328. if (!pdata || !pdata->write_byte || !pdata->read_byte)
  329. return -EINVAL;
  330. } else if (res->flags & IORESOURCE_MEM) {
  331. /* we are memory-mapped */
  332. if (!pdata) {
  333. pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
  334. if (!pdata)
  335. return -ENOMEM;
  336. /* Ensure we only kmalloc platform data once */
  337. pdev->dev.platform_data = pdata;
  338. }
  339. if (!pdata->type)
  340. pdata->type = M48T59RTC_TYPE_M48T59;
  341. /* Try to use the generic memory read/write ops */
  342. if (!pdata->write_byte)
  343. pdata->write_byte = m48t59_mem_writeb;
  344. if (!pdata->read_byte)
  345. pdata->read_byte = m48t59_mem_readb;
  346. }
  347. m48t59 = kzalloc(sizeof(*m48t59), GFP_KERNEL);
  348. if (!m48t59)
  349. return -ENOMEM;
  350. m48t59->ioaddr = pdata->ioaddr;
  351. if (!m48t59->ioaddr) {
  352. /* ioaddr not mapped externally */
  353. m48t59->ioaddr = ioremap(res->start, res->end - res->start + 1);
  354. if (!m48t59->ioaddr)
  355. goto out;
  356. }
  357. /* Try to get irq number. We also can work in
  358. * the mode without IRQ.
  359. */
  360. m48t59->irq = platform_get_irq(pdev, 0);
  361. if (m48t59->irq < 0)
  362. m48t59->irq = NO_IRQ;
  363. if (m48t59->irq != NO_IRQ) {
  364. ret = request_irq(m48t59->irq, m48t59_rtc_interrupt,
  365. IRQF_SHARED, "rtc-m48t59", &pdev->dev);
  366. if (ret)
  367. goto out;
  368. }
  369. switch (pdata->type) {
  370. case M48T59RTC_TYPE_M48T59:
  371. name = "m48t59";
  372. ops = &m48t59_rtc_ops;
  373. pdata->offset = 0x1ff0;
  374. break;
  375. case M48T59RTC_TYPE_M48T02:
  376. name = "m48t02";
  377. ops = &m48t02_rtc_ops;
  378. pdata->offset = 0x7f0;
  379. break;
  380. case M48T59RTC_TYPE_M48T08:
  381. name = "m48t08";
  382. ops = &m48t02_rtc_ops;
  383. pdata->offset = 0x1ff0;
  384. break;
  385. default:
  386. dev_err(&pdev->dev, "Unknown RTC type\n");
  387. ret = -ENODEV;
  388. goto out;
  389. }
  390. m48t59->rtc = rtc_device_register(name, &pdev->dev, ops, THIS_MODULE);
  391. if (IS_ERR(m48t59->rtc)) {
  392. ret = PTR_ERR(m48t59->rtc);
  393. goto out;
  394. }
  395. m48t59_nvram_attr.size = pdata->offset;
  396. ret = sysfs_create_bin_file(&pdev->dev.kobj, &m48t59_nvram_attr);
  397. if (ret)
  398. goto out;
  399. spin_lock_init(&m48t59->lock);
  400. platform_set_drvdata(pdev, m48t59);
  401. return 0;
  402. out:
  403. if (!IS_ERR(m48t59->rtc))
  404. rtc_device_unregister(m48t59->rtc);
  405. if (m48t59->irq != NO_IRQ)
  406. free_irq(m48t59->irq, &pdev->dev);
  407. if (m48t59->ioaddr)
  408. iounmap(m48t59->ioaddr);
  409. if (m48t59)
  410. kfree(m48t59);
  411. return ret;
  412. }
  413. static int __devexit m48t59_rtc_remove(struct platform_device *pdev)
  414. {
  415. struct m48t59_private *m48t59 = platform_get_drvdata(pdev);
  416. struct m48t59_plat_data *pdata = pdev->dev.platform_data;
  417. sysfs_remove_bin_file(&pdev->dev.kobj, &m48t59_nvram_attr);
  418. if (!IS_ERR(m48t59->rtc))
  419. rtc_device_unregister(m48t59->rtc);
  420. if (m48t59->ioaddr && !pdata->ioaddr)
  421. iounmap(m48t59->ioaddr);
  422. if (m48t59->irq != NO_IRQ)
  423. free_irq(m48t59->irq, &pdev->dev);
  424. platform_set_drvdata(pdev, NULL);
  425. kfree(m48t59);
  426. return 0;
  427. }
  428. /* work with hotplug and coldplug */
  429. MODULE_ALIAS("platform:rtc-m48t59");
  430. static struct platform_driver m48t59_rtc_driver = {
  431. .driver = {
  432. .name = "rtc-m48t59",
  433. .owner = THIS_MODULE,
  434. },
  435. .probe = m48t59_rtc_probe,
  436. .remove = __devexit_p(m48t59_rtc_remove),
  437. };
  438. static int __init m48t59_rtc_init(void)
  439. {
  440. return platform_driver_register(&m48t59_rtc_driver);
  441. }
  442. static void __exit m48t59_rtc_exit(void)
  443. {
  444. platform_driver_unregister(&m48t59_rtc_driver);
  445. }
  446. module_init(m48t59_rtc_init);
  447. module_exit(m48t59_rtc_exit);
  448. MODULE_AUTHOR("Mark Zhan <rongkai.zhan@windriver.com>");
  449. MODULE_DESCRIPTION("M48T59/M48T02/M48T08 RTC driver");
  450. MODULE_LICENSE("GPL");