smc911x.c 58 KB

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  1. /*
  2. * smc911x.c
  3. * This is a driver for SMSC's LAN911{5,6,7,8} single-chip Ethernet devices.
  4. *
  5. * Copyright (C) 2005 Sensoria Corp
  6. * Derived from the unified SMC91x driver by Nicolas Pitre
  7. * and the smsc911x.c reference driver by SMSC
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  22. *
  23. * Arguments:
  24. * watchdog = TX watchdog timeout
  25. * tx_fifo_kb = Size of TX FIFO in KB
  26. *
  27. * History:
  28. * 04/16/05 Dustin McIntire Initial version
  29. */
  30. static const char version[] =
  31. "smc911x.c: v1.0 04-16-2005 by Dustin McIntire <dustin@sensoria.com>\n";
  32. /* Debugging options */
  33. #define ENABLE_SMC_DEBUG_RX 0
  34. #define ENABLE_SMC_DEBUG_TX 0
  35. #define ENABLE_SMC_DEBUG_DMA 0
  36. #define ENABLE_SMC_DEBUG_PKTS 0
  37. #define ENABLE_SMC_DEBUG_MISC 0
  38. #define ENABLE_SMC_DEBUG_FUNC 0
  39. #define SMC_DEBUG_RX ((ENABLE_SMC_DEBUG_RX ? 1 : 0) << 0)
  40. #define SMC_DEBUG_TX ((ENABLE_SMC_DEBUG_TX ? 1 : 0) << 1)
  41. #define SMC_DEBUG_DMA ((ENABLE_SMC_DEBUG_DMA ? 1 : 0) << 2)
  42. #define SMC_DEBUG_PKTS ((ENABLE_SMC_DEBUG_PKTS ? 1 : 0) << 3)
  43. #define SMC_DEBUG_MISC ((ENABLE_SMC_DEBUG_MISC ? 1 : 0) << 4)
  44. #define SMC_DEBUG_FUNC ((ENABLE_SMC_DEBUG_FUNC ? 1 : 0) << 5)
  45. #ifndef SMC_DEBUG
  46. #define SMC_DEBUG ( SMC_DEBUG_RX | \
  47. SMC_DEBUG_TX | \
  48. SMC_DEBUG_DMA | \
  49. SMC_DEBUG_PKTS | \
  50. SMC_DEBUG_MISC | \
  51. SMC_DEBUG_FUNC \
  52. )
  53. #endif
  54. #include <linux/init.h>
  55. #include <linux/module.h>
  56. #include <linux/kernel.h>
  57. #include <linux/sched.h>
  58. #include <linux/slab.h>
  59. #include <linux/delay.h>
  60. #include <linux/interrupt.h>
  61. #include <linux/errno.h>
  62. #include <linux/ioport.h>
  63. #include <linux/crc32.h>
  64. #include <linux/device.h>
  65. #include <linux/platform_device.h>
  66. #include <linux/spinlock.h>
  67. #include <linux/ethtool.h>
  68. #include <linux/mii.h>
  69. #include <linux/workqueue.h>
  70. #include <linux/netdevice.h>
  71. #include <linux/etherdevice.h>
  72. #include <linux/skbuff.h>
  73. #include <asm/io.h>
  74. #include "smc911x.h"
  75. /*
  76. * Transmit timeout, default 5 seconds.
  77. */
  78. static int watchdog = 5000;
  79. module_param(watchdog, int, 0400);
  80. MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
  81. static int tx_fifo_kb=8;
  82. module_param(tx_fifo_kb, int, 0400);
  83. MODULE_PARM_DESC(tx_fifo_kb,"transmit FIFO size in KB (1<x<15)(default=8)");
  84. MODULE_LICENSE("GPL");
  85. MODULE_ALIAS("platform:smc911x");
  86. /*
  87. * The internal workings of the driver. If you are changing anything
  88. * here with the SMC stuff, you should have the datasheet and know
  89. * what you are doing.
  90. */
  91. #define CARDNAME "smc911x"
  92. /*
  93. * Use power-down feature of the chip
  94. */
  95. #define POWER_DOWN 1
  96. #if SMC_DEBUG > 0
  97. #define DBG(n, args...) \
  98. do { \
  99. if (SMC_DEBUG & (n)) \
  100. printk(args); \
  101. } while (0)
  102. #define PRINTK(args...) printk(args)
  103. #else
  104. #define DBG(n, args...) do { } while (0)
  105. #define PRINTK(args...) printk(KERN_DEBUG args)
  106. #endif
  107. #if SMC_DEBUG_PKTS > 0
  108. static void PRINT_PKT(u_char *buf, int length)
  109. {
  110. int i;
  111. int remainder;
  112. int lines;
  113. lines = length / 16;
  114. remainder = length % 16;
  115. for (i = 0; i < lines ; i ++) {
  116. int cur;
  117. for (cur = 0; cur < 8; cur++) {
  118. u_char a, b;
  119. a = *buf++;
  120. b = *buf++;
  121. printk("%02x%02x ", a, b);
  122. }
  123. printk("\n");
  124. }
  125. for (i = 0; i < remainder/2 ; i++) {
  126. u_char a, b;
  127. a = *buf++;
  128. b = *buf++;
  129. printk("%02x%02x ", a, b);
  130. }
  131. printk("\n");
  132. }
  133. #else
  134. #define PRINT_PKT(x...) do { } while (0)
  135. #endif
  136. /* this enables an interrupt in the interrupt mask register */
  137. #define SMC_ENABLE_INT(lp, x) do { \
  138. unsigned int __mask; \
  139. unsigned long __flags; \
  140. spin_lock_irqsave(&lp->lock, __flags); \
  141. __mask = SMC_GET_INT_EN((lp)); \
  142. __mask |= (x); \
  143. SMC_SET_INT_EN((lp), __mask); \
  144. spin_unlock_irqrestore(&lp->lock, __flags); \
  145. } while (0)
  146. /* this disables an interrupt from the interrupt mask register */
  147. #define SMC_DISABLE_INT(lp, x) do { \
  148. unsigned int __mask; \
  149. unsigned long __flags; \
  150. spin_lock_irqsave(&lp->lock, __flags); \
  151. __mask = SMC_GET_INT_EN((lp)); \
  152. __mask &= ~(x); \
  153. SMC_SET_INT_EN((lp), __mask); \
  154. spin_unlock_irqrestore(&lp->lock, __flags); \
  155. } while (0)
  156. /*
  157. * this does a soft reset on the device
  158. */
  159. static void smc911x_reset(struct net_device *dev)
  160. {
  161. struct smc911x_local *lp = netdev_priv(dev);
  162. unsigned int reg, timeout=0, resets=1;
  163. unsigned long flags;
  164. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  165. /* Take out of PM setting first */
  166. if ((SMC_GET_PMT_CTRL(lp) & PMT_CTRL_READY_) == 0) {
  167. /* Write to the bytetest will take out of powerdown */
  168. SMC_SET_BYTE_TEST(lp, 0);
  169. timeout=10;
  170. do {
  171. udelay(10);
  172. reg = SMC_GET_PMT_CTRL(lp) & PMT_CTRL_READY_;
  173. } while (--timeout && !reg);
  174. if (timeout == 0) {
  175. PRINTK("%s: smc911x_reset timeout waiting for PM restore\n", dev->name);
  176. return;
  177. }
  178. }
  179. /* Disable all interrupts */
  180. spin_lock_irqsave(&lp->lock, flags);
  181. SMC_SET_INT_EN(lp, 0);
  182. spin_unlock_irqrestore(&lp->lock, flags);
  183. while (resets--) {
  184. SMC_SET_HW_CFG(lp, HW_CFG_SRST_);
  185. timeout=10;
  186. do {
  187. udelay(10);
  188. reg = SMC_GET_HW_CFG(lp);
  189. /* If chip indicates reset timeout then try again */
  190. if (reg & HW_CFG_SRST_TO_) {
  191. PRINTK("%s: chip reset timeout, retrying...\n", dev->name);
  192. resets++;
  193. break;
  194. }
  195. } while (--timeout && (reg & HW_CFG_SRST_));
  196. }
  197. if (timeout == 0) {
  198. PRINTK("%s: smc911x_reset timeout waiting for reset\n", dev->name);
  199. return;
  200. }
  201. /* make sure EEPROM has finished loading before setting GPIO_CFG */
  202. timeout=1000;
  203. while ( timeout-- && (SMC_GET_E2P_CMD(lp) & E2P_CMD_EPC_BUSY_)) {
  204. udelay(10);
  205. }
  206. if (timeout == 0){
  207. PRINTK("%s: smc911x_reset timeout waiting for EEPROM busy\n", dev->name);
  208. return;
  209. }
  210. /* Initialize interrupts */
  211. SMC_SET_INT_EN(lp, 0);
  212. SMC_ACK_INT(lp, -1);
  213. /* Reset the FIFO level and flow control settings */
  214. SMC_SET_HW_CFG(lp, (lp->tx_fifo_kb & 0xF) << 16);
  215. //TODO: Figure out what appropriate pause time is
  216. SMC_SET_FLOW(lp, FLOW_FCPT_ | FLOW_FCEN_);
  217. SMC_SET_AFC_CFG(lp, lp->afc_cfg);
  218. /* Set to LED outputs */
  219. SMC_SET_GPIO_CFG(lp, 0x70070000);
  220. /*
  221. * Deassert IRQ for 1*10us for edge type interrupts
  222. * and drive IRQ pin push-pull
  223. */
  224. SMC_SET_IRQ_CFG(lp, (1 << 24) | INT_CFG_IRQ_EN_ | INT_CFG_IRQ_TYPE_);
  225. /* clear anything saved */
  226. if (lp->pending_tx_skb != NULL) {
  227. dev_kfree_skb (lp->pending_tx_skb);
  228. lp->pending_tx_skb = NULL;
  229. dev->stats.tx_errors++;
  230. dev->stats.tx_aborted_errors++;
  231. }
  232. }
  233. /*
  234. * Enable Interrupts, Receive, and Transmit
  235. */
  236. static void smc911x_enable(struct net_device *dev)
  237. {
  238. struct smc911x_local *lp = netdev_priv(dev);
  239. unsigned mask, cfg, cr;
  240. unsigned long flags;
  241. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  242. SMC_SET_MAC_ADDR(lp, dev->dev_addr);
  243. /* Enable TX */
  244. cfg = SMC_GET_HW_CFG(lp);
  245. cfg &= HW_CFG_TX_FIF_SZ_ | 0xFFF;
  246. cfg |= HW_CFG_SF_;
  247. SMC_SET_HW_CFG(lp, cfg);
  248. SMC_SET_FIFO_TDA(lp, 0xFF);
  249. /* Update TX stats on every 64 packets received or every 1 sec */
  250. SMC_SET_FIFO_TSL(lp, 64);
  251. SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
  252. spin_lock_irqsave(&lp->lock, flags);
  253. SMC_GET_MAC_CR(lp, cr);
  254. cr |= MAC_CR_TXEN_ | MAC_CR_HBDIS_;
  255. SMC_SET_MAC_CR(lp, cr);
  256. SMC_SET_TX_CFG(lp, TX_CFG_TX_ON_);
  257. spin_unlock_irqrestore(&lp->lock, flags);
  258. /* Add 2 byte padding to start of packets */
  259. SMC_SET_RX_CFG(lp, (2<<8) & RX_CFG_RXDOFF_);
  260. /* Turn on receiver and enable RX */
  261. if (cr & MAC_CR_RXEN_)
  262. DBG(SMC_DEBUG_RX, "%s: Receiver already enabled\n", dev->name);
  263. spin_lock_irqsave(&lp->lock, flags);
  264. SMC_SET_MAC_CR(lp, cr | MAC_CR_RXEN_);
  265. spin_unlock_irqrestore(&lp->lock, flags);
  266. /* Interrupt on every received packet */
  267. SMC_SET_FIFO_RSA(lp, 0x01);
  268. SMC_SET_FIFO_RSL(lp, 0x00);
  269. /* now, enable interrupts */
  270. mask = INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_ | INT_EN_RSFL_EN_ |
  271. INT_EN_GPT_INT_EN_ | INT_EN_RXDFH_INT_EN_ | INT_EN_RXE_EN_ |
  272. INT_EN_PHY_INT_EN_;
  273. if (IS_REV_A(lp->revision))
  274. mask|=INT_EN_RDFL_EN_;
  275. else {
  276. mask|=INT_EN_RDFO_EN_;
  277. }
  278. SMC_ENABLE_INT(lp, mask);
  279. }
  280. /*
  281. * this puts the device in an inactive state
  282. */
  283. static void smc911x_shutdown(struct net_device *dev)
  284. {
  285. struct smc911x_local *lp = netdev_priv(dev);
  286. unsigned cr;
  287. unsigned long flags;
  288. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", CARDNAME, __func__);
  289. /* Disable IRQ's */
  290. SMC_SET_INT_EN(lp, 0);
  291. /* Turn of Rx and TX */
  292. spin_lock_irqsave(&lp->lock, flags);
  293. SMC_GET_MAC_CR(lp, cr);
  294. cr &= ~(MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
  295. SMC_SET_MAC_CR(lp, cr);
  296. SMC_SET_TX_CFG(lp, TX_CFG_STOP_TX_);
  297. spin_unlock_irqrestore(&lp->lock, flags);
  298. }
  299. static inline void smc911x_drop_pkt(struct net_device *dev)
  300. {
  301. struct smc911x_local *lp = netdev_priv(dev);
  302. unsigned int fifo_count, timeout, reg;
  303. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n", CARDNAME, __func__);
  304. fifo_count = SMC_GET_RX_FIFO_INF(lp) & 0xFFFF;
  305. if (fifo_count <= 4) {
  306. /* Manually dump the packet data */
  307. while (fifo_count--)
  308. SMC_GET_RX_FIFO(lp);
  309. } else {
  310. /* Fast forward through the bad packet */
  311. SMC_SET_RX_DP_CTRL(lp, RX_DP_CTRL_FFWD_BUSY_);
  312. timeout=50;
  313. do {
  314. udelay(10);
  315. reg = SMC_GET_RX_DP_CTRL(lp) & RX_DP_CTRL_FFWD_BUSY_;
  316. } while (--timeout && reg);
  317. if (timeout == 0) {
  318. PRINTK("%s: timeout waiting for RX fast forward\n", dev->name);
  319. }
  320. }
  321. }
  322. /*
  323. * This is the procedure to handle the receipt of a packet.
  324. * It should be called after checking for packet presence in
  325. * the RX status FIFO. It must be called with the spin lock
  326. * already held.
  327. */
  328. static inline void smc911x_rcv(struct net_device *dev)
  329. {
  330. struct smc911x_local *lp = netdev_priv(dev);
  331. unsigned int pkt_len, status;
  332. struct sk_buff *skb;
  333. unsigned char *data;
  334. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n",
  335. dev->name, __func__);
  336. status = SMC_GET_RX_STS_FIFO(lp);
  337. DBG(SMC_DEBUG_RX, "%s: Rx pkt len %d status 0x%08x \n",
  338. dev->name, (status & 0x3fff0000) >> 16, status & 0xc000ffff);
  339. pkt_len = (status & RX_STS_PKT_LEN_) >> 16;
  340. if (status & RX_STS_ES_) {
  341. /* Deal with a bad packet */
  342. dev->stats.rx_errors++;
  343. if (status & RX_STS_CRC_ERR_)
  344. dev->stats.rx_crc_errors++;
  345. else {
  346. if (status & RX_STS_LEN_ERR_)
  347. dev->stats.rx_length_errors++;
  348. if (status & RX_STS_MCAST_)
  349. dev->stats.multicast++;
  350. }
  351. /* Remove the bad packet data from the RX FIFO */
  352. smc911x_drop_pkt(dev);
  353. } else {
  354. /* Receive a valid packet */
  355. /* Alloc a buffer with extra room for DMA alignment */
  356. skb=dev_alloc_skb(pkt_len+32);
  357. if (unlikely(skb == NULL)) {
  358. PRINTK( "%s: Low memory, rcvd packet dropped.\n",
  359. dev->name);
  360. dev->stats.rx_dropped++;
  361. smc911x_drop_pkt(dev);
  362. return;
  363. }
  364. /* Align IP header to 32 bits
  365. * Note that the device is configured to add a 2
  366. * byte padding to the packet start, so we really
  367. * want to write to the orignal data pointer */
  368. data = skb->data;
  369. skb_reserve(skb, 2);
  370. skb_put(skb,pkt_len-4);
  371. #ifdef SMC_USE_DMA
  372. {
  373. unsigned int fifo;
  374. /* Lower the FIFO threshold if possible */
  375. fifo = SMC_GET_FIFO_INT(lp);
  376. if (fifo & 0xFF) fifo--;
  377. DBG(SMC_DEBUG_RX, "%s: Setting RX stat FIFO threshold to %d\n",
  378. dev->name, fifo & 0xff);
  379. SMC_SET_FIFO_INT(lp, fifo);
  380. /* Setup RX DMA */
  381. SMC_SET_RX_CFG(lp, RX_CFG_RX_END_ALGN16_ | ((2<<8) & RX_CFG_RXDOFF_));
  382. lp->rxdma_active = 1;
  383. lp->current_rx_skb = skb;
  384. SMC_PULL_DATA(lp, data, (pkt_len+2+15) & ~15);
  385. /* Packet processing deferred to DMA RX interrupt */
  386. }
  387. #else
  388. SMC_SET_RX_CFG(lp, RX_CFG_RX_END_ALGN4_ | ((2<<8) & RX_CFG_RXDOFF_));
  389. SMC_PULL_DATA(lp, data, pkt_len+2+3);
  390. DBG(SMC_DEBUG_PKTS, "%s: Received packet\n", dev->name);
  391. PRINT_PKT(data, ((pkt_len - 4) <= 64) ? pkt_len - 4 : 64);
  392. dev->last_rx = jiffies;
  393. skb->protocol = eth_type_trans(skb, dev);
  394. netif_rx(skb);
  395. dev->stats.rx_packets++;
  396. dev->stats.rx_bytes += pkt_len-4;
  397. #endif
  398. }
  399. }
  400. /*
  401. * This is called to actually send a packet to the chip.
  402. */
  403. static void smc911x_hardware_send_pkt(struct net_device *dev)
  404. {
  405. struct smc911x_local *lp = netdev_priv(dev);
  406. struct sk_buff *skb;
  407. unsigned int cmdA, cmdB, len;
  408. unsigned char *buf;
  409. unsigned long flags;
  410. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n", dev->name, __func__);
  411. BUG_ON(lp->pending_tx_skb == NULL);
  412. skb = lp->pending_tx_skb;
  413. lp->pending_tx_skb = NULL;
  414. /* cmdA {25:24] data alignment [20:16] start offset [10:0] buffer length */
  415. /* cmdB {31:16] pkt tag [10:0] length */
  416. #ifdef SMC_USE_DMA
  417. /* 16 byte buffer alignment mode */
  418. buf = (char*)((u32)(skb->data) & ~0xF);
  419. len = (skb->len + 0xF + ((u32)skb->data & 0xF)) & ~0xF;
  420. cmdA = (1<<24) | (((u32)skb->data & 0xF)<<16) |
  421. TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
  422. skb->len;
  423. #else
  424. buf = (char*)((u32)skb->data & ~0x3);
  425. len = (skb->len + 3 + ((u32)skb->data & 3)) & ~0x3;
  426. cmdA = (((u32)skb->data & 0x3) << 16) |
  427. TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
  428. skb->len;
  429. #endif
  430. /* tag is packet length so we can use this in stats update later */
  431. cmdB = (skb->len << 16) | (skb->len & 0x7FF);
  432. DBG(SMC_DEBUG_TX, "%s: TX PKT LENGTH 0x%04x (%d) BUF 0x%p CMDA 0x%08x CMDB 0x%08x\n",
  433. dev->name, len, len, buf, cmdA, cmdB);
  434. SMC_SET_TX_FIFO(lp, cmdA);
  435. SMC_SET_TX_FIFO(lp, cmdB);
  436. DBG(SMC_DEBUG_PKTS, "%s: Transmitted packet\n", dev->name);
  437. PRINT_PKT(buf, len <= 64 ? len : 64);
  438. /* Send pkt via PIO or DMA */
  439. #ifdef SMC_USE_DMA
  440. lp->current_tx_skb = skb;
  441. SMC_PUSH_DATA(lp, buf, len);
  442. /* DMA complete IRQ will free buffer and set jiffies */
  443. #else
  444. SMC_PUSH_DATA(lp, buf, len);
  445. dev->trans_start = jiffies;
  446. dev_kfree_skb(skb);
  447. #endif
  448. spin_lock_irqsave(&lp->lock, flags);
  449. if (!lp->tx_throttle) {
  450. netif_wake_queue(dev);
  451. }
  452. spin_unlock_irqrestore(&lp->lock, flags);
  453. SMC_ENABLE_INT(lp, INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_);
  454. }
  455. /*
  456. * Since I am not sure if I will have enough room in the chip's ram
  457. * to store the packet, I call this routine which either sends it
  458. * now, or set the card to generates an interrupt when ready
  459. * for the packet.
  460. */
  461. static int smc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
  462. {
  463. struct smc911x_local *lp = netdev_priv(dev);
  464. unsigned int free;
  465. unsigned long flags;
  466. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n",
  467. dev->name, __func__);
  468. BUG_ON(lp->pending_tx_skb != NULL);
  469. free = SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TDFREE_;
  470. DBG(SMC_DEBUG_TX, "%s: TX free space %d\n", dev->name, free);
  471. /* Turn off the flow when running out of space in FIFO */
  472. if (free <= SMC911X_TX_FIFO_LOW_THRESHOLD) {
  473. DBG(SMC_DEBUG_TX, "%s: Disabling data flow due to low FIFO space (%d)\n",
  474. dev->name, free);
  475. spin_lock_irqsave(&lp->lock, flags);
  476. /* Reenable when at least 1 packet of size MTU present */
  477. SMC_SET_FIFO_TDA(lp, (SMC911X_TX_FIFO_LOW_THRESHOLD)/64);
  478. lp->tx_throttle = 1;
  479. netif_stop_queue(dev);
  480. spin_unlock_irqrestore(&lp->lock, flags);
  481. }
  482. /* Drop packets when we run out of space in TX FIFO
  483. * Account for overhead required for:
  484. *
  485. * Tx command words 8 bytes
  486. * Start offset 15 bytes
  487. * End padding 15 bytes
  488. */
  489. if (unlikely(free < (skb->len + 8 + 15 + 15))) {
  490. printk("%s: No Tx free space %d < %d\n",
  491. dev->name, free, skb->len);
  492. lp->pending_tx_skb = NULL;
  493. dev->stats.tx_errors++;
  494. dev->stats.tx_dropped++;
  495. dev_kfree_skb(skb);
  496. return 0;
  497. }
  498. #ifdef SMC_USE_DMA
  499. {
  500. /* If the DMA is already running then defer this packet Tx until
  501. * the DMA IRQ starts it
  502. */
  503. spin_lock_irqsave(&lp->lock, flags);
  504. if (lp->txdma_active) {
  505. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Tx DMA running, deferring packet\n", dev->name);
  506. lp->pending_tx_skb = skb;
  507. netif_stop_queue(dev);
  508. spin_unlock_irqrestore(&lp->lock, flags);
  509. return 0;
  510. } else {
  511. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Activating Tx DMA\n", dev->name);
  512. lp->txdma_active = 1;
  513. }
  514. spin_unlock_irqrestore(&lp->lock, flags);
  515. }
  516. #endif
  517. lp->pending_tx_skb = skb;
  518. smc911x_hardware_send_pkt(dev);
  519. return 0;
  520. }
  521. /*
  522. * This handles a TX status interrupt, which is only called when:
  523. * - a TX error occurred, or
  524. * - TX of a packet completed.
  525. */
  526. static void smc911x_tx(struct net_device *dev)
  527. {
  528. struct smc911x_local *lp = netdev_priv(dev);
  529. unsigned int tx_status;
  530. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n",
  531. dev->name, __func__);
  532. /* Collect the TX status */
  533. while (((SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TSUSED_) >> 16) != 0) {
  534. DBG(SMC_DEBUG_TX, "%s: Tx stat FIFO used 0x%04x\n",
  535. dev->name,
  536. (SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TSUSED_) >> 16);
  537. tx_status = SMC_GET_TX_STS_FIFO(lp);
  538. dev->stats.tx_packets++;
  539. dev->stats.tx_bytes+=tx_status>>16;
  540. DBG(SMC_DEBUG_TX, "%s: Tx FIFO tag 0x%04x status 0x%04x\n",
  541. dev->name, (tx_status & 0xffff0000) >> 16,
  542. tx_status & 0x0000ffff);
  543. /* count Tx errors, but ignore lost carrier errors when in
  544. * full-duplex mode */
  545. if ((tx_status & TX_STS_ES_) && !(lp->ctl_rfduplx &&
  546. !(tx_status & 0x00000306))) {
  547. dev->stats.tx_errors++;
  548. }
  549. if (tx_status & TX_STS_MANY_COLL_) {
  550. dev->stats.collisions+=16;
  551. dev->stats.tx_aborted_errors++;
  552. } else {
  553. dev->stats.collisions+=(tx_status & TX_STS_COLL_CNT_) >> 3;
  554. }
  555. /* carrier error only has meaning for half-duplex communication */
  556. if ((tx_status & (TX_STS_LOC_ | TX_STS_NO_CARR_)) &&
  557. !lp->ctl_rfduplx) {
  558. dev->stats.tx_carrier_errors++;
  559. }
  560. if (tx_status & TX_STS_LATE_COLL_) {
  561. dev->stats.collisions++;
  562. dev->stats.tx_aborted_errors++;
  563. }
  564. }
  565. }
  566. /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
  567. /*
  568. * Reads a register from the MII Management serial interface
  569. */
  570. static int smc911x_phy_read(struct net_device *dev, int phyaddr, int phyreg)
  571. {
  572. struct smc911x_local *lp = netdev_priv(dev);
  573. unsigned int phydata;
  574. SMC_GET_MII(lp, phyreg, phyaddr, phydata);
  575. DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%02x, phydata=0x%04x\n",
  576. __func__, phyaddr, phyreg, phydata);
  577. return phydata;
  578. }
  579. /*
  580. * Writes a register to the MII Management serial interface
  581. */
  582. static void smc911x_phy_write(struct net_device *dev, int phyaddr, int phyreg,
  583. int phydata)
  584. {
  585. struct smc911x_local *lp = netdev_priv(dev);
  586. DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
  587. __func__, phyaddr, phyreg, phydata);
  588. SMC_SET_MII(lp, phyreg, phyaddr, phydata);
  589. }
  590. /*
  591. * Finds and reports the PHY address (115 and 117 have external
  592. * PHY interface 118 has internal only
  593. */
  594. static void smc911x_phy_detect(struct net_device *dev)
  595. {
  596. struct smc911x_local *lp = netdev_priv(dev);
  597. int phyaddr;
  598. unsigned int cfg, id1, id2;
  599. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  600. lp->phy_type = 0;
  601. /*
  602. * Scan all 32 PHY addresses if necessary, starting at
  603. * PHY#1 to PHY#31, and then PHY#0 last.
  604. */
  605. switch(lp->version) {
  606. case CHIP_9115:
  607. case CHIP_9117:
  608. case CHIP_9215:
  609. case CHIP_9217:
  610. cfg = SMC_GET_HW_CFG(lp);
  611. if (cfg & HW_CFG_EXT_PHY_DET_) {
  612. cfg &= ~HW_CFG_PHY_CLK_SEL_;
  613. cfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
  614. SMC_SET_HW_CFG(lp, cfg);
  615. udelay(10); /* Wait for clocks to stop */
  616. cfg |= HW_CFG_EXT_PHY_EN_;
  617. SMC_SET_HW_CFG(lp, cfg);
  618. udelay(10); /* Wait for clocks to stop */
  619. cfg &= ~HW_CFG_PHY_CLK_SEL_;
  620. cfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
  621. SMC_SET_HW_CFG(lp, cfg);
  622. udelay(10); /* Wait for clocks to stop */
  623. cfg |= HW_CFG_SMI_SEL_;
  624. SMC_SET_HW_CFG(lp, cfg);
  625. for (phyaddr = 1; phyaddr < 32; ++phyaddr) {
  626. /* Read the PHY identifiers */
  627. SMC_GET_PHY_ID1(lp, phyaddr & 31, id1);
  628. SMC_GET_PHY_ID2(lp, phyaddr & 31, id2);
  629. /* Make sure it is a valid identifier */
  630. if (id1 != 0x0000 && id1 != 0xffff &&
  631. id1 != 0x8000 && id2 != 0x0000 &&
  632. id2 != 0xffff && id2 != 0x8000) {
  633. /* Save the PHY's address */
  634. lp->mii.phy_id = phyaddr & 31;
  635. lp->phy_type = id1 << 16 | id2;
  636. break;
  637. }
  638. }
  639. if (phyaddr < 32)
  640. /* Found an external PHY */
  641. break;
  642. }
  643. default:
  644. /* Internal media only */
  645. SMC_GET_PHY_ID1(lp, 1, id1);
  646. SMC_GET_PHY_ID2(lp, 1, id2);
  647. /* Save the PHY's address */
  648. lp->mii.phy_id = 1;
  649. lp->phy_type = id1 << 16 | id2;
  650. }
  651. DBG(SMC_DEBUG_MISC, "%s: phy_id1=0x%x, phy_id2=0x%x phyaddr=0x%d\n",
  652. dev->name, id1, id2, lp->mii.phy_id);
  653. }
  654. /*
  655. * Sets the PHY to a configuration as determined by the user.
  656. * Called with spin_lock held.
  657. */
  658. static int smc911x_phy_fixed(struct net_device *dev)
  659. {
  660. struct smc911x_local *lp = netdev_priv(dev);
  661. int phyaddr = lp->mii.phy_id;
  662. int bmcr;
  663. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  664. /* Enter Link Disable state */
  665. SMC_GET_PHY_BMCR(lp, phyaddr, bmcr);
  666. bmcr |= BMCR_PDOWN;
  667. SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
  668. /*
  669. * Set our fixed capabilities
  670. * Disable auto-negotiation
  671. */
  672. bmcr &= ~BMCR_ANENABLE;
  673. if (lp->ctl_rfduplx)
  674. bmcr |= BMCR_FULLDPLX;
  675. if (lp->ctl_rspeed == 100)
  676. bmcr |= BMCR_SPEED100;
  677. /* Write our capabilities to the phy control register */
  678. SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
  679. /* Re-Configure the Receive/Phy Control register */
  680. bmcr &= ~BMCR_PDOWN;
  681. SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
  682. return 1;
  683. }
  684. /*
  685. * smc911x_phy_reset - reset the phy
  686. * @dev: net device
  687. * @phy: phy address
  688. *
  689. * Issue a software reset for the specified PHY and
  690. * wait up to 100ms for the reset to complete. We should
  691. * not access the PHY for 50ms after issuing the reset.
  692. *
  693. * The time to wait appears to be dependent on the PHY.
  694. *
  695. */
  696. static int smc911x_phy_reset(struct net_device *dev, int phy)
  697. {
  698. struct smc911x_local *lp = netdev_priv(dev);
  699. int timeout;
  700. unsigned long flags;
  701. unsigned int reg;
  702. DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __func__);
  703. spin_lock_irqsave(&lp->lock, flags);
  704. reg = SMC_GET_PMT_CTRL(lp);
  705. reg &= ~0xfffff030;
  706. reg |= PMT_CTRL_PHY_RST_;
  707. SMC_SET_PMT_CTRL(lp, reg);
  708. spin_unlock_irqrestore(&lp->lock, flags);
  709. for (timeout = 2; timeout; timeout--) {
  710. msleep(50);
  711. spin_lock_irqsave(&lp->lock, flags);
  712. reg = SMC_GET_PMT_CTRL(lp);
  713. spin_unlock_irqrestore(&lp->lock, flags);
  714. if (!(reg & PMT_CTRL_PHY_RST_)) {
  715. /* extra delay required because the phy may
  716. * not be completed with its reset
  717. * when PHY_BCR_RESET_ is cleared. 256us
  718. * should suffice, but use 500us to be safe
  719. */
  720. udelay(500);
  721. break;
  722. }
  723. }
  724. return reg & PMT_CTRL_PHY_RST_;
  725. }
  726. /*
  727. * smc911x_phy_powerdown - powerdown phy
  728. * @dev: net device
  729. * @phy: phy address
  730. *
  731. * Power down the specified PHY
  732. */
  733. static void smc911x_phy_powerdown(struct net_device *dev, int phy)
  734. {
  735. struct smc911x_local *lp = netdev_priv(dev);
  736. unsigned int bmcr;
  737. /* Enter Link Disable state */
  738. SMC_GET_PHY_BMCR(lp, phy, bmcr);
  739. bmcr |= BMCR_PDOWN;
  740. SMC_SET_PHY_BMCR(lp, phy, bmcr);
  741. }
  742. /*
  743. * smc911x_phy_check_media - check the media status and adjust BMCR
  744. * @dev: net device
  745. * @init: set true for initialisation
  746. *
  747. * Select duplex mode depending on negotiation state. This
  748. * also updates our carrier state.
  749. */
  750. static void smc911x_phy_check_media(struct net_device *dev, int init)
  751. {
  752. struct smc911x_local *lp = netdev_priv(dev);
  753. int phyaddr = lp->mii.phy_id;
  754. unsigned int bmcr, cr;
  755. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  756. if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
  757. /* duplex state has changed */
  758. SMC_GET_PHY_BMCR(lp, phyaddr, bmcr);
  759. SMC_GET_MAC_CR(lp, cr);
  760. if (lp->mii.full_duplex) {
  761. DBG(SMC_DEBUG_MISC, "%s: Configuring for full-duplex mode\n", dev->name);
  762. bmcr |= BMCR_FULLDPLX;
  763. cr |= MAC_CR_RCVOWN_;
  764. } else {
  765. DBG(SMC_DEBUG_MISC, "%s: Configuring for half-duplex mode\n", dev->name);
  766. bmcr &= ~BMCR_FULLDPLX;
  767. cr &= ~MAC_CR_RCVOWN_;
  768. }
  769. SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
  770. SMC_SET_MAC_CR(lp, cr);
  771. }
  772. }
  773. /*
  774. * Configures the specified PHY through the MII management interface
  775. * using Autonegotiation.
  776. * Calls smc911x_phy_fixed() if the user has requested a certain config.
  777. * If RPC ANEG bit is set, the media selection is dependent purely on
  778. * the selection by the MII (either in the MII BMCR reg or the result
  779. * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
  780. * is controlled by the RPC SPEED and RPC DPLX bits.
  781. */
  782. static void smc911x_phy_configure(struct work_struct *work)
  783. {
  784. struct smc911x_local *lp = container_of(work, struct smc911x_local,
  785. phy_configure);
  786. struct net_device *dev = lp->netdev;
  787. int phyaddr = lp->mii.phy_id;
  788. int my_phy_caps; /* My PHY capabilities */
  789. int my_ad_caps; /* My Advertised capabilities */
  790. int status;
  791. unsigned long flags;
  792. DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __func__);
  793. /*
  794. * We should not be called if phy_type is zero.
  795. */
  796. if (lp->phy_type == 0)
  797. return;
  798. if (smc911x_phy_reset(dev, phyaddr)) {
  799. printk("%s: PHY reset timed out\n", dev->name);
  800. return;
  801. }
  802. spin_lock_irqsave(&lp->lock, flags);
  803. /*
  804. * Enable PHY Interrupts (for register 18)
  805. * Interrupts listed here are enabled
  806. */
  807. SMC_SET_PHY_INT_MASK(lp, phyaddr, PHY_INT_MASK_ENERGY_ON_ |
  808. PHY_INT_MASK_ANEG_COMP_ | PHY_INT_MASK_REMOTE_FAULT_ |
  809. PHY_INT_MASK_LINK_DOWN_);
  810. /* If the user requested no auto neg, then go set his request */
  811. if (lp->mii.force_media) {
  812. smc911x_phy_fixed(dev);
  813. goto smc911x_phy_configure_exit;
  814. }
  815. /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
  816. SMC_GET_PHY_BMSR(lp, phyaddr, my_phy_caps);
  817. if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
  818. printk(KERN_INFO "Auto negotiation NOT supported\n");
  819. smc911x_phy_fixed(dev);
  820. goto smc911x_phy_configure_exit;
  821. }
  822. /* CSMA capable w/ both pauses */
  823. my_ad_caps = ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
  824. if (my_phy_caps & BMSR_100BASE4)
  825. my_ad_caps |= ADVERTISE_100BASE4;
  826. if (my_phy_caps & BMSR_100FULL)
  827. my_ad_caps |= ADVERTISE_100FULL;
  828. if (my_phy_caps & BMSR_100HALF)
  829. my_ad_caps |= ADVERTISE_100HALF;
  830. if (my_phy_caps & BMSR_10FULL)
  831. my_ad_caps |= ADVERTISE_10FULL;
  832. if (my_phy_caps & BMSR_10HALF)
  833. my_ad_caps |= ADVERTISE_10HALF;
  834. /* Disable capabilities not selected by our user */
  835. if (lp->ctl_rspeed != 100)
  836. my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
  837. if (!lp->ctl_rfduplx)
  838. my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
  839. /* Update our Auto-Neg Advertisement Register */
  840. SMC_SET_PHY_MII_ADV(lp, phyaddr, my_ad_caps);
  841. lp->mii.advertising = my_ad_caps;
  842. /*
  843. * Read the register back. Without this, it appears that when
  844. * auto-negotiation is restarted, sometimes it isn't ready and
  845. * the link does not come up.
  846. */
  847. udelay(10);
  848. SMC_GET_PHY_MII_ADV(lp, phyaddr, status);
  849. DBG(SMC_DEBUG_MISC, "%s: phy caps=0x%04x\n", dev->name, my_phy_caps);
  850. DBG(SMC_DEBUG_MISC, "%s: phy advertised caps=0x%04x\n", dev->name, my_ad_caps);
  851. /* Restart auto-negotiation process in order to advertise my caps */
  852. SMC_SET_PHY_BMCR(lp, phyaddr, BMCR_ANENABLE | BMCR_ANRESTART);
  853. smc911x_phy_check_media(dev, 1);
  854. smc911x_phy_configure_exit:
  855. spin_unlock_irqrestore(&lp->lock, flags);
  856. }
  857. /*
  858. * smc911x_phy_interrupt
  859. *
  860. * Purpose: Handle interrupts relating to PHY register 18. This is
  861. * called from the "hard" interrupt handler under our private spinlock.
  862. */
  863. static void smc911x_phy_interrupt(struct net_device *dev)
  864. {
  865. struct smc911x_local *lp = netdev_priv(dev);
  866. int phyaddr = lp->mii.phy_id;
  867. int status;
  868. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  869. if (lp->phy_type == 0)
  870. return;
  871. smc911x_phy_check_media(dev, 0);
  872. /* read to clear status bits */
  873. SMC_GET_PHY_INT_SRC(lp, phyaddr,status);
  874. DBG(SMC_DEBUG_MISC, "%s: PHY interrupt status 0x%04x\n",
  875. dev->name, status & 0xffff);
  876. DBG(SMC_DEBUG_MISC, "%s: AFC_CFG 0x%08x\n",
  877. dev->name, SMC_GET_AFC_CFG(lp));
  878. }
  879. /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
  880. /*
  881. * This is the main routine of the driver, to handle the device when
  882. * it needs some attention.
  883. */
  884. static irqreturn_t smc911x_interrupt(int irq, void *dev_id)
  885. {
  886. struct net_device *dev = dev_id;
  887. struct smc911x_local *lp = netdev_priv(dev);
  888. unsigned int status, mask, timeout;
  889. unsigned int rx_overrun=0, cr, pkts;
  890. unsigned long flags;
  891. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  892. spin_lock_irqsave(&lp->lock, flags);
  893. /* Spurious interrupt check */
  894. if ((SMC_GET_IRQ_CFG(lp) & (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) !=
  895. (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) {
  896. spin_unlock_irqrestore(&lp->lock, flags);
  897. return IRQ_NONE;
  898. }
  899. mask = SMC_GET_INT_EN(lp);
  900. SMC_SET_INT_EN(lp, 0);
  901. /* set a timeout value, so I don't stay here forever */
  902. timeout = 8;
  903. do {
  904. status = SMC_GET_INT(lp);
  905. DBG(SMC_DEBUG_MISC, "%s: INT 0x%08x MASK 0x%08x OUTSIDE MASK 0x%08x\n",
  906. dev->name, status, mask, status & ~mask);
  907. status &= mask;
  908. if (!status)
  909. break;
  910. /* Handle SW interrupt condition */
  911. if (status & INT_STS_SW_INT_) {
  912. SMC_ACK_INT(lp, INT_STS_SW_INT_);
  913. mask &= ~INT_EN_SW_INT_EN_;
  914. }
  915. /* Handle various error conditions */
  916. if (status & INT_STS_RXE_) {
  917. SMC_ACK_INT(lp, INT_STS_RXE_);
  918. dev->stats.rx_errors++;
  919. }
  920. if (status & INT_STS_RXDFH_INT_) {
  921. SMC_ACK_INT(lp, INT_STS_RXDFH_INT_);
  922. dev->stats.rx_dropped+=SMC_GET_RX_DROP(lp);
  923. }
  924. /* Undocumented interrupt-what is the right thing to do here? */
  925. if (status & INT_STS_RXDF_INT_) {
  926. SMC_ACK_INT(lp, INT_STS_RXDF_INT_);
  927. }
  928. /* Rx Data FIFO exceeds set level */
  929. if (status & INT_STS_RDFL_) {
  930. if (IS_REV_A(lp->revision)) {
  931. rx_overrun=1;
  932. SMC_GET_MAC_CR(lp, cr);
  933. cr &= ~MAC_CR_RXEN_;
  934. SMC_SET_MAC_CR(lp, cr);
  935. DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name);
  936. dev->stats.rx_errors++;
  937. dev->stats.rx_fifo_errors++;
  938. }
  939. SMC_ACK_INT(lp, INT_STS_RDFL_);
  940. }
  941. if (status & INT_STS_RDFO_) {
  942. if (!IS_REV_A(lp->revision)) {
  943. SMC_GET_MAC_CR(lp, cr);
  944. cr &= ~MAC_CR_RXEN_;
  945. SMC_SET_MAC_CR(lp, cr);
  946. rx_overrun=1;
  947. DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name);
  948. dev->stats.rx_errors++;
  949. dev->stats.rx_fifo_errors++;
  950. }
  951. SMC_ACK_INT(lp, INT_STS_RDFO_);
  952. }
  953. /* Handle receive condition */
  954. if ((status & INT_STS_RSFL_) || rx_overrun) {
  955. unsigned int fifo;
  956. DBG(SMC_DEBUG_RX, "%s: RX irq\n", dev->name);
  957. fifo = SMC_GET_RX_FIFO_INF(lp);
  958. pkts = (fifo & RX_FIFO_INF_RXSUSED_) >> 16;
  959. DBG(SMC_DEBUG_RX, "%s: Rx FIFO pkts %d, bytes %d\n",
  960. dev->name, pkts, fifo & 0xFFFF );
  961. if (pkts != 0) {
  962. #ifdef SMC_USE_DMA
  963. unsigned int fifo;
  964. if (lp->rxdma_active){
  965. DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA,
  966. "%s: RX DMA active\n", dev->name);
  967. /* The DMA is already running so up the IRQ threshold */
  968. fifo = SMC_GET_FIFO_INT(lp) & ~0xFF;
  969. fifo |= pkts & 0xFF;
  970. DBG(SMC_DEBUG_RX,
  971. "%s: Setting RX stat FIFO threshold to %d\n",
  972. dev->name, fifo & 0xff);
  973. SMC_SET_FIFO_INT(lp, fifo);
  974. } else
  975. #endif
  976. smc911x_rcv(dev);
  977. }
  978. SMC_ACK_INT(lp, INT_STS_RSFL_);
  979. }
  980. /* Handle transmit FIFO available */
  981. if (status & INT_STS_TDFA_) {
  982. DBG(SMC_DEBUG_TX, "%s: TX data FIFO space available irq\n", dev->name);
  983. SMC_SET_FIFO_TDA(lp, 0xFF);
  984. lp->tx_throttle = 0;
  985. #ifdef SMC_USE_DMA
  986. if (!lp->txdma_active)
  987. #endif
  988. netif_wake_queue(dev);
  989. SMC_ACK_INT(lp, INT_STS_TDFA_);
  990. }
  991. /* Handle transmit done condition */
  992. #if 1
  993. if (status & (INT_STS_TSFL_ | INT_STS_GPT_INT_)) {
  994. DBG(SMC_DEBUG_TX | SMC_DEBUG_MISC,
  995. "%s: Tx stat FIFO limit (%d) /GPT irq\n",
  996. dev->name, (SMC_GET_FIFO_INT(lp) & 0x00ff0000) >> 16);
  997. smc911x_tx(dev);
  998. SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
  999. SMC_ACK_INT(lp, INT_STS_TSFL_);
  1000. SMC_ACK_INT(lp, INT_STS_TSFL_ | INT_STS_GPT_INT_);
  1001. }
  1002. #else
  1003. if (status & INT_STS_TSFL_) {
  1004. DBG(SMC_DEBUG_TX, "%s: TX status FIFO limit (%d) irq \n", dev->name, );
  1005. smc911x_tx(dev);
  1006. SMC_ACK_INT(lp, INT_STS_TSFL_);
  1007. }
  1008. if (status & INT_STS_GPT_INT_) {
  1009. DBG(SMC_DEBUG_RX, "%s: IRQ_CFG 0x%08x FIFO_INT 0x%08x RX_CFG 0x%08x\n",
  1010. dev->name,
  1011. SMC_GET_IRQ_CFG(lp),
  1012. SMC_GET_FIFO_INT(lp),
  1013. SMC_GET_RX_CFG(lp));
  1014. DBG(SMC_DEBUG_RX, "%s: Rx Stat FIFO Used 0x%02x "
  1015. "Data FIFO Used 0x%04x Stat FIFO 0x%08x\n",
  1016. dev->name,
  1017. (SMC_GET_RX_FIFO_INF(lp) & 0x00ff0000) >> 16,
  1018. SMC_GET_RX_FIFO_INF(lp) & 0xffff,
  1019. SMC_GET_RX_STS_FIFO_PEEK(lp));
  1020. SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
  1021. SMC_ACK_INT(lp, INT_STS_GPT_INT_);
  1022. }
  1023. #endif
  1024. /* Handle PHY interrupt condition */
  1025. if (status & INT_STS_PHY_INT_) {
  1026. DBG(SMC_DEBUG_MISC, "%s: PHY irq\n", dev->name);
  1027. smc911x_phy_interrupt(dev);
  1028. SMC_ACK_INT(lp, INT_STS_PHY_INT_);
  1029. }
  1030. } while (--timeout);
  1031. /* restore mask state */
  1032. SMC_SET_INT_EN(lp, mask);
  1033. DBG(SMC_DEBUG_MISC, "%s: Interrupt done (%d loops)\n",
  1034. dev->name, 8-timeout);
  1035. spin_unlock_irqrestore(&lp->lock, flags);
  1036. return IRQ_HANDLED;
  1037. }
  1038. #ifdef SMC_USE_DMA
  1039. static void
  1040. smc911x_tx_dma_irq(int dma, void *data)
  1041. {
  1042. struct net_device *dev = (struct net_device *)data;
  1043. struct smc911x_local *lp = netdev_priv(dev);
  1044. struct sk_buff *skb = lp->current_tx_skb;
  1045. unsigned long flags;
  1046. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  1047. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: TX DMA irq handler\n", dev->name);
  1048. /* Clear the DMA interrupt sources */
  1049. SMC_DMA_ACK_IRQ(dev, dma);
  1050. BUG_ON(skb == NULL);
  1051. dma_unmap_single(NULL, tx_dmabuf, tx_dmalen, DMA_TO_DEVICE);
  1052. dev->trans_start = jiffies;
  1053. dev_kfree_skb_irq(skb);
  1054. lp->current_tx_skb = NULL;
  1055. if (lp->pending_tx_skb != NULL)
  1056. smc911x_hardware_send_pkt(dev);
  1057. else {
  1058. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA,
  1059. "%s: No pending Tx packets. DMA disabled\n", dev->name);
  1060. spin_lock_irqsave(&lp->lock, flags);
  1061. lp->txdma_active = 0;
  1062. if (!lp->tx_throttle) {
  1063. netif_wake_queue(dev);
  1064. }
  1065. spin_unlock_irqrestore(&lp->lock, flags);
  1066. }
  1067. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA,
  1068. "%s: TX DMA irq completed\n", dev->name);
  1069. }
  1070. static void
  1071. smc911x_rx_dma_irq(int dma, void *data)
  1072. {
  1073. struct net_device *dev = (struct net_device *)data;
  1074. unsigned long ioaddr = dev->base_addr;
  1075. struct smc911x_local *lp = netdev_priv(dev);
  1076. struct sk_buff *skb = lp->current_rx_skb;
  1077. unsigned long flags;
  1078. unsigned int pkts;
  1079. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  1080. DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, "%s: RX DMA irq handler\n", dev->name);
  1081. /* Clear the DMA interrupt sources */
  1082. SMC_DMA_ACK_IRQ(dev, dma);
  1083. dma_unmap_single(NULL, rx_dmabuf, rx_dmalen, DMA_FROM_DEVICE);
  1084. BUG_ON(skb == NULL);
  1085. lp->current_rx_skb = NULL;
  1086. PRINT_PKT(skb->data, skb->len);
  1087. dev->last_rx = jiffies;
  1088. skb->protocol = eth_type_trans(skb, dev);
  1089. dev->stats.rx_packets++;
  1090. dev->stats.rx_bytes += skb->len;
  1091. netif_rx(skb);
  1092. spin_lock_irqsave(&lp->lock, flags);
  1093. pkts = (SMC_GET_RX_FIFO_INF() & RX_FIFO_INF_RXSUSED_) >> 16;
  1094. if (pkts != 0) {
  1095. smc911x_rcv(dev);
  1096. }else {
  1097. lp->rxdma_active = 0;
  1098. }
  1099. spin_unlock_irqrestore(&lp->lock, flags);
  1100. DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA,
  1101. "%s: RX DMA irq completed. DMA RX FIFO PKTS %d\n",
  1102. dev->name, pkts);
  1103. }
  1104. #endif /* SMC_USE_DMA */
  1105. #ifdef CONFIG_NET_POLL_CONTROLLER
  1106. /*
  1107. * Polling receive - used by netconsole and other diagnostic tools
  1108. * to allow network i/o with interrupts disabled.
  1109. */
  1110. static void smc911x_poll_controller(struct net_device *dev)
  1111. {
  1112. disable_irq(dev->irq);
  1113. smc911x_interrupt(dev->irq, dev);
  1114. enable_irq(dev->irq);
  1115. }
  1116. #endif
  1117. /* Our watchdog timed out. Called by the networking layer */
  1118. static void smc911x_timeout(struct net_device *dev)
  1119. {
  1120. struct smc911x_local *lp = netdev_priv(dev);
  1121. int status, mask;
  1122. unsigned long flags;
  1123. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  1124. spin_lock_irqsave(&lp->lock, flags);
  1125. status = SMC_GET_INT(lp);
  1126. mask = SMC_GET_INT_EN(lp);
  1127. spin_unlock_irqrestore(&lp->lock, flags);
  1128. DBG(SMC_DEBUG_MISC, "%s: INT 0x%02x MASK 0x%02x \n",
  1129. dev->name, status, mask);
  1130. /* Dump the current TX FIFO contents and restart */
  1131. mask = SMC_GET_TX_CFG(lp);
  1132. SMC_SET_TX_CFG(lp, mask | TX_CFG_TXS_DUMP_ | TX_CFG_TXD_DUMP_);
  1133. /*
  1134. * Reconfiguring the PHY doesn't seem like a bad idea here, but
  1135. * smc911x_phy_configure() calls msleep() which calls schedule_timeout()
  1136. * which calls schedule(). Hence we use a work queue.
  1137. */
  1138. if (lp->phy_type != 0)
  1139. schedule_work(&lp->phy_configure);
  1140. /* We can accept TX packets again */
  1141. dev->trans_start = jiffies;
  1142. netif_wake_queue(dev);
  1143. }
  1144. /*
  1145. * This routine will, depending on the values passed to it,
  1146. * either make it accept multicast packets, go into
  1147. * promiscuous mode (for TCPDUMP and cousins) or accept
  1148. * a select set of multicast packets
  1149. */
  1150. static void smc911x_set_multicast_list(struct net_device *dev)
  1151. {
  1152. struct smc911x_local *lp = netdev_priv(dev);
  1153. unsigned int multicast_table[2];
  1154. unsigned int mcr, update_multicast = 0;
  1155. unsigned long flags;
  1156. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  1157. spin_lock_irqsave(&lp->lock, flags);
  1158. SMC_GET_MAC_CR(lp, mcr);
  1159. spin_unlock_irqrestore(&lp->lock, flags);
  1160. if (dev->flags & IFF_PROMISC) {
  1161. DBG(SMC_DEBUG_MISC, "%s: RCR_PRMS\n", dev->name);
  1162. mcr |= MAC_CR_PRMS_;
  1163. }
  1164. /*
  1165. * Here, I am setting this to accept all multicast packets.
  1166. * I don't need to zero the multicast table, because the flag is
  1167. * checked before the table is
  1168. */
  1169. else if (dev->flags & IFF_ALLMULTI || dev->mc_count > 16) {
  1170. DBG(SMC_DEBUG_MISC, "%s: RCR_ALMUL\n", dev->name);
  1171. mcr |= MAC_CR_MCPAS_;
  1172. }
  1173. /*
  1174. * This sets the internal hardware table to filter out unwanted
  1175. * multicast packets before they take up memory.
  1176. *
  1177. * The SMC chip uses a hash table where the high 6 bits of the CRC of
  1178. * address are the offset into the table. If that bit is 1, then the
  1179. * multicast packet is accepted. Otherwise, it's dropped silently.
  1180. *
  1181. * To use the 6 bits as an offset into the table, the high 1 bit is
  1182. * the number of the 32 bit register, while the low 5 bits are the bit
  1183. * within that register.
  1184. */
  1185. else if (dev->mc_count) {
  1186. int i;
  1187. struct dev_mc_list *cur_addr;
  1188. /* Set the Hash perfec mode */
  1189. mcr |= MAC_CR_HPFILT_;
  1190. /* start with a table of all zeros: reject all */
  1191. memset(multicast_table, 0, sizeof(multicast_table));
  1192. cur_addr = dev->mc_list;
  1193. for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
  1194. u32 position;
  1195. /* do we have a pointer here? */
  1196. if (!cur_addr)
  1197. break;
  1198. /* make sure this is a multicast address -
  1199. shouldn't this be a given if we have it here ? */
  1200. if (!(*cur_addr->dmi_addr & 1))
  1201. continue;
  1202. /* upper 6 bits are used as hash index */
  1203. position = ether_crc(ETH_ALEN, cur_addr->dmi_addr)>>26;
  1204. multicast_table[position>>5] |= 1 << (position&0x1f);
  1205. }
  1206. /* be sure I get rid of flags I might have set */
  1207. mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
  1208. /* now, the table can be loaded into the chipset */
  1209. update_multicast = 1;
  1210. } else {
  1211. DBG(SMC_DEBUG_MISC, "%s: ~(MAC_CR_PRMS_|MAC_CR_MCPAS_)\n",
  1212. dev->name);
  1213. mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
  1214. /*
  1215. * since I'm disabling all multicast entirely, I need to
  1216. * clear the multicast list
  1217. */
  1218. memset(multicast_table, 0, sizeof(multicast_table));
  1219. update_multicast = 1;
  1220. }
  1221. spin_lock_irqsave(&lp->lock, flags);
  1222. SMC_SET_MAC_CR(lp, mcr);
  1223. if (update_multicast) {
  1224. DBG(SMC_DEBUG_MISC,
  1225. "%s: update mcast hash table 0x%08x 0x%08x\n",
  1226. dev->name, multicast_table[0], multicast_table[1]);
  1227. SMC_SET_HASHL(lp, multicast_table[0]);
  1228. SMC_SET_HASHH(lp, multicast_table[1]);
  1229. }
  1230. spin_unlock_irqrestore(&lp->lock, flags);
  1231. }
  1232. /*
  1233. * Open and Initialize the board
  1234. *
  1235. * Set up everything, reset the card, etc..
  1236. */
  1237. static int
  1238. smc911x_open(struct net_device *dev)
  1239. {
  1240. struct smc911x_local *lp = netdev_priv(dev);
  1241. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  1242. /*
  1243. * Check that the address is valid. If its not, refuse
  1244. * to bring the device up. The user must specify an
  1245. * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
  1246. */
  1247. if (!is_valid_ether_addr(dev->dev_addr)) {
  1248. PRINTK("%s: no valid ethernet hw addr\n", __func__);
  1249. return -EINVAL;
  1250. }
  1251. /* reset the hardware */
  1252. smc911x_reset(dev);
  1253. /* Configure the PHY, initialize the link state */
  1254. smc911x_phy_configure(&lp->phy_configure);
  1255. /* Turn on Tx + Rx */
  1256. smc911x_enable(dev);
  1257. netif_start_queue(dev);
  1258. return 0;
  1259. }
  1260. /*
  1261. * smc911x_close
  1262. *
  1263. * this makes the board clean up everything that it can
  1264. * and not talk to the outside world. Caused by
  1265. * an 'ifconfig ethX down'
  1266. */
  1267. static int smc911x_close(struct net_device *dev)
  1268. {
  1269. struct smc911x_local *lp = netdev_priv(dev);
  1270. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  1271. netif_stop_queue(dev);
  1272. netif_carrier_off(dev);
  1273. /* clear everything */
  1274. smc911x_shutdown(dev);
  1275. if (lp->phy_type != 0) {
  1276. /* We need to ensure that no calls to
  1277. * smc911x_phy_configure are pending.
  1278. */
  1279. cancel_work_sync(&lp->phy_configure);
  1280. smc911x_phy_powerdown(dev, lp->mii.phy_id);
  1281. }
  1282. if (lp->pending_tx_skb) {
  1283. dev_kfree_skb(lp->pending_tx_skb);
  1284. lp->pending_tx_skb = NULL;
  1285. }
  1286. return 0;
  1287. }
  1288. /*
  1289. * Ethtool support
  1290. */
  1291. static int
  1292. smc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
  1293. {
  1294. struct smc911x_local *lp = netdev_priv(dev);
  1295. int ret, status;
  1296. unsigned long flags;
  1297. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  1298. cmd->maxtxpkt = 1;
  1299. cmd->maxrxpkt = 1;
  1300. if (lp->phy_type != 0) {
  1301. spin_lock_irqsave(&lp->lock, flags);
  1302. ret = mii_ethtool_gset(&lp->mii, cmd);
  1303. spin_unlock_irqrestore(&lp->lock, flags);
  1304. } else {
  1305. cmd->supported = SUPPORTED_10baseT_Half |
  1306. SUPPORTED_10baseT_Full |
  1307. SUPPORTED_TP | SUPPORTED_AUI;
  1308. if (lp->ctl_rspeed == 10)
  1309. cmd->speed = SPEED_10;
  1310. else if (lp->ctl_rspeed == 100)
  1311. cmd->speed = SPEED_100;
  1312. cmd->autoneg = AUTONEG_DISABLE;
  1313. if (lp->mii.phy_id==1)
  1314. cmd->transceiver = XCVR_INTERNAL;
  1315. else
  1316. cmd->transceiver = XCVR_EXTERNAL;
  1317. cmd->port = 0;
  1318. SMC_GET_PHY_SPECIAL(lp, lp->mii.phy_id, status);
  1319. cmd->duplex =
  1320. (status & (PHY_SPECIAL_SPD_10FULL_ | PHY_SPECIAL_SPD_100FULL_)) ?
  1321. DUPLEX_FULL : DUPLEX_HALF;
  1322. ret = 0;
  1323. }
  1324. return ret;
  1325. }
  1326. static int
  1327. smc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
  1328. {
  1329. struct smc911x_local *lp = netdev_priv(dev);
  1330. int ret;
  1331. unsigned long flags;
  1332. if (lp->phy_type != 0) {
  1333. spin_lock_irqsave(&lp->lock, flags);
  1334. ret = mii_ethtool_sset(&lp->mii, cmd);
  1335. spin_unlock_irqrestore(&lp->lock, flags);
  1336. } else {
  1337. if (cmd->autoneg != AUTONEG_DISABLE ||
  1338. cmd->speed != SPEED_10 ||
  1339. (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) ||
  1340. (cmd->port != PORT_TP && cmd->port != PORT_AUI))
  1341. return -EINVAL;
  1342. lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL;
  1343. ret = 0;
  1344. }
  1345. return ret;
  1346. }
  1347. static void
  1348. smc911x_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
  1349. {
  1350. strncpy(info->driver, CARDNAME, sizeof(info->driver));
  1351. strncpy(info->version, version, sizeof(info->version));
  1352. strncpy(info->bus_info, dev->dev.parent->bus_id, sizeof(info->bus_info));
  1353. }
  1354. static int smc911x_ethtool_nwayreset(struct net_device *dev)
  1355. {
  1356. struct smc911x_local *lp = netdev_priv(dev);
  1357. int ret = -EINVAL;
  1358. unsigned long flags;
  1359. if (lp->phy_type != 0) {
  1360. spin_lock_irqsave(&lp->lock, flags);
  1361. ret = mii_nway_restart(&lp->mii);
  1362. spin_unlock_irqrestore(&lp->lock, flags);
  1363. }
  1364. return ret;
  1365. }
  1366. static u32 smc911x_ethtool_getmsglevel(struct net_device *dev)
  1367. {
  1368. struct smc911x_local *lp = netdev_priv(dev);
  1369. return lp->msg_enable;
  1370. }
  1371. static void smc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
  1372. {
  1373. struct smc911x_local *lp = netdev_priv(dev);
  1374. lp->msg_enable = level;
  1375. }
  1376. static int smc911x_ethtool_getregslen(struct net_device *dev)
  1377. {
  1378. /* System regs + MAC regs + PHY regs */
  1379. return (((E2P_CMD - ID_REV)/4 + 1) +
  1380. (WUCSR - MAC_CR)+1 + 32) * sizeof(u32);
  1381. }
  1382. static void smc911x_ethtool_getregs(struct net_device *dev,
  1383. struct ethtool_regs* regs, void *buf)
  1384. {
  1385. struct smc911x_local *lp = netdev_priv(dev);
  1386. unsigned long flags;
  1387. u32 reg,i,j=0;
  1388. u32 *data = (u32*)buf;
  1389. regs->version = lp->version;
  1390. for(i=ID_REV;i<=E2P_CMD;i+=4) {
  1391. data[j++] = SMC_inl(lp, i);
  1392. }
  1393. for(i=MAC_CR;i<=WUCSR;i++) {
  1394. spin_lock_irqsave(&lp->lock, flags);
  1395. SMC_GET_MAC_CSR(lp, i, reg);
  1396. spin_unlock_irqrestore(&lp->lock, flags);
  1397. data[j++] = reg;
  1398. }
  1399. for(i=0;i<=31;i++) {
  1400. spin_lock_irqsave(&lp->lock, flags);
  1401. SMC_GET_MII(lp, i, lp->mii.phy_id, reg);
  1402. spin_unlock_irqrestore(&lp->lock, flags);
  1403. data[j++] = reg & 0xFFFF;
  1404. }
  1405. }
  1406. static int smc911x_ethtool_wait_eeprom_ready(struct net_device *dev)
  1407. {
  1408. struct smc911x_local *lp = netdev_priv(dev);
  1409. unsigned int timeout;
  1410. int e2p_cmd;
  1411. e2p_cmd = SMC_GET_E2P_CMD(lp);
  1412. for(timeout=10;(e2p_cmd & E2P_CMD_EPC_BUSY_) && timeout; timeout--) {
  1413. if (e2p_cmd & E2P_CMD_EPC_TIMEOUT_) {
  1414. PRINTK("%s: %s timeout waiting for EEPROM to respond\n",
  1415. dev->name, __func__);
  1416. return -EFAULT;
  1417. }
  1418. mdelay(1);
  1419. e2p_cmd = SMC_GET_E2P_CMD(lp);
  1420. }
  1421. if (timeout == 0) {
  1422. PRINTK("%s: %s timeout waiting for EEPROM CMD not busy\n",
  1423. dev->name, __func__);
  1424. return -ETIMEDOUT;
  1425. }
  1426. return 0;
  1427. }
  1428. static inline int smc911x_ethtool_write_eeprom_cmd(struct net_device *dev,
  1429. int cmd, int addr)
  1430. {
  1431. struct smc911x_local *lp = netdev_priv(dev);
  1432. int ret;
  1433. if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
  1434. return ret;
  1435. SMC_SET_E2P_CMD(lp, E2P_CMD_EPC_BUSY_ |
  1436. ((cmd) & (0x7<<28)) |
  1437. ((addr) & 0xFF));
  1438. return 0;
  1439. }
  1440. static inline int smc911x_ethtool_read_eeprom_byte(struct net_device *dev,
  1441. u8 *data)
  1442. {
  1443. struct smc911x_local *lp = netdev_priv(dev);
  1444. int ret;
  1445. if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
  1446. return ret;
  1447. *data = SMC_GET_E2P_DATA(lp);
  1448. return 0;
  1449. }
  1450. static inline int smc911x_ethtool_write_eeprom_byte(struct net_device *dev,
  1451. u8 data)
  1452. {
  1453. struct smc911x_local *lp = netdev_priv(dev);
  1454. int ret;
  1455. if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
  1456. return ret;
  1457. SMC_SET_E2P_DATA(lp, data);
  1458. return 0;
  1459. }
  1460. static int smc911x_ethtool_geteeprom(struct net_device *dev,
  1461. struct ethtool_eeprom *eeprom, u8 *data)
  1462. {
  1463. u8 eebuf[SMC911X_EEPROM_LEN];
  1464. int i, ret;
  1465. for(i=0;i<SMC911X_EEPROM_LEN;i++) {
  1466. if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_READ_, i ))!=0)
  1467. return ret;
  1468. if ((ret=smc911x_ethtool_read_eeprom_byte(dev, &eebuf[i]))!=0)
  1469. return ret;
  1470. }
  1471. memcpy(data, eebuf+eeprom->offset, eeprom->len);
  1472. return 0;
  1473. }
  1474. static int smc911x_ethtool_seteeprom(struct net_device *dev,
  1475. struct ethtool_eeprom *eeprom, u8 *data)
  1476. {
  1477. int i, ret;
  1478. /* Enable erase */
  1479. if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_EWEN_, 0 ))!=0)
  1480. return ret;
  1481. for(i=eeprom->offset;i<(eeprom->offset+eeprom->len);i++) {
  1482. /* erase byte */
  1483. if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_ERASE_, i ))!=0)
  1484. return ret;
  1485. /* write byte */
  1486. if ((ret=smc911x_ethtool_write_eeprom_byte(dev, *data))!=0)
  1487. return ret;
  1488. if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_WRITE_, i ))!=0)
  1489. return ret;
  1490. }
  1491. return 0;
  1492. }
  1493. static int smc911x_ethtool_geteeprom_len(struct net_device *dev)
  1494. {
  1495. return SMC911X_EEPROM_LEN;
  1496. }
  1497. static const struct ethtool_ops smc911x_ethtool_ops = {
  1498. .get_settings = smc911x_ethtool_getsettings,
  1499. .set_settings = smc911x_ethtool_setsettings,
  1500. .get_drvinfo = smc911x_ethtool_getdrvinfo,
  1501. .get_msglevel = smc911x_ethtool_getmsglevel,
  1502. .set_msglevel = smc911x_ethtool_setmsglevel,
  1503. .nway_reset = smc911x_ethtool_nwayreset,
  1504. .get_link = ethtool_op_get_link,
  1505. .get_regs_len = smc911x_ethtool_getregslen,
  1506. .get_regs = smc911x_ethtool_getregs,
  1507. .get_eeprom_len = smc911x_ethtool_geteeprom_len,
  1508. .get_eeprom = smc911x_ethtool_geteeprom,
  1509. .set_eeprom = smc911x_ethtool_seteeprom,
  1510. };
  1511. /*
  1512. * smc911x_findirq
  1513. *
  1514. * This routine has a simple purpose -- make the SMC chip generate an
  1515. * interrupt, so an auto-detect routine can detect it, and find the IRQ,
  1516. */
  1517. static int __init smc911x_findirq(struct net_device *dev)
  1518. {
  1519. struct smc911x_local *lp = netdev_priv(dev);
  1520. int timeout = 20;
  1521. unsigned long cookie;
  1522. DBG(SMC_DEBUG_FUNC, "--> %s\n", __func__);
  1523. cookie = probe_irq_on();
  1524. /*
  1525. * Force a SW interrupt
  1526. */
  1527. SMC_SET_INT_EN(lp, INT_EN_SW_INT_EN_);
  1528. /*
  1529. * Wait until positive that the interrupt has been generated
  1530. */
  1531. do {
  1532. int int_status;
  1533. udelay(10);
  1534. int_status = SMC_GET_INT_EN(lp);
  1535. if (int_status & INT_EN_SW_INT_EN_)
  1536. break; /* got the interrupt */
  1537. } while (--timeout);
  1538. /*
  1539. * there is really nothing that I can do here if timeout fails,
  1540. * as autoirq_report will return a 0 anyway, which is what I
  1541. * want in this case. Plus, the clean up is needed in both
  1542. * cases.
  1543. */
  1544. /* and disable all interrupts again */
  1545. SMC_SET_INT_EN(lp, 0);
  1546. /* and return what I found */
  1547. return probe_irq_off(cookie);
  1548. }
  1549. /*
  1550. * Function: smc911x_probe(unsigned long ioaddr)
  1551. *
  1552. * Purpose:
  1553. * Tests to see if a given ioaddr points to an SMC911x chip.
  1554. * Returns a 0 on success
  1555. *
  1556. * Algorithm:
  1557. * (1) see if the endian word is OK
  1558. * (1) see if I recognize the chip ID in the appropriate register
  1559. *
  1560. * Here I do typical initialization tasks.
  1561. *
  1562. * o Initialize the structure if needed
  1563. * o print out my vanity message if not done so already
  1564. * o print out what type of hardware is detected
  1565. * o print out the ethernet address
  1566. * o find the IRQ
  1567. * o set up my private data
  1568. * o configure the dev structure with my subroutines
  1569. * o actually GRAB the irq.
  1570. * o GRAB the region
  1571. */
  1572. static int __init smc911x_probe(struct net_device *dev)
  1573. {
  1574. struct smc911x_local *lp = netdev_priv(dev);
  1575. int i, retval;
  1576. unsigned int val, chip_id, revision;
  1577. const char *version_string;
  1578. unsigned long irq_flags;
  1579. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  1580. /* First, see if the endian word is recognized */
  1581. val = SMC_GET_BYTE_TEST(lp);
  1582. DBG(SMC_DEBUG_MISC, "%s: endian probe returned 0x%04x\n", CARDNAME, val);
  1583. if (val != 0x87654321) {
  1584. printk(KERN_ERR "Invalid chip endian 0x08%x\n",val);
  1585. retval = -ENODEV;
  1586. goto err_out;
  1587. }
  1588. /*
  1589. * check if the revision register is something that I
  1590. * recognize. These might need to be added to later,
  1591. * as future revisions could be added.
  1592. */
  1593. chip_id = SMC_GET_PN(lp);
  1594. DBG(SMC_DEBUG_MISC, "%s: id probe returned 0x%04x\n", CARDNAME, chip_id);
  1595. for(i=0;chip_ids[i].id != 0; i++) {
  1596. if (chip_ids[i].id == chip_id) break;
  1597. }
  1598. if (!chip_ids[i].id) {
  1599. printk(KERN_ERR "Unknown chip ID %04x\n", chip_id);
  1600. retval = -ENODEV;
  1601. goto err_out;
  1602. }
  1603. version_string = chip_ids[i].name;
  1604. revision = SMC_GET_REV(lp);
  1605. DBG(SMC_DEBUG_MISC, "%s: revision = 0x%04x\n", CARDNAME, revision);
  1606. /* At this point I'll assume that the chip is an SMC911x. */
  1607. DBG(SMC_DEBUG_MISC, "%s: Found a %s\n", CARDNAME, chip_ids[i].name);
  1608. /* Validate the TX FIFO size requested */
  1609. if ((tx_fifo_kb < 2) || (tx_fifo_kb > 14)) {
  1610. printk(KERN_ERR "Invalid TX FIFO size requested %d\n", tx_fifo_kb);
  1611. retval = -EINVAL;
  1612. goto err_out;
  1613. }
  1614. /* fill in some of the fields */
  1615. lp->version = chip_ids[i].id;
  1616. lp->revision = revision;
  1617. lp->tx_fifo_kb = tx_fifo_kb;
  1618. /* Reverse calculate the RX FIFO size from the TX */
  1619. lp->tx_fifo_size=(lp->tx_fifo_kb<<10) - 512;
  1620. lp->rx_fifo_size= ((0x4000 - 512 - lp->tx_fifo_size) / 16) * 15;
  1621. /* Set the automatic flow control values */
  1622. switch(lp->tx_fifo_kb) {
  1623. /*
  1624. * AFC_HI is about ((Rx Data Fifo Size)*2/3)/64
  1625. * AFC_LO is AFC_HI/2
  1626. * BACK_DUR is about 5uS*(AFC_LO) rounded down
  1627. */
  1628. case 2:/* 13440 Rx Data Fifo Size */
  1629. lp->afc_cfg=0x008C46AF;break;
  1630. case 3:/* 12480 Rx Data Fifo Size */
  1631. lp->afc_cfg=0x0082419F;break;
  1632. case 4:/* 11520 Rx Data Fifo Size */
  1633. lp->afc_cfg=0x00783C9F;break;
  1634. case 5:/* 10560 Rx Data Fifo Size */
  1635. lp->afc_cfg=0x006E374F;break;
  1636. case 6:/* 9600 Rx Data Fifo Size */
  1637. lp->afc_cfg=0x0064328F;break;
  1638. case 7:/* 8640 Rx Data Fifo Size */
  1639. lp->afc_cfg=0x005A2D7F;break;
  1640. case 8:/* 7680 Rx Data Fifo Size */
  1641. lp->afc_cfg=0x0050287F;break;
  1642. case 9:/* 6720 Rx Data Fifo Size */
  1643. lp->afc_cfg=0x0046236F;break;
  1644. case 10:/* 5760 Rx Data Fifo Size */
  1645. lp->afc_cfg=0x003C1E6F;break;
  1646. case 11:/* 4800 Rx Data Fifo Size */
  1647. lp->afc_cfg=0x0032195F;break;
  1648. /*
  1649. * AFC_HI is ~1520 bytes less than RX Data Fifo Size
  1650. * AFC_LO is AFC_HI/2
  1651. * BACK_DUR is about 5uS*(AFC_LO) rounded down
  1652. */
  1653. case 12:/* 3840 Rx Data Fifo Size */
  1654. lp->afc_cfg=0x0024124F;break;
  1655. case 13:/* 2880 Rx Data Fifo Size */
  1656. lp->afc_cfg=0x0015073F;break;
  1657. case 14:/* 1920 Rx Data Fifo Size */
  1658. lp->afc_cfg=0x0006032F;break;
  1659. default:
  1660. PRINTK("%s: ERROR -- no AFC_CFG setting found",
  1661. dev->name);
  1662. break;
  1663. }
  1664. DBG(SMC_DEBUG_MISC | SMC_DEBUG_TX | SMC_DEBUG_RX,
  1665. "%s: tx_fifo %d rx_fifo %d afc_cfg 0x%08x\n", CARDNAME,
  1666. lp->tx_fifo_size, lp->rx_fifo_size, lp->afc_cfg);
  1667. spin_lock_init(&lp->lock);
  1668. /* Get the MAC address */
  1669. SMC_GET_MAC_ADDR(lp, dev->dev_addr);
  1670. /* now, reset the chip, and put it into a known state */
  1671. smc911x_reset(dev);
  1672. /*
  1673. * If dev->irq is 0, then the device has to be banged on to see
  1674. * what the IRQ is.
  1675. *
  1676. * Specifying an IRQ is done with the assumption that the user knows
  1677. * what (s)he is doing. No checking is done!!!!
  1678. */
  1679. if (dev->irq < 1) {
  1680. int trials;
  1681. trials = 3;
  1682. while (trials--) {
  1683. dev->irq = smc911x_findirq(dev);
  1684. if (dev->irq)
  1685. break;
  1686. /* kick the card and try again */
  1687. smc911x_reset(dev);
  1688. }
  1689. }
  1690. if (dev->irq == 0) {
  1691. printk("%s: Couldn't autodetect your IRQ. Use irq=xx.\n",
  1692. dev->name);
  1693. retval = -ENODEV;
  1694. goto err_out;
  1695. }
  1696. dev->irq = irq_canonicalize(dev->irq);
  1697. /* Fill in the fields of the device structure with ethernet values. */
  1698. ether_setup(dev);
  1699. dev->open = smc911x_open;
  1700. dev->stop = smc911x_close;
  1701. dev->hard_start_xmit = smc911x_hard_start_xmit;
  1702. dev->tx_timeout = smc911x_timeout;
  1703. dev->watchdog_timeo = msecs_to_jiffies(watchdog);
  1704. dev->set_multicast_list = smc911x_set_multicast_list;
  1705. dev->ethtool_ops = &smc911x_ethtool_ops;
  1706. #ifdef CONFIG_NET_POLL_CONTROLLER
  1707. dev->poll_controller = smc911x_poll_controller;
  1708. #endif
  1709. INIT_WORK(&lp->phy_configure, smc911x_phy_configure);
  1710. lp->mii.phy_id_mask = 0x1f;
  1711. lp->mii.reg_num_mask = 0x1f;
  1712. lp->mii.force_media = 0;
  1713. lp->mii.full_duplex = 0;
  1714. lp->mii.dev = dev;
  1715. lp->mii.mdio_read = smc911x_phy_read;
  1716. lp->mii.mdio_write = smc911x_phy_write;
  1717. /*
  1718. * Locate the phy, if any.
  1719. */
  1720. smc911x_phy_detect(dev);
  1721. /* Set default parameters */
  1722. lp->msg_enable = NETIF_MSG_LINK;
  1723. lp->ctl_rfduplx = 1;
  1724. lp->ctl_rspeed = 100;
  1725. #ifdef SMC_DYNAMIC_BUS_CONFIG
  1726. irq_flags = lp->cfg.irq_flags;
  1727. #else
  1728. irq_flags = IRQF_SHARED | SMC_IRQ_SENSE;
  1729. #endif
  1730. /* Grab the IRQ */
  1731. retval = request_irq(dev->irq, &smc911x_interrupt,
  1732. irq_flags, dev->name, dev);
  1733. if (retval)
  1734. goto err_out;
  1735. #ifdef SMC_USE_DMA
  1736. lp->rxdma = SMC_DMA_REQUEST(dev, smc911x_rx_dma_irq);
  1737. lp->txdma = SMC_DMA_REQUEST(dev, smc911x_tx_dma_irq);
  1738. lp->rxdma_active = 0;
  1739. lp->txdma_active = 0;
  1740. dev->dma = lp->rxdma;
  1741. #endif
  1742. retval = register_netdev(dev);
  1743. if (retval == 0) {
  1744. /* now, print out the card info, in a short format.. */
  1745. printk("%s: %s (rev %d) at %#lx IRQ %d",
  1746. dev->name, version_string, lp->revision,
  1747. dev->base_addr, dev->irq);
  1748. #ifdef SMC_USE_DMA
  1749. if (lp->rxdma != -1)
  1750. printk(" RXDMA %d ", lp->rxdma);
  1751. if (lp->txdma != -1)
  1752. printk("TXDMA %d", lp->txdma);
  1753. #endif
  1754. printk("\n");
  1755. if (!is_valid_ether_addr(dev->dev_addr)) {
  1756. printk("%s: Invalid ethernet MAC address. Please "
  1757. "set using ifconfig\n", dev->name);
  1758. } else {
  1759. /* Print the Ethernet address */
  1760. printk("%s: Ethernet addr: ", dev->name);
  1761. for (i = 0; i < 5; i++)
  1762. printk("%2.2x:", dev->dev_addr[i]);
  1763. printk("%2.2x\n", dev->dev_addr[5]);
  1764. }
  1765. if (lp->phy_type == 0) {
  1766. PRINTK("%s: No PHY found\n", dev->name);
  1767. } else if ((lp->phy_type & ~0xff) == LAN911X_INTERNAL_PHY_ID) {
  1768. PRINTK("%s: LAN911x Internal PHY\n", dev->name);
  1769. } else {
  1770. PRINTK("%s: External PHY 0x%08x\n", dev->name, lp->phy_type);
  1771. }
  1772. }
  1773. err_out:
  1774. #ifdef SMC_USE_DMA
  1775. if (retval) {
  1776. if (lp->rxdma != -1) {
  1777. SMC_DMA_FREE(dev, lp->rxdma);
  1778. }
  1779. if (lp->txdma != -1) {
  1780. SMC_DMA_FREE(dev, lp->txdma);
  1781. }
  1782. }
  1783. #endif
  1784. return retval;
  1785. }
  1786. /*
  1787. * smc911x_init(void)
  1788. *
  1789. * Output:
  1790. * 0 --> there is a device
  1791. * anything else, error
  1792. */
  1793. static int smc911x_drv_probe(struct platform_device *pdev)
  1794. {
  1795. struct smc91x_platdata *pd = pdev->dev.platform_data;
  1796. struct net_device *ndev;
  1797. struct resource *res;
  1798. struct smc911x_local *lp;
  1799. unsigned int *addr;
  1800. int ret;
  1801. DBG(SMC_DEBUG_FUNC, "--> %s\n", __func__);
  1802. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1803. if (!res) {
  1804. ret = -ENODEV;
  1805. goto out;
  1806. }
  1807. /*
  1808. * Request the regions.
  1809. */
  1810. if (!request_mem_region(res->start, SMC911X_IO_EXTENT, CARDNAME)) {
  1811. ret = -EBUSY;
  1812. goto out;
  1813. }
  1814. ndev = alloc_etherdev(sizeof(struct smc911x_local));
  1815. if (!ndev) {
  1816. printk("%s: could not allocate device.\n", CARDNAME);
  1817. ret = -ENOMEM;
  1818. goto release_1;
  1819. }
  1820. SET_NETDEV_DEV(ndev, &pdev->dev);
  1821. ndev->dma = (unsigned char)-1;
  1822. ndev->irq = platform_get_irq(pdev, 0);
  1823. lp = netdev_priv(ndev);
  1824. lp->netdev = ndev;
  1825. #ifdef SMC_DYNAMIC_BUS_CONFIG
  1826. if (!pd) {
  1827. ret = -EINVAL;
  1828. goto release_both;
  1829. }
  1830. memcpy(&lp->cfg, pd, sizeof(lp->cfg));
  1831. #endif
  1832. addr = ioremap(res->start, SMC911X_IO_EXTENT);
  1833. if (!addr) {
  1834. ret = -ENOMEM;
  1835. goto release_both;
  1836. }
  1837. platform_set_drvdata(pdev, ndev);
  1838. lp->base = addr;
  1839. ndev->base_addr = res->start;
  1840. ret = smc911x_probe(ndev);
  1841. if (ret != 0) {
  1842. platform_set_drvdata(pdev, NULL);
  1843. iounmap(addr);
  1844. release_both:
  1845. free_netdev(ndev);
  1846. release_1:
  1847. release_mem_region(res->start, SMC911X_IO_EXTENT);
  1848. out:
  1849. printk("%s: not found (%d).\n", CARDNAME, ret);
  1850. }
  1851. #ifdef SMC_USE_DMA
  1852. else {
  1853. lp->physaddr = res->start;
  1854. lp->dev = &pdev->dev;
  1855. }
  1856. #endif
  1857. return ret;
  1858. }
  1859. static int smc911x_drv_remove(struct platform_device *pdev)
  1860. {
  1861. struct net_device *ndev = platform_get_drvdata(pdev);
  1862. struct smc911x_local *lp = netdev_priv(ndev);
  1863. struct resource *res;
  1864. DBG(SMC_DEBUG_FUNC, "--> %s\n", __func__);
  1865. platform_set_drvdata(pdev, NULL);
  1866. unregister_netdev(ndev);
  1867. free_irq(ndev->irq, ndev);
  1868. #ifdef SMC_USE_DMA
  1869. {
  1870. if (lp->rxdma != -1) {
  1871. SMC_DMA_FREE(dev, lp->rxdma);
  1872. }
  1873. if (lp->txdma != -1) {
  1874. SMC_DMA_FREE(dev, lp->txdma);
  1875. }
  1876. }
  1877. #endif
  1878. iounmap(lp->base);
  1879. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1880. release_mem_region(res->start, SMC911X_IO_EXTENT);
  1881. free_netdev(ndev);
  1882. return 0;
  1883. }
  1884. static int smc911x_drv_suspend(struct platform_device *dev, pm_message_t state)
  1885. {
  1886. struct net_device *ndev = platform_get_drvdata(dev);
  1887. struct smc911x_local *lp = netdev_priv(ndev);
  1888. DBG(SMC_DEBUG_FUNC, "--> %s\n", __func__);
  1889. if (ndev) {
  1890. if (netif_running(ndev)) {
  1891. netif_device_detach(ndev);
  1892. smc911x_shutdown(ndev);
  1893. #if POWER_DOWN
  1894. /* Set D2 - Energy detect only setting */
  1895. SMC_SET_PMT_CTRL(lp, 2<<12);
  1896. #endif
  1897. }
  1898. }
  1899. return 0;
  1900. }
  1901. static int smc911x_drv_resume(struct platform_device *dev)
  1902. {
  1903. struct net_device *ndev = platform_get_drvdata(dev);
  1904. DBG(SMC_DEBUG_FUNC, "--> %s\n", __func__);
  1905. if (ndev) {
  1906. struct smc911x_local *lp = netdev_priv(ndev);
  1907. if (netif_running(ndev)) {
  1908. smc911x_reset(ndev);
  1909. smc911x_enable(ndev);
  1910. if (lp->phy_type != 0)
  1911. smc911x_phy_configure(&lp->phy_configure);
  1912. netif_device_attach(ndev);
  1913. }
  1914. }
  1915. return 0;
  1916. }
  1917. static struct platform_driver smc911x_driver = {
  1918. .probe = smc911x_drv_probe,
  1919. .remove = smc911x_drv_remove,
  1920. .suspend = smc911x_drv_suspend,
  1921. .resume = smc911x_drv_resume,
  1922. .driver = {
  1923. .name = CARDNAME,
  1924. .owner = THIS_MODULE,
  1925. },
  1926. };
  1927. static int __init smc911x_init(void)
  1928. {
  1929. return platform_driver_register(&smc911x_driver);
  1930. }
  1931. static void __exit smc911x_cleanup(void)
  1932. {
  1933. platform_driver_unregister(&smc911x_driver);
  1934. }
  1935. module_init(smc911x_init);
  1936. module_exit(smc911x_cleanup);