mxser.c 72 KB

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  1. /*
  2. * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
  3. *
  4. * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com).
  5. * Copyright (C) 2006-2008 Jiri Slaby <jirislaby@gmail.com>
  6. *
  7. * This code is loosely based on the 1.8 moxa driver which is based on
  8. * Linux serial driver, written by Linus Torvalds, Theodore T'so and
  9. * others.
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or
  14. * (at your option) any later version.
  15. *
  16. * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
  17. * <alan@redhat.com>. The original 1.8 code is available on www.moxa.com.
  18. * - Fixed x86_64 cleanness
  19. */
  20. #include <linux/module.h>
  21. #include <linux/errno.h>
  22. #include <linux/signal.h>
  23. #include <linux/sched.h>
  24. #include <linux/timer.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/tty.h>
  27. #include <linux/tty_flip.h>
  28. #include <linux/serial.h>
  29. #include <linux/serial_reg.h>
  30. #include <linux/major.h>
  31. #include <linux/string.h>
  32. #include <linux/fcntl.h>
  33. #include <linux/ptrace.h>
  34. #include <linux/gfp.h>
  35. #include <linux/ioport.h>
  36. #include <linux/mm.h>
  37. #include <linux/delay.h>
  38. #include <linux/pci.h>
  39. #include <linux/bitops.h>
  40. #include <asm/system.h>
  41. #include <asm/io.h>
  42. #include <asm/irq.h>
  43. #include <asm/uaccess.h>
  44. #include "mxser.h"
  45. #define MXSER_VERSION "2.0.4" /* 1.12 */
  46. #define MXSERMAJOR 174
  47. #define MXSER_BOARDS 4 /* Max. boards */
  48. #define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
  49. #define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD)
  50. #define MXSER_ISR_PASS_LIMIT 100
  51. /*CheckIsMoxaMust return value*/
  52. #define MOXA_OTHER_UART 0x00
  53. #define MOXA_MUST_MU150_HWID 0x01
  54. #define MOXA_MUST_MU860_HWID 0x02
  55. #define WAKEUP_CHARS 256
  56. #define UART_MCR_AFE 0x20
  57. #define UART_LSR_SPECIAL 0x1E
  58. #define PCI_DEVICE_ID_POS104UL 0x1044
  59. #define PCI_DEVICE_ID_CB108 0x1080
  60. #define PCI_DEVICE_ID_CP102UF 0x1023
  61. #define PCI_DEVICE_ID_CB114 0x1142
  62. #define PCI_DEVICE_ID_CP114UL 0x1143
  63. #define PCI_DEVICE_ID_CB134I 0x1341
  64. #define PCI_DEVICE_ID_CP138U 0x1380
  65. #define C168_ASIC_ID 1
  66. #define C104_ASIC_ID 2
  67. #define C102_ASIC_ID 0xB
  68. #define CI132_ASIC_ID 4
  69. #define CI134_ASIC_ID 3
  70. #define CI104J_ASIC_ID 5
  71. #define MXSER_HIGHBAUD 1
  72. #define MXSER_HAS2 2
  73. /* This is only for PCI */
  74. static const struct {
  75. int type;
  76. int tx_fifo;
  77. int rx_fifo;
  78. int xmit_fifo_size;
  79. int rx_high_water;
  80. int rx_trigger;
  81. int rx_low_water;
  82. long max_baud;
  83. } Gpci_uart_info[] = {
  84. {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
  85. {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
  86. {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
  87. };
  88. #define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info)
  89. struct mxser_cardinfo {
  90. char *name;
  91. unsigned int nports;
  92. unsigned int flags;
  93. };
  94. static const struct mxser_cardinfo mxser_cards[] = {
  95. /* 0*/ { "C168 series", 8, },
  96. { "C104 series", 4, },
  97. { "CI-104J series", 4, },
  98. { "C168H/PCI series", 8, },
  99. { "C104H/PCI series", 4, },
  100. /* 5*/ { "C102 series", 4, MXSER_HAS2 }, /* C102-ISA */
  101. { "CI-132 series", 4, MXSER_HAS2 },
  102. { "CI-134 series", 4, },
  103. { "CP-132 series", 2, },
  104. { "CP-114 series", 4, },
  105. /*10*/ { "CT-114 series", 4, },
  106. { "CP-102 series", 2, MXSER_HIGHBAUD },
  107. { "CP-104U series", 4, },
  108. { "CP-168U series", 8, },
  109. { "CP-132U series", 2, },
  110. /*15*/ { "CP-134U series", 4, },
  111. { "CP-104JU series", 4, },
  112. { "Moxa UC7000 Serial", 8, }, /* RC7000 */
  113. { "CP-118U series", 8, },
  114. { "CP-102UL series", 2, },
  115. /*20*/ { "CP-102U series", 2, },
  116. { "CP-118EL series", 8, },
  117. { "CP-168EL series", 8, },
  118. { "CP-104EL series", 4, },
  119. { "CB-108 series", 8, },
  120. /*25*/ { "CB-114 series", 4, },
  121. { "CB-134I series", 4, },
  122. { "CP-138U series", 8, },
  123. { "POS-104UL series", 4, },
  124. { "CP-114UL series", 4, },
  125. /*30*/ { "CP-102UF series", 2, }
  126. };
  127. /* driver_data correspond to the lines in the structure above
  128. see also ISA probe function before you change something */
  129. static struct pci_device_id mxser_pcibrds[] = {
  130. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168), .driver_data = 3 },
  131. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104), .driver_data = 4 },
  132. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132), .driver_data = 8 },
  133. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114), .driver_data = 9 },
  134. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114), .driver_data = 10 },
  135. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102), .driver_data = 11 },
  136. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 12 },
  137. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 13 },
  138. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 14 },
  139. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 15 },
  140. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 16 },
  141. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 17 },
  142. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 18 },
  143. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 19 },
  144. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 20 },
  145. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 21 },
  146. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 22 },
  147. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 23 },
  148. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108), .driver_data = 24 },
  149. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114), .driver_data = 25 },
  150. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I), .driver_data = 26 },
  151. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U), .driver_data = 27 },
  152. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 },
  153. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL), .driver_data = 29 },
  154. { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP102UF), .driver_data = 30 },
  155. { }
  156. };
  157. MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
  158. static unsigned long ioaddr[MXSER_BOARDS];
  159. static int ttymajor = MXSERMAJOR;
  160. /* Variables for insmod */
  161. MODULE_AUTHOR("Casper Yang");
  162. MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
  163. module_param_array(ioaddr, ulong, NULL, 0);
  164. MODULE_PARM_DESC(ioaddr, "ISA io addresses to look for a moxa board");
  165. module_param(ttymajor, int, 0);
  166. MODULE_LICENSE("GPL");
  167. struct mxser_log {
  168. int tick;
  169. unsigned long rxcnt[MXSER_PORTS];
  170. unsigned long txcnt[MXSER_PORTS];
  171. };
  172. struct mxser_mon {
  173. unsigned long rxcnt;
  174. unsigned long txcnt;
  175. unsigned long up_rxcnt;
  176. unsigned long up_txcnt;
  177. int modem_status;
  178. unsigned char hold_reason;
  179. };
  180. struct mxser_mon_ext {
  181. unsigned long rx_cnt[32];
  182. unsigned long tx_cnt[32];
  183. unsigned long up_rxcnt[32];
  184. unsigned long up_txcnt[32];
  185. int modem_status[32];
  186. long baudrate[32];
  187. int databits[32];
  188. int stopbits[32];
  189. int parity[32];
  190. int flowctrl[32];
  191. int fifo[32];
  192. int iftype[32];
  193. };
  194. struct mxser_board;
  195. struct mxser_port {
  196. struct tty_port port;
  197. struct mxser_board *board;
  198. unsigned long ioaddr;
  199. unsigned long opmode_ioaddr;
  200. int max_baud;
  201. int rx_high_water;
  202. int rx_trigger; /* Rx fifo trigger level */
  203. int rx_low_water;
  204. int baud_base; /* max. speed */
  205. int type; /* UART type */
  206. int x_char; /* xon/xoff character */
  207. int IER; /* Interrupt Enable Register */
  208. int MCR; /* Modem control register */
  209. unsigned char stop_rx;
  210. unsigned char ldisc_stop_rx;
  211. int custom_divisor;
  212. unsigned char err_shadow;
  213. struct async_icount icount; /* kernel counters for 4 input interrupts */
  214. int timeout;
  215. int read_status_mask;
  216. int ignore_status_mask;
  217. int xmit_fifo_size;
  218. int xmit_head;
  219. int xmit_tail;
  220. int xmit_cnt;
  221. struct ktermios normal_termios;
  222. struct mxser_mon mon_data;
  223. spinlock_t slock;
  224. wait_queue_head_t delta_msr_wait;
  225. };
  226. struct mxser_board {
  227. unsigned int idx;
  228. int irq;
  229. const struct mxser_cardinfo *info;
  230. unsigned long vector;
  231. unsigned long vector_mask;
  232. int chip_flag;
  233. int uart_type;
  234. struct mxser_port ports[MXSER_PORTS_PER_BOARD];
  235. };
  236. struct mxser_mstatus {
  237. tcflag_t cflag;
  238. int cts;
  239. int dsr;
  240. int ri;
  241. int dcd;
  242. };
  243. static struct mxser_board mxser_boards[MXSER_BOARDS];
  244. static struct tty_driver *mxvar_sdriver;
  245. static struct mxser_log mxvar_log;
  246. static int mxser_set_baud_method[MXSER_PORTS + 1];
  247. static void mxser_enable_must_enchance_mode(unsigned long baseio)
  248. {
  249. u8 oldlcr;
  250. u8 efr;
  251. oldlcr = inb(baseio + UART_LCR);
  252. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  253. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  254. efr |= MOXA_MUST_EFR_EFRB_ENABLE;
  255. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  256. outb(oldlcr, baseio + UART_LCR);
  257. }
  258. static void mxser_disable_must_enchance_mode(unsigned long baseio)
  259. {
  260. u8 oldlcr;
  261. u8 efr;
  262. oldlcr = inb(baseio + UART_LCR);
  263. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  264. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  265. efr &= ~MOXA_MUST_EFR_EFRB_ENABLE;
  266. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  267. outb(oldlcr, baseio + UART_LCR);
  268. }
  269. static void mxser_set_must_xon1_value(unsigned long baseio, u8 value)
  270. {
  271. u8 oldlcr;
  272. u8 efr;
  273. oldlcr = inb(baseio + UART_LCR);
  274. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  275. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  276. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  277. efr |= MOXA_MUST_EFR_BANK0;
  278. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  279. outb(value, baseio + MOXA_MUST_XON1_REGISTER);
  280. outb(oldlcr, baseio + UART_LCR);
  281. }
  282. static void mxser_set_must_xoff1_value(unsigned long baseio, u8 value)
  283. {
  284. u8 oldlcr;
  285. u8 efr;
  286. oldlcr = inb(baseio + UART_LCR);
  287. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  288. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  289. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  290. efr |= MOXA_MUST_EFR_BANK0;
  291. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  292. outb(value, baseio + MOXA_MUST_XOFF1_REGISTER);
  293. outb(oldlcr, baseio + UART_LCR);
  294. }
  295. static void mxser_set_must_fifo_value(struct mxser_port *info)
  296. {
  297. u8 oldlcr;
  298. u8 efr;
  299. oldlcr = inb(info->ioaddr + UART_LCR);
  300. outb(MOXA_MUST_ENTER_ENCHANCE, info->ioaddr + UART_LCR);
  301. efr = inb(info->ioaddr + MOXA_MUST_EFR_REGISTER);
  302. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  303. efr |= MOXA_MUST_EFR_BANK1;
  304. outb(efr, info->ioaddr + MOXA_MUST_EFR_REGISTER);
  305. outb((u8)info->rx_high_water, info->ioaddr + MOXA_MUST_RBRTH_REGISTER);
  306. outb((u8)info->rx_trigger, info->ioaddr + MOXA_MUST_RBRTI_REGISTER);
  307. outb((u8)info->rx_low_water, info->ioaddr + MOXA_MUST_RBRTL_REGISTER);
  308. outb(oldlcr, info->ioaddr + UART_LCR);
  309. }
  310. static void mxser_set_must_enum_value(unsigned long baseio, u8 value)
  311. {
  312. u8 oldlcr;
  313. u8 efr;
  314. oldlcr = inb(baseio + UART_LCR);
  315. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  316. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  317. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  318. efr |= MOXA_MUST_EFR_BANK2;
  319. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  320. outb(value, baseio + MOXA_MUST_ENUM_REGISTER);
  321. outb(oldlcr, baseio + UART_LCR);
  322. }
  323. static void mxser_get_must_hardware_id(unsigned long baseio, u8 *pId)
  324. {
  325. u8 oldlcr;
  326. u8 efr;
  327. oldlcr = inb(baseio + UART_LCR);
  328. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  329. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  330. efr &= ~MOXA_MUST_EFR_BANK_MASK;
  331. efr |= MOXA_MUST_EFR_BANK2;
  332. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  333. *pId = inb(baseio + MOXA_MUST_HWID_REGISTER);
  334. outb(oldlcr, baseio + UART_LCR);
  335. }
  336. static void SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(unsigned long baseio)
  337. {
  338. u8 oldlcr;
  339. u8 efr;
  340. oldlcr = inb(baseio + UART_LCR);
  341. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  342. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  343. efr &= ~MOXA_MUST_EFR_SF_MASK;
  344. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  345. outb(oldlcr, baseio + UART_LCR);
  346. }
  347. static void mxser_enable_must_tx_software_flow_control(unsigned long baseio)
  348. {
  349. u8 oldlcr;
  350. u8 efr;
  351. oldlcr = inb(baseio + UART_LCR);
  352. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  353. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  354. efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
  355. efr |= MOXA_MUST_EFR_SF_TX1;
  356. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  357. outb(oldlcr, baseio + UART_LCR);
  358. }
  359. static void mxser_disable_must_tx_software_flow_control(unsigned long baseio)
  360. {
  361. u8 oldlcr;
  362. u8 efr;
  363. oldlcr = inb(baseio + UART_LCR);
  364. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  365. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  366. efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
  367. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  368. outb(oldlcr, baseio + UART_LCR);
  369. }
  370. static void mxser_enable_must_rx_software_flow_control(unsigned long baseio)
  371. {
  372. u8 oldlcr;
  373. u8 efr;
  374. oldlcr = inb(baseio + UART_LCR);
  375. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  376. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  377. efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
  378. efr |= MOXA_MUST_EFR_SF_RX1;
  379. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  380. outb(oldlcr, baseio + UART_LCR);
  381. }
  382. static void mxser_disable_must_rx_software_flow_control(unsigned long baseio)
  383. {
  384. u8 oldlcr;
  385. u8 efr;
  386. oldlcr = inb(baseio + UART_LCR);
  387. outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
  388. efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
  389. efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
  390. outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
  391. outb(oldlcr, baseio + UART_LCR);
  392. }
  393. #ifdef CONFIG_PCI
  394. static int __devinit CheckIsMoxaMust(unsigned long io)
  395. {
  396. u8 oldmcr, hwid;
  397. int i;
  398. outb(0, io + UART_LCR);
  399. mxser_disable_must_enchance_mode(io);
  400. oldmcr = inb(io + UART_MCR);
  401. outb(0, io + UART_MCR);
  402. mxser_set_must_xon1_value(io, 0x11);
  403. if ((hwid = inb(io + UART_MCR)) != 0) {
  404. outb(oldmcr, io + UART_MCR);
  405. return MOXA_OTHER_UART;
  406. }
  407. mxser_get_must_hardware_id(io, &hwid);
  408. for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */
  409. if (hwid == Gpci_uart_info[i].type)
  410. return (int)hwid;
  411. }
  412. return MOXA_OTHER_UART;
  413. }
  414. #endif
  415. static void process_txrx_fifo(struct mxser_port *info)
  416. {
  417. int i;
  418. if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
  419. info->rx_trigger = 1;
  420. info->rx_high_water = 1;
  421. info->rx_low_water = 1;
  422. info->xmit_fifo_size = 1;
  423. } else
  424. for (i = 0; i < UART_INFO_NUM; i++)
  425. if (info->board->chip_flag == Gpci_uart_info[i].type) {
  426. info->rx_trigger = Gpci_uart_info[i].rx_trigger;
  427. info->rx_low_water = Gpci_uart_info[i].rx_low_water;
  428. info->rx_high_water = Gpci_uart_info[i].rx_high_water;
  429. info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
  430. break;
  431. }
  432. }
  433. static unsigned char mxser_get_msr(int baseaddr, int mode, int port)
  434. {
  435. static unsigned char mxser_msr[MXSER_PORTS + 1];
  436. unsigned char status = 0;
  437. status = inb(baseaddr + UART_MSR);
  438. mxser_msr[port] &= 0x0F;
  439. mxser_msr[port] |= status;
  440. status = mxser_msr[port];
  441. if (mode)
  442. mxser_msr[port] = 0;
  443. return status;
  444. }
  445. static int mxser_block_til_ready(struct tty_struct *tty, struct file *filp,
  446. struct mxser_port *port)
  447. {
  448. DECLARE_WAITQUEUE(wait, current);
  449. int retval;
  450. int do_clocal = 0;
  451. unsigned long flags;
  452. /*
  453. * If non-blocking mode is set, or the port is not enabled,
  454. * then make the check up front and then exit.
  455. */
  456. if ((filp->f_flags & O_NONBLOCK) ||
  457. test_bit(TTY_IO_ERROR, &tty->flags)) {
  458. port->port.flags |= ASYNC_NORMAL_ACTIVE;
  459. return 0;
  460. }
  461. if (tty->termios->c_cflag & CLOCAL)
  462. do_clocal = 1;
  463. /*
  464. * Block waiting for the carrier detect and the line to become
  465. * free (i.e., not in use by the callout). While we are in
  466. * this loop, port->port.count is dropped by one, so that
  467. * mxser_close() knows when to free things. We restore it upon
  468. * exit, either normal or abnormal.
  469. */
  470. retval = 0;
  471. add_wait_queue(&port->port.open_wait, &wait);
  472. spin_lock_irqsave(&port->slock, flags);
  473. if (!tty_hung_up_p(filp))
  474. port->port.count--;
  475. spin_unlock_irqrestore(&port->slock, flags);
  476. port->port.blocked_open++;
  477. while (1) {
  478. spin_lock_irqsave(&port->slock, flags);
  479. outb(inb(port->ioaddr + UART_MCR) |
  480. UART_MCR_DTR | UART_MCR_RTS, port->ioaddr + UART_MCR);
  481. spin_unlock_irqrestore(&port->slock, flags);
  482. set_current_state(TASK_INTERRUPTIBLE);
  483. if (tty_hung_up_p(filp) || !(port->port.flags & ASYNC_INITIALIZED)) {
  484. if (port->port.flags & ASYNC_HUP_NOTIFY)
  485. retval = -EAGAIN;
  486. else
  487. retval = -ERESTARTSYS;
  488. break;
  489. }
  490. if (!(port->port.flags & ASYNC_CLOSING) &&
  491. (do_clocal ||
  492. (inb(port->ioaddr + UART_MSR) & UART_MSR_DCD)))
  493. break;
  494. if (signal_pending(current)) {
  495. retval = -ERESTARTSYS;
  496. break;
  497. }
  498. schedule();
  499. }
  500. set_current_state(TASK_RUNNING);
  501. remove_wait_queue(&port->port.open_wait, &wait);
  502. if (!tty_hung_up_p(filp))
  503. port->port.count++;
  504. port->port.blocked_open--;
  505. if (retval)
  506. return retval;
  507. port->port.flags |= ASYNC_NORMAL_ACTIVE;
  508. return 0;
  509. }
  510. static int mxser_set_baud(struct tty_struct *tty, long newspd)
  511. {
  512. struct mxser_port *info = tty->driver_data;
  513. int quot = 0, baud;
  514. unsigned char cval;
  515. if (!info->ioaddr)
  516. return -1;
  517. if (newspd > info->max_baud)
  518. return -1;
  519. if (newspd == 134) {
  520. quot = 2 * info->baud_base / 269;
  521. tty_encode_baud_rate(tty, 134, 134);
  522. } else if (newspd) {
  523. quot = info->baud_base / newspd;
  524. if (quot == 0)
  525. quot = 1;
  526. baud = info->baud_base/quot;
  527. tty_encode_baud_rate(tty, baud, baud);
  528. } else {
  529. quot = 0;
  530. }
  531. info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
  532. info->timeout += HZ / 50; /* Add .02 seconds of slop */
  533. if (quot) {
  534. info->MCR |= UART_MCR_DTR;
  535. outb(info->MCR, info->ioaddr + UART_MCR);
  536. } else {
  537. info->MCR &= ~UART_MCR_DTR;
  538. outb(info->MCR, info->ioaddr + UART_MCR);
  539. return 0;
  540. }
  541. cval = inb(info->ioaddr + UART_LCR);
  542. outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */
  543. outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */
  544. outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */
  545. outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */
  546. #ifdef BOTHER
  547. if (C_BAUD(tty) == BOTHER) {
  548. quot = info->baud_base % newspd;
  549. quot *= 8;
  550. if (quot % newspd > newspd / 2) {
  551. quot /= newspd;
  552. quot++;
  553. } else
  554. quot /= newspd;
  555. mxser_set_must_enum_value(info->ioaddr, quot);
  556. } else
  557. #endif
  558. mxser_set_must_enum_value(info->ioaddr, 0);
  559. return 0;
  560. }
  561. /*
  562. * This routine is called to set the UART divisor registers to match
  563. * the specified baud rate for a serial port.
  564. */
  565. static int mxser_change_speed(struct tty_struct *tty,
  566. struct ktermios *old_termios)
  567. {
  568. struct mxser_port *info = tty->driver_data;
  569. unsigned cflag, cval, fcr;
  570. int ret = 0;
  571. unsigned char status;
  572. cflag = tty->termios->c_cflag;
  573. if (!info->ioaddr)
  574. return ret;
  575. if (mxser_set_baud_method[tty->index] == 0)
  576. mxser_set_baud(tty, tty_get_baud_rate(tty));
  577. /* byte size and parity */
  578. switch (cflag & CSIZE) {
  579. case CS5:
  580. cval = 0x00;
  581. break;
  582. case CS6:
  583. cval = 0x01;
  584. break;
  585. case CS7:
  586. cval = 0x02;
  587. break;
  588. case CS8:
  589. cval = 0x03;
  590. break;
  591. default:
  592. cval = 0x00;
  593. break; /* too keep GCC shut... */
  594. }
  595. if (cflag & CSTOPB)
  596. cval |= 0x04;
  597. if (cflag & PARENB)
  598. cval |= UART_LCR_PARITY;
  599. if (!(cflag & PARODD))
  600. cval |= UART_LCR_EPAR;
  601. if (cflag & CMSPAR)
  602. cval |= UART_LCR_SPAR;
  603. if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
  604. if (info->board->chip_flag) {
  605. fcr = UART_FCR_ENABLE_FIFO;
  606. fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
  607. mxser_set_must_fifo_value(info);
  608. } else
  609. fcr = 0;
  610. } else {
  611. fcr = UART_FCR_ENABLE_FIFO;
  612. if (info->board->chip_flag) {
  613. fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
  614. mxser_set_must_fifo_value(info);
  615. } else {
  616. switch (info->rx_trigger) {
  617. case 1:
  618. fcr |= UART_FCR_TRIGGER_1;
  619. break;
  620. case 4:
  621. fcr |= UART_FCR_TRIGGER_4;
  622. break;
  623. case 8:
  624. fcr |= UART_FCR_TRIGGER_8;
  625. break;
  626. default:
  627. fcr |= UART_FCR_TRIGGER_14;
  628. break;
  629. }
  630. }
  631. }
  632. /* CTS flow control flag and modem status interrupts */
  633. info->IER &= ~UART_IER_MSI;
  634. info->MCR &= ~UART_MCR_AFE;
  635. if (cflag & CRTSCTS) {
  636. info->port.flags |= ASYNC_CTS_FLOW;
  637. info->IER |= UART_IER_MSI;
  638. if ((info->type == PORT_16550A) || (info->board->chip_flag)) {
  639. info->MCR |= UART_MCR_AFE;
  640. } else {
  641. status = inb(info->ioaddr + UART_MSR);
  642. if (tty->hw_stopped) {
  643. if (status & UART_MSR_CTS) {
  644. tty->hw_stopped = 0;
  645. if (info->type != PORT_16550A &&
  646. !info->board->chip_flag) {
  647. outb(info->IER & ~UART_IER_THRI,
  648. info->ioaddr +
  649. UART_IER);
  650. info->IER |= UART_IER_THRI;
  651. outb(info->IER, info->ioaddr +
  652. UART_IER);
  653. }
  654. tty_wakeup(tty);
  655. }
  656. } else {
  657. if (!(status & UART_MSR_CTS)) {
  658. tty->hw_stopped = 1;
  659. if ((info->type != PORT_16550A) &&
  660. (!info->board->chip_flag)) {
  661. info->IER &= ~UART_IER_THRI;
  662. outb(info->IER, info->ioaddr +
  663. UART_IER);
  664. }
  665. }
  666. }
  667. }
  668. } else {
  669. info->port.flags &= ~ASYNC_CTS_FLOW;
  670. }
  671. outb(info->MCR, info->ioaddr + UART_MCR);
  672. if (cflag & CLOCAL) {
  673. info->port.flags &= ~ASYNC_CHECK_CD;
  674. } else {
  675. info->port.flags |= ASYNC_CHECK_CD;
  676. info->IER |= UART_IER_MSI;
  677. }
  678. outb(info->IER, info->ioaddr + UART_IER);
  679. /*
  680. * Set up parity check flag
  681. */
  682. info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
  683. if (I_INPCK(tty))
  684. info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
  685. if (I_BRKINT(tty) || I_PARMRK(tty))
  686. info->read_status_mask |= UART_LSR_BI;
  687. info->ignore_status_mask = 0;
  688. if (I_IGNBRK(tty)) {
  689. info->ignore_status_mask |= UART_LSR_BI;
  690. info->read_status_mask |= UART_LSR_BI;
  691. /*
  692. * If we're ignore parity and break indicators, ignore
  693. * overruns too. (For real raw support).
  694. */
  695. if (I_IGNPAR(tty)) {
  696. info->ignore_status_mask |=
  697. UART_LSR_OE |
  698. UART_LSR_PE |
  699. UART_LSR_FE;
  700. info->read_status_mask |=
  701. UART_LSR_OE |
  702. UART_LSR_PE |
  703. UART_LSR_FE;
  704. }
  705. }
  706. if (info->board->chip_flag) {
  707. mxser_set_must_xon1_value(info->ioaddr, START_CHAR(tty));
  708. mxser_set_must_xoff1_value(info->ioaddr, STOP_CHAR(tty));
  709. if (I_IXON(tty)) {
  710. mxser_enable_must_rx_software_flow_control(
  711. info->ioaddr);
  712. } else {
  713. mxser_disable_must_rx_software_flow_control(
  714. info->ioaddr);
  715. }
  716. if (I_IXOFF(tty)) {
  717. mxser_enable_must_tx_software_flow_control(
  718. info->ioaddr);
  719. } else {
  720. mxser_disable_must_tx_software_flow_control(
  721. info->ioaddr);
  722. }
  723. }
  724. outb(fcr, info->ioaddr + UART_FCR); /* set fcr */
  725. outb(cval, info->ioaddr + UART_LCR);
  726. return ret;
  727. }
  728. static void mxser_check_modem_status(struct tty_struct *tty,
  729. struct mxser_port *port, int status)
  730. {
  731. /* update input line counters */
  732. if (status & UART_MSR_TERI)
  733. port->icount.rng++;
  734. if (status & UART_MSR_DDSR)
  735. port->icount.dsr++;
  736. if (status & UART_MSR_DDCD)
  737. port->icount.dcd++;
  738. if (status & UART_MSR_DCTS)
  739. port->icount.cts++;
  740. port->mon_data.modem_status = status;
  741. wake_up_interruptible(&port->delta_msr_wait);
  742. if ((port->port.flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
  743. if (status & UART_MSR_DCD)
  744. wake_up_interruptible(&port->port.open_wait);
  745. }
  746. tty = tty_port_tty_get(&port->port);
  747. if (port->port.flags & ASYNC_CTS_FLOW) {
  748. if (tty->hw_stopped) {
  749. if (status & UART_MSR_CTS) {
  750. tty->hw_stopped = 0;
  751. if ((port->type != PORT_16550A) &&
  752. (!port->board->chip_flag)) {
  753. outb(port->IER & ~UART_IER_THRI,
  754. port->ioaddr + UART_IER);
  755. port->IER |= UART_IER_THRI;
  756. outb(port->IER, port->ioaddr +
  757. UART_IER);
  758. }
  759. tty_wakeup(tty);
  760. }
  761. } else {
  762. if (!(status & UART_MSR_CTS)) {
  763. tty->hw_stopped = 1;
  764. if (port->type != PORT_16550A &&
  765. !port->board->chip_flag) {
  766. port->IER &= ~UART_IER_THRI;
  767. outb(port->IER, port->ioaddr +
  768. UART_IER);
  769. }
  770. }
  771. }
  772. }
  773. }
  774. static int mxser_startup(struct tty_struct *tty)
  775. {
  776. struct mxser_port *info = tty->driver_data;
  777. unsigned long page;
  778. unsigned long flags;
  779. page = __get_free_page(GFP_KERNEL);
  780. if (!page)
  781. return -ENOMEM;
  782. spin_lock_irqsave(&info->slock, flags);
  783. if (info->port.flags & ASYNC_INITIALIZED) {
  784. free_page(page);
  785. spin_unlock_irqrestore(&info->slock, flags);
  786. return 0;
  787. }
  788. if (!info->ioaddr || !info->type) {
  789. set_bit(TTY_IO_ERROR, &tty->flags);
  790. free_page(page);
  791. spin_unlock_irqrestore(&info->slock, flags);
  792. return 0;
  793. }
  794. if (info->port.xmit_buf)
  795. free_page(page);
  796. else
  797. info->port.xmit_buf = (unsigned char *) page;
  798. /*
  799. * Clear the FIFO buffers and disable them
  800. * (they will be reenabled in mxser_change_speed())
  801. */
  802. if (info->board->chip_flag)
  803. outb((UART_FCR_CLEAR_RCVR |
  804. UART_FCR_CLEAR_XMIT |
  805. MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR);
  806. else
  807. outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
  808. info->ioaddr + UART_FCR);
  809. /*
  810. * At this point there's no way the LSR could still be 0xFF;
  811. * if it is, then bail out, because there's likely no UART
  812. * here.
  813. */
  814. if (inb(info->ioaddr + UART_LSR) == 0xff) {
  815. spin_unlock_irqrestore(&info->slock, flags);
  816. if (capable(CAP_SYS_ADMIN)) {
  817. if (tty)
  818. set_bit(TTY_IO_ERROR, &tty->flags);
  819. return 0;
  820. } else
  821. return -ENODEV;
  822. }
  823. /*
  824. * Clear the interrupt registers.
  825. */
  826. (void) inb(info->ioaddr + UART_LSR);
  827. (void) inb(info->ioaddr + UART_RX);
  828. (void) inb(info->ioaddr + UART_IIR);
  829. (void) inb(info->ioaddr + UART_MSR);
  830. /*
  831. * Now, initialize the UART
  832. */
  833. outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */
  834. info->MCR = UART_MCR_DTR | UART_MCR_RTS;
  835. outb(info->MCR, info->ioaddr + UART_MCR);
  836. /*
  837. * Finally, enable interrupts
  838. */
  839. info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
  840. if (info->board->chip_flag)
  841. info->IER |= MOXA_MUST_IER_EGDAI;
  842. outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */
  843. /*
  844. * And clear the interrupt registers again for luck.
  845. */
  846. (void) inb(info->ioaddr + UART_LSR);
  847. (void) inb(info->ioaddr + UART_RX);
  848. (void) inb(info->ioaddr + UART_IIR);
  849. (void) inb(info->ioaddr + UART_MSR);
  850. clear_bit(TTY_IO_ERROR, &tty->flags);
  851. info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
  852. /*
  853. * and set the speed of the serial port
  854. */
  855. mxser_change_speed(tty, NULL);
  856. info->port.flags |= ASYNC_INITIALIZED;
  857. spin_unlock_irqrestore(&info->slock, flags);
  858. return 0;
  859. }
  860. /*
  861. * This routine will shutdown a serial port; interrupts maybe disabled, and
  862. * DTR is dropped if the hangup on close termio flag is on.
  863. */
  864. static void mxser_shutdown(struct tty_struct *tty)
  865. {
  866. struct mxser_port *info = tty->driver_data;
  867. unsigned long flags;
  868. if (!(info->port.flags & ASYNC_INITIALIZED))
  869. return;
  870. spin_lock_irqsave(&info->slock, flags);
  871. /*
  872. * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
  873. * here so the queue might never be waken up
  874. */
  875. wake_up_interruptible(&info->delta_msr_wait);
  876. /*
  877. * Free the IRQ, if necessary
  878. */
  879. if (info->port.xmit_buf) {
  880. free_page((unsigned long) info->port.xmit_buf);
  881. info->port.xmit_buf = NULL;
  882. }
  883. info->IER = 0;
  884. outb(0x00, info->ioaddr + UART_IER);
  885. if (tty->termios->c_cflag & HUPCL)
  886. info->MCR &= ~(UART_MCR_DTR | UART_MCR_RTS);
  887. outb(info->MCR, info->ioaddr + UART_MCR);
  888. /* clear Rx/Tx FIFO's */
  889. if (info->board->chip_flag)
  890. outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT |
  891. MOXA_MUST_FCR_GDA_MODE_ENABLE,
  892. info->ioaddr + UART_FCR);
  893. else
  894. outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
  895. info->ioaddr + UART_FCR);
  896. /* read data port to reset things */
  897. (void) inb(info->ioaddr + UART_RX);
  898. set_bit(TTY_IO_ERROR, &tty->flags);
  899. info->port.flags &= ~ASYNC_INITIALIZED;
  900. if (info->board->chip_flag)
  901. SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr);
  902. spin_unlock_irqrestore(&info->slock, flags);
  903. }
  904. /*
  905. * This routine is called whenever a serial port is opened. It
  906. * enables interrupts for a serial port, linking in its async structure into
  907. * the IRQ chain. It also performs the serial-specific
  908. * initialization for the tty structure.
  909. */
  910. static int mxser_open(struct tty_struct *tty, struct file *filp)
  911. {
  912. struct mxser_port *info;
  913. unsigned long flags;
  914. int retval, line;
  915. line = tty->index;
  916. if (line == MXSER_PORTS)
  917. return 0;
  918. if (line < 0 || line > MXSER_PORTS)
  919. return -ENODEV;
  920. info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD];
  921. if (!info->ioaddr)
  922. return -ENODEV;
  923. tty->driver_data = info;
  924. tty_port_tty_set(&info->port, tty);
  925. /*
  926. * Start up serial port
  927. */
  928. spin_lock_irqsave(&info->slock, flags);
  929. info->port.count++;
  930. spin_unlock_irqrestore(&info->slock, flags);
  931. retval = mxser_startup(tty);
  932. if (retval)
  933. return retval;
  934. retval = mxser_block_til_ready(tty, filp, info);
  935. if (retval)
  936. return retval;
  937. /* unmark here for very high baud rate (ex. 921600 bps) used */
  938. tty->low_latency = 1;
  939. return 0;
  940. }
  941. static void mxser_flush_buffer(struct tty_struct *tty)
  942. {
  943. struct mxser_port *info = tty->driver_data;
  944. char fcr;
  945. unsigned long flags;
  946. spin_lock_irqsave(&info->slock, flags);
  947. info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
  948. fcr = inb(info->ioaddr + UART_FCR);
  949. outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
  950. info->ioaddr + UART_FCR);
  951. outb(fcr, info->ioaddr + UART_FCR);
  952. spin_unlock_irqrestore(&info->slock, flags);
  953. tty_wakeup(tty);
  954. }
  955. /*
  956. * This routine is called when the serial port gets closed. First, we
  957. * wait for the last remaining data to be sent. Then, we unlink its
  958. * async structure from the interrupt chain if necessary, and we free
  959. * that IRQ if nothing is left in the chain.
  960. */
  961. static void mxser_close(struct tty_struct *tty, struct file *filp)
  962. {
  963. struct mxser_port *info = tty->driver_data;
  964. unsigned long timeout;
  965. unsigned long flags;
  966. if (tty->index == MXSER_PORTS)
  967. return;
  968. if (!info)
  969. return;
  970. spin_lock_irqsave(&info->slock, flags);
  971. if (tty_hung_up_p(filp)) {
  972. spin_unlock_irqrestore(&info->slock, flags);
  973. return;
  974. }
  975. if ((tty->count == 1) && (info->port.count != 1)) {
  976. /*
  977. * Uh, oh. tty->count is 1, which means that the tty
  978. * structure will be freed. Info->port.count should always
  979. * be one in these conditions. If it's greater than
  980. * one, we've got real problems, since it means the
  981. * serial port won't be shutdown.
  982. */
  983. printk(KERN_ERR "mxser_close: bad serial port count; "
  984. "tty->count is 1, info->port.count is %d\n", info->port.count);
  985. info->port.count = 1;
  986. }
  987. if (--info->port.count < 0) {
  988. printk(KERN_ERR "mxser_close: bad serial port count for "
  989. "ttys%d: %d\n", tty->index, info->port.count);
  990. info->port.count = 0;
  991. }
  992. if (info->port.count) {
  993. spin_unlock_irqrestore(&info->slock, flags);
  994. return;
  995. }
  996. info->port.flags |= ASYNC_CLOSING;
  997. spin_unlock_irqrestore(&info->slock, flags);
  998. /*
  999. * Save the termios structure, since this port may have
  1000. * separate termios for callout and dialin.
  1001. */
  1002. if (info->port.flags & ASYNC_NORMAL_ACTIVE)
  1003. info->normal_termios = *tty->termios;
  1004. /*
  1005. * Now we wait for the transmit buffer to clear; and we notify
  1006. * the line discipline to only process XON/XOFF characters.
  1007. */
  1008. tty->closing = 1;
  1009. if (info->port.closing_wait != ASYNC_CLOSING_WAIT_NONE)
  1010. tty_wait_until_sent(tty, info->port.closing_wait);
  1011. /*
  1012. * At this point we stop accepting input. To do this, we
  1013. * disable the receive line status interrupts, and tell the
  1014. * interrupt driver to stop checking the data ready bit in the
  1015. * line status register.
  1016. */
  1017. info->IER &= ~UART_IER_RLSI;
  1018. if (info->board->chip_flag)
  1019. info->IER &= ~MOXA_MUST_RECV_ISR;
  1020. if (info->port.flags & ASYNC_INITIALIZED) {
  1021. outb(info->IER, info->ioaddr + UART_IER);
  1022. /*
  1023. * Before we drop DTR, make sure the UART transmitter
  1024. * has completely drained; this is especially
  1025. * important if there is a transmit FIFO!
  1026. */
  1027. timeout = jiffies + HZ;
  1028. while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) {
  1029. schedule_timeout_interruptible(5);
  1030. if (time_after(jiffies, timeout))
  1031. break;
  1032. }
  1033. }
  1034. mxser_shutdown(tty);
  1035. mxser_flush_buffer(tty);
  1036. tty_ldisc_flush(tty);
  1037. tty->closing = 0;
  1038. tty_port_tty_set(&info->port, NULL);
  1039. if (info->port.blocked_open) {
  1040. if (info->port.close_delay)
  1041. schedule_timeout_interruptible(info->port.close_delay);
  1042. wake_up_interruptible(&info->port.open_wait);
  1043. }
  1044. info->port.flags &= ~(ASYNC_NORMAL_ACTIVE | ASYNC_CLOSING);
  1045. }
  1046. static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
  1047. {
  1048. int c, total = 0;
  1049. struct mxser_port *info = tty->driver_data;
  1050. unsigned long flags;
  1051. if (!info->port.xmit_buf)
  1052. return 0;
  1053. while (1) {
  1054. c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
  1055. SERIAL_XMIT_SIZE - info->xmit_head));
  1056. if (c <= 0)
  1057. break;
  1058. memcpy(info->port.xmit_buf + info->xmit_head, buf, c);
  1059. spin_lock_irqsave(&info->slock, flags);
  1060. info->xmit_head = (info->xmit_head + c) &
  1061. (SERIAL_XMIT_SIZE - 1);
  1062. info->xmit_cnt += c;
  1063. spin_unlock_irqrestore(&info->slock, flags);
  1064. buf += c;
  1065. count -= c;
  1066. total += c;
  1067. }
  1068. if (info->xmit_cnt && !tty->stopped) {
  1069. if (!tty->hw_stopped ||
  1070. (info->type == PORT_16550A) ||
  1071. (info->board->chip_flag)) {
  1072. spin_lock_irqsave(&info->slock, flags);
  1073. outb(info->IER & ~UART_IER_THRI, info->ioaddr +
  1074. UART_IER);
  1075. info->IER |= UART_IER_THRI;
  1076. outb(info->IER, info->ioaddr + UART_IER);
  1077. spin_unlock_irqrestore(&info->slock, flags);
  1078. }
  1079. }
  1080. return total;
  1081. }
  1082. static int mxser_put_char(struct tty_struct *tty, unsigned char ch)
  1083. {
  1084. struct mxser_port *info = tty->driver_data;
  1085. unsigned long flags;
  1086. if (!info->port.xmit_buf)
  1087. return 0;
  1088. if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
  1089. return 0;
  1090. spin_lock_irqsave(&info->slock, flags);
  1091. info->port.xmit_buf[info->xmit_head++] = ch;
  1092. info->xmit_head &= SERIAL_XMIT_SIZE - 1;
  1093. info->xmit_cnt++;
  1094. spin_unlock_irqrestore(&info->slock, flags);
  1095. if (!tty->stopped) {
  1096. if (!tty->hw_stopped ||
  1097. (info->type == PORT_16550A) ||
  1098. info->board->chip_flag) {
  1099. spin_lock_irqsave(&info->slock, flags);
  1100. outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
  1101. info->IER |= UART_IER_THRI;
  1102. outb(info->IER, info->ioaddr + UART_IER);
  1103. spin_unlock_irqrestore(&info->slock, flags);
  1104. }
  1105. }
  1106. return 1;
  1107. }
  1108. static void mxser_flush_chars(struct tty_struct *tty)
  1109. {
  1110. struct mxser_port *info = tty->driver_data;
  1111. unsigned long flags;
  1112. if (info->xmit_cnt <= 0 || tty->stopped || !info->port.xmit_buf ||
  1113. (tty->hw_stopped && info->type != PORT_16550A &&
  1114. !info->board->chip_flag))
  1115. return;
  1116. spin_lock_irqsave(&info->slock, flags);
  1117. outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
  1118. info->IER |= UART_IER_THRI;
  1119. outb(info->IER, info->ioaddr + UART_IER);
  1120. spin_unlock_irqrestore(&info->slock, flags);
  1121. }
  1122. static int mxser_write_room(struct tty_struct *tty)
  1123. {
  1124. struct mxser_port *info = tty->driver_data;
  1125. int ret;
  1126. ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
  1127. return ret < 0 ? 0 : ret;
  1128. }
  1129. static int mxser_chars_in_buffer(struct tty_struct *tty)
  1130. {
  1131. struct mxser_port *info = tty->driver_data;
  1132. return info->xmit_cnt;
  1133. }
  1134. /*
  1135. * ------------------------------------------------------------
  1136. * friends of mxser_ioctl()
  1137. * ------------------------------------------------------------
  1138. */
  1139. static int mxser_get_serial_info(struct tty_struct *tty,
  1140. struct serial_struct __user *retinfo)
  1141. {
  1142. struct mxser_port *info = tty->driver_data;
  1143. struct serial_struct tmp = {
  1144. .type = info->type,
  1145. .line = tty->index,
  1146. .port = info->ioaddr,
  1147. .irq = info->board->irq,
  1148. .flags = info->port.flags,
  1149. .baud_base = info->baud_base,
  1150. .close_delay = info->port.close_delay,
  1151. .closing_wait = info->port.closing_wait,
  1152. .custom_divisor = info->custom_divisor,
  1153. .hub6 = 0
  1154. };
  1155. if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
  1156. return -EFAULT;
  1157. return 0;
  1158. }
  1159. static int mxser_set_serial_info(struct tty_struct *tty,
  1160. struct serial_struct __user *new_info)
  1161. {
  1162. struct mxser_port *info = tty->driver_data;
  1163. struct serial_struct new_serial;
  1164. speed_t baud;
  1165. unsigned long sl_flags;
  1166. unsigned int flags;
  1167. int retval = 0;
  1168. if (!new_info || !info->ioaddr)
  1169. return -ENODEV;
  1170. if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
  1171. return -EFAULT;
  1172. if (new_serial.irq != info->board->irq ||
  1173. new_serial.port != info->ioaddr)
  1174. return -EINVAL;
  1175. flags = info->port.flags & ASYNC_SPD_MASK;
  1176. if (!capable(CAP_SYS_ADMIN)) {
  1177. if ((new_serial.baud_base != info->baud_base) ||
  1178. (new_serial.close_delay != info->port.close_delay) ||
  1179. ((new_serial.flags & ~ASYNC_USR_MASK) != (info->port.flags & ~ASYNC_USR_MASK)))
  1180. return -EPERM;
  1181. info->port.flags = ((info->port.flags & ~ASYNC_USR_MASK) |
  1182. (new_serial.flags & ASYNC_USR_MASK));
  1183. } else {
  1184. /*
  1185. * OK, past this point, all the error checking has been done.
  1186. * At this point, we start making changes.....
  1187. */
  1188. info->port.flags = ((info->port.flags & ~ASYNC_FLAGS) |
  1189. (new_serial.flags & ASYNC_FLAGS));
  1190. info->port.close_delay = new_serial.close_delay * HZ / 100;
  1191. info->port.closing_wait = new_serial.closing_wait * HZ / 100;
  1192. tty->low_latency = (info->port.flags & ASYNC_LOW_LATENCY)
  1193. ? 1 : 0;
  1194. if ((info->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST &&
  1195. (new_serial.baud_base != info->baud_base ||
  1196. new_serial.custom_divisor !=
  1197. info->custom_divisor)) {
  1198. baud = new_serial.baud_base / new_serial.custom_divisor;
  1199. tty_encode_baud_rate(tty, baud, baud);
  1200. }
  1201. }
  1202. info->type = new_serial.type;
  1203. process_txrx_fifo(info);
  1204. if (info->port.flags & ASYNC_INITIALIZED) {
  1205. if (flags != (info->port.flags & ASYNC_SPD_MASK)) {
  1206. spin_lock_irqsave(&info->slock, sl_flags);
  1207. mxser_change_speed(tty, NULL);
  1208. spin_unlock_irqrestore(&info->slock, sl_flags);
  1209. }
  1210. } else
  1211. retval = mxser_startup(tty);
  1212. return retval;
  1213. }
  1214. /*
  1215. * mxser_get_lsr_info - get line status register info
  1216. *
  1217. * Purpose: Let user call ioctl() to get info when the UART physically
  1218. * is emptied. On bus types like RS485, the transmitter must
  1219. * release the bus after transmitting. This must be done when
  1220. * the transmit shift register is empty, not be done when the
  1221. * transmit holding register is empty. This functionality
  1222. * allows an RS485 driver to be written in user space.
  1223. */
  1224. static int mxser_get_lsr_info(struct mxser_port *info,
  1225. unsigned int __user *value)
  1226. {
  1227. unsigned char status;
  1228. unsigned int result;
  1229. unsigned long flags;
  1230. spin_lock_irqsave(&info->slock, flags);
  1231. status = inb(info->ioaddr + UART_LSR);
  1232. spin_unlock_irqrestore(&info->slock, flags);
  1233. result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
  1234. return put_user(result, value);
  1235. }
  1236. static int mxser_tiocmget(struct tty_struct *tty, struct file *file)
  1237. {
  1238. struct mxser_port *info = tty->driver_data;
  1239. unsigned char control, status;
  1240. unsigned long flags;
  1241. if (tty->index == MXSER_PORTS)
  1242. return -ENOIOCTLCMD;
  1243. if (test_bit(TTY_IO_ERROR, &tty->flags))
  1244. return -EIO;
  1245. control = info->MCR;
  1246. spin_lock_irqsave(&info->slock, flags);
  1247. status = inb(info->ioaddr + UART_MSR);
  1248. if (status & UART_MSR_ANY_DELTA)
  1249. mxser_check_modem_status(tty, info, status);
  1250. spin_unlock_irqrestore(&info->slock, flags);
  1251. return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
  1252. ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
  1253. ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
  1254. ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
  1255. ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
  1256. ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
  1257. }
  1258. static int mxser_tiocmset(struct tty_struct *tty, struct file *file,
  1259. unsigned int set, unsigned int clear)
  1260. {
  1261. struct mxser_port *info = tty->driver_data;
  1262. unsigned long flags;
  1263. if (tty->index == MXSER_PORTS)
  1264. return -ENOIOCTLCMD;
  1265. if (test_bit(TTY_IO_ERROR, &tty->flags))
  1266. return -EIO;
  1267. spin_lock_irqsave(&info->slock, flags);
  1268. if (set & TIOCM_RTS)
  1269. info->MCR |= UART_MCR_RTS;
  1270. if (set & TIOCM_DTR)
  1271. info->MCR |= UART_MCR_DTR;
  1272. if (clear & TIOCM_RTS)
  1273. info->MCR &= ~UART_MCR_RTS;
  1274. if (clear & TIOCM_DTR)
  1275. info->MCR &= ~UART_MCR_DTR;
  1276. outb(info->MCR, info->ioaddr + UART_MCR);
  1277. spin_unlock_irqrestore(&info->slock, flags);
  1278. return 0;
  1279. }
  1280. static int __init mxser_program_mode(int port)
  1281. {
  1282. int id, i, j, n;
  1283. outb(0, port);
  1284. outb(0, port);
  1285. outb(0, port);
  1286. (void)inb(port);
  1287. (void)inb(port);
  1288. outb(0, port);
  1289. (void)inb(port);
  1290. id = inb(port + 1) & 0x1F;
  1291. if ((id != C168_ASIC_ID) &&
  1292. (id != C104_ASIC_ID) &&
  1293. (id != C102_ASIC_ID) &&
  1294. (id != CI132_ASIC_ID) &&
  1295. (id != CI134_ASIC_ID) &&
  1296. (id != CI104J_ASIC_ID))
  1297. return -1;
  1298. for (i = 0, j = 0; i < 4; i++) {
  1299. n = inb(port + 2);
  1300. if (n == 'M') {
  1301. j = 1;
  1302. } else if ((j == 1) && (n == 1)) {
  1303. j = 2;
  1304. break;
  1305. } else
  1306. j = 0;
  1307. }
  1308. if (j != 2)
  1309. id = -2;
  1310. return id;
  1311. }
  1312. static void __init mxser_normal_mode(int port)
  1313. {
  1314. int i, n;
  1315. outb(0xA5, port + 1);
  1316. outb(0x80, port + 3);
  1317. outb(12, port + 0); /* 9600 bps */
  1318. outb(0, port + 1);
  1319. outb(0x03, port + 3); /* 8 data bits */
  1320. outb(0x13, port + 4); /* loop back mode */
  1321. for (i = 0; i < 16; i++) {
  1322. n = inb(port + 5);
  1323. if ((n & 0x61) == 0x60)
  1324. break;
  1325. if ((n & 1) == 1)
  1326. (void)inb(port);
  1327. }
  1328. outb(0x00, port + 4);
  1329. }
  1330. #define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
  1331. #define CHIP_DO 0x02 /* Serial Data Output in Eprom */
  1332. #define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
  1333. #define CHIP_DI 0x08 /* Serial Data Input in Eprom */
  1334. #define EN_CCMD 0x000 /* Chip's command register */
  1335. #define EN0_RSARLO 0x008 /* Remote start address reg 0 */
  1336. #define EN0_RSARHI 0x009 /* Remote start address reg 1 */
  1337. #define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
  1338. #define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
  1339. #define EN0_DCFG 0x00E /* Data configuration reg WR */
  1340. #define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
  1341. #define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
  1342. #define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
  1343. static int __init mxser_read_register(int port, unsigned short *regs)
  1344. {
  1345. int i, k, value, id;
  1346. unsigned int j;
  1347. id = mxser_program_mode(port);
  1348. if (id < 0)
  1349. return id;
  1350. for (i = 0; i < 14; i++) {
  1351. k = (i & 0x3F) | 0x180;
  1352. for (j = 0x100; j > 0; j >>= 1) {
  1353. outb(CHIP_CS, port);
  1354. if (k & j) {
  1355. outb(CHIP_CS | CHIP_DO, port);
  1356. outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
  1357. } else {
  1358. outb(CHIP_CS, port);
  1359. outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
  1360. }
  1361. }
  1362. (void)inb(port);
  1363. value = 0;
  1364. for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
  1365. outb(CHIP_CS, port);
  1366. outb(CHIP_CS | CHIP_SK, port);
  1367. if (inb(port) & CHIP_DI)
  1368. value |= j;
  1369. }
  1370. regs[i] = value;
  1371. outb(0, port);
  1372. }
  1373. mxser_normal_mode(port);
  1374. return id;
  1375. }
  1376. static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
  1377. {
  1378. struct mxser_port *port;
  1379. struct tty_struct *tty;
  1380. int result, status;
  1381. unsigned int i, j;
  1382. int ret = 0;
  1383. switch (cmd) {
  1384. case MOXA_GET_MAJOR:
  1385. if (printk_ratelimit())
  1386. printk(KERN_WARNING "mxser: '%s' uses deprecated ioctl "
  1387. "%x (GET_MAJOR), fix your userspace\n",
  1388. current->comm, cmd);
  1389. return put_user(ttymajor, (int __user *)argp);
  1390. case MOXA_CHKPORTENABLE:
  1391. result = 0;
  1392. lock_kernel();
  1393. for (i = 0; i < MXSER_BOARDS; i++)
  1394. for (j = 0; j < MXSER_PORTS_PER_BOARD; j++)
  1395. if (mxser_boards[i].ports[j].ioaddr)
  1396. result |= (1 << i);
  1397. unlock_kernel();
  1398. return put_user(result, (unsigned long __user *)argp);
  1399. case MOXA_GETDATACOUNT:
  1400. lock_kernel();
  1401. if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
  1402. ret = -EFAULT;
  1403. unlock_kernel();
  1404. return ret;
  1405. case MOXA_GETMSTATUS: {
  1406. struct mxser_mstatus ms, __user *msu = argp;
  1407. lock_kernel();
  1408. for (i = 0; i < MXSER_BOARDS; i++)
  1409. for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
  1410. port = &mxser_boards[i].ports[j];
  1411. memset(&ms, 0, sizeof(ms));
  1412. if (!port->ioaddr)
  1413. goto copy;
  1414. tty = tty_port_tty_get(&port->port);
  1415. if (!tty || !tty->termios)
  1416. ms.cflag = port->normal_termios.c_cflag;
  1417. else
  1418. ms.cflag = tty->termios->c_cflag;
  1419. tty_kref_put(tty);
  1420. status = inb(port->ioaddr + UART_MSR);
  1421. if (status & UART_MSR_DCD)
  1422. ms.dcd = 1;
  1423. if (status & UART_MSR_DSR)
  1424. ms.dsr = 1;
  1425. if (status & UART_MSR_CTS)
  1426. ms.cts = 1;
  1427. copy:
  1428. if (copy_to_user(msu, &ms, sizeof(ms))) {
  1429. unlock_kernel();
  1430. return -EFAULT;
  1431. }
  1432. msu++;
  1433. }
  1434. unlock_kernel();
  1435. return 0;
  1436. }
  1437. case MOXA_ASPP_MON_EXT: {
  1438. struct mxser_mon_ext *me; /* it's 2k, stack unfriendly */
  1439. unsigned int cflag, iflag, p;
  1440. u8 opmode;
  1441. me = kzalloc(sizeof(*me), GFP_KERNEL);
  1442. if (!me)
  1443. return -ENOMEM;
  1444. lock_kernel();
  1445. for (i = 0, p = 0; i < MXSER_BOARDS; i++) {
  1446. for (j = 0; j < MXSER_PORTS_PER_BOARD; j++, p++) {
  1447. if (p >= ARRAY_SIZE(me->rx_cnt)) {
  1448. i = MXSER_BOARDS;
  1449. break;
  1450. }
  1451. port = &mxser_boards[i].ports[j];
  1452. if (!port->ioaddr)
  1453. continue;
  1454. status = mxser_get_msr(port->ioaddr, 0, p);
  1455. if (status & UART_MSR_TERI)
  1456. port->icount.rng++;
  1457. if (status & UART_MSR_DDSR)
  1458. port->icount.dsr++;
  1459. if (status & UART_MSR_DDCD)
  1460. port->icount.dcd++;
  1461. if (status & UART_MSR_DCTS)
  1462. port->icount.cts++;
  1463. port->mon_data.modem_status = status;
  1464. me->rx_cnt[p] = port->mon_data.rxcnt;
  1465. me->tx_cnt[p] = port->mon_data.txcnt;
  1466. me->up_rxcnt[p] = port->mon_data.up_rxcnt;
  1467. me->up_txcnt[p] = port->mon_data.up_txcnt;
  1468. me->modem_status[p] =
  1469. port->mon_data.modem_status;
  1470. tty = tty_port_tty_get(&port->port);
  1471. if (!tty || !tty->termios) {
  1472. cflag = port->normal_termios.c_cflag;
  1473. iflag = port->normal_termios.c_iflag;
  1474. me->baudrate[p] = tty_termios_baud_rate(&port->normal_termios);
  1475. } else {
  1476. cflag = tty->termios->c_cflag;
  1477. iflag = tty->termios->c_iflag;
  1478. me->baudrate[p] = tty_get_baud_rate(tty);
  1479. }
  1480. tty_kref_put(tty);
  1481. me->databits[p] = cflag & CSIZE;
  1482. me->stopbits[p] = cflag & CSTOPB;
  1483. me->parity[p] = cflag & (PARENB | PARODD |
  1484. CMSPAR);
  1485. if (cflag & CRTSCTS)
  1486. me->flowctrl[p] |= 0x03;
  1487. if (iflag & (IXON | IXOFF))
  1488. me->flowctrl[p] |= 0x0C;
  1489. if (port->type == PORT_16550A)
  1490. me->fifo[p] = 1;
  1491. opmode = inb(port->opmode_ioaddr) >>
  1492. ((p % 4) * 2);
  1493. opmode &= OP_MODE_MASK;
  1494. me->iftype[p] = opmode;
  1495. }
  1496. }
  1497. unlock_kernel();
  1498. if (copy_to_user(argp, me, sizeof(*me)))
  1499. ret = -EFAULT;
  1500. kfree(me);
  1501. return ret;
  1502. }
  1503. default:
  1504. return -ENOIOCTLCMD;
  1505. }
  1506. return 0;
  1507. }
  1508. static int mxser_cflags_changed(struct mxser_port *info, unsigned long arg,
  1509. struct async_icount *cprev)
  1510. {
  1511. struct async_icount cnow;
  1512. unsigned long flags;
  1513. int ret;
  1514. spin_lock_irqsave(&info->slock, flags);
  1515. cnow = info->icount; /* atomic copy */
  1516. spin_unlock_irqrestore(&info->slock, flags);
  1517. ret = ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) ||
  1518. ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) ||
  1519. ((arg & TIOCM_CD) && (cnow.dcd != cprev->dcd)) ||
  1520. ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts));
  1521. *cprev = cnow;
  1522. return ret;
  1523. }
  1524. static int mxser_ioctl(struct tty_struct *tty, struct file *file,
  1525. unsigned int cmd, unsigned long arg)
  1526. {
  1527. struct mxser_port *info = tty->driver_data;
  1528. struct async_icount cnow;
  1529. unsigned long flags;
  1530. void __user *argp = (void __user *)arg;
  1531. int retval;
  1532. if (tty->index == MXSER_PORTS)
  1533. return mxser_ioctl_special(cmd, argp);
  1534. if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
  1535. int p;
  1536. unsigned long opmode;
  1537. static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
  1538. int shiftbit;
  1539. unsigned char val, mask;
  1540. p = tty->index % 4;
  1541. if (cmd == MOXA_SET_OP_MODE) {
  1542. if (get_user(opmode, (int __user *) argp))
  1543. return -EFAULT;
  1544. if (opmode != RS232_MODE &&
  1545. opmode != RS485_2WIRE_MODE &&
  1546. opmode != RS422_MODE &&
  1547. opmode != RS485_4WIRE_MODE)
  1548. return -EFAULT;
  1549. lock_kernel();
  1550. mask = ModeMask[p];
  1551. shiftbit = p * 2;
  1552. val = inb(info->opmode_ioaddr);
  1553. val &= mask;
  1554. val |= (opmode << shiftbit);
  1555. outb(val, info->opmode_ioaddr);
  1556. unlock_kernel();
  1557. } else {
  1558. lock_kernel();
  1559. shiftbit = p * 2;
  1560. opmode = inb(info->opmode_ioaddr) >> shiftbit;
  1561. opmode &= OP_MODE_MASK;
  1562. unlock_kernel();
  1563. if (put_user(opmode, (int __user *)argp))
  1564. return -EFAULT;
  1565. }
  1566. return 0;
  1567. }
  1568. if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT && cmd != TIOCGICOUNT &&
  1569. test_bit(TTY_IO_ERROR, &tty->flags))
  1570. return -EIO;
  1571. switch (cmd) {
  1572. case TIOCGSERIAL:
  1573. lock_kernel();
  1574. retval = mxser_get_serial_info(tty, argp);
  1575. unlock_kernel();
  1576. return retval;
  1577. case TIOCSSERIAL:
  1578. lock_kernel();
  1579. retval = mxser_set_serial_info(tty, argp);
  1580. unlock_kernel();
  1581. return retval;
  1582. case TIOCSERGETLSR: /* Get line status register */
  1583. return mxser_get_lsr_info(info, argp);
  1584. /*
  1585. * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
  1586. * - mask passed in arg for lines of interest
  1587. * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
  1588. * Caller should use TIOCGICOUNT to see which one it was
  1589. */
  1590. case TIOCMIWAIT:
  1591. spin_lock_irqsave(&info->slock, flags);
  1592. cnow = info->icount; /* note the counters on entry */
  1593. spin_unlock_irqrestore(&info->slock, flags);
  1594. return wait_event_interruptible(info->delta_msr_wait,
  1595. mxser_cflags_changed(info, arg, &cnow));
  1596. /*
  1597. * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
  1598. * Return: write counters to the user passed counter struct
  1599. * NB: both 1->0 and 0->1 transitions are counted except for
  1600. * RI where only 0->1 is counted.
  1601. */
  1602. case TIOCGICOUNT: {
  1603. struct serial_icounter_struct icnt = { 0 };
  1604. spin_lock_irqsave(&info->slock, flags);
  1605. cnow = info->icount;
  1606. spin_unlock_irqrestore(&info->slock, flags);
  1607. icnt.frame = cnow.frame;
  1608. icnt.brk = cnow.brk;
  1609. icnt.overrun = cnow.overrun;
  1610. icnt.buf_overrun = cnow.buf_overrun;
  1611. icnt.parity = cnow.parity;
  1612. icnt.rx = cnow.rx;
  1613. icnt.tx = cnow.tx;
  1614. icnt.cts = cnow.cts;
  1615. icnt.dsr = cnow.dsr;
  1616. icnt.rng = cnow.rng;
  1617. icnt.dcd = cnow.dcd;
  1618. return copy_to_user(argp, &icnt, sizeof(icnt)) ? -EFAULT : 0;
  1619. }
  1620. case MOXA_HighSpeedOn:
  1621. return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
  1622. case MOXA_SDS_RSTICOUNTER:
  1623. lock_kernel();
  1624. info->mon_data.rxcnt = 0;
  1625. info->mon_data.txcnt = 0;
  1626. unlock_kernel();
  1627. return 0;
  1628. case MOXA_ASPP_OQUEUE:{
  1629. int len, lsr;
  1630. lock_kernel();
  1631. len = mxser_chars_in_buffer(tty);
  1632. lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT;
  1633. len += (lsr ? 0 : 1);
  1634. unlock_kernel();
  1635. return put_user(len, (int __user *)argp);
  1636. }
  1637. case MOXA_ASPP_MON: {
  1638. int mcr, status;
  1639. lock_kernel();
  1640. status = mxser_get_msr(info->ioaddr, 1, tty->index);
  1641. mxser_check_modem_status(tty, info, status);
  1642. mcr = inb(info->ioaddr + UART_MCR);
  1643. if (mcr & MOXA_MUST_MCR_XON_FLAG)
  1644. info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
  1645. else
  1646. info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
  1647. if (mcr & MOXA_MUST_MCR_TX_XON)
  1648. info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
  1649. else
  1650. info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
  1651. if (tty->hw_stopped)
  1652. info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
  1653. else
  1654. info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
  1655. unlock_kernel();
  1656. if (copy_to_user(argp, &info->mon_data,
  1657. sizeof(struct mxser_mon)))
  1658. return -EFAULT;
  1659. return 0;
  1660. }
  1661. case MOXA_ASPP_LSTATUS: {
  1662. if (put_user(info->err_shadow, (unsigned char __user *)argp))
  1663. return -EFAULT;
  1664. info->err_shadow = 0;
  1665. return 0;
  1666. }
  1667. case MOXA_SET_BAUD_METHOD: {
  1668. int method;
  1669. if (get_user(method, (int __user *)argp))
  1670. return -EFAULT;
  1671. mxser_set_baud_method[tty->index] = method;
  1672. return put_user(method, (int __user *)argp);
  1673. }
  1674. default:
  1675. return -ENOIOCTLCMD;
  1676. }
  1677. return 0;
  1678. }
  1679. static void mxser_stoprx(struct tty_struct *tty)
  1680. {
  1681. struct mxser_port *info = tty->driver_data;
  1682. info->ldisc_stop_rx = 1;
  1683. if (I_IXOFF(tty)) {
  1684. if (info->board->chip_flag) {
  1685. info->IER &= ~MOXA_MUST_RECV_ISR;
  1686. outb(info->IER, info->ioaddr + UART_IER);
  1687. } else {
  1688. info->x_char = STOP_CHAR(tty);
  1689. outb(0, info->ioaddr + UART_IER);
  1690. info->IER |= UART_IER_THRI;
  1691. outb(info->IER, info->ioaddr + UART_IER);
  1692. }
  1693. }
  1694. if (tty->termios->c_cflag & CRTSCTS) {
  1695. info->MCR &= ~UART_MCR_RTS;
  1696. outb(info->MCR, info->ioaddr + UART_MCR);
  1697. }
  1698. }
  1699. /*
  1700. * This routine is called by the upper-layer tty layer to signal that
  1701. * incoming characters should be throttled.
  1702. */
  1703. static void mxser_throttle(struct tty_struct *tty)
  1704. {
  1705. mxser_stoprx(tty);
  1706. }
  1707. static void mxser_unthrottle(struct tty_struct *tty)
  1708. {
  1709. struct mxser_port *info = tty->driver_data;
  1710. /* startrx */
  1711. info->ldisc_stop_rx = 0;
  1712. if (I_IXOFF(tty)) {
  1713. if (info->x_char)
  1714. info->x_char = 0;
  1715. else {
  1716. if (info->board->chip_flag) {
  1717. info->IER |= MOXA_MUST_RECV_ISR;
  1718. outb(info->IER, info->ioaddr + UART_IER);
  1719. } else {
  1720. info->x_char = START_CHAR(tty);
  1721. outb(0, info->ioaddr + UART_IER);
  1722. info->IER |= UART_IER_THRI;
  1723. outb(info->IER, info->ioaddr + UART_IER);
  1724. }
  1725. }
  1726. }
  1727. if (tty->termios->c_cflag & CRTSCTS) {
  1728. info->MCR |= UART_MCR_RTS;
  1729. outb(info->MCR, info->ioaddr + UART_MCR);
  1730. }
  1731. }
  1732. /*
  1733. * mxser_stop() and mxser_start()
  1734. *
  1735. * This routines are called before setting or resetting tty->stopped.
  1736. * They enable or disable transmitter interrupts, as necessary.
  1737. */
  1738. static void mxser_stop(struct tty_struct *tty)
  1739. {
  1740. struct mxser_port *info = tty->driver_data;
  1741. unsigned long flags;
  1742. spin_lock_irqsave(&info->slock, flags);
  1743. if (info->IER & UART_IER_THRI) {
  1744. info->IER &= ~UART_IER_THRI;
  1745. outb(info->IER, info->ioaddr + UART_IER);
  1746. }
  1747. spin_unlock_irqrestore(&info->slock, flags);
  1748. }
  1749. static void mxser_start(struct tty_struct *tty)
  1750. {
  1751. struct mxser_port *info = tty->driver_data;
  1752. unsigned long flags;
  1753. spin_lock_irqsave(&info->slock, flags);
  1754. if (info->xmit_cnt && info->port.xmit_buf) {
  1755. outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
  1756. info->IER |= UART_IER_THRI;
  1757. outb(info->IER, info->ioaddr + UART_IER);
  1758. }
  1759. spin_unlock_irqrestore(&info->slock, flags);
  1760. }
  1761. static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
  1762. {
  1763. struct mxser_port *info = tty->driver_data;
  1764. unsigned long flags;
  1765. spin_lock_irqsave(&info->slock, flags);
  1766. mxser_change_speed(tty, old_termios);
  1767. spin_unlock_irqrestore(&info->slock, flags);
  1768. if ((old_termios->c_cflag & CRTSCTS) &&
  1769. !(tty->termios->c_cflag & CRTSCTS)) {
  1770. tty->hw_stopped = 0;
  1771. mxser_start(tty);
  1772. }
  1773. /* Handle sw stopped */
  1774. if ((old_termios->c_iflag & IXON) &&
  1775. !(tty->termios->c_iflag & IXON)) {
  1776. tty->stopped = 0;
  1777. if (info->board->chip_flag) {
  1778. spin_lock_irqsave(&info->slock, flags);
  1779. mxser_disable_must_rx_software_flow_control(
  1780. info->ioaddr);
  1781. spin_unlock_irqrestore(&info->slock, flags);
  1782. }
  1783. mxser_start(tty);
  1784. }
  1785. }
  1786. /*
  1787. * mxser_wait_until_sent() --- wait until the transmitter is empty
  1788. */
  1789. static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
  1790. {
  1791. struct mxser_port *info = tty->driver_data;
  1792. unsigned long orig_jiffies, char_time;
  1793. int lsr;
  1794. if (info->type == PORT_UNKNOWN)
  1795. return;
  1796. if (info->xmit_fifo_size == 0)
  1797. return; /* Just in case.... */
  1798. orig_jiffies = jiffies;
  1799. /*
  1800. * Set the check interval to be 1/5 of the estimated time to
  1801. * send a single character, and make it at least 1. The check
  1802. * interval should also be less than the timeout.
  1803. *
  1804. * Note: we have to use pretty tight timings here to satisfy
  1805. * the NIST-PCTS.
  1806. */
  1807. char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
  1808. char_time = char_time / 5;
  1809. if (char_time == 0)
  1810. char_time = 1;
  1811. if (timeout && timeout < char_time)
  1812. char_time = timeout;
  1813. /*
  1814. * If the transmitter hasn't cleared in twice the approximate
  1815. * amount of time to send the entire FIFO, it probably won't
  1816. * ever clear. This assumes the UART isn't doing flow
  1817. * control, which is currently the case. Hence, if it ever
  1818. * takes longer than info->timeout, this is probably due to a
  1819. * UART bug of some kind. So, we clamp the timeout parameter at
  1820. * 2*info->timeout.
  1821. */
  1822. if (!timeout || timeout > 2 * info->timeout)
  1823. timeout = 2 * info->timeout;
  1824. #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
  1825. printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...",
  1826. timeout, char_time);
  1827. printk("jiff=%lu...", jiffies);
  1828. #endif
  1829. lock_kernel();
  1830. while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) {
  1831. #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
  1832. printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
  1833. #endif
  1834. schedule_timeout_interruptible(char_time);
  1835. if (signal_pending(current))
  1836. break;
  1837. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  1838. break;
  1839. }
  1840. set_current_state(TASK_RUNNING);
  1841. unlock_kernel();
  1842. #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
  1843. printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
  1844. #endif
  1845. }
  1846. /*
  1847. * This routine is called by tty_hangup() when a hangup is signaled.
  1848. */
  1849. static void mxser_hangup(struct tty_struct *tty)
  1850. {
  1851. struct mxser_port *info = tty->driver_data;
  1852. mxser_flush_buffer(tty);
  1853. mxser_shutdown(tty);
  1854. info->port.count = 0;
  1855. info->port.flags &= ~ASYNC_NORMAL_ACTIVE;
  1856. tty_port_tty_set(&info->port, NULL);
  1857. wake_up_interruptible(&info->port.open_wait);
  1858. }
  1859. /*
  1860. * mxser_rs_break() --- routine which turns the break handling on or off
  1861. */
  1862. static int mxser_rs_break(struct tty_struct *tty, int break_state)
  1863. {
  1864. struct mxser_port *info = tty->driver_data;
  1865. unsigned long flags;
  1866. spin_lock_irqsave(&info->slock, flags);
  1867. if (break_state == -1)
  1868. outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,
  1869. info->ioaddr + UART_LCR);
  1870. else
  1871. outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,
  1872. info->ioaddr + UART_LCR);
  1873. spin_unlock_irqrestore(&info->slock, flags);
  1874. return 0;
  1875. }
  1876. static void mxser_receive_chars(struct tty_struct *tty,
  1877. struct mxser_port *port, int *status)
  1878. {
  1879. unsigned char ch, gdl;
  1880. int ignored = 0;
  1881. int cnt = 0;
  1882. int recv_room;
  1883. int max = 256;
  1884. recv_room = tty->receive_room;
  1885. if (recv_room == 0 && !port->ldisc_stop_rx)
  1886. mxser_stoprx(tty);
  1887. if (port->board->chip_flag != MOXA_OTHER_UART) {
  1888. if (*status & UART_LSR_SPECIAL)
  1889. goto intr_old;
  1890. if (port->board->chip_flag == MOXA_MUST_MU860_HWID &&
  1891. (*status & MOXA_MUST_LSR_RERR))
  1892. goto intr_old;
  1893. if (*status & MOXA_MUST_LSR_RERR)
  1894. goto intr_old;
  1895. gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER);
  1896. if (port->board->chip_flag == MOXA_MUST_MU150_HWID)
  1897. gdl &= MOXA_MUST_GDL_MASK;
  1898. if (gdl >= recv_room) {
  1899. if (!port->ldisc_stop_rx)
  1900. mxser_stoprx(tty);
  1901. }
  1902. while (gdl--) {
  1903. ch = inb(port->ioaddr + UART_RX);
  1904. tty_insert_flip_char(tty, ch, 0);
  1905. cnt++;
  1906. }
  1907. goto end_intr;
  1908. }
  1909. intr_old:
  1910. do {
  1911. if (max-- < 0)
  1912. break;
  1913. ch = inb(port->ioaddr + UART_RX);
  1914. if (port->board->chip_flag && (*status & UART_LSR_OE))
  1915. outb(0x23, port->ioaddr + UART_FCR);
  1916. *status &= port->read_status_mask;
  1917. if (*status & port->ignore_status_mask) {
  1918. if (++ignored > 100)
  1919. break;
  1920. } else {
  1921. char flag = 0;
  1922. if (*status & UART_LSR_SPECIAL) {
  1923. if (*status & UART_LSR_BI) {
  1924. flag = TTY_BREAK;
  1925. port->icount.brk++;
  1926. if (port->port.flags & ASYNC_SAK)
  1927. do_SAK(tty);
  1928. } else if (*status & UART_LSR_PE) {
  1929. flag = TTY_PARITY;
  1930. port->icount.parity++;
  1931. } else if (*status & UART_LSR_FE) {
  1932. flag = TTY_FRAME;
  1933. port->icount.frame++;
  1934. } else if (*status & UART_LSR_OE) {
  1935. flag = TTY_OVERRUN;
  1936. port->icount.overrun++;
  1937. } else
  1938. flag = TTY_BREAK;
  1939. }
  1940. tty_insert_flip_char(tty, ch, flag);
  1941. cnt++;
  1942. if (cnt >= recv_room) {
  1943. if (!port->ldisc_stop_rx)
  1944. mxser_stoprx(tty);
  1945. break;
  1946. }
  1947. }
  1948. if (port->board->chip_flag)
  1949. break;
  1950. *status = inb(port->ioaddr + UART_LSR);
  1951. } while (*status & UART_LSR_DR);
  1952. end_intr:
  1953. mxvar_log.rxcnt[tty->index] += cnt;
  1954. port->mon_data.rxcnt += cnt;
  1955. port->mon_data.up_rxcnt += cnt;
  1956. /*
  1957. * We are called from an interrupt context with &port->slock
  1958. * being held. Drop it temporarily in order to prevent
  1959. * recursive locking.
  1960. */
  1961. spin_unlock(&port->slock);
  1962. tty_flip_buffer_push(tty);
  1963. spin_lock(&port->slock);
  1964. }
  1965. static void mxser_transmit_chars(struct tty_struct *tty, struct mxser_port *port)
  1966. {
  1967. int count, cnt;
  1968. if (port->x_char) {
  1969. outb(port->x_char, port->ioaddr + UART_TX);
  1970. port->x_char = 0;
  1971. mxvar_log.txcnt[tty->index]++;
  1972. port->mon_data.txcnt++;
  1973. port->mon_data.up_txcnt++;
  1974. port->icount.tx++;
  1975. return;
  1976. }
  1977. if (port->port.xmit_buf == NULL)
  1978. return;
  1979. if (port->xmit_cnt <= 0 || tty->stopped ||
  1980. (tty->hw_stopped &&
  1981. (port->type != PORT_16550A) &&
  1982. (!port->board->chip_flag))) {
  1983. port->IER &= ~UART_IER_THRI;
  1984. outb(port->IER, port->ioaddr + UART_IER);
  1985. return;
  1986. }
  1987. cnt = port->xmit_cnt;
  1988. count = port->xmit_fifo_size;
  1989. do {
  1990. outb(port->port.xmit_buf[port->xmit_tail++],
  1991. port->ioaddr + UART_TX);
  1992. port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1);
  1993. if (--port->xmit_cnt <= 0)
  1994. break;
  1995. } while (--count > 0);
  1996. mxvar_log.txcnt[tty->index] += (cnt - port->xmit_cnt);
  1997. port->mon_data.txcnt += (cnt - port->xmit_cnt);
  1998. port->mon_data.up_txcnt += (cnt - port->xmit_cnt);
  1999. port->icount.tx += (cnt - port->xmit_cnt);
  2000. if (port->xmit_cnt < WAKEUP_CHARS && tty)
  2001. tty_wakeup(tty);
  2002. if (port->xmit_cnt <= 0) {
  2003. port->IER &= ~UART_IER_THRI;
  2004. outb(port->IER, port->ioaddr + UART_IER);
  2005. }
  2006. }
  2007. /*
  2008. * This is the serial driver's generic interrupt routine
  2009. */
  2010. static irqreturn_t mxser_interrupt(int irq, void *dev_id)
  2011. {
  2012. int status, iir, i;
  2013. struct mxser_board *brd = NULL;
  2014. struct mxser_port *port;
  2015. int max, irqbits, bits, msr;
  2016. unsigned int int_cnt, pass_counter = 0;
  2017. int handled = IRQ_NONE;
  2018. struct tty_struct *tty;
  2019. for (i = 0; i < MXSER_BOARDS; i++)
  2020. if (dev_id == &mxser_boards[i]) {
  2021. brd = dev_id;
  2022. break;
  2023. }
  2024. if (i == MXSER_BOARDS)
  2025. goto irq_stop;
  2026. if (brd == NULL)
  2027. goto irq_stop;
  2028. max = brd->info->nports;
  2029. while (pass_counter++ < MXSER_ISR_PASS_LIMIT) {
  2030. irqbits = inb(brd->vector) & brd->vector_mask;
  2031. if (irqbits == brd->vector_mask)
  2032. break;
  2033. handled = IRQ_HANDLED;
  2034. for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
  2035. if (irqbits == brd->vector_mask)
  2036. break;
  2037. if (bits & irqbits)
  2038. continue;
  2039. port = &brd->ports[i];
  2040. int_cnt = 0;
  2041. spin_lock(&port->slock);
  2042. do {
  2043. iir = inb(port->ioaddr + UART_IIR);
  2044. if (iir & UART_IIR_NO_INT)
  2045. break;
  2046. iir &= MOXA_MUST_IIR_MASK;
  2047. tty = tty_port_tty_get(&port->port);
  2048. if (!tty ||
  2049. (port->port.flags & ASYNC_CLOSING) ||
  2050. !(port->port.flags &
  2051. ASYNC_INITIALIZED)) {
  2052. status = inb(port->ioaddr + UART_LSR);
  2053. outb(0x27, port->ioaddr + UART_FCR);
  2054. inb(port->ioaddr + UART_MSR);
  2055. tty_kref_put(tty);
  2056. break;
  2057. }
  2058. status = inb(port->ioaddr + UART_LSR);
  2059. if (status & UART_LSR_PE)
  2060. port->err_shadow |= NPPI_NOTIFY_PARITY;
  2061. if (status & UART_LSR_FE)
  2062. port->err_shadow |= NPPI_NOTIFY_FRAMING;
  2063. if (status & UART_LSR_OE)
  2064. port->err_shadow |=
  2065. NPPI_NOTIFY_HW_OVERRUN;
  2066. if (status & UART_LSR_BI)
  2067. port->err_shadow |= NPPI_NOTIFY_BREAK;
  2068. if (port->board->chip_flag) {
  2069. if (iir == MOXA_MUST_IIR_GDA ||
  2070. iir == MOXA_MUST_IIR_RDA ||
  2071. iir == MOXA_MUST_IIR_RTO ||
  2072. iir == MOXA_MUST_IIR_LSR)
  2073. mxser_receive_chars(tty, port,
  2074. &status);
  2075. } else {
  2076. status &= port->read_status_mask;
  2077. if (status & UART_LSR_DR)
  2078. mxser_receive_chars(tty, port,
  2079. &status);
  2080. }
  2081. msr = inb(port->ioaddr + UART_MSR);
  2082. if (msr & UART_MSR_ANY_DELTA)
  2083. mxser_check_modem_status(tty, port, msr);
  2084. if (port->board->chip_flag) {
  2085. if (iir == 0x02 && (status &
  2086. UART_LSR_THRE))
  2087. mxser_transmit_chars(tty, port);
  2088. } else {
  2089. if (status & UART_LSR_THRE)
  2090. mxser_transmit_chars(tty, port);
  2091. }
  2092. tty_kref_put(tty);
  2093. } while (int_cnt++ < MXSER_ISR_PASS_LIMIT);
  2094. spin_unlock(&port->slock);
  2095. }
  2096. }
  2097. irq_stop:
  2098. return handled;
  2099. }
  2100. static const struct tty_operations mxser_ops = {
  2101. .open = mxser_open,
  2102. .close = mxser_close,
  2103. .write = mxser_write,
  2104. .put_char = mxser_put_char,
  2105. .flush_chars = mxser_flush_chars,
  2106. .write_room = mxser_write_room,
  2107. .chars_in_buffer = mxser_chars_in_buffer,
  2108. .flush_buffer = mxser_flush_buffer,
  2109. .ioctl = mxser_ioctl,
  2110. .throttle = mxser_throttle,
  2111. .unthrottle = mxser_unthrottle,
  2112. .set_termios = mxser_set_termios,
  2113. .stop = mxser_stop,
  2114. .start = mxser_start,
  2115. .hangup = mxser_hangup,
  2116. .break_ctl = mxser_rs_break,
  2117. .wait_until_sent = mxser_wait_until_sent,
  2118. .tiocmget = mxser_tiocmget,
  2119. .tiocmset = mxser_tiocmset,
  2120. };
  2121. /*
  2122. * The MOXA Smartio/Industio serial driver boot-time initialization code!
  2123. */
  2124. static void mxser_release_res(struct mxser_board *brd, struct pci_dev *pdev,
  2125. unsigned int irq)
  2126. {
  2127. if (irq)
  2128. free_irq(brd->irq, brd);
  2129. if (pdev != NULL) { /* PCI */
  2130. #ifdef CONFIG_PCI
  2131. pci_release_region(pdev, 2);
  2132. pci_release_region(pdev, 3);
  2133. #endif
  2134. } else {
  2135. release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
  2136. release_region(brd->vector, 1);
  2137. }
  2138. }
  2139. static int __devinit mxser_initbrd(struct mxser_board *brd,
  2140. struct pci_dev *pdev)
  2141. {
  2142. struct mxser_port *info;
  2143. unsigned int i;
  2144. int retval;
  2145. printk(KERN_INFO "mxser: max. baud rate = %d bps\n",
  2146. brd->ports[0].max_baud);
  2147. for (i = 0; i < brd->info->nports; i++) {
  2148. info = &brd->ports[i];
  2149. tty_port_init(&info->port);
  2150. info->board = brd;
  2151. info->stop_rx = 0;
  2152. info->ldisc_stop_rx = 0;
  2153. /* Enhance mode enabled here */
  2154. if (brd->chip_flag != MOXA_OTHER_UART)
  2155. mxser_enable_must_enchance_mode(info->ioaddr);
  2156. info->port.flags = ASYNC_SHARE_IRQ;
  2157. info->type = brd->uart_type;
  2158. process_txrx_fifo(info);
  2159. info->custom_divisor = info->baud_base * 16;
  2160. info->port.close_delay = 5 * HZ / 10;
  2161. info->port.closing_wait = 30 * HZ;
  2162. info->normal_termios = mxvar_sdriver->init_termios;
  2163. init_waitqueue_head(&info->delta_msr_wait);
  2164. memset(&info->mon_data, 0, sizeof(struct mxser_mon));
  2165. info->err_shadow = 0;
  2166. spin_lock_init(&info->slock);
  2167. /* before set INT ISR, disable all int */
  2168. outb(inb(info->ioaddr + UART_IER) & 0xf0,
  2169. info->ioaddr + UART_IER);
  2170. }
  2171. retval = request_irq(brd->irq, mxser_interrupt, IRQF_SHARED, "mxser",
  2172. brd);
  2173. if (retval) {
  2174. printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may "
  2175. "conflict with another device.\n",
  2176. brd->info->name, brd->irq);
  2177. /* We hold resources, we need to release them. */
  2178. mxser_release_res(brd, pdev, 0);
  2179. }
  2180. return retval;
  2181. }
  2182. static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd)
  2183. {
  2184. int id, i, bits;
  2185. unsigned short regs[16], irq;
  2186. unsigned char scratch, scratch2;
  2187. brd->chip_flag = MOXA_OTHER_UART;
  2188. id = mxser_read_register(cap, regs);
  2189. switch (id) {
  2190. case C168_ASIC_ID:
  2191. brd->info = &mxser_cards[0];
  2192. break;
  2193. case C104_ASIC_ID:
  2194. brd->info = &mxser_cards[1];
  2195. break;
  2196. case CI104J_ASIC_ID:
  2197. brd->info = &mxser_cards[2];
  2198. break;
  2199. case C102_ASIC_ID:
  2200. brd->info = &mxser_cards[5];
  2201. break;
  2202. case CI132_ASIC_ID:
  2203. brd->info = &mxser_cards[6];
  2204. break;
  2205. case CI134_ASIC_ID:
  2206. brd->info = &mxser_cards[7];
  2207. break;
  2208. default:
  2209. return 0;
  2210. }
  2211. irq = 0;
  2212. /* some ISA cards have 2 ports, but we want to see them as 4-port (why?)
  2213. Flag-hack checks if configuration should be read as 2-port here. */
  2214. if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) {
  2215. irq = regs[9] & 0xF000;
  2216. irq = irq | (irq >> 4);
  2217. if (irq != (regs[9] & 0xFF00))
  2218. goto err_irqconflict;
  2219. } else if (brd->info->nports == 4) {
  2220. irq = regs[9] & 0xF000;
  2221. irq = irq | (irq >> 4);
  2222. irq = irq | (irq >> 8);
  2223. if (irq != regs[9])
  2224. goto err_irqconflict;
  2225. } else if (brd->info->nports == 8) {
  2226. irq = regs[9] & 0xF000;
  2227. irq = irq | (irq >> 4);
  2228. irq = irq | (irq >> 8);
  2229. if ((irq != regs[9]) || (irq != regs[10]))
  2230. goto err_irqconflict;
  2231. }
  2232. if (!irq) {
  2233. printk(KERN_ERR "mxser: interrupt number unset\n");
  2234. return -EIO;
  2235. }
  2236. brd->irq = ((int)(irq & 0xF000) >> 12);
  2237. for (i = 0; i < 8; i++)
  2238. brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8;
  2239. if ((regs[12] & 0x80) == 0) {
  2240. printk(KERN_ERR "mxser: invalid interrupt vector\n");
  2241. return -EIO;
  2242. }
  2243. brd->vector = (int)regs[11]; /* interrupt vector */
  2244. if (id == 1)
  2245. brd->vector_mask = 0x00FF;
  2246. else
  2247. brd->vector_mask = 0x000F;
  2248. for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
  2249. if (regs[12] & bits) {
  2250. brd->ports[i].baud_base = 921600;
  2251. brd->ports[i].max_baud = 921600;
  2252. } else {
  2253. brd->ports[i].baud_base = 115200;
  2254. brd->ports[i].max_baud = 115200;
  2255. }
  2256. }
  2257. scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
  2258. outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
  2259. outb(0, cap + UART_EFR); /* EFR is the same as FCR */
  2260. outb(scratch2, cap + UART_LCR);
  2261. outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
  2262. scratch = inb(cap + UART_IIR);
  2263. if (scratch & 0xC0)
  2264. brd->uart_type = PORT_16550A;
  2265. else
  2266. brd->uart_type = PORT_16450;
  2267. if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports,
  2268. "mxser(IO)")) {
  2269. printk(KERN_ERR "mxser: can't request ports I/O region: "
  2270. "0x%.8lx-0x%.8lx\n",
  2271. brd->ports[0].ioaddr, brd->ports[0].ioaddr +
  2272. 8 * brd->info->nports - 1);
  2273. return -EIO;
  2274. }
  2275. if (!request_region(brd->vector, 1, "mxser(vector)")) {
  2276. release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
  2277. printk(KERN_ERR "mxser: can't request interrupt vector region: "
  2278. "0x%.8lx-0x%.8lx\n",
  2279. brd->ports[0].ioaddr, brd->ports[0].ioaddr +
  2280. 8 * brd->info->nports - 1);
  2281. return -EIO;
  2282. }
  2283. return brd->info->nports;
  2284. err_irqconflict:
  2285. printk(KERN_ERR "mxser: invalid interrupt number\n");
  2286. return -EIO;
  2287. }
  2288. static int __devinit mxser_probe(struct pci_dev *pdev,
  2289. const struct pci_device_id *ent)
  2290. {
  2291. #ifdef CONFIG_PCI
  2292. struct mxser_board *brd;
  2293. unsigned int i, j;
  2294. unsigned long ioaddress;
  2295. int retval = -EINVAL;
  2296. for (i = 0; i < MXSER_BOARDS; i++)
  2297. if (mxser_boards[i].info == NULL)
  2298. break;
  2299. if (i >= MXSER_BOARDS) {
  2300. dev_err(&pdev->dev, "too many boards found (maximum %d), board "
  2301. "not configured\n", MXSER_BOARDS);
  2302. goto err;
  2303. }
  2304. brd = &mxser_boards[i];
  2305. brd->idx = i * MXSER_PORTS_PER_BOARD;
  2306. dev_info(&pdev->dev, "found MOXA %s board (BusNo=%d, DevNo=%d)\n",
  2307. mxser_cards[ent->driver_data].name,
  2308. pdev->bus->number, PCI_SLOT(pdev->devfn));
  2309. retval = pci_enable_device(pdev);
  2310. if (retval) {
  2311. dev_err(&pdev->dev, "PCI enable failed\n");
  2312. goto err;
  2313. }
  2314. /* io address */
  2315. ioaddress = pci_resource_start(pdev, 2);
  2316. retval = pci_request_region(pdev, 2, "mxser(IO)");
  2317. if (retval)
  2318. goto err;
  2319. brd->info = &mxser_cards[ent->driver_data];
  2320. for (i = 0; i < brd->info->nports; i++)
  2321. brd->ports[i].ioaddr = ioaddress + 8 * i;
  2322. /* vector */
  2323. ioaddress = pci_resource_start(pdev, 3);
  2324. retval = pci_request_region(pdev, 3, "mxser(vector)");
  2325. if (retval)
  2326. goto err_relio;
  2327. brd->vector = ioaddress;
  2328. /* irq */
  2329. brd->irq = pdev->irq;
  2330. brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr);
  2331. brd->uart_type = PORT_16550A;
  2332. brd->vector_mask = 0;
  2333. for (i = 0; i < brd->info->nports; i++) {
  2334. for (j = 0; j < UART_INFO_NUM; j++) {
  2335. if (Gpci_uart_info[j].type == brd->chip_flag) {
  2336. brd->ports[i].max_baud =
  2337. Gpci_uart_info[j].max_baud;
  2338. /* exception....CP-102 */
  2339. if (brd->info->flags & MXSER_HIGHBAUD)
  2340. brd->ports[i].max_baud = 921600;
  2341. break;
  2342. }
  2343. }
  2344. }
  2345. if (brd->chip_flag == MOXA_MUST_MU860_HWID) {
  2346. for (i = 0; i < brd->info->nports; i++) {
  2347. if (i < 4)
  2348. brd->ports[i].opmode_ioaddr = ioaddress + 4;
  2349. else
  2350. brd->ports[i].opmode_ioaddr = ioaddress + 0x0c;
  2351. }
  2352. outb(0, ioaddress + 4); /* default set to RS232 mode */
  2353. outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
  2354. }
  2355. for (i = 0; i < brd->info->nports; i++) {
  2356. brd->vector_mask |= (1 << i);
  2357. brd->ports[i].baud_base = 921600;
  2358. }
  2359. /* mxser_initbrd will hook ISR. */
  2360. retval = mxser_initbrd(brd, pdev);
  2361. if (retval)
  2362. goto err_null;
  2363. for (i = 0; i < brd->info->nports; i++)
  2364. tty_register_device(mxvar_sdriver, brd->idx + i, &pdev->dev);
  2365. pci_set_drvdata(pdev, brd);
  2366. return 0;
  2367. err_relio:
  2368. pci_release_region(pdev, 2);
  2369. err_null:
  2370. brd->info = NULL;
  2371. err:
  2372. return retval;
  2373. #else
  2374. return -ENODEV;
  2375. #endif
  2376. }
  2377. static void __devexit mxser_remove(struct pci_dev *pdev)
  2378. {
  2379. struct mxser_board *brd = pci_get_drvdata(pdev);
  2380. unsigned int i;
  2381. for (i = 0; i < brd->info->nports; i++)
  2382. tty_unregister_device(mxvar_sdriver, brd->idx + i);
  2383. mxser_release_res(brd, pdev, 1);
  2384. brd->info = NULL;
  2385. }
  2386. static struct pci_driver mxser_driver = {
  2387. .name = "mxser",
  2388. .id_table = mxser_pcibrds,
  2389. .probe = mxser_probe,
  2390. .remove = __devexit_p(mxser_remove)
  2391. };
  2392. static int __init mxser_module_init(void)
  2393. {
  2394. struct mxser_board *brd;
  2395. unsigned int b, i, m;
  2396. int retval;
  2397. mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
  2398. if (!mxvar_sdriver)
  2399. return -ENOMEM;
  2400. printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
  2401. MXSER_VERSION);
  2402. /* Initialize the tty_driver structure */
  2403. mxvar_sdriver->owner = THIS_MODULE;
  2404. mxvar_sdriver->magic = TTY_DRIVER_MAGIC;
  2405. mxvar_sdriver->name = "ttyMI";
  2406. mxvar_sdriver->major = ttymajor;
  2407. mxvar_sdriver->minor_start = 0;
  2408. mxvar_sdriver->num = MXSER_PORTS + 1;
  2409. mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
  2410. mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
  2411. mxvar_sdriver->init_termios = tty_std_termios;
  2412. mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
  2413. mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV;
  2414. tty_set_operations(mxvar_sdriver, &mxser_ops);
  2415. retval = tty_register_driver(mxvar_sdriver);
  2416. if (retval) {
  2417. printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family "
  2418. "tty driver !\n");
  2419. goto err_put;
  2420. }
  2421. /* Start finding ISA boards here */
  2422. for (m = 0, b = 0; b < MXSER_BOARDS; b++) {
  2423. if (!ioaddr[b])
  2424. continue;
  2425. brd = &mxser_boards[m];
  2426. retval = mxser_get_ISA_conf(!ioaddr[b], brd);
  2427. if (retval <= 0) {
  2428. brd->info = NULL;
  2429. continue;
  2430. }
  2431. printk(KERN_INFO "mxser: found MOXA %s board (CAP=0x%lx)\n",
  2432. brd->info->name, ioaddr[b]);
  2433. /* mxser_initbrd will hook ISR. */
  2434. if (mxser_initbrd(brd, NULL) < 0) {
  2435. brd->info = NULL;
  2436. continue;
  2437. }
  2438. brd->idx = m * MXSER_PORTS_PER_BOARD;
  2439. for (i = 0; i < brd->info->nports; i++)
  2440. tty_register_device(mxvar_sdriver, brd->idx + i, NULL);
  2441. m++;
  2442. }
  2443. retval = pci_register_driver(&mxser_driver);
  2444. if (retval) {
  2445. printk(KERN_ERR "mxser: can't register pci driver\n");
  2446. if (!m) {
  2447. retval = -ENODEV;
  2448. goto err_unr;
  2449. } /* else: we have some ISA cards under control */
  2450. }
  2451. return 0;
  2452. err_unr:
  2453. tty_unregister_driver(mxvar_sdriver);
  2454. err_put:
  2455. put_tty_driver(mxvar_sdriver);
  2456. return retval;
  2457. }
  2458. static void __exit mxser_module_exit(void)
  2459. {
  2460. unsigned int i, j;
  2461. pci_unregister_driver(&mxser_driver);
  2462. for (i = 0; i < MXSER_BOARDS; i++) /* ISA remains */
  2463. if (mxser_boards[i].info != NULL)
  2464. for (j = 0; j < mxser_boards[i].info->nports; j++)
  2465. tty_unregister_device(mxvar_sdriver,
  2466. mxser_boards[i].idx + j);
  2467. tty_unregister_driver(mxvar_sdriver);
  2468. put_tty_driver(mxvar_sdriver);
  2469. for (i = 0; i < MXSER_BOARDS; i++)
  2470. if (mxser_boards[i].info != NULL)
  2471. mxser_release_res(&mxser_boards[i], NULL, 1);
  2472. }
  2473. module_init(mxser_module_init);
  2474. module_exit(mxser_module_exit);