config.c 10 KB

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  1. /*
  2. * arch/m68k/bvme6000/config.c
  3. *
  4. * Copyright (C) 1997 Richard Hirst [richard@sleepie.demon.co.uk]
  5. *
  6. * Based on:
  7. *
  8. * linux/amiga/config.c
  9. *
  10. * Copyright (C) 1993 Hamish Macdonald
  11. *
  12. * This file is subject to the terms and conditions of the GNU General Public
  13. * License. See the file README.legal in the main directory of this archive
  14. * for more details.
  15. */
  16. #include <linux/types.h>
  17. #include <linux/kernel.h>
  18. #include <linux/mm.h>
  19. #include <linux/tty.h>
  20. #include <linux/console.h>
  21. #include <linux/linkage.h>
  22. #include <linux/init.h>
  23. #include <linux/major.h>
  24. #include <linux/genhd.h>
  25. #include <linux/rtc.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/bcd.h>
  28. #include <asm/bootinfo.h>
  29. #include <asm/system.h>
  30. #include <asm/pgtable.h>
  31. #include <asm/setup.h>
  32. #include <asm/irq.h>
  33. #include <asm/traps.h>
  34. #include <asm/rtc.h>
  35. #include <asm/machdep.h>
  36. #include <asm/bvme6000hw.h>
  37. static void bvme6000_get_model(char *model);
  38. static int bvme6000_get_hardware_list(char *buffer);
  39. extern void bvme6000_sched_init(irq_handler_t handler);
  40. extern unsigned long bvme6000_gettimeoffset (void);
  41. extern int bvme6000_hwclk (int, struct rtc_time *);
  42. extern int bvme6000_set_clock_mmss (unsigned long);
  43. extern void bvme6000_reset (void);
  44. extern void bvme6000_waitbut(void);
  45. void bvme6000_set_vectors (void);
  46. /* Save tick handler routine pointer, will point to do_timer() in
  47. * kernel/sched.c, called via bvme6000_process_int() */
  48. static irq_handler_t tick_handler;
  49. int bvme6000_parse_bootinfo(const struct bi_record *bi)
  50. {
  51. if (bi->tag == BI_VME_TYPE)
  52. return 0;
  53. else
  54. return 1;
  55. }
  56. void bvme6000_reset(void)
  57. {
  58. volatile PitRegsPtr pit = (PitRegsPtr)BVME_PIT_BASE;
  59. printk ("\r\n\nCalled bvme6000_reset\r\n"
  60. "\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r\r");
  61. /* The string of returns is to delay the reset until the whole
  62. * message is output. */
  63. /* Enable the watchdog, via PIT port C bit 4 */
  64. pit->pcddr |= 0x10; /* WDOG enable */
  65. while(1)
  66. ;
  67. }
  68. static void bvme6000_get_model(char *model)
  69. {
  70. sprintf(model, "BVME%d000", m68k_cputype == CPU_68060 ? 6 : 4);
  71. }
  72. /* No hardware options on BVME6000? */
  73. static int bvme6000_get_hardware_list(char *buffer)
  74. {
  75. *buffer = '\0';
  76. return 0;
  77. }
  78. /*
  79. * This function is called during kernel startup to initialize
  80. * the bvme6000 IRQ handling routines.
  81. */
  82. static void __init bvme6000_init_IRQ(void)
  83. {
  84. m68k_setup_user_interrupt(VEC_USER, 192, NULL);
  85. }
  86. void __init config_bvme6000(void)
  87. {
  88. volatile PitRegsPtr pit = (PitRegsPtr)BVME_PIT_BASE;
  89. /* Board type is only set by newer versions of vmelilo/tftplilo */
  90. if (!vme_brdtype) {
  91. if (m68k_cputype == CPU_68060)
  92. vme_brdtype = VME_TYPE_BVME6000;
  93. else
  94. vme_brdtype = VME_TYPE_BVME4000;
  95. }
  96. #if 0
  97. /* Call bvme6000_set_vectors() so ABORT will work, along with BVMBug
  98. * debugger. Note trap_init() will splat the abort vector, but
  99. * bvme6000_init_IRQ() will put it back again. Hopefully. */
  100. bvme6000_set_vectors();
  101. #endif
  102. mach_max_dma_address = 0xffffffff;
  103. mach_sched_init = bvme6000_sched_init;
  104. mach_init_IRQ = bvme6000_init_IRQ;
  105. mach_gettimeoffset = bvme6000_gettimeoffset;
  106. mach_hwclk = bvme6000_hwclk;
  107. mach_set_clock_mmss = bvme6000_set_clock_mmss;
  108. mach_reset = bvme6000_reset;
  109. mach_get_model = bvme6000_get_model;
  110. mach_get_hardware_list = bvme6000_get_hardware_list;
  111. printk ("Board is %sconfigured as a System Controller\n",
  112. *config_reg_ptr & BVME_CONFIG_SW1 ? "" : "not ");
  113. /* Now do the PIT configuration */
  114. pit->pgcr = 0x00; /* Unidirectional 8 bit, no handshake for now */
  115. pit->psrr = 0x18; /* PIACK and PIRQ functions enabled */
  116. pit->pacr = 0x00; /* Sub Mode 00, H2 i/p, no DMA */
  117. pit->padr = 0x00; /* Just to be tidy! */
  118. pit->paddr = 0x00; /* All inputs for now (safest) */
  119. pit->pbcr = 0x80; /* Sub Mode 1x, H4 i/p, no DMA */
  120. pit->pbdr = 0xbc | (*config_reg_ptr & BVME_CONFIG_SW1 ? 0 : 0x40);
  121. /* PRI, SYSCON?, Level3, SCC clks from xtal */
  122. pit->pbddr = 0xf3; /* Mostly outputs */
  123. pit->pcdr = 0x01; /* PA transceiver disabled */
  124. pit->pcddr = 0x03; /* WDOG disable */
  125. /* Disable snooping for Ethernet and VME accesses */
  126. bvme_acr_addrctl = 0;
  127. }
  128. irqreturn_t bvme6000_abort_int (int irq, void *dev_id)
  129. {
  130. unsigned long *new = (unsigned long *)vectors;
  131. unsigned long *old = (unsigned long *)0xf8000000;
  132. /* Wait for button release */
  133. while (*(volatile unsigned char *)BVME_LOCAL_IRQ_STAT & BVME_ABORT_STATUS)
  134. ;
  135. *(new+4) = *(old+4); /* Illegal instruction */
  136. *(new+9) = *(old+9); /* Trace */
  137. *(new+47) = *(old+47); /* Trap #15 */
  138. *(new+0x1f) = *(old+0x1f); /* ABORT switch */
  139. return IRQ_HANDLED;
  140. }
  141. static irqreturn_t bvme6000_timer_int (int irq, void *dev_id)
  142. {
  143. volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
  144. unsigned char msr = rtc->msr & 0xc0;
  145. rtc->msr = msr | 0x20; /* Ack the interrupt */
  146. return tick_handler(irq, dev_id);
  147. }
  148. /*
  149. * Set up the RTC timer 1 to mode 2, so T1 output toggles every 5ms
  150. * (40000 x 125ns). It will interrupt every 10ms, when T1 goes low.
  151. * So, when reading the elapsed time, you should read timer1,
  152. * subtract it from 39999, and then add 40000 if T1 is high.
  153. * That gives you the number of 125ns ticks in to the 10ms period,
  154. * so divide by 8 to get the microsecond result.
  155. */
  156. void bvme6000_sched_init (irq_handler_t timer_routine)
  157. {
  158. volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
  159. unsigned char msr = rtc->msr & 0xc0;
  160. rtc->msr = 0; /* Ensure timer registers accessible */
  161. tick_handler = timer_routine;
  162. if (request_irq(BVME_IRQ_RTC, bvme6000_timer_int, 0,
  163. "timer", bvme6000_timer_int))
  164. panic ("Couldn't register timer int");
  165. rtc->t1cr_omr = 0x04; /* Mode 2, ext clk */
  166. rtc->t1msb = 39999 >> 8;
  167. rtc->t1lsb = 39999 & 0xff;
  168. rtc->irr_icr1 &= 0xef; /* Route timer 1 to INTR pin */
  169. rtc->msr = 0x40; /* Access int.cntrl, etc */
  170. rtc->pfr_icr0 = 0x80; /* Just timer 1 ints enabled */
  171. rtc->irr_icr1 = 0;
  172. rtc->t1cr_omr = 0x0a; /* INTR+T1 active lo, push-pull */
  173. rtc->t0cr_rtmr &= 0xdf; /* Stop timers in standby */
  174. rtc->msr = 0; /* Access timer 1 control */
  175. rtc->t1cr_omr = 0x05; /* Mode 2, ext clk, GO */
  176. rtc->msr = msr;
  177. if (request_irq(BVME_IRQ_ABORT, bvme6000_abort_int, 0,
  178. "abort", bvme6000_abort_int))
  179. panic ("Couldn't register abort int");
  180. }
  181. /* This is always executed with interrupts disabled. */
  182. /*
  183. * NOTE: Don't accept any readings within 5us of rollover, as
  184. * the T1INT bit may be a little slow getting set. There is also
  185. * a fault in the chip, meaning that reads may produce invalid
  186. * results...
  187. */
  188. unsigned long bvme6000_gettimeoffset (void)
  189. {
  190. volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
  191. volatile PitRegsPtr pit = (PitRegsPtr)BVME_PIT_BASE;
  192. unsigned char msr = rtc->msr & 0xc0;
  193. unsigned char t1int, t1op;
  194. unsigned long v = 800000, ov;
  195. rtc->msr = 0; /* Ensure timer registers accessible */
  196. do {
  197. ov = v;
  198. t1int = rtc->msr & 0x20;
  199. t1op = pit->pcdr & 0x04;
  200. rtc->t1cr_omr |= 0x40; /* Latch timer1 */
  201. v = rtc->t1msb << 8; /* Read timer1 */
  202. v |= rtc->t1lsb; /* Read timer1 */
  203. } while (t1int != (rtc->msr & 0x20) ||
  204. t1op != (pit->pcdr & 0x04) ||
  205. abs(ov-v) > 80 ||
  206. v > 39960);
  207. v = 39999 - v;
  208. if (!t1op) /* If in second half cycle.. */
  209. v += 40000;
  210. v /= 8; /* Convert ticks to microseconds */
  211. if (t1int)
  212. v += 10000; /* Int pending, + 10ms */
  213. rtc->msr = msr;
  214. return v;
  215. }
  216. /*
  217. * Looks like op is non-zero for setting the clock, and zero for
  218. * reading the clock.
  219. *
  220. * struct hwclk_time {
  221. * unsigned sec; 0..59
  222. * unsigned min; 0..59
  223. * unsigned hour; 0..23
  224. * unsigned day; 1..31
  225. * unsigned mon; 0..11
  226. * unsigned year; 00...
  227. * int wday; 0..6, 0 is Sunday, -1 means unknown/don't set
  228. * };
  229. */
  230. int bvme6000_hwclk(int op, struct rtc_time *t)
  231. {
  232. volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
  233. unsigned char msr = rtc->msr & 0xc0;
  234. rtc->msr = 0x40; /* Ensure clock and real-time-mode-register
  235. * are accessible */
  236. if (op)
  237. { /* Write.... */
  238. rtc->t0cr_rtmr = t->tm_year%4;
  239. rtc->bcd_tenms = 0;
  240. rtc->bcd_sec = bin2bcd(t->tm_sec);
  241. rtc->bcd_min = bin2bcd(t->tm_min);
  242. rtc->bcd_hr = bin2bcd(t->tm_hour);
  243. rtc->bcd_dom = bin2bcd(t->tm_mday);
  244. rtc->bcd_mth = bin2bcd(t->tm_mon + 1);
  245. rtc->bcd_year = bin2bcd(t->tm_year%100);
  246. if (t->tm_wday >= 0)
  247. rtc->bcd_dow = bin2bcd(t->tm_wday+1);
  248. rtc->t0cr_rtmr = t->tm_year%4 | 0x08;
  249. }
  250. else
  251. { /* Read.... */
  252. do {
  253. t->tm_sec = bcd2bin(rtc->bcd_sec);
  254. t->tm_min = bcd2bin(rtc->bcd_min);
  255. t->tm_hour = bcd2bin(rtc->bcd_hr);
  256. t->tm_mday = bcd2bin(rtc->bcd_dom);
  257. t->tm_mon = bcd2bin(rtc->bcd_mth)-1;
  258. t->tm_year = bcd2bin(rtc->bcd_year);
  259. if (t->tm_year < 70)
  260. t->tm_year += 100;
  261. t->tm_wday = bcd2bin(rtc->bcd_dow)-1;
  262. } while (t->tm_sec != bcd2bin(rtc->bcd_sec));
  263. }
  264. rtc->msr = msr;
  265. return 0;
  266. }
  267. /*
  268. * Set the minutes and seconds from seconds value 'nowtime'. Fail if
  269. * clock is out by > 30 minutes. Logic lifted from atari code.
  270. * Algorithm is to wait for the 10ms register to change, and then to
  271. * wait a short while, and then set it.
  272. */
  273. int bvme6000_set_clock_mmss (unsigned long nowtime)
  274. {
  275. int retval = 0;
  276. short real_seconds = nowtime % 60, real_minutes = (nowtime / 60) % 60;
  277. unsigned char rtc_minutes, rtc_tenms;
  278. volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
  279. unsigned char msr = rtc->msr & 0xc0;
  280. unsigned long flags;
  281. volatile int i;
  282. rtc->msr = 0; /* Ensure clock accessible */
  283. rtc_minutes = bcd2bin (rtc->bcd_min);
  284. if ((rtc_minutes < real_minutes
  285. ? real_minutes - rtc_minutes
  286. : rtc_minutes - real_minutes) < 30)
  287. {
  288. local_irq_save(flags);
  289. rtc_tenms = rtc->bcd_tenms;
  290. while (rtc_tenms == rtc->bcd_tenms)
  291. ;
  292. for (i = 0; i < 1000; i++)
  293. ;
  294. rtc->bcd_min = bin2bcd(real_minutes);
  295. rtc->bcd_sec = bin2bcd(real_seconds);
  296. local_irq_restore(flags);
  297. }
  298. else
  299. retval = -1;
  300. rtc->msr = msr;
  301. return retval;
  302. }