ehci-q.c 33 KB

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  1. /*
  2. * Copyright (C) 2001-2004 by David Brownell
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms of the GNU General Public License as published by the
  6. * Free Software Foundation; either version 2 of the License, or (at your
  7. * option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful, but
  10. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  11. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  12. * for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software Foundation,
  16. * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. */
  18. /* this file is part of ehci-hcd.c */
  19. /*-------------------------------------------------------------------------*/
  20. /*
  21. * EHCI hardware queue manipulation ... the core. QH/QTD manipulation.
  22. *
  23. * Control, bulk, and interrupt traffic all use "qh" lists. They list "qtd"
  24. * entries describing USB transactions, max 16-20kB/entry (with 4kB-aligned
  25. * buffers needed for the larger number). We use one QH per endpoint, queue
  26. * multiple urbs (all three types) per endpoint. URBs may need several qtds.
  27. *
  28. * ISO traffic uses "ISO TD" (itd, and sitd) records, and (along with
  29. * interrupts) needs careful scheduling. Performance improvements can be
  30. * an ongoing challenge. That's in "ehci-sched.c".
  31. *
  32. * USB 1.1 devices are handled (a) by "companion" OHCI or UHCI root hubs,
  33. * or otherwise through transaction translators (TTs) in USB 2.0 hubs using
  34. * (b) special fields in qh entries or (c) split iso entries. TTs will
  35. * buffer low/full speed data so the host collects it at high speed.
  36. */
  37. /*-------------------------------------------------------------------------*/
  38. /* fill a qtd, returning how much of the buffer we were able to queue up */
  39. static int
  40. qtd_fill(struct ehci_hcd *ehci, struct ehci_qtd *qtd, dma_addr_t buf,
  41. size_t len, int token, int maxpacket)
  42. {
  43. int i, count;
  44. u64 addr = buf;
  45. /* one buffer entry per 4K ... first might be short or unaligned */
  46. qtd->hw_buf[0] = cpu_to_hc32(ehci, (u32)addr);
  47. qtd->hw_buf_hi[0] = cpu_to_hc32(ehci, (u32)(addr >> 32));
  48. count = 0x1000 - (buf & 0x0fff); /* rest of that page */
  49. if (likely (len < count)) /* ... iff needed */
  50. count = len;
  51. else {
  52. buf += 0x1000;
  53. buf &= ~0x0fff;
  54. /* per-qtd limit: from 16K to 20K (best alignment) */
  55. for (i = 1; count < len && i < 5; i++) {
  56. addr = buf;
  57. qtd->hw_buf[i] = cpu_to_hc32(ehci, (u32)addr);
  58. qtd->hw_buf_hi[i] = cpu_to_hc32(ehci,
  59. (u32)(addr >> 32));
  60. buf += 0x1000;
  61. if ((count + 0x1000) < len)
  62. count += 0x1000;
  63. else
  64. count = len;
  65. }
  66. /* short packets may only terminate transfers */
  67. if (count != len)
  68. count -= (count % maxpacket);
  69. }
  70. qtd->hw_token = cpu_to_hc32(ehci, (count << 16) | token);
  71. qtd->length = count;
  72. return count;
  73. }
  74. /*-------------------------------------------------------------------------*/
  75. static inline void
  76. qh_update (struct ehci_hcd *ehci, struct ehci_qh *qh, struct ehci_qtd *qtd)
  77. {
  78. /* writes to an active overlay are unsafe */
  79. BUG_ON(qh->qh_state != QH_STATE_IDLE);
  80. qh->hw_qtd_next = QTD_NEXT(ehci, qtd->qtd_dma);
  81. qh->hw_alt_next = EHCI_LIST_END(ehci);
  82. /* HC must see latest qtd and qh data before we clear ACTIVE+HALT */
  83. wmb ();
  84. qh->hw_token &= cpu_to_hc32(ehci, QTD_TOGGLE | QTD_STS_PING);
  85. }
  86. /* if it weren't for a common silicon quirk (writing the dummy into the qh
  87. * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
  88. * recovery (including urb dequeue) would need software changes to a QH...
  89. */
  90. static void
  91. qh_refresh (struct ehci_hcd *ehci, struct ehci_qh *qh)
  92. {
  93. struct ehci_qtd *qtd;
  94. if (list_empty (&qh->qtd_list))
  95. qtd = qh->dummy;
  96. else {
  97. qtd = list_entry (qh->qtd_list.next,
  98. struct ehci_qtd, qtd_list);
  99. /* first qtd may already be partially processed */
  100. if (cpu_to_hc32(ehci, qtd->qtd_dma) == qh->hw_current)
  101. qtd = NULL;
  102. }
  103. if (qtd)
  104. qh_update (ehci, qh, qtd);
  105. }
  106. /*-------------------------------------------------------------------------*/
  107. static int qtd_copy_status (
  108. struct ehci_hcd *ehci,
  109. struct urb *urb,
  110. size_t length,
  111. u32 token
  112. )
  113. {
  114. int status = -EINPROGRESS;
  115. /* count IN/OUT bytes, not SETUP (even short packets) */
  116. if (likely (QTD_PID (token) != 2))
  117. urb->actual_length += length - QTD_LENGTH (token);
  118. /* don't modify error codes */
  119. if (unlikely(urb->unlinked))
  120. return status;
  121. /* force cleanup after short read; not always an error */
  122. if (unlikely (IS_SHORT_READ (token)))
  123. status = -EREMOTEIO;
  124. /* serious "can't proceed" faults reported by the hardware */
  125. if (token & QTD_STS_HALT) {
  126. if (token & QTD_STS_BABBLE) {
  127. /* FIXME "must" disable babbling device's port too */
  128. status = -EOVERFLOW;
  129. } else if (token & QTD_STS_MMF) {
  130. /* fs/ls interrupt xfer missed the complete-split */
  131. status = -EPROTO;
  132. } else if (token & QTD_STS_DBE) {
  133. status = (QTD_PID (token) == 1) /* IN ? */
  134. ? -ENOSR /* hc couldn't read data */
  135. : -ECOMM; /* hc couldn't write data */
  136. } else if (token & QTD_STS_XACT) {
  137. /* timeout, bad crc, wrong PID, etc; retried */
  138. if (QTD_CERR (token))
  139. status = -EPIPE;
  140. else {
  141. ehci_dbg (ehci, "devpath %s ep%d%s 3strikes\n",
  142. urb->dev->devpath,
  143. usb_pipeendpoint (urb->pipe),
  144. usb_pipein (urb->pipe) ? "in" : "out");
  145. status = -EPROTO;
  146. }
  147. /* CERR nonzero + no errors + halt --> stall */
  148. } else if (QTD_CERR (token))
  149. status = -EPIPE;
  150. else /* unknown */
  151. status = -EPROTO;
  152. ehci_vdbg (ehci,
  153. "dev%d ep%d%s qtd token %08x --> status %d\n",
  154. usb_pipedevice (urb->pipe),
  155. usb_pipeendpoint (urb->pipe),
  156. usb_pipein (urb->pipe) ? "in" : "out",
  157. token, status);
  158. /* if async CSPLIT failed, try cleaning out the TT buffer */
  159. if (status != -EPIPE
  160. && urb->dev->tt
  161. && !usb_pipeint(urb->pipe)
  162. && ((token & QTD_STS_MMF) != 0
  163. || QTD_CERR(token) == 0)
  164. && (!ehci_is_TDI(ehci)
  165. || urb->dev->tt->hub !=
  166. ehci_to_hcd(ehci)->self.root_hub)) {
  167. #ifdef DEBUG
  168. struct usb_device *tt = urb->dev->tt->hub;
  169. dev_dbg (&tt->dev,
  170. "clear tt buffer port %d, a%d ep%d t%08x\n",
  171. urb->dev->ttport, urb->dev->devnum,
  172. usb_pipeendpoint (urb->pipe), token);
  173. #endif /* DEBUG */
  174. /* REVISIT ARC-derived cores don't clear the root
  175. * hub TT buffer in this way...
  176. */
  177. usb_hub_tt_clear_buffer (urb->dev, urb->pipe);
  178. }
  179. }
  180. return status;
  181. }
  182. static void
  183. ehci_urb_done(struct ehci_hcd *ehci, struct urb *urb, int status)
  184. __releases(ehci->lock)
  185. __acquires(ehci->lock)
  186. {
  187. if (likely (urb->hcpriv != NULL)) {
  188. struct ehci_qh *qh = (struct ehci_qh *) urb->hcpriv;
  189. /* S-mask in a QH means it's an interrupt urb */
  190. if ((qh->hw_info2 & cpu_to_hc32(ehci, QH_SMASK)) != 0) {
  191. /* ... update hc-wide periodic stats (for usbfs) */
  192. ehci_to_hcd(ehci)->self.bandwidth_int_reqs--;
  193. }
  194. qh_put (qh);
  195. }
  196. if (unlikely(urb->unlinked)) {
  197. COUNT(ehci->stats.unlink);
  198. } else {
  199. /* report non-error and short read status as zero */
  200. if (status == -EINPROGRESS || status == -EREMOTEIO)
  201. status = 0;
  202. COUNT(ehci->stats.complete);
  203. }
  204. #ifdef EHCI_URB_TRACE
  205. ehci_dbg (ehci,
  206. "%s %s urb %p ep%d%s status %d len %d/%d\n",
  207. __func__, urb->dev->devpath, urb,
  208. usb_pipeendpoint (urb->pipe),
  209. usb_pipein (urb->pipe) ? "in" : "out",
  210. status,
  211. urb->actual_length, urb->transfer_buffer_length);
  212. #endif
  213. /* complete() can reenter this HCD */
  214. usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
  215. spin_unlock (&ehci->lock);
  216. usb_hcd_giveback_urb(ehci_to_hcd(ehci), urb, status);
  217. spin_lock (&ehci->lock);
  218. }
  219. static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh);
  220. static void unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh);
  221. static void intr_deschedule (struct ehci_hcd *ehci, struct ehci_qh *qh);
  222. static int qh_schedule (struct ehci_hcd *ehci, struct ehci_qh *qh);
  223. /*
  224. * Process and free completed qtds for a qh, returning URBs to drivers.
  225. * Chases up to qh->hw_current. Returns number of completions called,
  226. * indicating how much "real" work we did.
  227. */
  228. static unsigned
  229. qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh)
  230. {
  231. struct ehci_qtd *last = NULL, *end = qh->dummy;
  232. struct list_head *entry, *tmp;
  233. int last_status = -EINPROGRESS;
  234. int stopped;
  235. unsigned count = 0;
  236. u8 state;
  237. __le32 halt = HALT_BIT(ehci);
  238. if (unlikely (list_empty (&qh->qtd_list)))
  239. return count;
  240. /* completions (or tasks on other cpus) must never clobber HALT
  241. * till we've gone through and cleaned everything up, even when
  242. * they add urbs to this qh's queue or mark them for unlinking.
  243. *
  244. * NOTE: unlinking expects to be done in queue order.
  245. */
  246. state = qh->qh_state;
  247. qh->qh_state = QH_STATE_COMPLETING;
  248. stopped = (state == QH_STATE_IDLE);
  249. /* remove de-activated QTDs from front of queue.
  250. * after faults (including short reads), cleanup this urb
  251. * then let the queue advance.
  252. * if queue is stopped, handles unlinks.
  253. */
  254. list_for_each_safe (entry, tmp, &qh->qtd_list) {
  255. struct ehci_qtd *qtd;
  256. struct urb *urb;
  257. u32 token = 0;
  258. qtd = list_entry (entry, struct ehci_qtd, qtd_list);
  259. urb = qtd->urb;
  260. /* clean up any state from previous QTD ...*/
  261. if (last) {
  262. if (likely (last->urb != urb)) {
  263. ehci_urb_done(ehci, last->urb, last_status);
  264. count++;
  265. last_status = -EINPROGRESS;
  266. }
  267. ehci_qtd_free (ehci, last);
  268. last = NULL;
  269. }
  270. /* ignore urbs submitted during completions we reported */
  271. if (qtd == end)
  272. break;
  273. /* hardware copies qtd out of qh overlay */
  274. rmb ();
  275. token = hc32_to_cpu(ehci, qtd->hw_token);
  276. /* always clean up qtds the hc de-activated */
  277. retry_xacterr:
  278. if ((token & QTD_STS_ACTIVE) == 0) {
  279. /* on STALL, error, and short reads this urb must
  280. * complete and all its qtds must be recycled.
  281. */
  282. if ((token & QTD_STS_HALT) != 0) {
  283. /* retry transaction errors until we
  284. * reach the software xacterr limit
  285. */
  286. if ((token & QTD_STS_XACT) &&
  287. QTD_CERR(token) == 0 &&
  288. --qh->xacterrs > 0 &&
  289. !urb->unlinked) {
  290. ehci_dbg(ehci,
  291. "detected XactErr len %zu/%zu retry %d\n",
  292. qtd->length - QTD_LENGTH(token), qtd->length,
  293. QH_XACTERR_MAX - qh->xacterrs);
  294. /* reset the token in the qtd and the
  295. * qh overlay (which still contains
  296. * the qtd) so that we pick up from
  297. * where we left off
  298. */
  299. token &= ~QTD_STS_HALT;
  300. token |= QTD_STS_ACTIVE |
  301. (EHCI_TUNE_CERR << 10);
  302. qtd->hw_token = cpu_to_hc32(ehci,
  303. token);
  304. wmb();
  305. qh->hw_token = cpu_to_hc32(ehci, token);
  306. goto retry_xacterr;
  307. }
  308. stopped = 1;
  309. /* magic dummy for some short reads; qh won't advance.
  310. * that silicon quirk can kick in with this dummy too.
  311. *
  312. * other short reads won't stop the queue, including
  313. * control transfers (status stage handles that) or
  314. * most other single-qtd reads ... the queue stops if
  315. * URB_SHORT_NOT_OK was set so the driver submitting
  316. * the urbs could clean it up.
  317. */
  318. } else if (IS_SHORT_READ (token)
  319. && !(qtd->hw_alt_next
  320. & EHCI_LIST_END(ehci))) {
  321. stopped = 1;
  322. goto halt;
  323. }
  324. /* stop scanning when we reach qtds the hc is using */
  325. } else if (likely (!stopped
  326. && HC_IS_RUNNING (ehci_to_hcd(ehci)->state))) {
  327. break;
  328. /* scan the whole queue for unlinks whenever it stops */
  329. } else {
  330. stopped = 1;
  331. /* cancel everything if we halt, suspend, etc */
  332. if (!HC_IS_RUNNING(ehci_to_hcd(ehci)->state))
  333. last_status = -ESHUTDOWN;
  334. /* this qtd is active; skip it unless a previous qtd
  335. * for its urb faulted, or its urb was canceled.
  336. */
  337. else if (last_status == -EINPROGRESS && !urb->unlinked)
  338. continue;
  339. /* qh unlinked; token in overlay may be most current */
  340. if (state == QH_STATE_IDLE
  341. && cpu_to_hc32(ehci, qtd->qtd_dma)
  342. == qh->hw_current)
  343. token = hc32_to_cpu(ehci, qh->hw_token);
  344. /* force halt for unlinked or blocked qh, so we'll
  345. * patch the qh later and so that completions can't
  346. * activate it while we "know" it's stopped.
  347. */
  348. if ((halt & qh->hw_token) == 0) {
  349. halt:
  350. qh->hw_token |= halt;
  351. wmb ();
  352. }
  353. }
  354. /* unless we already know the urb's status, collect qtd status
  355. * and update count of bytes transferred. in common short read
  356. * cases with only one data qtd (including control transfers),
  357. * queue processing won't halt. but with two or more qtds (for
  358. * example, with a 32 KB transfer), when the first qtd gets a
  359. * short read the second must be removed by hand.
  360. */
  361. if (last_status == -EINPROGRESS) {
  362. last_status = qtd_copy_status(ehci, urb,
  363. qtd->length, token);
  364. if (last_status == -EREMOTEIO
  365. && (qtd->hw_alt_next
  366. & EHCI_LIST_END(ehci)))
  367. last_status = -EINPROGRESS;
  368. }
  369. /* if we're removing something not at the queue head,
  370. * patch the hardware queue pointer.
  371. */
  372. if (stopped && qtd->qtd_list.prev != &qh->qtd_list) {
  373. last = list_entry (qtd->qtd_list.prev,
  374. struct ehci_qtd, qtd_list);
  375. last->hw_next = qtd->hw_next;
  376. }
  377. /* remove qtd; it's recycled after possible urb completion */
  378. list_del (&qtd->qtd_list);
  379. last = qtd;
  380. /* reinit the xacterr counter for the next qtd */
  381. qh->xacterrs = QH_XACTERR_MAX;
  382. }
  383. /* last urb's completion might still need calling */
  384. if (likely (last != NULL)) {
  385. ehci_urb_done(ehci, last->urb, last_status);
  386. count++;
  387. ehci_qtd_free (ehci, last);
  388. }
  389. /* restore original state; caller must unlink or relink */
  390. qh->qh_state = state;
  391. /* be sure the hardware's done with the qh before refreshing
  392. * it after fault cleanup, or recovering from silicon wrongly
  393. * overlaying the dummy qtd (which reduces DMA chatter).
  394. */
  395. if (stopped != 0 || qh->hw_qtd_next == EHCI_LIST_END(ehci)) {
  396. switch (state) {
  397. case QH_STATE_IDLE:
  398. qh_refresh(ehci, qh);
  399. break;
  400. case QH_STATE_LINKED:
  401. /* We won't refresh a QH that's linked (after the HC
  402. * stopped the queue). That avoids a race:
  403. * - HC reads first part of QH;
  404. * - CPU updates that first part and the token;
  405. * - HC reads rest of that QH, including token
  406. * Result: HC gets an inconsistent image, and then
  407. * DMAs to/from the wrong memory (corrupting it).
  408. *
  409. * That should be rare for interrupt transfers,
  410. * except maybe high bandwidth ...
  411. */
  412. if ((cpu_to_hc32(ehci, QH_SMASK)
  413. & qh->hw_info2) != 0) {
  414. intr_deschedule (ehci, qh);
  415. (void) qh_schedule (ehci, qh);
  416. } else
  417. unlink_async (ehci, qh);
  418. break;
  419. /* otherwise, unlink already started */
  420. }
  421. }
  422. return count;
  423. }
  424. /*-------------------------------------------------------------------------*/
  425. // high bandwidth multiplier, as encoded in highspeed endpoint descriptors
  426. #define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03))
  427. // ... and packet size, for any kind of endpoint descriptor
  428. #define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff)
  429. /*
  430. * reverse of qh_urb_transaction: free a list of TDs.
  431. * used for cleanup after errors, before HC sees an URB's TDs.
  432. */
  433. static void qtd_list_free (
  434. struct ehci_hcd *ehci,
  435. struct urb *urb,
  436. struct list_head *qtd_list
  437. ) {
  438. struct list_head *entry, *temp;
  439. list_for_each_safe (entry, temp, qtd_list) {
  440. struct ehci_qtd *qtd;
  441. qtd = list_entry (entry, struct ehci_qtd, qtd_list);
  442. list_del (&qtd->qtd_list);
  443. ehci_qtd_free (ehci, qtd);
  444. }
  445. }
  446. /*
  447. * create a list of filled qtds for this URB; won't link into qh.
  448. */
  449. static struct list_head *
  450. qh_urb_transaction (
  451. struct ehci_hcd *ehci,
  452. struct urb *urb,
  453. struct list_head *head,
  454. gfp_t flags
  455. ) {
  456. struct ehci_qtd *qtd, *qtd_prev;
  457. dma_addr_t buf;
  458. int len, maxpacket;
  459. int is_input;
  460. u32 token;
  461. /*
  462. * URBs map to sequences of QTDs: one logical transaction
  463. */
  464. qtd = ehci_qtd_alloc (ehci, flags);
  465. if (unlikely (!qtd))
  466. return NULL;
  467. list_add_tail (&qtd->qtd_list, head);
  468. qtd->urb = urb;
  469. token = QTD_STS_ACTIVE;
  470. token |= (EHCI_TUNE_CERR << 10);
  471. /* for split transactions, SplitXState initialized to zero */
  472. len = urb->transfer_buffer_length;
  473. is_input = usb_pipein (urb->pipe);
  474. if (usb_pipecontrol (urb->pipe)) {
  475. /* SETUP pid */
  476. qtd_fill(ehci, qtd, urb->setup_dma,
  477. sizeof (struct usb_ctrlrequest),
  478. token | (2 /* "setup" */ << 8), 8);
  479. /* ... and always at least one more pid */
  480. token ^= QTD_TOGGLE;
  481. qtd_prev = qtd;
  482. qtd = ehci_qtd_alloc (ehci, flags);
  483. if (unlikely (!qtd))
  484. goto cleanup;
  485. qtd->urb = urb;
  486. qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
  487. list_add_tail (&qtd->qtd_list, head);
  488. /* for zero length DATA stages, STATUS is always IN */
  489. if (len == 0)
  490. token |= (1 /* "in" */ << 8);
  491. }
  492. /*
  493. * data transfer stage: buffer setup
  494. */
  495. buf = urb->transfer_dma;
  496. if (is_input)
  497. token |= (1 /* "in" */ << 8);
  498. /* else it's already initted to "out" pid (0 << 8) */
  499. maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input));
  500. /*
  501. * buffer gets wrapped in one or more qtds;
  502. * last one may be "short" (including zero len)
  503. * and may serve as a control status ack
  504. */
  505. for (;;) {
  506. int this_qtd_len;
  507. this_qtd_len = qtd_fill(ehci, qtd, buf, len, token, maxpacket);
  508. len -= this_qtd_len;
  509. buf += this_qtd_len;
  510. /*
  511. * short reads advance to a "magic" dummy instead of the next
  512. * qtd ... that forces the queue to stop, for manual cleanup.
  513. * (this will usually be overridden later.)
  514. */
  515. if (is_input)
  516. qtd->hw_alt_next = ehci->async->hw_alt_next;
  517. /* qh makes control packets use qtd toggle; maybe switch it */
  518. if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
  519. token ^= QTD_TOGGLE;
  520. if (likely (len <= 0))
  521. break;
  522. qtd_prev = qtd;
  523. qtd = ehci_qtd_alloc (ehci, flags);
  524. if (unlikely (!qtd))
  525. goto cleanup;
  526. qtd->urb = urb;
  527. qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
  528. list_add_tail (&qtd->qtd_list, head);
  529. }
  530. /*
  531. * unless the caller requires manual cleanup after short reads,
  532. * have the alt_next mechanism keep the queue running after the
  533. * last data qtd (the only one, for control and most other cases).
  534. */
  535. if (likely ((urb->transfer_flags & URB_SHORT_NOT_OK) == 0
  536. || usb_pipecontrol (urb->pipe)))
  537. qtd->hw_alt_next = EHCI_LIST_END(ehci);
  538. /*
  539. * control requests may need a terminating data "status" ack;
  540. * bulk ones may need a terminating short packet (zero length).
  541. */
  542. if (likely (urb->transfer_buffer_length != 0)) {
  543. int one_more = 0;
  544. if (usb_pipecontrol (urb->pipe)) {
  545. one_more = 1;
  546. token ^= 0x0100; /* "in" <--> "out" */
  547. token |= QTD_TOGGLE; /* force DATA1 */
  548. } else if (usb_pipebulk (urb->pipe)
  549. && (urb->transfer_flags & URB_ZERO_PACKET)
  550. && !(urb->transfer_buffer_length % maxpacket)) {
  551. one_more = 1;
  552. }
  553. if (one_more) {
  554. qtd_prev = qtd;
  555. qtd = ehci_qtd_alloc (ehci, flags);
  556. if (unlikely (!qtd))
  557. goto cleanup;
  558. qtd->urb = urb;
  559. qtd_prev->hw_next = QTD_NEXT(ehci, qtd->qtd_dma);
  560. list_add_tail (&qtd->qtd_list, head);
  561. /* never any data in such packets */
  562. qtd_fill(ehci, qtd, 0, 0, token, 0);
  563. }
  564. }
  565. /* by default, enable interrupt on urb completion */
  566. if (likely (!(urb->transfer_flags & URB_NO_INTERRUPT)))
  567. qtd->hw_token |= cpu_to_hc32(ehci, QTD_IOC);
  568. return head;
  569. cleanup:
  570. qtd_list_free (ehci, urb, head);
  571. return NULL;
  572. }
  573. /*-------------------------------------------------------------------------*/
  574. // Would be best to create all qh's from config descriptors,
  575. // when each interface/altsetting is established. Unlink
  576. // any previous qh and cancel its urbs first; endpoints are
  577. // implicitly reset then (data toggle too).
  578. // That'd mean updating how usbcore talks to HCDs. (2.7?)
  579. /*
  580. * Each QH holds a qtd list; a QH is used for everything except iso.
  581. *
  582. * For interrupt urbs, the scheduler must set the microframe scheduling
  583. * mask(s) each time the QH gets scheduled. For highspeed, that's
  584. * just one microframe in the s-mask. For split interrupt transactions
  585. * there are additional complications: c-mask, maybe FSTNs.
  586. */
  587. static struct ehci_qh *
  588. qh_make (
  589. struct ehci_hcd *ehci,
  590. struct urb *urb,
  591. gfp_t flags
  592. ) {
  593. struct ehci_qh *qh = ehci_qh_alloc (ehci, flags);
  594. u32 info1 = 0, info2 = 0;
  595. int is_input, type;
  596. int maxp = 0;
  597. struct usb_tt *tt = urb->dev->tt;
  598. if (!qh)
  599. return qh;
  600. /*
  601. * init endpoint/device data for this QH
  602. */
  603. info1 |= usb_pipeendpoint (urb->pipe) << 8;
  604. info1 |= usb_pipedevice (urb->pipe) << 0;
  605. is_input = usb_pipein (urb->pipe);
  606. type = usb_pipetype (urb->pipe);
  607. maxp = usb_maxpacket (urb->dev, urb->pipe, !is_input);
  608. /* 1024 byte maxpacket is a hardware ceiling. High bandwidth
  609. * acts like up to 3KB, but is built from smaller packets.
  610. */
  611. if (max_packet(maxp) > 1024) {
  612. ehci_dbg(ehci, "bogus qh maxpacket %d\n", max_packet(maxp));
  613. goto done;
  614. }
  615. /* Compute interrupt scheduling parameters just once, and save.
  616. * - allowing for high bandwidth, how many nsec/uframe are used?
  617. * - split transactions need a second CSPLIT uframe; same question
  618. * - splits also need a schedule gap (for full/low speed I/O)
  619. * - qh has a polling interval
  620. *
  621. * For control/bulk requests, the HC or TT handles these.
  622. */
  623. if (type == PIPE_INTERRUPT) {
  624. qh->usecs = NS_TO_US(usb_calc_bus_time(USB_SPEED_HIGH,
  625. is_input, 0,
  626. hb_mult(maxp) * max_packet(maxp)));
  627. qh->start = NO_FRAME;
  628. if (urb->dev->speed == USB_SPEED_HIGH) {
  629. qh->c_usecs = 0;
  630. qh->gap_uf = 0;
  631. qh->period = urb->interval >> 3;
  632. if (qh->period == 0 && urb->interval != 1) {
  633. /* NOTE interval 2 or 4 uframes could work.
  634. * But interval 1 scheduling is simpler, and
  635. * includes high bandwidth.
  636. */
  637. dbg ("intr period %d uframes, NYET!",
  638. urb->interval);
  639. goto done;
  640. }
  641. } else {
  642. int think_time;
  643. /* gap is f(FS/LS transfer times) */
  644. qh->gap_uf = 1 + usb_calc_bus_time (urb->dev->speed,
  645. is_input, 0, maxp) / (125 * 1000);
  646. /* FIXME this just approximates SPLIT/CSPLIT times */
  647. if (is_input) { // SPLIT, gap, CSPLIT+DATA
  648. qh->c_usecs = qh->usecs + HS_USECS (0);
  649. qh->usecs = HS_USECS (1);
  650. } else { // SPLIT+DATA, gap, CSPLIT
  651. qh->usecs += HS_USECS (1);
  652. qh->c_usecs = HS_USECS (0);
  653. }
  654. think_time = tt ? tt->think_time : 0;
  655. qh->tt_usecs = NS_TO_US (think_time +
  656. usb_calc_bus_time (urb->dev->speed,
  657. is_input, 0, max_packet (maxp)));
  658. qh->period = urb->interval;
  659. }
  660. }
  661. /* support for tt scheduling, and access to toggles */
  662. qh->dev = urb->dev;
  663. /* using TT? */
  664. switch (urb->dev->speed) {
  665. case USB_SPEED_LOW:
  666. info1 |= (1 << 12); /* EPS "low" */
  667. /* FALL THROUGH */
  668. case USB_SPEED_FULL:
  669. /* EPS 0 means "full" */
  670. if (type != PIPE_INTERRUPT)
  671. info1 |= (EHCI_TUNE_RL_TT << 28);
  672. if (type == PIPE_CONTROL) {
  673. info1 |= (1 << 27); /* for TT */
  674. info1 |= 1 << 14; /* toggle from qtd */
  675. }
  676. info1 |= maxp << 16;
  677. info2 |= (EHCI_TUNE_MULT_TT << 30);
  678. /* Some Freescale processors have an erratum in which the
  679. * port number in the queue head was 0..N-1 instead of 1..N.
  680. */
  681. if (ehci_has_fsl_portno_bug(ehci))
  682. info2 |= (urb->dev->ttport-1) << 23;
  683. else
  684. info2 |= urb->dev->ttport << 23;
  685. /* set the address of the TT; for TDI's integrated
  686. * root hub tt, leave it zeroed.
  687. */
  688. if (tt && tt->hub != ehci_to_hcd(ehci)->self.root_hub)
  689. info2 |= tt->hub->devnum << 16;
  690. /* NOTE: if (PIPE_INTERRUPT) { scheduler sets c-mask } */
  691. break;
  692. case USB_SPEED_HIGH: /* no TT involved */
  693. info1 |= (2 << 12); /* EPS "high" */
  694. if (type == PIPE_CONTROL) {
  695. info1 |= (EHCI_TUNE_RL_HS << 28);
  696. info1 |= 64 << 16; /* usb2 fixed maxpacket */
  697. info1 |= 1 << 14; /* toggle from qtd */
  698. info2 |= (EHCI_TUNE_MULT_HS << 30);
  699. } else if (type == PIPE_BULK) {
  700. info1 |= (EHCI_TUNE_RL_HS << 28);
  701. /* The USB spec says that high speed bulk endpoints
  702. * always use 512 byte maxpacket. But some device
  703. * vendors decided to ignore that, and MSFT is happy
  704. * to help them do so. So now people expect to use
  705. * such nonconformant devices with Linux too; sigh.
  706. */
  707. info1 |= max_packet(maxp) << 16;
  708. info2 |= (EHCI_TUNE_MULT_HS << 30);
  709. } else { /* PIPE_INTERRUPT */
  710. info1 |= max_packet (maxp) << 16;
  711. info2 |= hb_mult (maxp) << 30;
  712. }
  713. break;
  714. default:
  715. dbg ("bogus dev %p speed %d", urb->dev, urb->dev->speed);
  716. done:
  717. qh_put (qh);
  718. return NULL;
  719. }
  720. /* NOTE: if (PIPE_INTERRUPT) { scheduler sets s-mask } */
  721. /* init as live, toggle clear, advance to dummy */
  722. qh->qh_state = QH_STATE_IDLE;
  723. qh->hw_info1 = cpu_to_hc32(ehci, info1);
  724. qh->hw_info2 = cpu_to_hc32(ehci, info2);
  725. qh_refresh (ehci, qh);
  726. return qh;
  727. }
  728. /*-------------------------------------------------------------------------*/
  729. /* move qh (and its qtds) onto async queue; maybe enable queue. */
  730. static void qh_link_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
  731. {
  732. __hc32 dma = QH_NEXT(ehci, qh->qh_dma);
  733. struct ehci_qh *head;
  734. /* (re)start the async schedule? */
  735. head = ehci->async;
  736. timer_action_done (ehci, TIMER_ASYNC_OFF);
  737. if (!head->qh_next.qh) {
  738. u32 cmd = ehci_readl(ehci, &ehci->regs->command);
  739. if (!(cmd & CMD_ASE)) {
  740. /* in case a clear of CMD_ASE didn't take yet */
  741. (void)handshake(ehci, &ehci->regs->status,
  742. STS_ASS, 0, 150);
  743. cmd |= CMD_ASE | CMD_RUN;
  744. ehci_writel(ehci, cmd, &ehci->regs->command);
  745. ehci_to_hcd(ehci)->state = HC_STATE_RUNNING;
  746. /* posted write need not be known to HC yet ... */
  747. }
  748. }
  749. /* clear halt and maybe recover from silicon quirk */
  750. if (qh->qh_state == QH_STATE_IDLE)
  751. qh_refresh (ehci, qh);
  752. /* splice right after start */
  753. qh->qh_next = head->qh_next;
  754. qh->hw_next = head->hw_next;
  755. wmb ();
  756. head->qh_next.qh = qh;
  757. head->hw_next = dma;
  758. qh->xacterrs = QH_XACTERR_MAX;
  759. qh->qh_state = QH_STATE_LINKED;
  760. /* qtd completions reported later by interrupt */
  761. }
  762. /*-------------------------------------------------------------------------*/
  763. /*
  764. * For control/bulk/interrupt, return QH with these TDs appended.
  765. * Allocates and initializes the QH if necessary.
  766. * Returns null if it can't allocate a QH it needs to.
  767. * If the QH has TDs (urbs) already, that's great.
  768. */
  769. static struct ehci_qh *qh_append_tds (
  770. struct ehci_hcd *ehci,
  771. struct urb *urb,
  772. struct list_head *qtd_list,
  773. int epnum,
  774. void **ptr
  775. )
  776. {
  777. struct ehci_qh *qh = NULL;
  778. __hc32 qh_addr_mask = cpu_to_hc32(ehci, 0x7f);
  779. qh = (struct ehci_qh *) *ptr;
  780. if (unlikely (qh == NULL)) {
  781. /* can't sleep here, we have ehci->lock... */
  782. qh = qh_make (ehci, urb, GFP_ATOMIC);
  783. *ptr = qh;
  784. }
  785. if (likely (qh != NULL)) {
  786. struct ehci_qtd *qtd;
  787. if (unlikely (list_empty (qtd_list)))
  788. qtd = NULL;
  789. else
  790. qtd = list_entry (qtd_list->next, struct ehci_qtd,
  791. qtd_list);
  792. /* control qh may need patching ... */
  793. if (unlikely (epnum == 0)) {
  794. /* usb_reset_device() briefly reverts to address 0 */
  795. if (usb_pipedevice (urb->pipe) == 0)
  796. qh->hw_info1 &= ~qh_addr_mask;
  797. }
  798. /* just one way to queue requests: swap with the dummy qtd.
  799. * only hc or qh_refresh() ever modify the overlay.
  800. */
  801. if (likely (qtd != NULL)) {
  802. struct ehci_qtd *dummy;
  803. dma_addr_t dma;
  804. __hc32 token;
  805. /* to avoid racing the HC, use the dummy td instead of
  806. * the first td of our list (becomes new dummy). both
  807. * tds stay deactivated until we're done, when the
  808. * HC is allowed to fetch the old dummy (4.10.2).
  809. */
  810. token = qtd->hw_token;
  811. qtd->hw_token = HALT_BIT(ehci);
  812. wmb ();
  813. dummy = qh->dummy;
  814. dma = dummy->qtd_dma;
  815. *dummy = *qtd;
  816. dummy->qtd_dma = dma;
  817. list_del (&qtd->qtd_list);
  818. list_add (&dummy->qtd_list, qtd_list);
  819. list_splice_tail(qtd_list, &qh->qtd_list);
  820. ehci_qtd_init(ehci, qtd, qtd->qtd_dma);
  821. qh->dummy = qtd;
  822. /* hc must see the new dummy at list end */
  823. dma = qtd->qtd_dma;
  824. qtd = list_entry (qh->qtd_list.prev,
  825. struct ehci_qtd, qtd_list);
  826. qtd->hw_next = QTD_NEXT(ehci, dma);
  827. /* let the hc process these next qtds */
  828. wmb ();
  829. dummy->hw_token = token;
  830. urb->hcpriv = qh_get (qh);
  831. }
  832. }
  833. return qh;
  834. }
  835. /*-------------------------------------------------------------------------*/
  836. static int
  837. submit_async (
  838. struct ehci_hcd *ehci,
  839. struct urb *urb,
  840. struct list_head *qtd_list,
  841. gfp_t mem_flags
  842. ) {
  843. struct ehci_qtd *qtd;
  844. int epnum;
  845. unsigned long flags;
  846. struct ehci_qh *qh = NULL;
  847. int rc;
  848. qtd = list_entry (qtd_list->next, struct ehci_qtd, qtd_list);
  849. epnum = urb->ep->desc.bEndpointAddress;
  850. #ifdef EHCI_URB_TRACE
  851. ehci_dbg (ehci,
  852. "%s %s urb %p ep%d%s len %d, qtd %p [qh %p]\n",
  853. __func__, urb->dev->devpath, urb,
  854. epnum & 0x0f, (epnum & USB_DIR_IN) ? "in" : "out",
  855. urb->transfer_buffer_length,
  856. qtd, urb->ep->hcpriv);
  857. #endif
  858. spin_lock_irqsave (&ehci->lock, flags);
  859. if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE,
  860. &ehci_to_hcd(ehci)->flags))) {
  861. rc = -ESHUTDOWN;
  862. goto done;
  863. }
  864. rc = usb_hcd_link_urb_to_ep(ehci_to_hcd(ehci), urb);
  865. if (unlikely(rc))
  866. goto done;
  867. qh = qh_append_tds(ehci, urb, qtd_list, epnum, &urb->ep->hcpriv);
  868. if (unlikely(qh == NULL)) {
  869. usb_hcd_unlink_urb_from_ep(ehci_to_hcd(ehci), urb);
  870. rc = -ENOMEM;
  871. goto done;
  872. }
  873. /* Control/bulk operations through TTs don't need scheduling,
  874. * the HC and TT handle it when the TT has a buffer ready.
  875. */
  876. if (likely (qh->qh_state == QH_STATE_IDLE))
  877. qh_link_async (ehci, qh_get (qh));
  878. done:
  879. spin_unlock_irqrestore (&ehci->lock, flags);
  880. if (unlikely (qh == NULL))
  881. qtd_list_free (ehci, urb, qtd_list);
  882. return rc;
  883. }
  884. /*-------------------------------------------------------------------------*/
  885. /* the async qh for the qtds being reclaimed are now unlinked from the HC */
  886. static void end_unlink_async (struct ehci_hcd *ehci)
  887. {
  888. struct ehci_qh *qh = ehci->reclaim;
  889. struct ehci_qh *next;
  890. iaa_watchdog_done(ehci);
  891. // qh->hw_next = cpu_to_hc32(qh->qh_dma);
  892. qh->qh_state = QH_STATE_IDLE;
  893. qh->qh_next.qh = NULL;
  894. qh_put (qh); // refcount from reclaim
  895. /* other unlink(s) may be pending (in QH_STATE_UNLINK_WAIT) */
  896. next = qh->reclaim;
  897. ehci->reclaim = next;
  898. qh->reclaim = NULL;
  899. qh_completions (ehci, qh);
  900. if (!list_empty (&qh->qtd_list)
  901. && HC_IS_RUNNING (ehci_to_hcd(ehci)->state))
  902. qh_link_async (ehci, qh);
  903. else {
  904. qh_put (qh); // refcount from async list
  905. /* it's not free to turn the async schedule on/off; leave it
  906. * active but idle for a while once it empties.
  907. */
  908. if (HC_IS_RUNNING (ehci_to_hcd(ehci)->state)
  909. && ehci->async->qh_next.qh == NULL)
  910. timer_action (ehci, TIMER_ASYNC_OFF);
  911. }
  912. if (next) {
  913. ehci->reclaim = NULL;
  914. start_unlink_async (ehci, next);
  915. }
  916. }
  917. /* makes sure the async qh will become idle */
  918. /* caller must own ehci->lock */
  919. static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
  920. {
  921. int cmd = ehci_readl(ehci, &ehci->regs->command);
  922. struct ehci_qh *prev;
  923. #ifdef DEBUG
  924. assert_spin_locked(&ehci->lock);
  925. if (ehci->reclaim
  926. || (qh->qh_state != QH_STATE_LINKED
  927. && qh->qh_state != QH_STATE_UNLINK_WAIT)
  928. )
  929. BUG ();
  930. #endif
  931. /* stop async schedule right now? */
  932. if (unlikely (qh == ehci->async)) {
  933. /* can't get here without STS_ASS set */
  934. if (ehci_to_hcd(ehci)->state != HC_STATE_HALT
  935. && !ehci->reclaim) {
  936. /* ... and CMD_IAAD clear */
  937. ehci_writel(ehci, cmd & ~CMD_ASE,
  938. &ehci->regs->command);
  939. wmb ();
  940. // handshake later, if we need to
  941. timer_action_done (ehci, TIMER_ASYNC_OFF);
  942. }
  943. return;
  944. }
  945. qh->qh_state = QH_STATE_UNLINK;
  946. ehci->reclaim = qh = qh_get (qh);
  947. prev = ehci->async;
  948. while (prev->qh_next.qh != qh)
  949. prev = prev->qh_next.qh;
  950. prev->hw_next = qh->hw_next;
  951. prev->qh_next = qh->qh_next;
  952. wmb ();
  953. /* If the controller isn't running, we don't have to wait for it */
  954. if (unlikely(!HC_IS_RUNNING(ehci_to_hcd(ehci)->state))) {
  955. /* if (unlikely (qh->reclaim != 0))
  956. * this will recurse, probably not much
  957. */
  958. end_unlink_async (ehci);
  959. return;
  960. }
  961. cmd |= CMD_IAAD;
  962. ehci_writel(ehci, cmd, &ehci->regs->command);
  963. (void)ehci_readl(ehci, &ehci->regs->command);
  964. iaa_watchdog_start(ehci);
  965. }
  966. /*-------------------------------------------------------------------------*/
  967. static void scan_async (struct ehci_hcd *ehci)
  968. {
  969. struct ehci_qh *qh;
  970. enum ehci_timer_action action = TIMER_IO_WATCHDOG;
  971. ehci->stamp = ehci_readl(ehci, &ehci->regs->frame_index);
  972. timer_action_done (ehci, TIMER_ASYNC_SHRINK);
  973. rescan:
  974. qh = ehci->async->qh_next.qh;
  975. if (likely (qh != NULL)) {
  976. do {
  977. /* clean any finished work for this qh */
  978. if (!list_empty (&qh->qtd_list)
  979. && qh->stamp != ehci->stamp) {
  980. int temp;
  981. /* unlinks could happen here; completion
  982. * reporting drops the lock. rescan using
  983. * the latest schedule, but don't rescan
  984. * qhs we already finished (no looping).
  985. */
  986. qh = qh_get (qh);
  987. qh->stamp = ehci->stamp;
  988. temp = qh_completions (ehci, qh);
  989. qh_put (qh);
  990. if (temp != 0) {
  991. goto rescan;
  992. }
  993. }
  994. /* unlink idle entries, reducing DMA usage as well
  995. * as HCD schedule-scanning costs. delay for any qh
  996. * we just scanned, there's a not-unusual case that it
  997. * doesn't stay idle for long.
  998. * (plus, avoids some kind of re-activation race.)
  999. */
  1000. if (list_empty(&qh->qtd_list)
  1001. && qh->qh_state == QH_STATE_LINKED) {
  1002. if (!ehci->reclaim
  1003. && ((ehci->stamp - qh->stamp) & 0x1fff)
  1004. >= (EHCI_SHRINK_FRAMES * 8))
  1005. start_unlink_async(ehci, qh);
  1006. else
  1007. action = TIMER_ASYNC_SHRINK;
  1008. }
  1009. qh = qh->qh_next.qh;
  1010. } while (qh);
  1011. }
  1012. if (action == TIMER_ASYNC_SHRINK)
  1013. timer_action (ehci, TIMER_ASYNC_SHRINK);
  1014. }