ymfpci_main.c 68 KB

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  1. /*
  2. * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
  3. * Routines for control of YMF724/740/744/754 chips
  4. *
  5. * BUGS:
  6. * --
  7. *
  8. * TODO:
  9. * --
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or
  14. * (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  24. *
  25. */
  26. #include <sound/driver.h>
  27. #include <linux/delay.h>
  28. #include <linux/init.h>
  29. #include <linux/interrupt.h>
  30. #include <linux/pci.h>
  31. #include <linux/sched.h>
  32. #include <linux/slab.h>
  33. #include <linux/vmalloc.h>
  34. #include <sound/core.h>
  35. #include <sound/control.h>
  36. #include <sound/info.h>
  37. #include <sound/tlv.h>
  38. #include <sound/ymfpci.h>
  39. #include <sound/asoundef.h>
  40. #include <sound/mpu401.h>
  41. #include <asm/io.h>
  42. /*
  43. * constants
  44. */
  45. /*
  46. * common I/O routines
  47. */
  48. static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip);
  49. static inline u8 snd_ymfpci_readb(struct snd_ymfpci *chip, u32 offset)
  50. {
  51. return readb(chip->reg_area_virt + offset);
  52. }
  53. static inline void snd_ymfpci_writeb(struct snd_ymfpci *chip, u32 offset, u8 val)
  54. {
  55. writeb(val, chip->reg_area_virt + offset);
  56. }
  57. static inline u16 snd_ymfpci_readw(struct snd_ymfpci *chip, u32 offset)
  58. {
  59. return readw(chip->reg_area_virt + offset);
  60. }
  61. static inline void snd_ymfpci_writew(struct snd_ymfpci *chip, u32 offset, u16 val)
  62. {
  63. writew(val, chip->reg_area_virt + offset);
  64. }
  65. static inline u32 snd_ymfpci_readl(struct snd_ymfpci *chip, u32 offset)
  66. {
  67. return readl(chip->reg_area_virt + offset);
  68. }
  69. static inline void snd_ymfpci_writel(struct snd_ymfpci *chip, u32 offset, u32 val)
  70. {
  71. writel(val, chip->reg_area_virt + offset);
  72. }
  73. static int snd_ymfpci_codec_ready(struct snd_ymfpci *chip, int secondary)
  74. {
  75. unsigned long end_time;
  76. u32 reg = secondary ? YDSXGR_SECSTATUSADR : YDSXGR_PRISTATUSADR;
  77. end_time = jiffies + msecs_to_jiffies(750);
  78. do {
  79. if ((snd_ymfpci_readw(chip, reg) & 0x8000) == 0)
  80. return 0;
  81. set_current_state(TASK_UNINTERRUPTIBLE);
  82. schedule_timeout_uninterruptible(1);
  83. } while (time_before(jiffies, end_time));
  84. snd_printk(KERN_ERR "codec_ready: codec %i is not ready [0x%x]\n", secondary, snd_ymfpci_readw(chip, reg));
  85. return -EBUSY;
  86. }
  87. static void snd_ymfpci_codec_write(struct snd_ac97 *ac97, u16 reg, u16 val)
  88. {
  89. struct snd_ymfpci *chip = ac97->private_data;
  90. u32 cmd;
  91. snd_ymfpci_codec_ready(chip, 0);
  92. cmd = ((YDSXG_AC97WRITECMD | reg) << 16) | val;
  93. snd_ymfpci_writel(chip, YDSXGR_AC97CMDDATA, cmd);
  94. }
  95. static u16 snd_ymfpci_codec_read(struct snd_ac97 *ac97, u16 reg)
  96. {
  97. struct snd_ymfpci *chip = ac97->private_data;
  98. if (snd_ymfpci_codec_ready(chip, 0))
  99. return ~0;
  100. snd_ymfpci_writew(chip, YDSXGR_AC97CMDADR, YDSXG_AC97READCMD | reg);
  101. if (snd_ymfpci_codec_ready(chip, 0))
  102. return ~0;
  103. if (chip->device_id == PCI_DEVICE_ID_YAMAHA_744 && chip->rev < 2) {
  104. int i;
  105. for (i = 0; i < 600; i++)
  106. snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
  107. }
  108. return snd_ymfpci_readw(chip, YDSXGR_PRISTATUSDATA);
  109. }
  110. /*
  111. * Misc routines
  112. */
  113. static u32 snd_ymfpci_calc_delta(u32 rate)
  114. {
  115. switch (rate) {
  116. case 8000: return 0x02aaab00;
  117. case 11025: return 0x03accd00;
  118. case 16000: return 0x05555500;
  119. case 22050: return 0x07599a00;
  120. case 32000: return 0x0aaaab00;
  121. case 44100: return 0x0eb33300;
  122. default: return ((rate << 16) / 375) << 5;
  123. }
  124. }
  125. static u32 def_rate[8] = {
  126. 100, 2000, 8000, 11025, 16000, 22050, 32000, 48000
  127. };
  128. static u32 snd_ymfpci_calc_lpfK(u32 rate)
  129. {
  130. u32 i;
  131. static u32 val[8] = {
  132. 0x00570000, 0x06AA0000, 0x18B20000, 0x20930000,
  133. 0x2B9A0000, 0x35A10000, 0x3EAA0000, 0x40000000
  134. };
  135. if (rate == 44100)
  136. return 0x40000000; /* FIXME: What's the right value? */
  137. for (i = 0; i < 8; i++)
  138. if (rate <= def_rate[i])
  139. return val[i];
  140. return val[0];
  141. }
  142. static u32 snd_ymfpci_calc_lpfQ(u32 rate)
  143. {
  144. u32 i;
  145. static u32 val[8] = {
  146. 0x35280000, 0x34A70000, 0x32020000, 0x31770000,
  147. 0x31390000, 0x31C90000, 0x33D00000, 0x40000000
  148. };
  149. if (rate == 44100)
  150. return 0x370A0000;
  151. for (i = 0; i < 8; i++)
  152. if (rate <= def_rate[i])
  153. return val[i];
  154. return val[0];
  155. }
  156. /*
  157. * Hardware start management
  158. */
  159. static void snd_ymfpci_hw_start(struct snd_ymfpci *chip)
  160. {
  161. unsigned long flags;
  162. spin_lock_irqsave(&chip->reg_lock, flags);
  163. if (chip->start_count++ > 0)
  164. goto __end;
  165. snd_ymfpci_writel(chip, YDSXGR_MODE,
  166. snd_ymfpci_readl(chip, YDSXGR_MODE) | 3);
  167. chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
  168. __end:
  169. spin_unlock_irqrestore(&chip->reg_lock, flags);
  170. }
  171. static void snd_ymfpci_hw_stop(struct snd_ymfpci *chip)
  172. {
  173. unsigned long flags;
  174. long timeout = 1000;
  175. spin_lock_irqsave(&chip->reg_lock, flags);
  176. if (--chip->start_count > 0)
  177. goto __end;
  178. snd_ymfpci_writel(chip, YDSXGR_MODE,
  179. snd_ymfpci_readl(chip, YDSXGR_MODE) & ~3);
  180. while (timeout-- > 0) {
  181. if ((snd_ymfpci_readl(chip, YDSXGR_STATUS) & 2) == 0)
  182. break;
  183. }
  184. if (atomic_read(&chip->interrupt_sleep_count)) {
  185. atomic_set(&chip->interrupt_sleep_count, 0);
  186. wake_up(&chip->interrupt_sleep);
  187. }
  188. __end:
  189. spin_unlock_irqrestore(&chip->reg_lock, flags);
  190. }
  191. /*
  192. * Playback voice management
  193. */
  194. static int voice_alloc(struct snd_ymfpci *chip,
  195. enum snd_ymfpci_voice_type type, int pair,
  196. struct snd_ymfpci_voice **rvoice)
  197. {
  198. struct snd_ymfpci_voice *voice, *voice2;
  199. int idx;
  200. *rvoice = NULL;
  201. for (idx = 0; idx < YDSXG_PLAYBACK_VOICES; idx += pair ? 2 : 1) {
  202. voice = &chip->voices[idx];
  203. voice2 = pair ? &chip->voices[idx+1] : NULL;
  204. if (voice->use || (voice2 && voice2->use))
  205. continue;
  206. voice->use = 1;
  207. if (voice2)
  208. voice2->use = 1;
  209. switch (type) {
  210. case YMFPCI_PCM:
  211. voice->pcm = 1;
  212. if (voice2)
  213. voice2->pcm = 1;
  214. break;
  215. case YMFPCI_SYNTH:
  216. voice->synth = 1;
  217. break;
  218. case YMFPCI_MIDI:
  219. voice->midi = 1;
  220. break;
  221. }
  222. snd_ymfpci_hw_start(chip);
  223. if (voice2)
  224. snd_ymfpci_hw_start(chip);
  225. *rvoice = voice;
  226. return 0;
  227. }
  228. return -ENOMEM;
  229. }
  230. static int snd_ymfpci_voice_alloc(struct snd_ymfpci *chip,
  231. enum snd_ymfpci_voice_type type, int pair,
  232. struct snd_ymfpci_voice **rvoice)
  233. {
  234. unsigned long flags;
  235. int result;
  236. snd_assert(rvoice != NULL, return -EINVAL);
  237. snd_assert(!pair || type == YMFPCI_PCM, return -EINVAL);
  238. spin_lock_irqsave(&chip->voice_lock, flags);
  239. for (;;) {
  240. result = voice_alloc(chip, type, pair, rvoice);
  241. if (result == 0 || type != YMFPCI_PCM)
  242. break;
  243. /* TODO: synth/midi voice deallocation */
  244. break;
  245. }
  246. spin_unlock_irqrestore(&chip->voice_lock, flags);
  247. return result;
  248. }
  249. static int snd_ymfpci_voice_free(struct snd_ymfpci *chip, struct snd_ymfpci_voice *pvoice)
  250. {
  251. unsigned long flags;
  252. snd_assert(pvoice != NULL, return -EINVAL);
  253. snd_ymfpci_hw_stop(chip);
  254. spin_lock_irqsave(&chip->voice_lock, flags);
  255. pvoice->use = pvoice->pcm = pvoice->synth = pvoice->midi = 0;
  256. pvoice->ypcm = NULL;
  257. pvoice->interrupt = NULL;
  258. spin_unlock_irqrestore(&chip->voice_lock, flags);
  259. return 0;
  260. }
  261. /*
  262. * PCM part
  263. */
  264. static void snd_ymfpci_pcm_interrupt(struct snd_ymfpci *chip, struct snd_ymfpci_voice *voice)
  265. {
  266. struct snd_ymfpci_pcm *ypcm;
  267. u32 pos, delta;
  268. if ((ypcm = voice->ypcm) == NULL)
  269. return;
  270. if (ypcm->substream == NULL)
  271. return;
  272. spin_lock(&chip->reg_lock);
  273. if (ypcm->running) {
  274. pos = le32_to_cpu(voice->bank[chip->active_bank].start);
  275. if (pos < ypcm->last_pos)
  276. delta = pos + (ypcm->buffer_size - ypcm->last_pos);
  277. else
  278. delta = pos - ypcm->last_pos;
  279. ypcm->period_pos += delta;
  280. ypcm->last_pos = pos;
  281. if (ypcm->period_pos >= ypcm->period_size) {
  282. // printk("done - active_bank = 0x%x, start = 0x%x\n", chip->active_bank, voice->bank[chip->active_bank].start);
  283. ypcm->period_pos %= ypcm->period_size;
  284. spin_unlock(&chip->reg_lock);
  285. snd_pcm_period_elapsed(ypcm->substream);
  286. spin_lock(&chip->reg_lock);
  287. }
  288. if (unlikely(ypcm->update_pcm_vol)) {
  289. unsigned int subs = ypcm->substream->number;
  290. unsigned int next_bank = 1 - chip->active_bank;
  291. struct snd_ymfpci_playback_bank *bank;
  292. u32 volume;
  293. bank = &voice->bank[next_bank];
  294. volume = cpu_to_le32(chip->pcm_mixer[subs].left << 15);
  295. bank->left_gain_end = volume;
  296. if (ypcm->output_rear)
  297. bank->eff2_gain_end = volume;
  298. if (ypcm->voices[1])
  299. bank = &ypcm->voices[1]->bank[next_bank];
  300. volume = cpu_to_le32(chip->pcm_mixer[subs].right << 15);
  301. bank->right_gain_end = volume;
  302. if (ypcm->output_rear)
  303. bank->eff3_gain_end = volume;
  304. ypcm->update_pcm_vol--;
  305. }
  306. }
  307. spin_unlock(&chip->reg_lock);
  308. }
  309. static void snd_ymfpci_pcm_capture_interrupt(struct snd_pcm_substream *substream)
  310. {
  311. struct snd_pcm_runtime *runtime = substream->runtime;
  312. struct snd_ymfpci_pcm *ypcm = runtime->private_data;
  313. struct snd_ymfpci *chip = ypcm->chip;
  314. u32 pos, delta;
  315. spin_lock(&chip->reg_lock);
  316. if (ypcm->running) {
  317. pos = le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
  318. if (pos < ypcm->last_pos)
  319. delta = pos + (ypcm->buffer_size - ypcm->last_pos);
  320. else
  321. delta = pos - ypcm->last_pos;
  322. ypcm->period_pos += delta;
  323. ypcm->last_pos = pos;
  324. if (ypcm->period_pos >= ypcm->period_size) {
  325. ypcm->period_pos %= ypcm->period_size;
  326. // printk("done - active_bank = 0x%x, start = 0x%x\n", chip->active_bank, voice->bank[chip->active_bank].start);
  327. spin_unlock(&chip->reg_lock);
  328. snd_pcm_period_elapsed(substream);
  329. spin_lock(&chip->reg_lock);
  330. }
  331. }
  332. spin_unlock(&chip->reg_lock);
  333. }
  334. static int snd_ymfpci_playback_trigger(struct snd_pcm_substream *substream,
  335. int cmd)
  336. {
  337. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  338. struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
  339. int result = 0;
  340. spin_lock(&chip->reg_lock);
  341. if (ypcm->voices[0] == NULL) {
  342. result = -EINVAL;
  343. goto __unlock;
  344. }
  345. switch (cmd) {
  346. case SNDRV_PCM_TRIGGER_START:
  347. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  348. case SNDRV_PCM_TRIGGER_RESUME:
  349. chip->ctrl_playback[ypcm->voices[0]->number + 1] = cpu_to_le32(ypcm->voices[0]->bank_addr);
  350. if (ypcm->voices[1] != NULL)
  351. chip->ctrl_playback[ypcm->voices[1]->number + 1] = cpu_to_le32(ypcm->voices[1]->bank_addr);
  352. ypcm->running = 1;
  353. break;
  354. case SNDRV_PCM_TRIGGER_STOP:
  355. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  356. case SNDRV_PCM_TRIGGER_SUSPEND:
  357. chip->ctrl_playback[ypcm->voices[0]->number + 1] = 0;
  358. if (ypcm->voices[1] != NULL)
  359. chip->ctrl_playback[ypcm->voices[1]->number + 1] = 0;
  360. ypcm->running = 0;
  361. break;
  362. default:
  363. result = -EINVAL;
  364. break;
  365. }
  366. __unlock:
  367. spin_unlock(&chip->reg_lock);
  368. return result;
  369. }
  370. static int snd_ymfpci_capture_trigger(struct snd_pcm_substream *substream,
  371. int cmd)
  372. {
  373. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  374. struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
  375. int result = 0;
  376. u32 tmp;
  377. spin_lock(&chip->reg_lock);
  378. switch (cmd) {
  379. case SNDRV_PCM_TRIGGER_START:
  380. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  381. case SNDRV_PCM_TRIGGER_RESUME:
  382. tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) | (1 << ypcm->capture_bank_number);
  383. snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
  384. ypcm->running = 1;
  385. break;
  386. case SNDRV_PCM_TRIGGER_STOP:
  387. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  388. case SNDRV_PCM_TRIGGER_SUSPEND:
  389. tmp = snd_ymfpci_readl(chip, YDSXGR_MAPOFREC) & ~(1 << ypcm->capture_bank_number);
  390. snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, tmp);
  391. ypcm->running = 0;
  392. break;
  393. default:
  394. result = -EINVAL;
  395. break;
  396. }
  397. spin_unlock(&chip->reg_lock);
  398. return result;
  399. }
  400. static int snd_ymfpci_pcm_voice_alloc(struct snd_ymfpci_pcm *ypcm, int voices)
  401. {
  402. int err;
  403. if (ypcm->voices[1] != NULL && voices < 2) {
  404. snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[1]);
  405. ypcm->voices[1] = NULL;
  406. }
  407. if (voices == 1 && ypcm->voices[0] != NULL)
  408. return 0; /* already allocated */
  409. if (voices == 2 && ypcm->voices[0] != NULL && ypcm->voices[1] != NULL)
  410. return 0; /* already allocated */
  411. if (voices > 1) {
  412. if (ypcm->voices[0] != NULL && ypcm->voices[1] == NULL) {
  413. snd_ymfpci_voice_free(ypcm->chip, ypcm->voices[0]);
  414. ypcm->voices[0] = NULL;
  415. }
  416. }
  417. err = snd_ymfpci_voice_alloc(ypcm->chip, YMFPCI_PCM, voices > 1, &ypcm->voices[0]);
  418. if (err < 0)
  419. return err;
  420. ypcm->voices[0]->ypcm = ypcm;
  421. ypcm->voices[0]->interrupt = snd_ymfpci_pcm_interrupt;
  422. if (voices > 1) {
  423. ypcm->voices[1] = &ypcm->chip->voices[ypcm->voices[0]->number + 1];
  424. ypcm->voices[1]->ypcm = ypcm;
  425. }
  426. return 0;
  427. }
  428. static void snd_ymfpci_pcm_init_voice(struct snd_ymfpci_pcm *ypcm, unsigned int voiceidx,
  429. struct snd_pcm_runtime *runtime,
  430. int has_pcm_volume)
  431. {
  432. struct snd_ymfpci_voice *voice = ypcm->voices[voiceidx];
  433. u32 format;
  434. u32 delta = snd_ymfpci_calc_delta(runtime->rate);
  435. u32 lpfQ = snd_ymfpci_calc_lpfQ(runtime->rate);
  436. u32 lpfK = snd_ymfpci_calc_lpfK(runtime->rate);
  437. struct snd_ymfpci_playback_bank *bank;
  438. unsigned int nbank;
  439. u32 vol_left, vol_right;
  440. u8 use_left, use_right;
  441. snd_assert(voice != NULL, return);
  442. if (runtime->channels == 1) {
  443. use_left = 1;
  444. use_right = 1;
  445. } else {
  446. use_left = (voiceidx & 1) == 0;
  447. use_right = !use_left;
  448. }
  449. if (has_pcm_volume) {
  450. vol_left = cpu_to_le32(ypcm->chip->pcm_mixer
  451. [ypcm->substream->number].left << 15);
  452. vol_right = cpu_to_le32(ypcm->chip->pcm_mixer
  453. [ypcm->substream->number].right << 15);
  454. } else {
  455. vol_left = cpu_to_le32(0x40000000);
  456. vol_right = cpu_to_le32(0x40000000);
  457. }
  458. format = runtime->channels == 2 ? 0x00010000 : 0;
  459. if (snd_pcm_format_width(runtime->format) == 8)
  460. format |= 0x80000000;
  461. if (runtime->channels == 2 && (voiceidx & 1) != 0)
  462. format |= 1;
  463. for (nbank = 0; nbank < 2; nbank++) {
  464. bank = &voice->bank[nbank];
  465. memset(bank, 0, sizeof(*bank));
  466. bank->format = cpu_to_le32(format);
  467. bank->base = cpu_to_le32(runtime->dma_addr);
  468. bank->loop_end = cpu_to_le32(ypcm->buffer_size);
  469. bank->lpfQ = cpu_to_le32(lpfQ);
  470. bank->delta =
  471. bank->delta_end = cpu_to_le32(delta);
  472. bank->lpfK =
  473. bank->lpfK_end = cpu_to_le32(lpfK);
  474. bank->eg_gain =
  475. bank->eg_gain_end = cpu_to_le32(0x40000000);
  476. if (ypcm->output_front) {
  477. if (use_left) {
  478. bank->left_gain =
  479. bank->left_gain_end = vol_left;
  480. }
  481. if (use_right) {
  482. bank->right_gain =
  483. bank->right_gain_end = vol_right;
  484. }
  485. }
  486. if (ypcm->output_rear) {
  487. if (!ypcm->swap_rear) {
  488. if (use_left) {
  489. bank->eff2_gain =
  490. bank->eff2_gain_end = vol_left;
  491. }
  492. if (use_right) {
  493. bank->eff3_gain =
  494. bank->eff3_gain_end = vol_right;
  495. }
  496. } else {
  497. /* The SPDIF out channels seem to be swapped, so we have
  498. * to swap them here, too. The rear analog out channels
  499. * will be wrong, but otherwise AC3 would not work.
  500. */
  501. if (use_left) {
  502. bank->eff3_gain =
  503. bank->eff3_gain_end = vol_left;
  504. }
  505. if (use_right) {
  506. bank->eff2_gain =
  507. bank->eff2_gain_end = vol_right;
  508. }
  509. }
  510. }
  511. }
  512. }
  513. static int __devinit snd_ymfpci_ac3_init(struct snd_ymfpci *chip)
  514. {
  515. if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
  516. 4096, &chip->ac3_tmp_base) < 0)
  517. return -ENOMEM;
  518. chip->bank_effect[3][0]->base =
  519. chip->bank_effect[3][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr);
  520. chip->bank_effect[3][0]->loop_end =
  521. chip->bank_effect[3][1]->loop_end = cpu_to_le32(1024);
  522. chip->bank_effect[4][0]->base =
  523. chip->bank_effect[4][1]->base = cpu_to_le32(chip->ac3_tmp_base.addr + 2048);
  524. chip->bank_effect[4][0]->loop_end =
  525. chip->bank_effect[4][1]->loop_end = cpu_to_le32(1024);
  526. spin_lock_irq(&chip->reg_lock);
  527. snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
  528. snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) | 3 << 3);
  529. spin_unlock_irq(&chip->reg_lock);
  530. return 0;
  531. }
  532. static int snd_ymfpci_ac3_done(struct snd_ymfpci *chip)
  533. {
  534. spin_lock_irq(&chip->reg_lock);
  535. snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT,
  536. snd_ymfpci_readl(chip, YDSXGR_MAPOFEFFECT) & ~(3 << 3));
  537. spin_unlock_irq(&chip->reg_lock);
  538. // snd_ymfpci_irq_wait(chip);
  539. if (chip->ac3_tmp_base.area) {
  540. snd_dma_free_pages(&chip->ac3_tmp_base);
  541. chip->ac3_tmp_base.area = NULL;
  542. }
  543. return 0;
  544. }
  545. static int snd_ymfpci_playback_hw_params(struct snd_pcm_substream *substream,
  546. struct snd_pcm_hw_params *hw_params)
  547. {
  548. struct snd_pcm_runtime *runtime = substream->runtime;
  549. struct snd_ymfpci_pcm *ypcm = runtime->private_data;
  550. int err;
  551. if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
  552. return err;
  553. if ((err = snd_ymfpci_pcm_voice_alloc(ypcm, params_channels(hw_params))) < 0)
  554. return err;
  555. return 0;
  556. }
  557. static int snd_ymfpci_playback_hw_free(struct snd_pcm_substream *substream)
  558. {
  559. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  560. struct snd_pcm_runtime *runtime = substream->runtime;
  561. struct snd_ymfpci_pcm *ypcm;
  562. if (runtime->private_data == NULL)
  563. return 0;
  564. ypcm = runtime->private_data;
  565. /* wait, until the PCI operations are not finished */
  566. snd_ymfpci_irq_wait(chip);
  567. snd_pcm_lib_free_pages(substream);
  568. if (ypcm->voices[1]) {
  569. snd_ymfpci_voice_free(chip, ypcm->voices[1]);
  570. ypcm->voices[1] = NULL;
  571. }
  572. if (ypcm->voices[0]) {
  573. snd_ymfpci_voice_free(chip, ypcm->voices[0]);
  574. ypcm->voices[0] = NULL;
  575. }
  576. return 0;
  577. }
  578. static int snd_ymfpci_playback_prepare(struct snd_pcm_substream *substream)
  579. {
  580. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  581. struct snd_pcm_runtime *runtime = substream->runtime;
  582. struct snd_ymfpci_pcm *ypcm = runtime->private_data;
  583. unsigned int nvoice;
  584. ypcm->period_size = runtime->period_size;
  585. ypcm->buffer_size = runtime->buffer_size;
  586. ypcm->period_pos = 0;
  587. ypcm->last_pos = 0;
  588. for (nvoice = 0; nvoice < runtime->channels; nvoice++)
  589. snd_ymfpci_pcm_init_voice(ypcm, nvoice, runtime,
  590. substream->pcm == chip->pcm);
  591. return 0;
  592. }
  593. static int snd_ymfpci_capture_hw_params(struct snd_pcm_substream *substream,
  594. struct snd_pcm_hw_params *hw_params)
  595. {
  596. return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  597. }
  598. static int snd_ymfpci_capture_hw_free(struct snd_pcm_substream *substream)
  599. {
  600. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  601. /* wait, until the PCI operations are not finished */
  602. snd_ymfpci_irq_wait(chip);
  603. return snd_pcm_lib_free_pages(substream);
  604. }
  605. static int snd_ymfpci_capture_prepare(struct snd_pcm_substream *substream)
  606. {
  607. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  608. struct snd_pcm_runtime *runtime = substream->runtime;
  609. struct snd_ymfpci_pcm *ypcm = runtime->private_data;
  610. struct snd_ymfpci_capture_bank * bank;
  611. int nbank;
  612. u32 rate, format;
  613. ypcm->period_size = runtime->period_size;
  614. ypcm->buffer_size = runtime->buffer_size;
  615. ypcm->period_pos = 0;
  616. ypcm->last_pos = 0;
  617. ypcm->shift = 0;
  618. rate = ((48000 * 4096) / runtime->rate) - 1;
  619. format = 0;
  620. if (runtime->channels == 2) {
  621. format |= 2;
  622. ypcm->shift++;
  623. }
  624. if (snd_pcm_format_width(runtime->format) == 8)
  625. format |= 1;
  626. else
  627. ypcm->shift++;
  628. switch (ypcm->capture_bank_number) {
  629. case 0:
  630. snd_ymfpci_writel(chip, YDSXGR_RECFORMAT, format);
  631. snd_ymfpci_writel(chip, YDSXGR_RECSLOTSR, rate);
  632. break;
  633. case 1:
  634. snd_ymfpci_writel(chip, YDSXGR_ADCFORMAT, format);
  635. snd_ymfpci_writel(chip, YDSXGR_ADCSLOTSR, rate);
  636. break;
  637. }
  638. for (nbank = 0; nbank < 2; nbank++) {
  639. bank = chip->bank_capture[ypcm->capture_bank_number][nbank];
  640. bank->base = cpu_to_le32(runtime->dma_addr);
  641. bank->loop_end = cpu_to_le32(ypcm->buffer_size << ypcm->shift);
  642. bank->start = 0;
  643. bank->num_of_loops = 0;
  644. }
  645. return 0;
  646. }
  647. static snd_pcm_uframes_t snd_ymfpci_playback_pointer(struct snd_pcm_substream *substream)
  648. {
  649. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  650. struct snd_pcm_runtime *runtime = substream->runtime;
  651. struct snd_ymfpci_pcm *ypcm = runtime->private_data;
  652. struct snd_ymfpci_voice *voice = ypcm->voices[0];
  653. if (!(ypcm->running && voice))
  654. return 0;
  655. return le32_to_cpu(voice->bank[chip->active_bank].start);
  656. }
  657. static snd_pcm_uframes_t snd_ymfpci_capture_pointer(struct snd_pcm_substream *substream)
  658. {
  659. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  660. struct snd_pcm_runtime *runtime = substream->runtime;
  661. struct snd_ymfpci_pcm *ypcm = runtime->private_data;
  662. if (!ypcm->running)
  663. return 0;
  664. return le32_to_cpu(chip->bank_capture[ypcm->capture_bank_number][chip->active_bank]->start) >> ypcm->shift;
  665. }
  666. static void snd_ymfpci_irq_wait(struct snd_ymfpci *chip)
  667. {
  668. wait_queue_t wait;
  669. int loops = 4;
  670. while (loops-- > 0) {
  671. if ((snd_ymfpci_readl(chip, YDSXGR_MODE) & 3) == 0)
  672. continue;
  673. init_waitqueue_entry(&wait, current);
  674. add_wait_queue(&chip->interrupt_sleep, &wait);
  675. atomic_inc(&chip->interrupt_sleep_count);
  676. schedule_timeout_uninterruptible(msecs_to_jiffies(50));
  677. remove_wait_queue(&chip->interrupt_sleep, &wait);
  678. }
  679. }
  680. static irqreturn_t snd_ymfpci_interrupt(int irq, void *dev_id)
  681. {
  682. struct snd_ymfpci *chip = dev_id;
  683. u32 status, nvoice, mode;
  684. struct snd_ymfpci_voice *voice;
  685. status = snd_ymfpci_readl(chip, YDSXGR_STATUS);
  686. if (status & 0x80000000) {
  687. chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT) & 1;
  688. spin_lock(&chip->voice_lock);
  689. for (nvoice = 0; nvoice < YDSXG_PLAYBACK_VOICES; nvoice++) {
  690. voice = &chip->voices[nvoice];
  691. if (voice->interrupt)
  692. voice->interrupt(chip, voice);
  693. }
  694. for (nvoice = 0; nvoice < YDSXG_CAPTURE_VOICES; nvoice++) {
  695. if (chip->capture_substream[nvoice])
  696. snd_ymfpci_pcm_capture_interrupt(chip->capture_substream[nvoice]);
  697. }
  698. #if 0
  699. for (nvoice = 0; nvoice < YDSXG_EFFECT_VOICES; nvoice++) {
  700. if (chip->effect_substream[nvoice])
  701. snd_ymfpci_pcm_effect_interrupt(chip->effect_substream[nvoice]);
  702. }
  703. #endif
  704. spin_unlock(&chip->voice_lock);
  705. spin_lock(&chip->reg_lock);
  706. snd_ymfpci_writel(chip, YDSXGR_STATUS, 0x80000000);
  707. mode = snd_ymfpci_readl(chip, YDSXGR_MODE) | 2;
  708. snd_ymfpci_writel(chip, YDSXGR_MODE, mode);
  709. spin_unlock(&chip->reg_lock);
  710. if (atomic_read(&chip->interrupt_sleep_count)) {
  711. atomic_set(&chip->interrupt_sleep_count, 0);
  712. wake_up(&chip->interrupt_sleep);
  713. }
  714. }
  715. status = snd_ymfpci_readw(chip, YDSXGR_INTFLAG);
  716. if (status & 1) {
  717. if (chip->timer)
  718. snd_timer_interrupt(chip->timer, chip->timer->sticks);
  719. }
  720. snd_ymfpci_writew(chip, YDSXGR_INTFLAG, status);
  721. if (chip->rawmidi)
  722. snd_mpu401_uart_interrupt(irq, chip->rawmidi->private_data);
  723. return IRQ_HANDLED;
  724. }
  725. static struct snd_pcm_hardware snd_ymfpci_playback =
  726. {
  727. .info = (SNDRV_PCM_INFO_MMAP |
  728. SNDRV_PCM_INFO_MMAP_VALID |
  729. SNDRV_PCM_INFO_INTERLEAVED |
  730. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  731. SNDRV_PCM_INFO_PAUSE |
  732. SNDRV_PCM_INFO_RESUME),
  733. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  734. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  735. .rate_min = 8000,
  736. .rate_max = 48000,
  737. .channels_min = 1,
  738. .channels_max = 2,
  739. .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */
  740. .period_bytes_min = 64,
  741. .period_bytes_max = 256 * 1024, /* FIXME: enough? */
  742. .periods_min = 3,
  743. .periods_max = 1024,
  744. .fifo_size = 0,
  745. };
  746. static struct snd_pcm_hardware snd_ymfpci_capture =
  747. {
  748. .info = (SNDRV_PCM_INFO_MMAP |
  749. SNDRV_PCM_INFO_MMAP_VALID |
  750. SNDRV_PCM_INFO_INTERLEAVED |
  751. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  752. SNDRV_PCM_INFO_PAUSE |
  753. SNDRV_PCM_INFO_RESUME),
  754. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  755. .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
  756. .rate_min = 8000,
  757. .rate_max = 48000,
  758. .channels_min = 1,
  759. .channels_max = 2,
  760. .buffer_bytes_max = 256 * 1024, /* FIXME: enough? */
  761. .period_bytes_min = 64,
  762. .period_bytes_max = 256 * 1024, /* FIXME: enough? */
  763. .periods_min = 3,
  764. .periods_max = 1024,
  765. .fifo_size = 0,
  766. };
  767. static void snd_ymfpci_pcm_free_substream(struct snd_pcm_runtime *runtime)
  768. {
  769. kfree(runtime->private_data);
  770. }
  771. static int snd_ymfpci_playback_open_1(struct snd_pcm_substream *substream)
  772. {
  773. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  774. struct snd_pcm_runtime *runtime = substream->runtime;
  775. struct snd_ymfpci_pcm *ypcm;
  776. ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL);
  777. if (ypcm == NULL)
  778. return -ENOMEM;
  779. ypcm->chip = chip;
  780. ypcm->type = PLAYBACK_VOICE;
  781. ypcm->substream = substream;
  782. runtime->hw = snd_ymfpci_playback;
  783. runtime->private_data = ypcm;
  784. runtime->private_free = snd_ymfpci_pcm_free_substream;
  785. /* FIXME? True value is 256/48 = 5.33333 ms */
  786. snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIOD_TIME, 5333, UINT_MAX);
  787. return 0;
  788. }
  789. /* call with spinlock held */
  790. static void ymfpci_open_extension(struct snd_ymfpci *chip)
  791. {
  792. if (! chip->rear_opened) {
  793. if (! chip->spdif_opened) /* set AC3 */
  794. snd_ymfpci_writel(chip, YDSXGR_MODE,
  795. snd_ymfpci_readl(chip, YDSXGR_MODE) | (1 << 30));
  796. /* enable second codec (4CHEN) */
  797. snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
  798. (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) | 0x0010);
  799. }
  800. }
  801. /* call with spinlock held */
  802. static void ymfpci_close_extension(struct snd_ymfpci *chip)
  803. {
  804. if (! chip->rear_opened) {
  805. if (! chip->spdif_opened)
  806. snd_ymfpci_writel(chip, YDSXGR_MODE,
  807. snd_ymfpci_readl(chip, YDSXGR_MODE) & ~(1 << 30));
  808. snd_ymfpci_writew(chip, YDSXGR_SECCONFIG,
  809. (snd_ymfpci_readw(chip, YDSXGR_SECCONFIG) & ~0x0330) & ~0x0010);
  810. }
  811. }
  812. static int snd_ymfpci_playback_open(struct snd_pcm_substream *substream)
  813. {
  814. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  815. struct snd_pcm_runtime *runtime = substream->runtime;
  816. struct snd_ymfpci_pcm *ypcm;
  817. struct snd_kcontrol *kctl;
  818. int err;
  819. if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
  820. return err;
  821. ypcm = runtime->private_data;
  822. ypcm->output_front = 1;
  823. ypcm->output_rear = chip->mode_dup4ch ? 1 : 0;
  824. ypcm->swap_rear = chip->rear_swap;
  825. spin_lock_irq(&chip->reg_lock);
  826. if (ypcm->output_rear) {
  827. ymfpci_open_extension(chip);
  828. chip->rear_opened++;
  829. }
  830. spin_unlock_irq(&chip->reg_lock);
  831. kctl = chip->pcm_mixer[substream->number].ctl;
  832. kctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
  833. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id);
  834. return 0;
  835. }
  836. static int snd_ymfpci_playback_spdif_open(struct snd_pcm_substream *substream)
  837. {
  838. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  839. struct snd_pcm_runtime *runtime = substream->runtime;
  840. struct snd_ymfpci_pcm *ypcm;
  841. int err;
  842. if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
  843. return err;
  844. ypcm = runtime->private_data;
  845. ypcm->output_front = 0;
  846. ypcm->output_rear = 1;
  847. spin_lock_irq(&chip->reg_lock);
  848. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
  849. snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) | 2);
  850. ymfpci_open_extension(chip);
  851. chip->spdif_pcm_bits = chip->spdif_bits;
  852. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
  853. chip->spdif_opened++;
  854. spin_unlock_irq(&chip->reg_lock);
  855. chip->spdif_pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
  856. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
  857. SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
  858. return 0;
  859. }
  860. static int snd_ymfpci_playback_4ch_open(struct snd_pcm_substream *substream)
  861. {
  862. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  863. struct snd_pcm_runtime *runtime = substream->runtime;
  864. struct snd_ymfpci_pcm *ypcm;
  865. int err;
  866. if ((err = snd_ymfpci_playback_open_1(substream)) < 0)
  867. return err;
  868. ypcm = runtime->private_data;
  869. ypcm->output_front = 0;
  870. ypcm->output_rear = 1;
  871. spin_lock_irq(&chip->reg_lock);
  872. ymfpci_open_extension(chip);
  873. chip->rear_opened++;
  874. spin_unlock_irq(&chip->reg_lock);
  875. return 0;
  876. }
  877. static int snd_ymfpci_capture_open(struct snd_pcm_substream *substream,
  878. u32 capture_bank_number)
  879. {
  880. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  881. struct snd_pcm_runtime *runtime = substream->runtime;
  882. struct snd_ymfpci_pcm *ypcm;
  883. ypcm = kzalloc(sizeof(*ypcm), GFP_KERNEL);
  884. if (ypcm == NULL)
  885. return -ENOMEM;
  886. ypcm->chip = chip;
  887. ypcm->type = capture_bank_number + CAPTURE_REC;
  888. ypcm->substream = substream;
  889. ypcm->capture_bank_number = capture_bank_number;
  890. chip->capture_substream[capture_bank_number] = substream;
  891. runtime->hw = snd_ymfpci_capture;
  892. /* FIXME? True value is 256/48 = 5.33333 ms */
  893. snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_PERIOD_TIME, 5333, UINT_MAX);
  894. runtime->private_data = ypcm;
  895. runtime->private_free = snd_ymfpci_pcm_free_substream;
  896. snd_ymfpci_hw_start(chip);
  897. return 0;
  898. }
  899. static int snd_ymfpci_capture_rec_open(struct snd_pcm_substream *substream)
  900. {
  901. return snd_ymfpci_capture_open(substream, 0);
  902. }
  903. static int snd_ymfpci_capture_ac97_open(struct snd_pcm_substream *substream)
  904. {
  905. return snd_ymfpci_capture_open(substream, 1);
  906. }
  907. static int snd_ymfpci_playback_close_1(struct snd_pcm_substream *substream)
  908. {
  909. return 0;
  910. }
  911. static int snd_ymfpci_playback_close(struct snd_pcm_substream *substream)
  912. {
  913. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  914. struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
  915. struct snd_kcontrol *kctl;
  916. spin_lock_irq(&chip->reg_lock);
  917. if (ypcm->output_rear && chip->rear_opened > 0) {
  918. chip->rear_opened--;
  919. ymfpci_close_extension(chip);
  920. }
  921. spin_unlock_irq(&chip->reg_lock);
  922. kctl = chip->pcm_mixer[substream->number].ctl;
  923. kctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
  924. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &kctl->id);
  925. return snd_ymfpci_playback_close_1(substream);
  926. }
  927. static int snd_ymfpci_playback_spdif_close(struct snd_pcm_substream *substream)
  928. {
  929. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  930. spin_lock_irq(&chip->reg_lock);
  931. chip->spdif_opened = 0;
  932. ymfpci_close_extension(chip);
  933. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL,
  934. snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & ~2);
  935. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
  936. spin_unlock_irq(&chip->reg_lock);
  937. chip->spdif_pcm_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
  938. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE |
  939. SNDRV_CTL_EVENT_MASK_INFO, &chip->spdif_pcm_ctl->id);
  940. return snd_ymfpci_playback_close_1(substream);
  941. }
  942. static int snd_ymfpci_playback_4ch_close(struct snd_pcm_substream *substream)
  943. {
  944. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  945. spin_lock_irq(&chip->reg_lock);
  946. if (chip->rear_opened > 0) {
  947. chip->rear_opened--;
  948. ymfpci_close_extension(chip);
  949. }
  950. spin_unlock_irq(&chip->reg_lock);
  951. return snd_ymfpci_playback_close_1(substream);
  952. }
  953. static int snd_ymfpci_capture_close(struct snd_pcm_substream *substream)
  954. {
  955. struct snd_ymfpci *chip = snd_pcm_substream_chip(substream);
  956. struct snd_pcm_runtime *runtime = substream->runtime;
  957. struct snd_ymfpci_pcm *ypcm = runtime->private_data;
  958. if (ypcm != NULL) {
  959. chip->capture_substream[ypcm->capture_bank_number] = NULL;
  960. snd_ymfpci_hw_stop(chip);
  961. }
  962. return 0;
  963. }
  964. static struct snd_pcm_ops snd_ymfpci_playback_ops = {
  965. .open = snd_ymfpci_playback_open,
  966. .close = snd_ymfpci_playback_close,
  967. .ioctl = snd_pcm_lib_ioctl,
  968. .hw_params = snd_ymfpci_playback_hw_params,
  969. .hw_free = snd_ymfpci_playback_hw_free,
  970. .prepare = snd_ymfpci_playback_prepare,
  971. .trigger = snd_ymfpci_playback_trigger,
  972. .pointer = snd_ymfpci_playback_pointer,
  973. };
  974. static struct snd_pcm_ops snd_ymfpci_capture_rec_ops = {
  975. .open = snd_ymfpci_capture_rec_open,
  976. .close = snd_ymfpci_capture_close,
  977. .ioctl = snd_pcm_lib_ioctl,
  978. .hw_params = snd_ymfpci_capture_hw_params,
  979. .hw_free = snd_ymfpci_capture_hw_free,
  980. .prepare = snd_ymfpci_capture_prepare,
  981. .trigger = snd_ymfpci_capture_trigger,
  982. .pointer = snd_ymfpci_capture_pointer,
  983. };
  984. int __devinit snd_ymfpci_pcm(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
  985. {
  986. struct snd_pcm *pcm;
  987. int err;
  988. if (rpcm)
  989. *rpcm = NULL;
  990. if ((err = snd_pcm_new(chip->card, "YMFPCI", device, 32, 1, &pcm)) < 0)
  991. return err;
  992. pcm->private_data = chip;
  993. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_ops);
  994. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_rec_ops);
  995. /* global setup */
  996. pcm->info_flags = 0;
  997. strcpy(pcm->name, "YMFPCI");
  998. chip->pcm = pcm;
  999. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1000. snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
  1001. if (rpcm)
  1002. *rpcm = pcm;
  1003. return 0;
  1004. }
  1005. static struct snd_pcm_ops snd_ymfpci_capture_ac97_ops = {
  1006. .open = snd_ymfpci_capture_ac97_open,
  1007. .close = snd_ymfpci_capture_close,
  1008. .ioctl = snd_pcm_lib_ioctl,
  1009. .hw_params = snd_ymfpci_capture_hw_params,
  1010. .hw_free = snd_ymfpci_capture_hw_free,
  1011. .prepare = snd_ymfpci_capture_prepare,
  1012. .trigger = snd_ymfpci_capture_trigger,
  1013. .pointer = snd_ymfpci_capture_pointer,
  1014. };
  1015. int __devinit snd_ymfpci_pcm2(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
  1016. {
  1017. struct snd_pcm *pcm;
  1018. int err;
  1019. if (rpcm)
  1020. *rpcm = NULL;
  1021. if ((err = snd_pcm_new(chip->card, "YMFPCI - PCM2", device, 0, 1, &pcm)) < 0)
  1022. return err;
  1023. pcm->private_data = chip;
  1024. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ymfpci_capture_ac97_ops);
  1025. /* global setup */
  1026. pcm->info_flags = 0;
  1027. sprintf(pcm->name, "YMFPCI - %s",
  1028. chip->device_id == PCI_DEVICE_ID_YAMAHA_754 ? "Direct Recording" : "AC'97");
  1029. chip->pcm2 = pcm;
  1030. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1031. snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
  1032. if (rpcm)
  1033. *rpcm = pcm;
  1034. return 0;
  1035. }
  1036. static struct snd_pcm_ops snd_ymfpci_playback_spdif_ops = {
  1037. .open = snd_ymfpci_playback_spdif_open,
  1038. .close = snd_ymfpci_playback_spdif_close,
  1039. .ioctl = snd_pcm_lib_ioctl,
  1040. .hw_params = snd_ymfpci_playback_hw_params,
  1041. .hw_free = snd_ymfpci_playback_hw_free,
  1042. .prepare = snd_ymfpci_playback_prepare,
  1043. .trigger = snd_ymfpci_playback_trigger,
  1044. .pointer = snd_ymfpci_playback_pointer,
  1045. };
  1046. int __devinit snd_ymfpci_pcm_spdif(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
  1047. {
  1048. struct snd_pcm *pcm;
  1049. int err;
  1050. if (rpcm)
  1051. *rpcm = NULL;
  1052. if ((err = snd_pcm_new(chip->card, "YMFPCI - IEC958", device, 1, 0, &pcm)) < 0)
  1053. return err;
  1054. pcm->private_data = chip;
  1055. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_spdif_ops);
  1056. /* global setup */
  1057. pcm->info_flags = 0;
  1058. strcpy(pcm->name, "YMFPCI - IEC958");
  1059. chip->pcm_spdif = pcm;
  1060. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1061. snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
  1062. if (rpcm)
  1063. *rpcm = pcm;
  1064. return 0;
  1065. }
  1066. static struct snd_pcm_ops snd_ymfpci_playback_4ch_ops = {
  1067. .open = snd_ymfpci_playback_4ch_open,
  1068. .close = snd_ymfpci_playback_4ch_close,
  1069. .ioctl = snd_pcm_lib_ioctl,
  1070. .hw_params = snd_ymfpci_playback_hw_params,
  1071. .hw_free = snd_ymfpci_playback_hw_free,
  1072. .prepare = snd_ymfpci_playback_prepare,
  1073. .trigger = snd_ymfpci_playback_trigger,
  1074. .pointer = snd_ymfpci_playback_pointer,
  1075. };
  1076. int __devinit snd_ymfpci_pcm_4ch(struct snd_ymfpci *chip, int device, struct snd_pcm ** rpcm)
  1077. {
  1078. struct snd_pcm *pcm;
  1079. int err;
  1080. if (rpcm)
  1081. *rpcm = NULL;
  1082. if ((err = snd_pcm_new(chip->card, "YMFPCI - Rear", device, 1, 0, &pcm)) < 0)
  1083. return err;
  1084. pcm->private_data = chip;
  1085. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ymfpci_playback_4ch_ops);
  1086. /* global setup */
  1087. pcm->info_flags = 0;
  1088. strcpy(pcm->name, "YMFPCI - Rear PCM");
  1089. chip->pcm_4ch = pcm;
  1090. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1091. snd_dma_pci_data(chip->pci), 64*1024, 256*1024);
  1092. if (rpcm)
  1093. *rpcm = pcm;
  1094. return 0;
  1095. }
  1096. static int snd_ymfpci_spdif_default_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1097. {
  1098. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1099. uinfo->count = 1;
  1100. return 0;
  1101. }
  1102. static int snd_ymfpci_spdif_default_get(struct snd_kcontrol *kcontrol,
  1103. struct snd_ctl_elem_value *ucontrol)
  1104. {
  1105. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1106. spin_lock_irq(&chip->reg_lock);
  1107. ucontrol->value.iec958.status[0] = (chip->spdif_bits >> 0) & 0xff;
  1108. ucontrol->value.iec958.status[1] = (chip->spdif_bits >> 8) & 0xff;
  1109. ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000;
  1110. spin_unlock_irq(&chip->reg_lock);
  1111. return 0;
  1112. }
  1113. static int snd_ymfpci_spdif_default_put(struct snd_kcontrol *kcontrol,
  1114. struct snd_ctl_elem_value *ucontrol)
  1115. {
  1116. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1117. unsigned int val;
  1118. int change;
  1119. val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
  1120. (ucontrol->value.iec958.status[1] << 8);
  1121. spin_lock_irq(&chip->reg_lock);
  1122. change = chip->spdif_bits != val;
  1123. chip->spdif_bits = val;
  1124. if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 1) && chip->pcm_spdif == NULL)
  1125. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
  1126. spin_unlock_irq(&chip->reg_lock);
  1127. return change;
  1128. }
  1129. static struct snd_kcontrol_new snd_ymfpci_spdif_default __devinitdata =
  1130. {
  1131. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1132. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
  1133. .info = snd_ymfpci_spdif_default_info,
  1134. .get = snd_ymfpci_spdif_default_get,
  1135. .put = snd_ymfpci_spdif_default_put
  1136. };
  1137. static int snd_ymfpci_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1138. {
  1139. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1140. uinfo->count = 1;
  1141. return 0;
  1142. }
  1143. static int snd_ymfpci_spdif_mask_get(struct snd_kcontrol *kcontrol,
  1144. struct snd_ctl_elem_value *ucontrol)
  1145. {
  1146. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1147. spin_lock_irq(&chip->reg_lock);
  1148. ucontrol->value.iec958.status[0] = 0x3e;
  1149. ucontrol->value.iec958.status[1] = 0xff;
  1150. spin_unlock_irq(&chip->reg_lock);
  1151. return 0;
  1152. }
  1153. static struct snd_kcontrol_new snd_ymfpci_spdif_mask __devinitdata =
  1154. {
  1155. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1156. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1157. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
  1158. .info = snd_ymfpci_spdif_mask_info,
  1159. .get = snd_ymfpci_spdif_mask_get,
  1160. };
  1161. static int snd_ymfpci_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1162. {
  1163. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1164. uinfo->count = 1;
  1165. return 0;
  1166. }
  1167. static int snd_ymfpci_spdif_stream_get(struct snd_kcontrol *kcontrol,
  1168. struct snd_ctl_elem_value *ucontrol)
  1169. {
  1170. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1171. spin_lock_irq(&chip->reg_lock);
  1172. ucontrol->value.iec958.status[0] = (chip->spdif_pcm_bits >> 0) & 0xff;
  1173. ucontrol->value.iec958.status[1] = (chip->spdif_pcm_bits >> 8) & 0xff;
  1174. ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS_48000;
  1175. spin_unlock_irq(&chip->reg_lock);
  1176. return 0;
  1177. }
  1178. static int snd_ymfpci_spdif_stream_put(struct snd_kcontrol *kcontrol,
  1179. struct snd_ctl_elem_value *ucontrol)
  1180. {
  1181. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1182. unsigned int val;
  1183. int change;
  1184. val = ((ucontrol->value.iec958.status[0] & 0x3e) << 0) |
  1185. (ucontrol->value.iec958.status[1] << 8);
  1186. spin_lock_irq(&chip->reg_lock);
  1187. change = chip->spdif_pcm_bits != val;
  1188. chip->spdif_pcm_bits = val;
  1189. if ((snd_ymfpci_readw(chip, YDSXGR_SPDIFOUTCTRL) & 2))
  1190. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_pcm_bits);
  1191. spin_unlock_irq(&chip->reg_lock);
  1192. return change;
  1193. }
  1194. static struct snd_kcontrol_new snd_ymfpci_spdif_stream __devinitdata =
  1195. {
  1196. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
  1197. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1198. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
  1199. .info = snd_ymfpci_spdif_stream_info,
  1200. .get = snd_ymfpci_spdif_stream_get,
  1201. .put = snd_ymfpci_spdif_stream_put
  1202. };
  1203. static int snd_ymfpci_drec_source_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *info)
  1204. {
  1205. static char *texts[3] = {"AC'97", "IEC958", "ZV Port"};
  1206. info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1207. info->count = 1;
  1208. info->value.enumerated.items = 3;
  1209. if (info->value.enumerated.item > 2)
  1210. info->value.enumerated.item = 2;
  1211. strcpy(info->value.enumerated.name, texts[info->value.enumerated.item]);
  1212. return 0;
  1213. }
  1214. static int snd_ymfpci_drec_source_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value)
  1215. {
  1216. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1217. u16 reg;
  1218. spin_lock_irq(&chip->reg_lock);
  1219. reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
  1220. spin_unlock_irq(&chip->reg_lock);
  1221. if (!(reg & 0x100))
  1222. value->value.enumerated.item[0] = 0;
  1223. else
  1224. value->value.enumerated.item[0] = 1 + ((reg & 0x200) != 0);
  1225. return 0;
  1226. }
  1227. static int snd_ymfpci_drec_source_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *value)
  1228. {
  1229. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1230. u16 reg, old_reg;
  1231. spin_lock_irq(&chip->reg_lock);
  1232. old_reg = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
  1233. if (value->value.enumerated.item[0] == 0)
  1234. reg = old_reg & ~0x100;
  1235. else
  1236. reg = (old_reg & ~0x300) | 0x100 | ((value->value.enumerated.item[0] == 2) << 9);
  1237. snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, reg);
  1238. spin_unlock_irq(&chip->reg_lock);
  1239. return reg != old_reg;
  1240. }
  1241. static struct snd_kcontrol_new snd_ymfpci_drec_source __devinitdata = {
  1242. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE,
  1243. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1244. .name = "Direct Recording Source",
  1245. .info = snd_ymfpci_drec_source_info,
  1246. .get = snd_ymfpci_drec_source_get,
  1247. .put = snd_ymfpci_drec_source_put
  1248. };
  1249. /*
  1250. * Mixer controls
  1251. */
  1252. #define YMFPCI_SINGLE(xname, xindex, reg, shift) \
  1253. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
  1254. .info = snd_ymfpci_info_single, \
  1255. .get = snd_ymfpci_get_single, .put = snd_ymfpci_put_single, \
  1256. .private_value = ((reg) | ((shift) << 16)) }
  1257. static int snd_ymfpci_info_single(struct snd_kcontrol *kcontrol,
  1258. struct snd_ctl_elem_info *uinfo)
  1259. {
  1260. int reg = kcontrol->private_value & 0xffff;
  1261. switch (reg) {
  1262. case YDSXGR_SPDIFOUTCTRL: break;
  1263. case YDSXGR_SPDIFINCTRL: break;
  1264. default: return -EINVAL;
  1265. }
  1266. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1267. uinfo->count = 1;
  1268. uinfo->value.integer.min = 0;
  1269. uinfo->value.integer.max = 1;
  1270. return 0;
  1271. }
  1272. static int snd_ymfpci_get_single(struct snd_kcontrol *kcontrol,
  1273. struct snd_ctl_elem_value *ucontrol)
  1274. {
  1275. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1276. int reg = kcontrol->private_value & 0xffff;
  1277. unsigned int shift = (kcontrol->private_value >> 16) & 0xff;
  1278. unsigned int mask = 1;
  1279. switch (reg) {
  1280. case YDSXGR_SPDIFOUTCTRL: break;
  1281. case YDSXGR_SPDIFINCTRL: break;
  1282. default: return -EINVAL;
  1283. }
  1284. ucontrol->value.integer.value[0] =
  1285. (snd_ymfpci_readl(chip, reg) >> shift) & mask;
  1286. return 0;
  1287. }
  1288. static int snd_ymfpci_put_single(struct snd_kcontrol *kcontrol,
  1289. struct snd_ctl_elem_value *ucontrol)
  1290. {
  1291. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1292. int reg = kcontrol->private_value & 0xffff;
  1293. unsigned int shift = (kcontrol->private_value >> 16) & 0xff;
  1294. unsigned int mask = 1;
  1295. int change;
  1296. unsigned int val, oval;
  1297. switch (reg) {
  1298. case YDSXGR_SPDIFOUTCTRL: break;
  1299. case YDSXGR_SPDIFINCTRL: break;
  1300. default: return -EINVAL;
  1301. }
  1302. val = (ucontrol->value.integer.value[0] & mask);
  1303. val <<= shift;
  1304. spin_lock_irq(&chip->reg_lock);
  1305. oval = snd_ymfpci_readl(chip, reg);
  1306. val = (oval & ~(mask << shift)) | val;
  1307. change = val != oval;
  1308. snd_ymfpci_writel(chip, reg, val);
  1309. spin_unlock_irq(&chip->reg_lock);
  1310. return change;
  1311. }
  1312. static DECLARE_TLV_DB_LINEAR(db_scale_native, TLV_DB_GAIN_MUTE, 0);
  1313. #define YMFPCI_DOUBLE(xname, xindex, reg) \
  1314. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
  1315. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
  1316. .info = snd_ymfpci_info_double, \
  1317. .get = snd_ymfpci_get_double, .put = snd_ymfpci_put_double, \
  1318. .private_value = reg, \
  1319. .tlv = { .p = db_scale_native } }
  1320. static int snd_ymfpci_info_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1321. {
  1322. unsigned int reg = kcontrol->private_value;
  1323. if (reg < 0x80 || reg >= 0xc0)
  1324. return -EINVAL;
  1325. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1326. uinfo->count = 2;
  1327. uinfo->value.integer.min = 0;
  1328. uinfo->value.integer.max = 16383;
  1329. return 0;
  1330. }
  1331. static int snd_ymfpci_get_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1332. {
  1333. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1334. unsigned int reg = kcontrol->private_value;
  1335. unsigned int shift_left = 0, shift_right = 16, mask = 16383;
  1336. unsigned int val;
  1337. if (reg < 0x80 || reg >= 0xc0)
  1338. return -EINVAL;
  1339. spin_lock_irq(&chip->reg_lock);
  1340. val = snd_ymfpci_readl(chip, reg);
  1341. spin_unlock_irq(&chip->reg_lock);
  1342. ucontrol->value.integer.value[0] = (val >> shift_left) & mask;
  1343. ucontrol->value.integer.value[1] = (val >> shift_right) & mask;
  1344. return 0;
  1345. }
  1346. static int snd_ymfpci_put_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1347. {
  1348. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1349. unsigned int reg = kcontrol->private_value;
  1350. unsigned int shift_left = 0, shift_right = 16, mask = 16383;
  1351. int change;
  1352. unsigned int val1, val2, oval;
  1353. if (reg < 0x80 || reg >= 0xc0)
  1354. return -EINVAL;
  1355. val1 = ucontrol->value.integer.value[0] & mask;
  1356. val2 = ucontrol->value.integer.value[1] & mask;
  1357. val1 <<= shift_left;
  1358. val2 <<= shift_right;
  1359. spin_lock_irq(&chip->reg_lock);
  1360. oval = snd_ymfpci_readl(chip, reg);
  1361. val1 = (oval & ~((mask << shift_left) | (mask << shift_right))) | val1 | val2;
  1362. change = val1 != oval;
  1363. snd_ymfpci_writel(chip, reg, val1);
  1364. spin_unlock_irq(&chip->reg_lock);
  1365. return change;
  1366. }
  1367. /*
  1368. * 4ch duplication
  1369. */
  1370. static int snd_ymfpci_info_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1371. {
  1372. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1373. uinfo->count = 1;
  1374. uinfo->value.integer.min = 0;
  1375. uinfo->value.integer.max = 1;
  1376. return 0;
  1377. }
  1378. static int snd_ymfpci_get_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1379. {
  1380. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1381. ucontrol->value.integer.value[0] = chip->mode_dup4ch;
  1382. return 0;
  1383. }
  1384. static int snd_ymfpci_put_dup4ch(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1385. {
  1386. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1387. int change;
  1388. change = (ucontrol->value.integer.value[0] != chip->mode_dup4ch);
  1389. if (change)
  1390. chip->mode_dup4ch = !!ucontrol->value.integer.value[0];
  1391. return change;
  1392. }
  1393. static struct snd_kcontrol_new snd_ymfpci_controls[] __devinitdata = {
  1394. YMFPCI_DOUBLE("Wave Playback Volume", 0, YDSXGR_NATIVEDACOUTVOL),
  1395. YMFPCI_DOUBLE("Wave Capture Volume", 0, YDSXGR_NATIVEDACLOOPVOL),
  1396. YMFPCI_DOUBLE("Digital Capture Volume", 0, YDSXGR_NATIVEDACINVOL),
  1397. YMFPCI_DOUBLE("Digital Capture Volume", 1, YDSXGR_NATIVEADCINVOL),
  1398. YMFPCI_DOUBLE("ADC Playback Volume", 0, YDSXGR_PRIADCOUTVOL),
  1399. YMFPCI_DOUBLE("ADC Capture Volume", 0, YDSXGR_PRIADCLOOPVOL),
  1400. YMFPCI_DOUBLE("ADC Playback Volume", 1, YDSXGR_SECADCOUTVOL),
  1401. YMFPCI_DOUBLE("ADC Capture Volume", 1, YDSXGR_SECADCLOOPVOL),
  1402. YMFPCI_DOUBLE("FM Legacy Volume", 0, YDSXGR_LEGACYOUTVOL),
  1403. YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ", PLAYBACK,VOLUME), 0, YDSXGR_ZVOUTVOL),
  1404. YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("", CAPTURE,VOLUME), 0, YDSXGR_ZVLOOPVOL),
  1405. YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("AC97 ",PLAYBACK,VOLUME), 1, YDSXGR_SPDIFOUTVOL),
  1406. YMFPCI_DOUBLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,VOLUME), 1, YDSXGR_SPDIFLOOPVOL),
  1407. YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), 0, YDSXGR_SPDIFOUTCTRL, 0),
  1408. YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), 0, YDSXGR_SPDIFINCTRL, 0),
  1409. YMFPCI_SINGLE(SNDRV_CTL_NAME_IEC958("Loop",NONE,NONE), 0, YDSXGR_SPDIFINCTRL, 4),
  1410. {
  1411. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1412. .name = "4ch Duplication",
  1413. .info = snd_ymfpci_info_dup4ch,
  1414. .get = snd_ymfpci_get_dup4ch,
  1415. .put = snd_ymfpci_put_dup4ch,
  1416. },
  1417. };
  1418. /*
  1419. * GPIO
  1420. */
  1421. static int snd_ymfpci_get_gpio_out(struct snd_ymfpci *chip, int pin)
  1422. {
  1423. u16 reg, mode;
  1424. unsigned long flags;
  1425. spin_lock_irqsave(&chip->reg_lock, flags);
  1426. reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
  1427. reg &= ~(1 << (pin + 8));
  1428. reg |= (1 << pin);
  1429. snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
  1430. /* set the level mode for input line */
  1431. mode = snd_ymfpci_readw(chip, YDSXGR_GPIOTYPECONFIG);
  1432. mode &= ~(3 << (pin * 2));
  1433. snd_ymfpci_writew(chip, YDSXGR_GPIOTYPECONFIG, mode);
  1434. snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
  1435. mode = snd_ymfpci_readw(chip, YDSXGR_GPIOINSTATUS);
  1436. spin_unlock_irqrestore(&chip->reg_lock, flags);
  1437. return (mode >> pin) & 1;
  1438. }
  1439. static int snd_ymfpci_set_gpio_out(struct snd_ymfpci *chip, int pin, int enable)
  1440. {
  1441. u16 reg;
  1442. unsigned long flags;
  1443. spin_lock_irqsave(&chip->reg_lock, flags);
  1444. reg = snd_ymfpci_readw(chip, YDSXGR_GPIOFUNCENABLE);
  1445. reg &= ~(1 << pin);
  1446. reg &= ~(1 << (pin + 8));
  1447. snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg);
  1448. snd_ymfpci_writew(chip, YDSXGR_GPIOOUTCTRL, enable << pin);
  1449. snd_ymfpci_writew(chip, YDSXGR_GPIOFUNCENABLE, reg | (1 << (pin + 8)));
  1450. spin_unlock_irqrestore(&chip->reg_lock, flags);
  1451. return 0;
  1452. }
  1453. static int snd_ymfpci_gpio_sw_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1454. {
  1455. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1456. uinfo->count = 1;
  1457. uinfo->value.integer.min = 0;
  1458. uinfo->value.integer.max = 1;
  1459. return 0;
  1460. }
  1461. static int snd_ymfpci_gpio_sw_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1462. {
  1463. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1464. int pin = (int)kcontrol->private_value;
  1465. ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
  1466. return 0;
  1467. }
  1468. static int snd_ymfpci_gpio_sw_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1469. {
  1470. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1471. int pin = (int)kcontrol->private_value;
  1472. if (snd_ymfpci_get_gpio_out(chip, pin) != ucontrol->value.integer.value[0]) {
  1473. snd_ymfpci_set_gpio_out(chip, pin, !!ucontrol->value.integer.value[0]);
  1474. ucontrol->value.integer.value[0] = snd_ymfpci_get_gpio_out(chip, pin);
  1475. return 1;
  1476. }
  1477. return 0;
  1478. }
  1479. static struct snd_kcontrol_new snd_ymfpci_rear_shared __devinitdata = {
  1480. .name = "Shared Rear/Line-In Switch",
  1481. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1482. .info = snd_ymfpci_gpio_sw_info,
  1483. .get = snd_ymfpci_gpio_sw_get,
  1484. .put = snd_ymfpci_gpio_sw_put,
  1485. .private_value = 2,
  1486. };
  1487. /*
  1488. * PCM voice volume
  1489. */
  1490. static int snd_ymfpci_pcm_vol_info(struct snd_kcontrol *kcontrol,
  1491. struct snd_ctl_elem_info *uinfo)
  1492. {
  1493. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1494. uinfo->count = 2;
  1495. uinfo->value.integer.min = 0;
  1496. uinfo->value.integer.max = 0x8000;
  1497. return 0;
  1498. }
  1499. static int snd_ymfpci_pcm_vol_get(struct snd_kcontrol *kcontrol,
  1500. struct snd_ctl_elem_value *ucontrol)
  1501. {
  1502. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1503. unsigned int subs = kcontrol->id.subdevice;
  1504. ucontrol->value.integer.value[0] = chip->pcm_mixer[subs].left;
  1505. ucontrol->value.integer.value[1] = chip->pcm_mixer[subs].right;
  1506. return 0;
  1507. }
  1508. static int snd_ymfpci_pcm_vol_put(struct snd_kcontrol *kcontrol,
  1509. struct snd_ctl_elem_value *ucontrol)
  1510. {
  1511. struct snd_ymfpci *chip = snd_kcontrol_chip(kcontrol);
  1512. unsigned int subs = kcontrol->id.subdevice;
  1513. struct snd_pcm_substream *substream;
  1514. unsigned long flags;
  1515. if (ucontrol->value.integer.value[0] != chip->pcm_mixer[subs].left ||
  1516. ucontrol->value.integer.value[1] != chip->pcm_mixer[subs].right) {
  1517. chip->pcm_mixer[subs].left = ucontrol->value.integer.value[0];
  1518. chip->pcm_mixer[subs].right = ucontrol->value.integer.value[1];
  1519. substream = (struct snd_pcm_substream *)kcontrol->private_value;
  1520. spin_lock_irqsave(&chip->voice_lock, flags);
  1521. if (substream->runtime && substream->runtime->private_data) {
  1522. struct snd_ymfpci_pcm *ypcm = substream->runtime->private_data;
  1523. ypcm->update_pcm_vol = 2;
  1524. }
  1525. spin_unlock_irqrestore(&chip->voice_lock, flags);
  1526. return 1;
  1527. }
  1528. return 0;
  1529. }
  1530. static struct snd_kcontrol_new snd_ymfpci_pcm_volume __devinitdata = {
  1531. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1532. .name = "PCM Playback Volume",
  1533. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1534. SNDRV_CTL_ELEM_ACCESS_INACTIVE,
  1535. .info = snd_ymfpci_pcm_vol_info,
  1536. .get = snd_ymfpci_pcm_vol_get,
  1537. .put = snd_ymfpci_pcm_vol_put,
  1538. };
  1539. /*
  1540. * Mixer routines
  1541. */
  1542. static void snd_ymfpci_mixer_free_ac97_bus(struct snd_ac97_bus *bus)
  1543. {
  1544. struct snd_ymfpci *chip = bus->private_data;
  1545. chip->ac97_bus = NULL;
  1546. }
  1547. static void snd_ymfpci_mixer_free_ac97(struct snd_ac97 *ac97)
  1548. {
  1549. struct snd_ymfpci *chip = ac97->private_data;
  1550. chip->ac97 = NULL;
  1551. }
  1552. int __devinit snd_ymfpci_mixer(struct snd_ymfpci *chip, int rear_switch, int rear_swap)
  1553. {
  1554. struct snd_ac97_template ac97;
  1555. struct snd_kcontrol *kctl;
  1556. struct snd_pcm_substream *substream;
  1557. unsigned int idx;
  1558. int err;
  1559. static struct snd_ac97_bus_ops ops = {
  1560. .write = snd_ymfpci_codec_write,
  1561. .read = snd_ymfpci_codec_read,
  1562. };
  1563. chip->rear_swap = rear_swap;
  1564. if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0)
  1565. return err;
  1566. chip->ac97_bus->private_free = snd_ymfpci_mixer_free_ac97_bus;
  1567. chip->ac97_bus->no_vra = 1; /* YMFPCI doesn't need VRA */
  1568. memset(&ac97, 0, sizeof(ac97));
  1569. ac97.private_data = chip;
  1570. ac97.private_free = snd_ymfpci_mixer_free_ac97;
  1571. if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0)
  1572. return err;
  1573. /* to be sure */
  1574. snd_ac97_update_bits(chip->ac97, AC97_EXTENDED_STATUS,
  1575. AC97_EA_VRA|AC97_EA_VRM, 0);
  1576. for (idx = 0; idx < ARRAY_SIZE(snd_ymfpci_controls); idx++) {
  1577. if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_controls[idx], chip))) < 0)
  1578. return err;
  1579. }
  1580. /* add S/PDIF control */
  1581. snd_assert(chip->pcm_spdif != NULL, return -EIO);
  1582. if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_default, chip))) < 0)
  1583. return err;
  1584. kctl->id.device = chip->pcm_spdif->device;
  1585. if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_mask, chip))) < 0)
  1586. return err;
  1587. kctl->id.device = chip->pcm_spdif->device;
  1588. if ((err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_spdif_stream, chip))) < 0)
  1589. return err;
  1590. kctl->id.device = chip->pcm_spdif->device;
  1591. chip->spdif_pcm_ctl = kctl;
  1592. /* direct recording source */
  1593. if (chip->device_id == PCI_DEVICE_ID_YAMAHA_754 &&
  1594. (err = snd_ctl_add(chip->card, kctl = snd_ctl_new1(&snd_ymfpci_drec_source, chip))) < 0)
  1595. return err;
  1596. /*
  1597. * shared rear/line-in
  1598. */
  1599. if (rear_switch) {
  1600. if ((err = snd_ctl_add(chip->card, snd_ctl_new1(&snd_ymfpci_rear_shared, chip))) < 0)
  1601. return err;
  1602. }
  1603. /* per-voice volume */
  1604. substream = chip->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
  1605. for (idx = 0; idx < 32; ++idx) {
  1606. kctl = snd_ctl_new1(&snd_ymfpci_pcm_volume, chip);
  1607. if (!kctl)
  1608. return -ENOMEM;
  1609. kctl->id.device = chip->pcm->device;
  1610. kctl->id.subdevice = idx;
  1611. kctl->private_value = (unsigned long)substream;
  1612. if ((err = snd_ctl_add(chip->card, kctl)) < 0)
  1613. return err;
  1614. chip->pcm_mixer[idx].left = 0x8000;
  1615. chip->pcm_mixer[idx].right = 0x8000;
  1616. chip->pcm_mixer[idx].ctl = kctl;
  1617. substream = substream->next;
  1618. }
  1619. return 0;
  1620. }
  1621. /*
  1622. * timer
  1623. */
  1624. static int snd_ymfpci_timer_start(struct snd_timer *timer)
  1625. {
  1626. struct snd_ymfpci *chip;
  1627. unsigned long flags;
  1628. unsigned int count;
  1629. chip = snd_timer_chip(timer);
  1630. count = (timer->sticks << 1) - 1;
  1631. spin_lock_irqsave(&chip->reg_lock, flags);
  1632. snd_ymfpci_writew(chip, YDSXGR_TIMERCOUNT, count);
  1633. snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x03);
  1634. spin_unlock_irqrestore(&chip->reg_lock, flags);
  1635. return 0;
  1636. }
  1637. static int snd_ymfpci_timer_stop(struct snd_timer *timer)
  1638. {
  1639. struct snd_ymfpci *chip;
  1640. unsigned long flags;
  1641. chip = snd_timer_chip(timer);
  1642. spin_lock_irqsave(&chip->reg_lock, flags);
  1643. snd_ymfpci_writeb(chip, YDSXGR_TIMERCTRL, 0x00);
  1644. spin_unlock_irqrestore(&chip->reg_lock, flags);
  1645. return 0;
  1646. }
  1647. static int snd_ymfpci_timer_precise_resolution(struct snd_timer *timer,
  1648. unsigned long *num, unsigned long *den)
  1649. {
  1650. *num = 1;
  1651. *den = 48000;
  1652. return 0;
  1653. }
  1654. static struct snd_timer_hardware snd_ymfpci_timer_hw = {
  1655. .flags = SNDRV_TIMER_HW_AUTO,
  1656. .resolution = 20833, /* 1/fs = 20.8333...us */
  1657. .ticks = 0x8000,
  1658. .start = snd_ymfpci_timer_start,
  1659. .stop = snd_ymfpci_timer_stop,
  1660. .precise_resolution = snd_ymfpci_timer_precise_resolution,
  1661. };
  1662. int __devinit snd_ymfpci_timer(struct snd_ymfpci *chip, int device)
  1663. {
  1664. struct snd_timer *timer = NULL;
  1665. struct snd_timer_id tid;
  1666. int err;
  1667. tid.dev_class = SNDRV_TIMER_CLASS_CARD;
  1668. tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
  1669. tid.card = chip->card->number;
  1670. tid.device = device;
  1671. tid.subdevice = 0;
  1672. if ((err = snd_timer_new(chip->card, "YMFPCI", &tid, &timer)) >= 0) {
  1673. strcpy(timer->name, "YMFPCI timer");
  1674. timer->private_data = chip;
  1675. timer->hw = snd_ymfpci_timer_hw;
  1676. }
  1677. chip->timer = timer;
  1678. return err;
  1679. }
  1680. /*
  1681. * proc interface
  1682. */
  1683. static void snd_ymfpci_proc_read(struct snd_info_entry *entry,
  1684. struct snd_info_buffer *buffer)
  1685. {
  1686. struct snd_ymfpci *chip = entry->private_data;
  1687. int i;
  1688. snd_iprintf(buffer, "YMFPCI\n\n");
  1689. for (i = 0; i <= YDSXGR_WORKBASE; i += 4)
  1690. snd_iprintf(buffer, "%04x: %04x\n", i, snd_ymfpci_readl(chip, i));
  1691. }
  1692. static int __devinit snd_ymfpci_proc_init(struct snd_card *card, struct snd_ymfpci *chip)
  1693. {
  1694. struct snd_info_entry *entry;
  1695. if (! snd_card_proc_new(card, "ymfpci", &entry))
  1696. snd_info_set_text_ops(entry, chip, snd_ymfpci_proc_read);
  1697. return 0;
  1698. }
  1699. /*
  1700. * initialization routines
  1701. */
  1702. static void snd_ymfpci_aclink_reset(struct pci_dev * pci)
  1703. {
  1704. u8 cmd;
  1705. pci_read_config_byte(pci, PCIR_DSXG_CTRL, &cmd);
  1706. #if 0 // force to reset
  1707. if (cmd & 0x03) {
  1708. #endif
  1709. pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
  1710. pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd | 0x03);
  1711. pci_write_config_byte(pci, PCIR_DSXG_CTRL, cmd & 0xfc);
  1712. pci_write_config_word(pci, PCIR_DSXG_PWRCTRL1, 0);
  1713. pci_write_config_word(pci, PCIR_DSXG_PWRCTRL2, 0);
  1714. #if 0
  1715. }
  1716. #endif
  1717. }
  1718. static void snd_ymfpci_enable_dsp(struct snd_ymfpci *chip)
  1719. {
  1720. snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000001);
  1721. }
  1722. static void snd_ymfpci_disable_dsp(struct snd_ymfpci *chip)
  1723. {
  1724. u32 val;
  1725. int timeout = 1000;
  1726. val = snd_ymfpci_readl(chip, YDSXGR_CONFIG);
  1727. if (val)
  1728. snd_ymfpci_writel(chip, YDSXGR_CONFIG, 0x00000000);
  1729. while (timeout-- > 0) {
  1730. val = snd_ymfpci_readl(chip, YDSXGR_STATUS);
  1731. if ((val & 0x00000002) == 0)
  1732. break;
  1733. }
  1734. }
  1735. #include "ymfpci_image.h"
  1736. static void snd_ymfpci_download_image(struct snd_ymfpci *chip)
  1737. {
  1738. int i;
  1739. u16 ctrl;
  1740. unsigned long *inst;
  1741. snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x00000000);
  1742. snd_ymfpci_disable_dsp(chip);
  1743. snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00010000);
  1744. snd_ymfpci_writel(chip, YDSXGR_MODE, 0x00000000);
  1745. snd_ymfpci_writel(chip, YDSXGR_MAPOFREC, 0x00000000);
  1746. snd_ymfpci_writel(chip, YDSXGR_MAPOFEFFECT, 0x00000000);
  1747. snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0x00000000);
  1748. snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0x00000000);
  1749. snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0x00000000);
  1750. ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
  1751. snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
  1752. /* setup DSP instruction code */
  1753. for (i = 0; i < YDSXG_DSPLENGTH / 4; i++)
  1754. snd_ymfpci_writel(chip, YDSXGR_DSPINSTRAM + (i << 2), DspInst[i]);
  1755. /* setup control instruction code */
  1756. switch (chip->device_id) {
  1757. case PCI_DEVICE_ID_YAMAHA_724F:
  1758. case PCI_DEVICE_ID_YAMAHA_740C:
  1759. case PCI_DEVICE_ID_YAMAHA_744:
  1760. case PCI_DEVICE_ID_YAMAHA_754:
  1761. inst = CntrlInst1E;
  1762. break;
  1763. default:
  1764. inst = CntrlInst;
  1765. break;
  1766. }
  1767. for (i = 0; i < YDSXG_CTRLLENGTH / 4; i++)
  1768. snd_ymfpci_writel(chip, YDSXGR_CTRLINSTRAM + (i << 2), inst[i]);
  1769. snd_ymfpci_enable_dsp(chip);
  1770. }
  1771. static int __devinit snd_ymfpci_memalloc(struct snd_ymfpci *chip)
  1772. {
  1773. long size, playback_ctrl_size;
  1774. int voice, bank, reg;
  1775. u8 *ptr;
  1776. dma_addr_t ptr_addr;
  1777. playback_ctrl_size = 4 + 4 * YDSXG_PLAYBACK_VOICES;
  1778. chip->bank_size_playback = snd_ymfpci_readl(chip, YDSXGR_PLAYCTRLSIZE) << 2;
  1779. chip->bank_size_capture = snd_ymfpci_readl(chip, YDSXGR_RECCTRLSIZE) << 2;
  1780. chip->bank_size_effect = snd_ymfpci_readl(chip, YDSXGR_EFFCTRLSIZE) << 2;
  1781. chip->work_size = YDSXG_DEFAULT_WORK_SIZE;
  1782. size = ((playback_ctrl_size + 0x00ff) & ~0x00ff) +
  1783. ((chip->bank_size_playback * 2 * YDSXG_PLAYBACK_VOICES + 0x00ff) & ~0x00ff) +
  1784. ((chip->bank_size_capture * 2 * YDSXG_CAPTURE_VOICES + 0x00ff) & ~0x00ff) +
  1785. ((chip->bank_size_effect * 2 * YDSXG_EFFECT_VOICES + 0x00ff) & ~0x00ff) +
  1786. chip->work_size;
  1787. /* work_ptr must be aligned to 256 bytes, but it's already
  1788. covered with the kernel page allocation mechanism */
  1789. if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(chip->pci),
  1790. size, &chip->work_ptr) < 0)
  1791. return -ENOMEM;
  1792. ptr = chip->work_ptr.area;
  1793. ptr_addr = chip->work_ptr.addr;
  1794. memset(ptr, 0, size); /* for sure */
  1795. chip->bank_base_playback = ptr;
  1796. chip->bank_base_playback_addr = ptr_addr;
  1797. chip->ctrl_playback = (u32 *)ptr;
  1798. chip->ctrl_playback[0] = cpu_to_le32(YDSXG_PLAYBACK_VOICES);
  1799. ptr += (playback_ctrl_size + 0x00ff) & ~0x00ff;
  1800. ptr_addr += (playback_ctrl_size + 0x00ff) & ~0x00ff;
  1801. for (voice = 0; voice < YDSXG_PLAYBACK_VOICES; voice++) {
  1802. chip->voices[voice].number = voice;
  1803. chip->voices[voice].bank = (struct snd_ymfpci_playback_bank *)ptr;
  1804. chip->voices[voice].bank_addr = ptr_addr;
  1805. for (bank = 0; bank < 2; bank++) {
  1806. chip->bank_playback[voice][bank] = (struct snd_ymfpci_playback_bank *)ptr;
  1807. ptr += chip->bank_size_playback;
  1808. ptr_addr += chip->bank_size_playback;
  1809. }
  1810. }
  1811. ptr = (char *)(((unsigned long)ptr + 0x00ff) & ~0x00ff);
  1812. ptr_addr = (ptr_addr + 0x00ff) & ~0x00ff;
  1813. chip->bank_base_capture = ptr;
  1814. chip->bank_base_capture_addr = ptr_addr;
  1815. for (voice = 0; voice < YDSXG_CAPTURE_VOICES; voice++)
  1816. for (bank = 0; bank < 2; bank++) {
  1817. chip->bank_capture[voice][bank] = (struct snd_ymfpci_capture_bank *)ptr;
  1818. ptr += chip->bank_size_capture;
  1819. ptr_addr += chip->bank_size_capture;
  1820. }
  1821. ptr = (char *)(((unsigned long)ptr + 0x00ff) & ~0x00ff);
  1822. ptr_addr = (ptr_addr + 0x00ff) & ~0x00ff;
  1823. chip->bank_base_effect = ptr;
  1824. chip->bank_base_effect_addr = ptr_addr;
  1825. for (voice = 0; voice < YDSXG_EFFECT_VOICES; voice++)
  1826. for (bank = 0; bank < 2; bank++) {
  1827. chip->bank_effect[voice][bank] = (struct snd_ymfpci_effect_bank *)ptr;
  1828. ptr += chip->bank_size_effect;
  1829. ptr_addr += chip->bank_size_effect;
  1830. }
  1831. ptr = (char *)(((unsigned long)ptr + 0x00ff) & ~0x00ff);
  1832. ptr_addr = (ptr_addr + 0x00ff) & ~0x00ff;
  1833. chip->work_base = ptr;
  1834. chip->work_base_addr = ptr_addr;
  1835. snd_assert(ptr + chip->work_size == chip->work_ptr.area + chip->work_ptr.bytes, );
  1836. snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, chip->bank_base_playback_addr);
  1837. snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, chip->bank_base_capture_addr);
  1838. snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, chip->bank_base_effect_addr);
  1839. snd_ymfpci_writel(chip, YDSXGR_WORKBASE, chip->work_base_addr);
  1840. snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, chip->work_size >> 2);
  1841. /* S/PDIF output initialization */
  1842. chip->spdif_bits = chip->spdif_pcm_bits = SNDRV_PCM_DEFAULT_CON_SPDIF & 0xffff;
  1843. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTCTRL, 0);
  1844. snd_ymfpci_writew(chip, YDSXGR_SPDIFOUTSTATUS, chip->spdif_bits);
  1845. /* S/PDIF input initialization */
  1846. snd_ymfpci_writew(chip, YDSXGR_SPDIFINCTRL, 0);
  1847. /* digital mixer setup */
  1848. for (reg = 0x80; reg < 0xc0; reg += 4)
  1849. snd_ymfpci_writel(chip, reg, 0);
  1850. snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0x3fff3fff);
  1851. snd_ymfpci_writel(chip, YDSXGR_ZVOUTVOL, 0x3fff3fff);
  1852. snd_ymfpci_writel(chip, YDSXGR_SPDIFOUTVOL, 0x3fff3fff);
  1853. snd_ymfpci_writel(chip, YDSXGR_NATIVEADCINVOL, 0x3fff3fff);
  1854. snd_ymfpci_writel(chip, YDSXGR_NATIVEDACINVOL, 0x3fff3fff);
  1855. snd_ymfpci_writel(chip, YDSXGR_PRIADCLOOPVOL, 0x3fff3fff);
  1856. snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0x3fff3fff);
  1857. return 0;
  1858. }
  1859. static int snd_ymfpci_free(struct snd_ymfpci *chip)
  1860. {
  1861. u16 ctrl;
  1862. snd_assert(chip != NULL, return -EINVAL);
  1863. if (chip->res_reg_area) { /* don't touch busy hardware */
  1864. snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
  1865. snd_ymfpci_writel(chip, YDSXGR_BUF441OUTVOL, 0);
  1866. snd_ymfpci_writel(chip, YDSXGR_LEGACYOUTVOL, 0);
  1867. snd_ymfpci_writel(chip, YDSXGR_STATUS, ~0);
  1868. snd_ymfpci_disable_dsp(chip);
  1869. snd_ymfpci_writel(chip, YDSXGR_PLAYCTRLBASE, 0);
  1870. snd_ymfpci_writel(chip, YDSXGR_RECCTRLBASE, 0);
  1871. snd_ymfpci_writel(chip, YDSXGR_EFFCTRLBASE, 0);
  1872. snd_ymfpci_writel(chip, YDSXGR_WORKBASE, 0);
  1873. snd_ymfpci_writel(chip, YDSXGR_WORKSIZE, 0);
  1874. ctrl = snd_ymfpci_readw(chip, YDSXGR_GLOBALCTRL);
  1875. snd_ymfpci_writew(chip, YDSXGR_GLOBALCTRL, ctrl & ~0x0007);
  1876. }
  1877. snd_ymfpci_ac3_done(chip);
  1878. /* Set PCI device to D3 state */
  1879. #if 0
  1880. /* FIXME: temporarily disabled, otherwise we cannot fire up
  1881. * the chip again unless reboot. ACPI bug?
  1882. */
  1883. pci_set_power_state(chip->pci, 3);
  1884. #endif
  1885. #ifdef CONFIG_PM
  1886. vfree(chip->saved_regs);
  1887. #endif
  1888. release_and_free_resource(chip->mpu_res);
  1889. release_and_free_resource(chip->fm_res);
  1890. snd_ymfpci_free_gameport(chip);
  1891. if (chip->reg_area_virt)
  1892. iounmap(chip->reg_area_virt);
  1893. if (chip->work_ptr.area)
  1894. snd_dma_free_pages(&chip->work_ptr);
  1895. if (chip->irq >= 0)
  1896. free_irq(chip->irq, (void *)chip);
  1897. release_and_free_resource(chip->res_reg_area);
  1898. pci_write_config_word(chip->pci, 0x40, chip->old_legacy_ctrl);
  1899. pci_disable_device(chip->pci);
  1900. kfree(chip);
  1901. return 0;
  1902. }
  1903. static int snd_ymfpci_dev_free(struct snd_device *device)
  1904. {
  1905. struct snd_ymfpci *chip = device->device_data;
  1906. return snd_ymfpci_free(chip);
  1907. }
  1908. #ifdef CONFIG_PM
  1909. static int saved_regs_index[] = {
  1910. /* spdif */
  1911. YDSXGR_SPDIFOUTCTRL,
  1912. YDSXGR_SPDIFOUTSTATUS,
  1913. YDSXGR_SPDIFINCTRL,
  1914. /* volumes */
  1915. YDSXGR_PRIADCLOOPVOL,
  1916. YDSXGR_NATIVEDACINVOL,
  1917. YDSXGR_NATIVEDACOUTVOL,
  1918. // YDSXGR_BUF441OUTVOL,
  1919. YDSXGR_NATIVEADCINVOL,
  1920. YDSXGR_SPDIFLOOPVOL,
  1921. YDSXGR_SPDIFOUTVOL,
  1922. YDSXGR_ZVOUTVOL,
  1923. YDSXGR_LEGACYOUTVOL,
  1924. /* address bases */
  1925. YDSXGR_PLAYCTRLBASE,
  1926. YDSXGR_RECCTRLBASE,
  1927. YDSXGR_EFFCTRLBASE,
  1928. YDSXGR_WORKBASE,
  1929. /* capture set up */
  1930. YDSXGR_MAPOFREC,
  1931. YDSXGR_RECFORMAT,
  1932. YDSXGR_RECSLOTSR,
  1933. YDSXGR_ADCFORMAT,
  1934. YDSXGR_ADCSLOTSR,
  1935. };
  1936. #define YDSXGR_NUM_SAVED_REGS ARRAY_SIZE(saved_regs_index)
  1937. int snd_ymfpci_suspend(struct pci_dev *pci, pm_message_t state)
  1938. {
  1939. struct snd_card *card = pci_get_drvdata(pci);
  1940. struct snd_ymfpci *chip = card->private_data;
  1941. unsigned int i;
  1942. snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
  1943. snd_pcm_suspend_all(chip->pcm);
  1944. snd_pcm_suspend_all(chip->pcm2);
  1945. snd_pcm_suspend_all(chip->pcm_spdif);
  1946. snd_pcm_suspend_all(chip->pcm_4ch);
  1947. snd_ac97_suspend(chip->ac97);
  1948. for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
  1949. chip->saved_regs[i] = snd_ymfpci_readl(chip, saved_regs_index[i]);
  1950. chip->saved_ydsxgr_mode = snd_ymfpci_readl(chip, YDSXGR_MODE);
  1951. snd_ymfpci_writel(chip, YDSXGR_NATIVEDACOUTVOL, 0);
  1952. snd_ymfpci_disable_dsp(chip);
  1953. pci_disable_device(pci);
  1954. pci_save_state(pci);
  1955. pci_set_power_state(pci, pci_choose_state(pci, state));
  1956. return 0;
  1957. }
  1958. int snd_ymfpci_resume(struct pci_dev *pci)
  1959. {
  1960. struct snd_card *card = pci_get_drvdata(pci);
  1961. struct snd_ymfpci *chip = card->private_data;
  1962. unsigned int i;
  1963. pci_set_power_state(pci, PCI_D0);
  1964. pci_restore_state(pci);
  1965. if (pci_enable_device(pci) < 0) {
  1966. printk(KERN_ERR "ymfpci: pci_enable_device failed, "
  1967. "disabling device\n");
  1968. snd_card_disconnect(card);
  1969. return -EIO;
  1970. }
  1971. pci_set_master(pci);
  1972. snd_ymfpci_aclink_reset(pci);
  1973. snd_ymfpci_codec_ready(chip, 0);
  1974. snd_ymfpci_download_image(chip);
  1975. udelay(100);
  1976. for (i = 0; i < YDSXGR_NUM_SAVED_REGS; i++)
  1977. snd_ymfpci_writel(chip, saved_regs_index[i], chip->saved_regs[i]);
  1978. snd_ac97_resume(chip->ac97);
  1979. /* start hw again */
  1980. if (chip->start_count > 0) {
  1981. spin_lock_irq(&chip->reg_lock);
  1982. snd_ymfpci_writel(chip, YDSXGR_MODE, chip->saved_ydsxgr_mode);
  1983. chip->active_bank = snd_ymfpci_readl(chip, YDSXGR_CTRLSELECT);
  1984. spin_unlock_irq(&chip->reg_lock);
  1985. }
  1986. snd_power_change_state(card, SNDRV_CTL_POWER_D0);
  1987. return 0;
  1988. }
  1989. #endif /* CONFIG_PM */
  1990. int __devinit snd_ymfpci_create(struct snd_card *card,
  1991. struct pci_dev * pci,
  1992. unsigned short old_legacy_ctrl,
  1993. struct snd_ymfpci ** rchip)
  1994. {
  1995. struct snd_ymfpci *chip;
  1996. int err;
  1997. static struct snd_device_ops ops = {
  1998. .dev_free = snd_ymfpci_dev_free,
  1999. };
  2000. *rchip = NULL;
  2001. /* enable PCI device */
  2002. if ((err = pci_enable_device(pci)) < 0)
  2003. return err;
  2004. chip = kzalloc(sizeof(*chip), GFP_KERNEL);
  2005. if (chip == NULL) {
  2006. pci_disable_device(pci);
  2007. return -ENOMEM;
  2008. }
  2009. chip->old_legacy_ctrl = old_legacy_ctrl;
  2010. spin_lock_init(&chip->reg_lock);
  2011. spin_lock_init(&chip->voice_lock);
  2012. init_waitqueue_head(&chip->interrupt_sleep);
  2013. atomic_set(&chip->interrupt_sleep_count, 0);
  2014. chip->card = card;
  2015. chip->pci = pci;
  2016. chip->irq = -1;
  2017. chip->device_id = pci->device;
  2018. pci_read_config_byte(pci, PCI_REVISION_ID, (u8 *)&chip->rev);
  2019. chip->reg_area_phys = pci_resource_start(pci, 0);
  2020. chip->reg_area_virt = ioremap_nocache(chip->reg_area_phys, 0x8000);
  2021. pci_set_master(pci);
  2022. if ((chip->res_reg_area = request_mem_region(chip->reg_area_phys, 0x8000, "YMFPCI")) == NULL) {
  2023. snd_printk(KERN_ERR "unable to grab memory region 0x%lx-0x%lx\n", chip->reg_area_phys, chip->reg_area_phys + 0x8000 - 1);
  2024. snd_ymfpci_free(chip);
  2025. return -EBUSY;
  2026. }
  2027. if (request_irq(pci->irq, snd_ymfpci_interrupt, IRQF_DISABLED|IRQF_SHARED, "YMFPCI", (void *) chip)) {
  2028. snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
  2029. snd_ymfpci_free(chip);
  2030. return -EBUSY;
  2031. }
  2032. chip->irq = pci->irq;
  2033. snd_ymfpci_aclink_reset(pci);
  2034. if (snd_ymfpci_codec_ready(chip, 0) < 0) {
  2035. snd_ymfpci_free(chip);
  2036. return -EIO;
  2037. }
  2038. snd_ymfpci_download_image(chip);
  2039. udelay(100); /* seems we need a delay after downloading image.. */
  2040. if (snd_ymfpci_memalloc(chip) < 0) {
  2041. snd_ymfpci_free(chip);
  2042. return -EIO;
  2043. }
  2044. chip->rear_swap = 1;
  2045. if ((err = snd_ymfpci_ac3_init(chip)) < 0) {
  2046. snd_ymfpci_free(chip);
  2047. return err;
  2048. }
  2049. #ifdef CONFIG_PM
  2050. chip->saved_regs = vmalloc(YDSXGR_NUM_SAVED_REGS * sizeof(u32));
  2051. if (chip->saved_regs == NULL) {
  2052. snd_ymfpci_free(chip);
  2053. return -ENOMEM;
  2054. }
  2055. #endif
  2056. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
  2057. snd_ymfpci_free(chip);
  2058. return err;
  2059. }
  2060. snd_ymfpci_proc_init(card, chip);
  2061. snd_card_set_dev(card, &pci->dev);
  2062. *rchip = chip;
  2063. return 0;
  2064. }