aureon.c 61 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221
  1. /*
  2. * ALSA driver for ICEnsemble VT1724 (Envy24HT)
  3. *
  4. * Lowlevel functions for Terratec Aureon cards
  5. *
  6. * Copyright (c) 2003 Takashi Iwai <tiwai@suse.de>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. *
  22. *
  23. * NOTES:
  24. *
  25. * - we reuse the struct snd_akm4xxx record for storing the wm8770 codec data.
  26. * both wm and akm codecs are pretty similar, so we can integrate
  27. * both controls in the future, once if wm codecs are reused in
  28. * many boards.
  29. *
  30. * - DAC digital volumes are not implemented in the mixer.
  31. * if they show better response than DAC analog volumes, we can use them
  32. * instead.
  33. *
  34. * Lowlevel functions for AudioTrak Prodigy 7.1 (and possibly 192) cards
  35. * Copyright (c) 2003 Dimitromanolakis Apostolos <apostol@cs.utoronto.ca>
  36. *
  37. * version 0.82: Stable / not all features work yet (no communication with AC97 secondary)
  38. * added 64x/128x oversampling switch (should be 64x only for 96khz)
  39. * fixed some recording labels (still need to check the rest)
  40. * recording is working probably thanks to correct wm8770 initialization
  41. *
  42. * version 0.5: Initial release:
  43. * working: analog output, mixer, headphone amplifier switch
  44. * not working: prety much everything else, at least i could verify that
  45. * we have no digital output, no capture, pretty bad clicks and poops
  46. * on mixer switch and other coll stuff.
  47. *
  48. */
  49. #include <sound/driver.h>
  50. #include <asm/io.h>
  51. #include <linux/delay.h>
  52. #include <linux/interrupt.h>
  53. #include <linux/init.h>
  54. #include <linux/slab.h>
  55. #include <linux/mutex.h>
  56. #include <sound/core.h>
  57. #include "ice1712.h"
  58. #include "envy24ht.h"
  59. #include "aureon.h"
  60. #include <sound/tlv.h>
  61. /* WM8770 registers */
  62. #define WM_DAC_ATTEN 0x00 /* DAC1-8 analog attenuation */
  63. #define WM_DAC_MASTER_ATTEN 0x08 /* DAC master analog attenuation */
  64. #define WM_DAC_DIG_ATTEN 0x09 /* DAC1-8 digital attenuation */
  65. #define WM_DAC_DIG_MASTER_ATTEN 0x11 /* DAC master digital attenuation */
  66. #define WM_PHASE_SWAP 0x12 /* DAC phase */
  67. #define WM_DAC_CTRL1 0x13 /* DAC control bits */
  68. #define WM_MUTE 0x14 /* mute controls */
  69. #define WM_DAC_CTRL2 0x15 /* de-emphasis and zefo-flag */
  70. #define WM_INT_CTRL 0x16 /* interface control */
  71. #define WM_MASTER 0x17 /* master clock and mode */
  72. #define WM_POWERDOWN 0x18 /* power-down controls */
  73. #define WM_ADC_GAIN 0x19 /* ADC gain L(19)/R(1a) */
  74. #define WM_ADC_MUX 0x1b /* input MUX */
  75. #define WM_OUT_MUX1 0x1c /* output MUX */
  76. #define WM_OUT_MUX2 0x1e /* output MUX */
  77. #define WM_RESET 0x1f /* software reset */
  78. /* CS8415A registers */
  79. #define CS8415_CTRL1 0x01
  80. #define CS8415_CTRL2 0x02
  81. #define CS8415_QSUB 0x14
  82. #define CS8415_RATIO 0x1E
  83. #define CS8415_C_BUFFER 0x20
  84. #define CS8415_ID 0x7F
  85. /* PCA9554 registers */
  86. #define PCA9554_DEV 0x40 /* I2C device address */
  87. #define PCA9554_IN 0x00 /* input port */
  88. #define PCA9554_OUT 0x01 /* output port */
  89. #define PCA9554_INVERT 0x02 /* input invert */
  90. #define PCA9554_DIR 0x03 /* port directions */
  91. /*
  92. * Aureon Universe additional controls using PCA9554
  93. */
  94. /*
  95. * Send data to pca9554
  96. */
  97. static void aureon_pca9554_write(struct snd_ice1712 *ice, unsigned char reg,
  98. unsigned char data)
  99. {
  100. unsigned int tmp;
  101. int i, j;
  102. unsigned char dev = PCA9554_DEV; /* ID 0100000, write */
  103. unsigned char val = 0;
  104. tmp = snd_ice1712_gpio_read(ice);
  105. snd_ice1712_gpio_set_mask(ice, ~(AUREON_SPI_MOSI|AUREON_SPI_CLK|
  106. AUREON_WM_RW|AUREON_WM_CS|
  107. AUREON_CS8415_CS));
  108. tmp |= AUREON_WM_RW;
  109. tmp |= AUREON_CS8415_CS | AUREON_WM_CS; /* disable SPI devices */
  110. tmp &= ~AUREON_SPI_MOSI;
  111. tmp &= ~AUREON_SPI_CLK;
  112. snd_ice1712_gpio_write(ice, tmp);
  113. udelay(50);
  114. /*
  115. * send i2c stop condition and start condition
  116. * to obtain sane state
  117. */
  118. tmp |= AUREON_SPI_CLK;
  119. snd_ice1712_gpio_write(ice, tmp);
  120. udelay(50);
  121. tmp |= AUREON_SPI_MOSI;
  122. snd_ice1712_gpio_write(ice, tmp);
  123. udelay(100);
  124. tmp &= ~AUREON_SPI_MOSI;
  125. snd_ice1712_gpio_write(ice, tmp);
  126. udelay(50);
  127. tmp &= ~AUREON_SPI_CLK;
  128. snd_ice1712_gpio_write(ice, tmp);
  129. udelay(100);
  130. /*
  131. * send device address, command and value,
  132. * skipping ack cycles inbetween
  133. */
  134. for (j = 0; j < 3; j++) {
  135. switch(j) {
  136. case 0: val = dev; break;
  137. case 1: val = reg; break;
  138. case 2: val = data; break;
  139. }
  140. for (i = 7; i >= 0; i--) {
  141. tmp &= ~AUREON_SPI_CLK;
  142. snd_ice1712_gpio_write(ice, tmp);
  143. udelay(40);
  144. if (val & (1 << i))
  145. tmp |= AUREON_SPI_MOSI;
  146. else
  147. tmp &= ~AUREON_SPI_MOSI;
  148. snd_ice1712_gpio_write(ice, tmp);
  149. udelay(40);
  150. tmp |= AUREON_SPI_CLK;
  151. snd_ice1712_gpio_write(ice, tmp);
  152. udelay(40);
  153. }
  154. tmp &= ~AUREON_SPI_CLK;
  155. snd_ice1712_gpio_write(ice, tmp);
  156. udelay(40);
  157. tmp |= AUREON_SPI_CLK;
  158. snd_ice1712_gpio_write(ice, tmp);
  159. udelay(40);
  160. tmp &= ~AUREON_SPI_CLK;
  161. snd_ice1712_gpio_write(ice, tmp);
  162. udelay(40);
  163. }
  164. tmp &= ~AUREON_SPI_CLK;
  165. snd_ice1712_gpio_write(ice, tmp);
  166. udelay(40);
  167. tmp &= ~AUREON_SPI_MOSI;
  168. snd_ice1712_gpio_write(ice, tmp);
  169. udelay(40);
  170. tmp |= AUREON_SPI_CLK;
  171. snd_ice1712_gpio_write(ice, tmp);
  172. udelay(50);
  173. tmp |= AUREON_SPI_MOSI;
  174. snd_ice1712_gpio_write(ice, tmp);
  175. udelay(100);
  176. }
  177. static int aureon_universe_inmux_info(struct snd_kcontrol *kcontrol,
  178. struct snd_ctl_elem_info *uinfo)
  179. {
  180. char *texts[3] = {"Internal Aux", "Wavetable", "Rear Line-In"};
  181. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  182. uinfo->count = 1;
  183. uinfo->value.enumerated.items = 3;
  184. if(uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  185. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  186. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  187. return 0;
  188. }
  189. static int aureon_universe_inmux_get(struct snd_kcontrol *kcontrol,
  190. struct snd_ctl_elem_value *ucontrol)
  191. {
  192. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  193. ucontrol->value.integer.value[0] = ice->spec.aureon.pca9554_out;
  194. return 0;
  195. }
  196. static int aureon_universe_inmux_put(struct snd_kcontrol *kcontrol,
  197. struct snd_ctl_elem_value *ucontrol)
  198. {
  199. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  200. unsigned char oval, nval;
  201. int change;
  202. snd_ice1712_save_gpio_status(ice);
  203. oval = ice->spec.aureon.pca9554_out;
  204. nval = ucontrol->value.integer.value[0];
  205. if ((change = (oval != nval))) {
  206. aureon_pca9554_write(ice, PCA9554_OUT, nval);
  207. ice->spec.aureon.pca9554_out = nval;
  208. }
  209. snd_ice1712_restore_gpio_status(ice);
  210. return change;
  211. }
  212. static void aureon_ac97_write(struct snd_ice1712 *ice, unsigned short reg,
  213. unsigned short val)
  214. {
  215. unsigned int tmp;
  216. /* Send address to XILINX chip */
  217. tmp = (snd_ice1712_gpio_read(ice) & ~0xFF) | (reg & 0x7F);
  218. snd_ice1712_gpio_write(ice, tmp);
  219. udelay(10);
  220. tmp |= AUREON_AC97_ADDR;
  221. snd_ice1712_gpio_write(ice, tmp);
  222. udelay(10);
  223. tmp &= ~AUREON_AC97_ADDR;
  224. snd_ice1712_gpio_write(ice, tmp);
  225. udelay(10);
  226. /* Send low-order byte to XILINX chip */
  227. tmp &= ~AUREON_AC97_DATA_MASK;
  228. tmp |= val & AUREON_AC97_DATA_MASK;
  229. snd_ice1712_gpio_write(ice, tmp);
  230. udelay(10);
  231. tmp |= AUREON_AC97_DATA_LOW;
  232. snd_ice1712_gpio_write(ice, tmp);
  233. udelay(10);
  234. tmp &= ~AUREON_AC97_DATA_LOW;
  235. snd_ice1712_gpio_write(ice, tmp);
  236. udelay(10);
  237. /* Send high-order byte to XILINX chip */
  238. tmp &= ~AUREON_AC97_DATA_MASK;
  239. tmp |= (val >> 8) & AUREON_AC97_DATA_MASK;
  240. snd_ice1712_gpio_write(ice, tmp);
  241. udelay(10);
  242. tmp |= AUREON_AC97_DATA_HIGH;
  243. snd_ice1712_gpio_write(ice, tmp);
  244. udelay(10);
  245. tmp &= ~AUREON_AC97_DATA_HIGH;
  246. snd_ice1712_gpio_write(ice, tmp);
  247. udelay(10);
  248. /* Instruct XILINX chip to parse the data to the STAC9744 chip */
  249. tmp |= AUREON_AC97_COMMIT;
  250. snd_ice1712_gpio_write(ice, tmp);
  251. udelay(10);
  252. tmp &= ~AUREON_AC97_COMMIT;
  253. snd_ice1712_gpio_write(ice, tmp);
  254. udelay(10);
  255. /* Store the data in out private buffer */
  256. ice->spec.aureon.stac9744[(reg & 0x7F) >> 1] = val;
  257. }
  258. static unsigned short aureon_ac97_read(struct snd_ice1712 *ice, unsigned short reg)
  259. {
  260. return ice->spec.aureon.stac9744[(reg & 0x7F) >> 1];
  261. }
  262. /*
  263. * Initialize STAC9744 chip
  264. */
  265. static int aureon_ac97_init (struct snd_ice1712 *ice)
  266. {
  267. int i;
  268. static unsigned short ac97_defaults[] = {
  269. 0x00, 0x9640,
  270. 0x02, 0x8000,
  271. 0x04, 0x8000,
  272. 0x06, 0x8000,
  273. 0x0C, 0x8008,
  274. 0x0E, 0x8008,
  275. 0x10, 0x8808,
  276. 0x12, 0x8808,
  277. 0x14, 0x8808,
  278. 0x16, 0x8808,
  279. 0x18, 0x8808,
  280. 0x1C, 0x8000,
  281. 0x26, 0x000F,
  282. 0x28, 0x0201,
  283. 0x2C, 0xBB80,
  284. 0x32, 0xBB80,
  285. 0x7C, 0x8384,
  286. 0x7E, 0x7644,
  287. (unsigned short)-1
  288. };
  289. unsigned int tmp;
  290. /* Cold reset */
  291. tmp = (snd_ice1712_gpio_read(ice) | AUREON_AC97_RESET) & ~AUREON_AC97_DATA_MASK;
  292. snd_ice1712_gpio_write(ice, tmp);
  293. udelay(3);
  294. tmp &= ~AUREON_AC97_RESET;
  295. snd_ice1712_gpio_write(ice, tmp);
  296. udelay(3);
  297. tmp |= AUREON_AC97_RESET;
  298. snd_ice1712_gpio_write(ice, tmp);
  299. udelay(3);
  300. memset(&ice->spec.aureon.stac9744, 0, sizeof(ice->spec.aureon.stac9744));
  301. for (i=0; ac97_defaults[i] != (unsigned short)-1; i+=2)
  302. ice->spec.aureon.stac9744[(ac97_defaults[i]) >> 1] = ac97_defaults[i+1];
  303. aureon_ac97_write(ice, AC97_MASTER, 0x0000); // Unmute AC'97 master volume permanently - muting is done by WM8770
  304. return 0;
  305. }
  306. #define AUREON_AC97_STEREO 0x80
  307. /*
  308. * AC'97 volume controls
  309. */
  310. static int aureon_ac97_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  311. {
  312. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  313. uinfo->count = kcontrol->private_value & AUREON_AC97_STEREO ? 2 : 1;
  314. uinfo->value.integer.min = 0;
  315. uinfo->value.integer.max = 31;
  316. return 0;
  317. }
  318. static int aureon_ac97_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  319. {
  320. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  321. unsigned short vol;
  322. mutex_lock(&ice->gpio_mutex);
  323. vol = aureon_ac97_read(ice, kcontrol->private_value & 0x7F);
  324. ucontrol->value.integer.value[0] = 0x1F - (vol & 0x1F);
  325. if (kcontrol->private_value & AUREON_AC97_STEREO)
  326. ucontrol->value.integer.value[1] = 0x1F - ((vol >> 8) & 0x1F);
  327. mutex_unlock(&ice->gpio_mutex);
  328. return 0;
  329. }
  330. static int aureon_ac97_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  331. {
  332. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  333. unsigned short ovol, nvol;
  334. int change;
  335. snd_ice1712_save_gpio_status(ice);
  336. ovol = aureon_ac97_read(ice, kcontrol->private_value & 0x7F);
  337. nvol = (0x1F - ucontrol->value.integer.value[0]) & 0x001F;
  338. if (kcontrol->private_value & AUREON_AC97_STEREO)
  339. nvol |= ((0x1F - ucontrol->value.integer.value[1]) << 8) & 0x1F00;
  340. nvol |= ovol & ~0x1F1F;
  341. if ((change = (ovol != nvol)))
  342. aureon_ac97_write(ice, kcontrol->private_value & 0x7F, nvol);
  343. snd_ice1712_restore_gpio_status(ice);
  344. return change;
  345. }
  346. /*
  347. * AC'97 mute controls
  348. */
  349. #define aureon_ac97_mute_info aureon_mono_bool_info
  350. static int aureon_ac97_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  351. {
  352. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  353. mutex_lock(&ice->gpio_mutex);
  354. ucontrol->value.integer.value[0] = aureon_ac97_read(ice, kcontrol->private_value & 0x7F) & 0x8000 ? 0 : 1;
  355. mutex_unlock(&ice->gpio_mutex);
  356. return 0;
  357. }
  358. static int aureon_ac97_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  359. {
  360. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  361. unsigned short ovol, nvol;
  362. int change;
  363. snd_ice1712_save_gpio_status(ice);
  364. ovol = aureon_ac97_read(ice, kcontrol->private_value & 0x7F);
  365. nvol = (ucontrol->value.integer.value[0] ? 0x0000 : 0x8000) | (ovol & ~ 0x8000);
  366. if ((change = (ovol != nvol)))
  367. aureon_ac97_write(ice, kcontrol->private_value & 0x7F, nvol);
  368. snd_ice1712_restore_gpio_status(ice);
  369. return change;
  370. }
  371. /*
  372. * AC'97 mute controls
  373. */
  374. #define aureon_ac97_micboost_info aureon_mono_bool_info
  375. static int aureon_ac97_micboost_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  376. {
  377. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  378. mutex_lock(&ice->gpio_mutex);
  379. ucontrol->value.integer.value[0] = aureon_ac97_read(ice, AC97_MIC) & 0x0020 ? 0 : 1;
  380. mutex_unlock(&ice->gpio_mutex);
  381. return 0;
  382. }
  383. static int aureon_ac97_micboost_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  384. {
  385. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  386. unsigned short ovol, nvol;
  387. int change;
  388. snd_ice1712_save_gpio_status(ice);
  389. ovol = aureon_ac97_read(ice, AC97_MIC);
  390. nvol = (ucontrol->value.integer.value[0] ? 0x0000 : 0x0020) | (ovol & ~0x0020);
  391. if ((change = (ovol != nvol)))
  392. aureon_ac97_write(ice, AC97_MIC, nvol);
  393. snd_ice1712_restore_gpio_status(ice);
  394. return change;
  395. }
  396. /*
  397. * write data in the SPI mode
  398. */
  399. static void aureon_spi_write(struct snd_ice1712 *ice, unsigned int cs, unsigned int data, int bits)
  400. {
  401. unsigned int tmp;
  402. int i;
  403. unsigned int mosi, clk;
  404. tmp = snd_ice1712_gpio_read(ice);
  405. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71LT) {
  406. snd_ice1712_gpio_set_mask(ice, ~(PRODIGY_SPI_MOSI|PRODIGY_SPI_CLK|PRODIGY_WM_CS));
  407. mosi = PRODIGY_SPI_MOSI;
  408. clk = PRODIGY_SPI_CLK;
  409. }
  410. else {
  411. snd_ice1712_gpio_set_mask(ice, ~(AUREON_WM_RW|AUREON_SPI_MOSI|AUREON_SPI_CLK|
  412. AUREON_WM_CS|AUREON_CS8415_CS));
  413. mosi = AUREON_SPI_MOSI;
  414. clk = AUREON_SPI_CLK;
  415. tmp |= AUREON_WM_RW;
  416. }
  417. tmp &= ~cs;
  418. snd_ice1712_gpio_write(ice, tmp);
  419. udelay(1);
  420. for (i = bits - 1; i >= 0; i--) {
  421. tmp &= ~clk;
  422. snd_ice1712_gpio_write(ice, tmp);
  423. udelay(1);
  424. if (data & (1 << i))
  425. tmp |= mosi;
  426. else
  427. tmp &= ~mosi;
  428. snd_ice1712_gpio_write(ice, tmp);
  429. udelay(1);
  430. tmp |= clk;
  431. snd_ice1712_gpio_write(ice, tmp);
  432. udelay(1);
  433. }
  434. tmp &= ~clk;
  435. tmp |= cs;
  436. snd_ice1712_gpio_write(ice, tmp);
  437. udelay(1);
  438. tmp |= clk;
  439. snd_ice1712_gpio_write(ice, tmp);
  440. udelay(1);
  441. }
  442. /*
  443. * Read data in SPI mode
  444. */
  445. static void aureon_spi_read(struct snd_ice1712 *ice, unsigned int cs, unsigned int data, int bits, unsigned char *buffer, int size) {
  446. int i, j;
  447. unsigned int tmp;
  448. tmp = (snd_ice1712_gpio_read(ice) & ~AUREON_SPI_CLK) | AUREON_CS8415_CS|AUREON_WM_CS;
  449. snd_ice1712_gpio_write(ice, tmp);
  450. tmp &= ~cs;
  451. snd_ice1712_gpio_write(ice, tmp);
  452. udelay(1);
  453. for (i=bits-1; i>=0; i--) {
  454. if (data & (1 << i))
  455. tmp |= AUREON_SPI_MOSI;
  456. else
  457. tmp &= ~AUREON_SPI_MOSI;
  458. snd_ice1712_gpio_write(ice, tmp);
  459. udelay(1);
  460. tmp |= AUREON_SPI_CLK;
  461. snd_ice1712_gpio_write(ice, tmp);
  462. udelay(1);
  463. tmp &= ~AUREON_SPI_CLK;
  464. snd_ice1712_gpio_write(ice, tmp);
  465. udelay(1);
  466. }
  467. for (j=0; j<size; j++) {
  468. unsigned char outdata = 0;
  469. for (i=7; i>=0; i--) {
  470. tmp = snd_ice1712_gpio_read(ice);
  471. outdata <<= 1;
  472. outdata |= (tmp & AUREON_SPI_MISO) ? 1 : 0;
  473. udelay(1);
  474. tmp |= AUREON_SPI_CLK;
  475. snd_ice1712_gpio_write(ice, tmp);
  476. udelay(1);
  477. tmp &= ~AUREON_SPI_CLK;
  478. snd_ice1712_gpio_write(ice, tmp);
  479. udelay(1);
  480. }
  481. buffer[j] = outdata;
  482. }
  483. tmp |= cs;
  484. snd_ice1712_gpio_write(ice, tmp);
  485. }
  486. static unsigned char aureon_cs8415_get(struct snd_ice1712 *ice, int reg) {
  487. unsigned char val;
  488. aureon_spi_write(ice, AUREON_CS8415_CS, 0x2000 | reg, 16);
  489. aureon_spi_read(ice, AUREON_CS8415_CS, 0x21, 8, &val, 1);
  490. return val;
  491. }
  492. static void aureon_cs8415_read(struct snd_ice1712 *ice, int reg, unsigned char *buffer, int size) {
  493. aureon_spi_write(ice, AUREON_CS8415_CS, 0x2000 | reg, 16);
  494. aureon_spi_read(ice, AUREON_CS8415_CS, 0x21, 8, buffer, size);
  495. }
  496. static void aureon_cs8415_put(struct snd_ice1712 *ice, int reg, unsigned char val) {
  497. aureon_spi_write(ice, AUREON_CS8415_CS, 0x200000 | (reg << 8) | val, 24);
  498. }
  499. /*
  500. * get the current register value of WM codec
  501. */
  502. static unsigned short wm_get(struct snd_ice1712 *ice, int reg)
  503. {
  504. reg <<= 1;
  505. return ((unsigned short)ice->akm[0].images[reg] << 8) |
  506. ice->akm[0].images[reg + 1];
  507. }
  508. /*
  509. * set the register value of WM codec
  510. */
  511. static void wm_put_nocache(struct snd_ice1712 *ice, int reg, unsigned short val)
  512. {
  513. aureon_spi_write(ice,
  514. (ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71LT ? PRODIGY_WM_CS : AUREON_WM_CS),
  515. (reg << 9) | (val & 0x1ff), 16);
  516. }
  517. /*
  518. * set the register value of WM codec and remember it
  519. */
  520. static void wm_put(struct snd_ice1712 *ice, int reg, unsigned short val)
  521. {
  522. wm_put_nocache(ice, reg, val);
  523. reg <<= 1;
  524. ice->akm[0].images[reg] = val >> 8;
  525. ice->akm[0].images[reg + 1] = val;
  526. }
  527. /*
  528. */
  529. static int aureon_mono_bool_info(struct snd_kcontrol *k, struct snd_ctl_elem_info *uinfo)
  530. {
  531. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  532. uinfo->count = 1;
  533. uinfo->value.integer.min = 0;
  534. uinfo->value.integer.max = 1;
  535. return 0;
  536. }
  537. /*
  538. * AC'97 master playback mute controls (Mute on WM8770 chip)
  539. */
  540. #define aureon_ac97_mmute_info aureon_mono_bool_info
  541. static int aureon_ac97_mmute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  542. {
  543. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  544. mutex_lock(&ice->gpio_mutex);
  545. ucontrol->value.integer.value[0] = (wm_get(ice, WM_OUT_MUX1) >> 1) & 0x01;
  546. mutex_unlock(&ice->gpio_mutex);
  547. return 0;
  548. }
  549. static int aureon_ac97_mmute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) {
  550. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  551. unsigned short ovol, nvol;
  552. int change;
  553. snd_ice1712_save_gpio_status(ice);
  554. ovol = wm_get(ice, WM_OUT_MUX1);
  555. nvol = (ovol & ~0x02) | (ucontrol->value.integer.value[0] ? 0x02 : 0x00);
  556. if ((change = (ovol != nvol)))
  557. wm_put(ice, WM_OUT_MUX1, nvol);
  558. snd_ice1712_restore_gpio_status(ice);
  559. return change;
  560. }
  561. static DECLARE_TLV_DB_SCALE(db_scale_wm_dac, -12700, 100, 1);
  562. static DECLARE_TLV_DB_SCALE(db_scale_wm_pcm, -6400, 50, 1);
  563. static DECLARE_TLV_DB_SCALE(db_scale_wm_adc, -1200, 100, 0);
  564. static DECLARE_TLV_DB_SCALE(db_scale_ac97_master, -4650, 150, 0);
  565. static DECLARE_TLV_DB_SCALE(db_scale_ac97_gain, -3450, 150, 0);
  566. /*
  567. * Logarithmic volume values for WM8770
  568. * Computed as 20 * Log10(255 / x)
  569. */
  570. static unsigned char wm_vol[256] = {
  571. 127, 48, 42, 39, 36, 34, 33, 31, 30, 29, 28, 27, 27, 26, 25, 25, 24, 24, 23,
  572. 23, 22, 22, 21, 21, 21, 20, 20, 20, 19, 19, 19, 18, 18, 18, 18, 17, 17, 17,
  573. 17, 16, 16, 16, 16, 15, 15, 15, 15, 15, 15, 14, 14, 14, 14, 14, 13, 13, 13,
  574. 13, 13, 13, 13, 12, 12, 12, 12, 12, 12, 12, 11, 11, 11, 11, 11, 11, 11, 11,
  575. 11, 10, 10, 10, 10, 10, 10, 10, 10, 10, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 8, 8,
  576. 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6,
  577. 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
  578. 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3,
  579. 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
  580. 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
  581. 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
  582. 0, 0
  583. };
  584. #define WM_VOL_MAX (sizeof(wm_vol) - 1)
  585. #define WM_VOL_MUTE 0x8000
  586. static void wm_set_vol(struct snd_ice1712 *ice, unsigned int index, unsigned short vol, unsigned short master)
  587. {
  588. unsigned char nvol;
  589. if ((master & WM_VOL_MUTE) || (vol & WM_VOL_MUTE))
  590. nvol = 0;
  591. else
  592. nvol = 127 - wm_vol[(((vol & ~WM_VOL_MUTE) * (master & ~WM_VOL_MUTE)) / 127) & WM_VOL_MAX];
  593. wm_put(ice, index, nvol);
  594. wm_put_nocache(ice, index, 0x180 | nvol);
  595. }
  596. /*
  597. * DAC mute control
  598. */
  599. #define wm_pcm_mute_info aureon_mono_bool_info
  600. static int wm_pcm_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  601. {
  602. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  603. mutex_lock(&ice->gpio_mutex);
  604. ucontrol->value.integer.value[0] = (wm_get(ice, WM_MUTE) & 0x10) ? 0 : 1;
  605. mutex_unlock(&ice->gpio_mutex);
  606. return 0;
  607. }
  608. static int wm_pcm_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  609. {
  610. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  611. unsigned short nval, oval;
  612. int change;
  613. snd_ice1712_save_gpio_status(ice);
  614. oval = wm_get(ice, WM_MUTE);
  615. nval = (oval & ~0x10) | (ucontrol->value.integer.value[0] ? 0 : 0x10);
  616. if ((change = (nval != oval)))
  617. wm_put(ice, WM_MUTE, nval);
  618. snd_ice1712_restore_gpio_status(ice);
  619. return change;
  620. }
  621. /*
  622. * Master volume attenuation mixer control
  623. */
  624. static int wm_master_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  625. {
  626. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  627. uinfo->count = 2;
  628. uinfo->value.integer.min = 0;
  629. uinfo->value.integer.max = WM_VOL_MAX;
  630. return 0;
  631. }
  632. static int wm_master_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  633. {
  634. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  635. int i;
  636. for (i=0; i<2; i++)
  637. ucontrol->value.integer.value[i] = ice->spec.aureon.master[i] & ~WM_VOL_MUTE;
  638. return 0;
  639. }
  640. static int wm_master_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  641. {
  642. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  643. int ch, change = 0;
  644. snd_ice1712_save_gpio_status(ice);
  645. for (ch = 0; ch < 2; ch++) {
  646. if (ucontrol->value.integer.value[ch] != ice->spec.aureon.master[ch]) {
  647. int dac;
  648. ice->spec.aureon.master[ch] &= WM_VOL_MUTE;
  649. ice->spec.aureon.master[ch] |= ucontrol->value.integer.value[ch];
  650. for (dac = 0; dac < ice->num_total_dacs; dac += 2)
  651. wm_set_vol(ice, WM_DAC_ATTEN + dac + ch,
  652. ice->spec.aureon.vol[dac + ch],
  653. ice->spec.aureon.master[ch]);
  654. change = 1;
  655. }
  656. }
  657. snd_ice1712_restore_gpio_status(ice);
  658. return change;
  659. }
  660. /*
  661. * DAC volume attenuation mixer control
  662. */
  663. static int wm_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  664. {
  665. int voices = kcontrol->private_value >> 8;
  666. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  667. uinfo->count = voices;
  668. uinfo->value.integer.min = 0; /* mute (-101dB) */
  669. uinfo->value.integer.max = 0x7F; /* 0dB */
  670. return 0;
  671. }
  672. static int wm_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  673. {
  674. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  675. int i, ofs, voices;
  676. voices = kcontrol->private_value >> 8;
  677. ofs = kcontrol->private_value & 0xff;
  678. for (i = 0; i < voices; i++)
  679. ucontrol->value.integer.value[i] = ice->spec.aureon.vol[ofs+i] & ~WM_VOL_MUTE;
  680. return 0;
  681. }
  682. static int wm_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  683. {
  684. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  685. int i, idx, ofs, voices;
  686. int change = 0;
  687. voices = kcontrol->private_value >> 8;
  688. ofs = kcontrol->private_value & 0xff;
  689. snd_ice1712_save_gpio_status(ice);
  690. for (i = 0; i < voices; i++) {
  691. idx = WM_DAC_ATTEN + ofs + i;
  692. if (ucontrol->value.integer.value[i] != ice->spec.aureon.vol[ofs+i]) {
  693. ice->spec.aureon.vol[ofs+i] &= WM_VOL_MUTE;
  694. ice->spec.aureon.vol[ofs+i] |= ucontrol->value.integer.value[i];
  695. wm_set_vol(ice, idx, ice->spec.aureon.vol[ofs+i],
  696. ice->spec.aureon.master[i]);
  697. change = 1;
  698. }
  699. }
  700. snd_ice1712_restore_gpio_status(ice);
  701. return change;
  702. }
  703. /*
  704. * WM8770 mute control
  705. */
  706. static int wm_mute_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) {
  707. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  708. uinfo->count = kcontrol->private_value >> 8;
  709. uinfo->value.integer.min = 0;
  710. uinfo->value.integer.max = 1;
  711. return 0;
  712. }
  713. static int wm_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  714. {
  715. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  716. int voices, ofs, i;
  717. voices = kcontrol->private_value >> 8;
  718. ofs = kcontrol->private_value & 0xFF;
  719. for (i = 0; i < voices; i++)
  720. ucontrol->value.integer.value[i] = (ice->spec.aureon.vol[ofs+i] & WM_VOL_MUTE) ? 0 : 1;
  721. return 0;
  722. }
  723. static int wm_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  724. {
  725. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  726. int change = 0, voices, ofs, i;
  727. voices = kcontrol->private_value >> 8;
  728. ofs = kcontrol->private_value & 0xFF;
  729. snd_ice1712_save_gpio_status(ice);
  730. for (i = 0; i < voices; i++) {
  731. int val = (ice->spec.aureon.vol[ofs + i] & WM_VOL_MUTE) ? 0 : 1;
  732. if (ucontrol->value.integer.value[i] != val) {
  733. ice->spec.aureon.vol[ofs + i] &= ~WM_VOL_MUTE;
  734. ice->spec.aureon.vol[ofs + i] |=
  735. ucontrol->value.integer.value[i] ? 0 : WM_VOL_MUTE;
  736. wm_set_vol(ice, ofs + i, ice->spec.aureon.vol[ofs + i],
  737. ice->spec.aureon.master[i]);
  738. change = 1;
  739. }
  740. }
  741. snd_ice1712_restore_gpio_status(ice);
  742. return change;
  743. }
  744. /*
  745. * WM8770 master mute control
  746. */
  747. static int wm_master_mute_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) {
  748. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  749. uinfo->count = 2;
  750. uinfo->value.integer.min = 0;
  751. uinfo->value.integer.max = 1;
  752. return 0;
  753. }
  754. static int wm_master_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  755. {
  756. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  757. ucontrol->value.integer.value[0] = (ice->spec.aureon.master[0] & WM_VOL_MUTE) ? 0 : 1;
  758. ucontrol->value.integer.value[1] = (ice->spec.aureon.master[1] & WM_VOL_MUTE) ? 0 : 1;
  759. return 0;
  760. }
  761. static int wm_master_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  762. {
  763. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  764. int change = 0, i;
  765. snd_ice1712_save_gpio_status(ice);
  766. for (i = 0; i < 2; i++) {
  767. int val = (ice->spec.aureon.master[i] & WM_VOL_MUTE) ? 0 : 1;
  768. if (ucontrol->value.integer.value[i] != val) {
  769. int dac;
  770. ice->spec.aureon.master[i] &= ~WM_VOL_MUTE;
  771. ice->spec.aureon.master[i] |=
  772. ucontrol->value.integer.value[i] ? 0 : WM_VOL_MUTE;
  773. for (dac = 0; dac < ice->num_total_dacs; dac += 2)
  774. wm_set_vol(ice, WM_DAC_ATTEN + dac + i,
  775. ice->spec.aureon.vol[dac + i],
  776. ice->spec.aureon.master[i]);
  777. change = 1;
  778. }
  779. }
  780. snd_ice1712_restore_gpio_status(ice);
  781. return change;
  782. }
  783. /* digital master volume */
  784. #define PCM_0dB 0xff
  785. #define PCM_RES 128 /* -64dB */
  786. #define PCM_MIN (PCM_0dB - PCM_RES)
  787. static int wm_pcm_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  788. {
  789. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  790. uinfo->count = 1;
  791. uinfo->value.integer.min = 0; /* mute (-64dB) */
  792. uinfo->value.integer.max = PCM_RES; /* 0dB */
  793. return 0;
  794. }
  795. static int wm_pcm_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  796. {
  797. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  798. unsigned short val;
  799. mutex_lock(&ice->gpio_mutex);
  800. val = wm_get(ice, WM_DAC_DIG_MASTER_ATTEN) & 0xff;
  801. val = val > PCM_MIN ? (val - PCM_MIN) : 0;
  802. ucontrol->value.integer.value[0] = val;
  803. mutex_unlock(&ice->gpio_mutex);
  804. return 0;
  805. }
  806. static int wm_pcm_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  807. {
  808. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  809. unsigned short ovol, nvol;
  810. int change = 0;
  811. snd_ice1712_save_gpio_status(ice);
  812. nvol = ucontrol->value.integer.value[0];
  813. nvol = (nvol ? (nvol + PCM_MIN) : 0) & 0xff;
  814. ovol = wm_get(ice, WM_DAC_DIG_MASTER_ATTEN) & 0xff;
  815. if (ovol != nvol) {
  816. wm_put(ice, WM_DAC_DIG_MASTER_ATTEN, nvol); /* prelatch */
  817. wm_put_nocache(ice, WM_DAC_DIG_MASTER_ATTEN, nvol | 0x100); /* update */
  818. change = 1;
  819. }
  820. snd_ice1712_restore_gpio_status(ice);
  821. return change;
  822. }
  823. /*
  824. * ADC mute control
  825. */
  826. static int wm_adc_mute_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  827. {
  828. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  829. uinfo->count = 2;
  830. uinfo->value.integer.min = 0;
  831. uinfo->value.integer.max = 1;
  832. return 0;
  833. }
  834. static int wm_adc_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  835. {
  836. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  837. unsigned short val;
  838. int i;
  839. mutex_lock(&ice->gpio_mutex);
  840. for (i = 0; i < 2; i++) {
  841. val = wm_get(ice, WM_ADC_GAIN + i);
  842. ucontrol->value.integer.value[i] = ~val>>5 & 0x1;
  843. }
  844. mutex_unlock(&ice->gpio_mutex);
  845. return 0;
  846. }
  847. static int wm_adc_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  848. {
  849. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  850. unsigned short new, old;
  851. int i, change = 0;
  852. snd_ice1712_save_gpio_status(ice);
  853. for (i = 0; i < 2; i++) {
  854. old = wm_get(ice, WM_ADC_GAIN + i);
  855. new = (~ucontrol->value.integer.value[i]<<5&0x20) | (old&~0x20);
  856. if (new != old) {
  857. wm_put(ice, WM_ADC_GAIN + i, new);
  858. change = 1;
  859. }
  860. }
  861. snd_ice1712_restore_gpio_status(ice);
  862. return change;
  863. }
  864. /*
  865. * ADC gain mixer control
  866. */
  867. static int wm_adc_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  868. {
  869. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  870. uinfo->count = 2;
  871. uinfo->value.integer.min = 0; /* -12dB */
  872. uinfo->value.integer.max = 0x1f; /* 19dB */
  873. return 0;
  874. }
  875. static int wm_adc_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  876. {
  877. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  878. int i, idx;
  879. unsigned short vol;
  880. mutex_lock(&ice->gpio_mutex);
  881. for (i = 0; i < 2; i++) {
  882. idx = WM_ADC_GAIN + i;
  883. vol = wm_get(ice, idx) & 0x1f;
  884. ucontrol->value.integer.value[i] = vol;
  885. }
  886. mutex_unlock(&ice->gpio_mutex);
  887. return 0;
  888. }
  889. static int wm_adc_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  890. {
  891. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  892. int i, idx;
  893. unsigned short ovol, nvol;
  894. int change = 0;
  895. snd_ice1712_save_gpio_status(ice);
  896. for (i = 0; i < 2; i++) {
  897. idx = WM_ADC_GAIN + i;
  898. nvol = ucontrol->value.integer.value[i];
  899. ovol = wm_get(ice, idx);
  900. if ((ovol & 0x1f) != nvol) {
  901. wm_put(ice, idx, nvol | (ovol & ~0x1f));
  902. change = 1;
  903. }
  904. }
  905. snd_ice1712_restore_gpio_status(ice);
  906. return change;
  907. }
  908. /*
  909. * ADC input mux mixer control
  910. */
  911. static int wm_adc_mux_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  912. {
  913. static char *texts[] = {
  914. "CD", //AIN1
  915. "Aux", //AIN2
  916. "Line", //AIN3
  917. "Mic", //AIN4
  918. "AC97" //AIN5
  919. };
  920. static char *universe_texts[] = {
  921. "Aux1", //AIN1
  922. "CD", //AIN2
  923. "Phono", //AIN3
  924. "Line", //AIN4
  925. "Aux2", //AIN5
  926. "Mic", //AIN6
  927. "Aux3", //AIN7
  928. "AC97" //AIN8
  929. };
  930. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  931. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  932. uinfo->count = 2;
  933. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_AUREON71_UNIVERSE) {
  934. uinfo->value.enumerated.items = 8;
  935. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  936. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  937. strcpy(uinfo->value.enumerated.name, universe_texts[uinfo->value.enumerated.item]);
  938. }
  939. else {
  940. uinfo->value.enumerated.items = 5;
  941. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  942. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  943. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  944. }
  945. return 0;
  946. }
  947. static int wm_adc_mux_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  948. {
  949. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  950. unsigned short val;
  951. mutex_lock(&ice->gpio_mutex);
  952. val = wm_get(ice, WM_ADC_MUX);
  953. ucontrol->value.enumerated.item[0] = val & 7;
  954. ucontrol->value.enumerated.item[1] = (val >> 4) & 7;
  955. mutex_unlock(&ice->gpio_mutex);
  956. return 0;
  957. }
  958. static int wm_adc_mux_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  959. {
  960. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  961. unsigned short oval, nval;
  962. int change;
  963. snd_ice1712_save_gpio_status(ice);
  964. oval = wm_get(ice, WM_ADC_MUX);
  965. nval = oval & ~0x77;
  966. nval |= ucontrol->value.enumerated.item[0] & 7;
  967. nval |= (ucontrol->value.enumerated.item[1] & 7) << 4;
  968. change = (oval != nval);
  969. if (change)
  970. wm_put(ice, WM_ADC_MUX, nval);
  971. snd_ice1712_restore_gpio_status(ice);
  972. return change;
  973. }
  974. /*
  975. * CS8415 Input mux
  976. */
  977. static int aureon_cs8415_mux_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  978. {
  979. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  980. static char *aureon_texts[] = {
  981. "CD", //RXP0
  982. "Optical" //RXP1
  983. };
  984. static char *prodigy_texts[] = {
  985. "CD",
  986. "Coax"
  987. };
  988. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  989. uinfo->count = 1;
  990. uinfo->value.enumerated.items = 2;
  991. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  992. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  993. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71)
  994. strcpy(uinfo->value.enumerated.name, prodigy_texts[uinfo->value.enumerated.item]);
  995. else
  996. strcpy(uinfo->value.enumerated.name, aureon_texts[uinfo->value.enumerated.item]);
  997. return 0;
  998. }
  999. static int aureon_cs8415_mux_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1000. {
  1001. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1002. //snd_ice1712_save_gpio_status(ice);
  1003. //val = aureon_cs8415_get(ice, CS8415_CTRL2);
  1004. ucontrol->value.enumerated.item[0] = ice->spec.aureon.cs8415_mux;
  1005. //snd_ice1712_restore_gpio_status(ice);
  1006. return 0;
  1007. }
  1008. static int aureon_cs8415_mux_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1009. {
  1010. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1011. unsigned short oval, nval;
  1012. int change;
  1013. snd_ice1712_save_gpio_status(ice);
  1014. oval = aureon_cs8415_get(ice, CS8415_CTRL2);
  1015. nval = oval & ~0x07;
  1016. nval |= ucontrol->value.enumerated.item[0] & 7;
  1017. change = (oval != nval);
  1018. if (change)
  1019. aureon_cs8415_put(ice, CS8415_CTRL2, nval);
  1020. snd_ice1712_restore_gpio_status(ice);
  1021. ice->spec.aureon.cs8415_mux = ucontrol->value.enumerated.item[0];
  1022. return change;
  1023. }
  1024. static int aureon_cs8415_rate_info (struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1025. {
  1026. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1027. uinfo->count = 1;
  1028. uinfo->value.integer.min = 0;
  1029. uinfo->value.integer.max = 192000;
  1030. return 0;
  1031. }
  1032. static int aureon_cs8415_rate_get (struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1033. {
  1034. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1035. unsigned char ratio;
  1036. ratio = aureon_cs8415_get(ice, CS8415_RATIO);
  1037. ucontrol->value.integer.value[0] = (int)((unsigned int)ratio * 750);
  1038. return 0;
  1039. }
  1040. /*
  1041. * CS8415A Mute
  1042. */
  1043. static int aureon_cs8415_mute_info (struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1044. {
  1045. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  1046. uinfo->count = 1;
  1047. return 0;
  1048. }
  1049. static int aureon_cs8415_mute_get (struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1050. {
  1051. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1052. snd_ice1712_save_gpio_status(ice);
  1053. ucontrol->value.integer.value[0] = (aureon_cs8415_get(ice, CS8415_CTRL1) & 0x20) ? 0 : 1;
  1054. snd_ice1712_restore_gpio_status(ice);
  1055. return 0;
  1056. }
  1057. static int aureon_cs8415_mute_put (struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1058. {
  1059. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1060. unsigned char oval, nval;
  1061. int change;
  1062. snd_ice1712_save_gpio_status(ice);
  1063. oval = aureon_cs8415_get(ice, CS8415_CTRL1);
  1064. if (ucontrol->value.integer.value[0])
  1065. nval = oval & ~0x20;
  1066. else
  1067. nval = oval | 0x20;
  1068. if ((change = (oval != nval)))
  1069. aureon_cs8415_put(ice, CS8415_CTRL1, nval);
  1070. snd_ice1712_restore_gpio_status(ice);
  1071. return change;
  1072. }
  1073. /*
  1074. * CS8415A Q-Sub info
  1075. */
  1076. static int aureon_cs8415_qsub_info (struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) {
  1077. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  1078. uinfo->count = 10;
  1079. return 0;
  1080. }
  1081. static int aureon_cs8415_qsub_get (struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) {
  1082. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1083. snd_ice1712_save_gpio_status(ice);
  1084. aureon_cs8415_read(ice, CS8415_QSUB, ucontrol->value.bytes.data, 10);
  1085. snd_ice1712_restore_gpio_status(ice);
  1086. return 0;
  1087. }
  1088. static int aureon_cs8415_spdif_info (struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) {
  1089. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1090. uinfo->count = 1;
  1091. return 0;
  1092. }
  1093. static int aureon_cs8415_mask_get (struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) {
  1094. memset(ucontrol->value.iec958.status, 0xFF, 24);
  1095. return 0;
  1096. }
  1097. static int aureon_cs8415_spdif_get (struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) {
  1098. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1099. snd_ice1712_save_gpio_status(ice);
  1100. aureon_cs8415_read(ice, CS8415_C_BUFFER, ucontrol->value.iec958.status, 24);
  1101. snd_ice1712_restore_gpio_status(ice);
  1102. return 0;
  1103. }
  1104. /*
  1105. * Headphone Amplifier
  1106. */
  1107. static int aureon_set_headphone_amp(struct snd_ice1712 *ice, int enable)
  1108. {
  1109. unsigned int tmp, tmp2;
  1110. tmp2 = tmp = snd_ice1712_gpio_read(ice);
  1111. if (enable)
  1112. if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT)
  1113. tmp |= AUREON_HP_SEL;
  1114. else
  1115. tmp |= PRODIGY_HP_SEL;
  1116. else
  1117. if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT)
  1118. tmp &= ~ AUREON_HP_SEL;
  1119. else
  1120. tmp &= ~ PRODIGY_HP_SEL;
  1121. if (tmp != tmp2) {
  1122. snd_ice1712_gpio_write(ice, tmp);
  1123. return 1;
  1124. }
  1125. return 0;
  1126. }
  1127. static int aureon_get_headphone_amp(struct snd_ice1712 *ice)
  1128. {
  1129. unsigned int tmp = snd_ice1712_gpio_read(ice);
  1130. return ( tmp & AUREON_HP_SEL )!= 0;
  1131. }
  1132. #define aureon_hpamp_info aureon_mono_bool_info
  1133. static int aureon_hpamp_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1134. {
  1135. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1136. ucontrol->value.integer.value[0] = aureon_get_headphone_amp(ice);
  1137. return 0;
  1138. }
  1139. static int aureon_hpamp_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1140. {
  1141. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1142. return aureon_set_headphone_amp(ice,ucontrol->value.integer.value[0]);
  1143. }
  1144. /*
  1145. * Deemphasis
  1146. */
  1147. #define aureon_deemp_info aureon_mono_bool_info
  1148. static int aureon_deemp_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1149. {
  1150. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1151. ucontrol->value.integer.value[0] = (wm_get(ice, WM_DAC_CTRL2) & 0xf) == 0xf;
  1152. return 0;
  1153. }
  1154. static int aureon_deemp_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1155. {
  1156. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1157. int temp, temp2;
  1158. temp2 = temp = wm_get(ice, WM_DAC_CTRL2);
  1159. if (ucontrol->value.integer.value[0])
  1160. temp |= 0xf;
  1161. else
  1162. temp &= ~0xf;
  1163. if (temp != temp2) {
  1164. wm_put(ice, WM_DAC_CTRL2, temp);
  1165. return 1;
  1166. }
  1167. return 0;
  1168. }
  1169. /*
  1170. * ADC Oversampling
  1171. */
  1172. static int aureon_oversampling_info(struct snd_kcontrol *k, struct snd_ctl_elem_info *uinfo)
  1173. {
  1174. static char *texts[2] = { "128x", "64x" };
  1175. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1176. uinfo->count = 1;
  1177. uinfo->value.enumerated.items = 2;
  1178. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1179. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1180. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  1181. return 0;
  1182. }
  1183. static int aureon_oversampling_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1184. {
  1185. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1186. ucontrol->value.enumerated.item[0] = (wm_get(ice, WM_MASTER) & 0x8) == 0x8;
  1187. return 0;
  1188. }
  1189. static int aureon_oversampling_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1190. {
  1191. int temp, temp2;
  1192. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1193. temp2 = temp = wm_get(ice, WM_MASTER);
  1194. if (ucontrol->value.enumerated.item[0])
  1195. temp |= 0x8;
  1196. else
  1197. temp &= ~0x8;
  1198. if (temp != temp2) {
  1199. wm_put(ice, WM_MASTER, temp);
  1200. return 1;
  1201. }
  1202. return 0;
  1203. }
  1204. /*
  1205. * mixers
  1206. */
  1207. static struct snd_kcontrol_new aureon_dac_controls[] __devinitdata = {
  1208. {
  1209. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1210. .name = "Master Playback Switch",
  1211. .info = wm_master_mute_info,
  1212. .get = wm_master_mute_get,
  1213. .put = wm_master_mute_put
  1214. },
  1215. {
  1216. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1217. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1218. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1219. .name = "Master Playback Volume",
  1220. .info = wm_master_vol_info,
  1221. .get = wm_master_vol_get,
  1222. .put = wm_master_vol_put,
  1223. .tlv = { .p = db_scale_wm_dac }
  1224. },
  1225. {
  1226. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1227. .name = "Front Playback Switch",
  1228. .info = wm_mute_info,
  1229. .get = wm_mute_get,
  1230. .put = wm_mute_put,
  1231. .private_value = (2 << 8) | 0
  1232. },
  1233. {
  1234. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1235. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1236. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1237. .name = "Front Playback Volume",
  1238. .info = wm_vol_info,
  1239. .get = wm_vol_get,
  1240. .put = wm_vol_put,
  1241. .private_value = (2 << 8) | 0,
  1242. .tlv = { .p = db_scale_wm_dac }
  1243. },
  1244. {
  1245. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1246. .name = "Rear Playback Switch",
  1247. .info = wm_mute_info,
  1248. .get = wm_mute_get,
  1249. .put = wm_mute_put,
  1250. .private_value = (2 << 8) | 2
  1251. },
  1252. {
  1253. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1254. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1255. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1256. .name = "Rear Playback Volume",
  1257. .info = wm_vol_info,
  1258. .get = wm_vol_get,
  1259. .put = wm_vol_put,
  1260. .private_value = (2 << 8) | 2,
  1261. .tlv = { .p = db_scale_wm_dac }
  1262. },
  1263. {
  1264. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1265. .name = "Center Playback Switch",
  1266. .info = wm_mute_info,
  1267. .get = wm_mute_get,
  1268. .put = wm_mute_put,
  1269. .private_value = (1 << 8) | 4
  1270. },
  1271. {
  1272. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1273. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1274. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1275. .name = "Center Playback Volume",
  1276. .info = wm_vol_info,
  1277. .get = wm_vol_get,
  1278. .put = wm_vol_put,
  1279. .private_value = (1 << 8) | 4,
  1280. .tlv = { .p = db_scale_wm_dac }
  1281. },
  1282. {
  1283. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1284. .name = "LFE Playback Switch",
  1285. .info = wm_mute_info,
  1286. .get = wm_mute_get,
  1287. .put = wm_mute_put,
  1288. .private_value = (1 << 8) | 5
  1289. },
  1290. {
  1291. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1292. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1293. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1294. .name = "LFE Playback Volume",
  1295. .info = wm_vol_info,
  1296. .get = wm_vol_get,
  1297. .put = wm_vol_put,
  1298. .private_value = (1 << 8) | 5,
  1299. .tlv = { .p = db_scale_wm_dac }
  1300. },
  1301. {
  1302. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1303. .name = "Side Playback Switch",
  1304. .info = wm_mute_info,
  1305. .get = wm_mute_get,
  1306. .put = wm_mute_put,
  1307. .private_value = (2 << 8) | 6
  1308. },
  1309. {
  1310. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1311. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1312. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1313. .name = "Side Playback Volume",
  1314. .info = wm_vol_info,
  1315. .get = wm_vol_get,
  1316. .put = wm_vol_put,
  1317. .private_value = (2 << 8) | 6,
  1318. .tlv = { .p = db_scale_wm_dac }
  1319. }
  1320. };
  1321. static struct snd_kcontrol_new wm_controls[] __devinitdata = {
  1322. {
  1323. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1324. .name = "PCM Playback Switch",
  1325. .info = wm_pcm_mute_info,
  1326. .get = wm_pcm_mute_get,
  1327. .put = wm_pcm_mute_put
  1328. },
  1329. {
  1330. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1331. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1332. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1333. .name = "PCM Playback Volume",
  1334. .info = wm_pcm_vol_info,
  1335. .get = wm_pcm_vol_get,
  1336. .put = wm_pcm_vol_put,
  1337. .tlv = { .p = db_scale_wm_pcm }
  1338. },
  1339. {
  1340. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1341. .name = "Capture Switch",
  1342. .info = wm_adc_mute_info,
  1343. .get = wm_adc_mute_get,
  1344. .put = wm_adc_mute_put,
  1345. },
  1346. {
  1347. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1348. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1349. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1350. .name = "Capture Volume",
  1351. .info = wm_adc_vol_info,
  1352. .get = wm_adc_vol_get,
  1353. .put = wm_adc_vol_put,
  1354. .tlv = { .p = db_scale_wm_adc }
  1355. },
  1356. {
  1357. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1358. .name = "Capture Source",
  1359. .info = wm_adc_mux_info,
  1360. .get = wm_adc_mux_get,
  1361. .put = wm_adc_mux_put,
  1362. .private_value = 5
  1363. },
  1364. {
  1365. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1366. .name = "External Amplifier",
  1367. .info = aureon_hpamp_info,
  1368. .get = aureon_hpamp_get,
  1369. .put = aureon_hpamp_put
  1370. },
  1371. {
  1372. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1373. .name = "DAC Deemphasis Switch",
  1374. .info = aureon_deemp_info,
  1375. .get = aureon_deemp_get,
  1376. .put = aureon_deemp_put
  1377. },
  1378. {
  1379. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1380. .name = "ADC Oversampling",
  1381. .info = aureon_oversampling_info,
  1382. .get = aureon_oversampling_get,
  1383. .put = aureon_oversampling_put
  1384. }
  1385. };
  1386. static struct snd_kcontrol_new ac97_controls[] __devinitdata = {
  1387. {
  1388. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1389. .name = "AC97 Playback Switch",
  1390. .info = aureon_ac97_mmute_info,
  1391. .get = aureon_ac97_mmute_get,
  1392. .put = aureon_ac97_mmute_put,
  1393. .private_value = AC97_MASTER
  1394. },
  1395. {
  1396. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1397. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1398. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1399. .name = "AC97 Playback Volume",
  1400. .info = aureon_ac97_vol_info,
  1401. .get = aureon_ac97_vol_get,
  1402. .put = aureon_ac97_vol_put,
  1403. .private_value = AC97_MASTER|AUREON_AC97_STEREO,
  1404. .tlv = { .p = db_scale_ac97_master }
  1405. },
  1406. {
  1407. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1408. .name = "CD Playback Switch",
  1409. .info = aureon_ac97_mute_info,
  1410. .get = aureon_ac97_mute_get,
  1411. .put = aureon_ac97_mute_put,
  1412. .private_value = AC97_CD
  1413. },
  1414. {
  1415. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1416. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1417. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1418. .name = "CD Playback Volume",
  1419. .info = aureon_ac97_vol_info,
  1420. .get = aureon_ac97_vol_get,
  1421. .put = aureon_ac97_vol_put,
  1422. .private_value = AC97_CD|AUREON_AC97_STEREO,
  1423. .tlv = { .p = db_scale_ac97_gain }
  1424. },
  1425. {
  1426. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1427. .name = "Aux Playback Switch",
  1428. .info = aureon_ac97_mute_info,
  1429. .get = aureon_ac97_mute_get,
  1430. .put = aureon_ac97_mute_put,
  1431. .private_value = AC97_AUX,
  1432. },
  1433. {
  1434. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1435. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1436. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1437. .name = "Aux Playback Volume",
  1438. .info = aureon_ac97_vol_info,
  1439. .get = aureon_ac97_vol_get,
  1440. .put = aureon_ac97_vol_put,
  1441. .private_value = AC97_AUX|AUREON_AC97_STEREO,
  1442. .tlv = { .p = db_scale_ac97_gain }
  1443. },
  1444. {
  1445. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1446. .name = "Line Playback Switch",
  1447. .info = aureon_ac97_mute_info,
  1448. .get = aureon_ac97_mute_get,
  1449. .put = aureon_ac97_mute_put,
  1450. .private_value = AC97_LINE
  1451. },
  1452. {
  1453. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1454. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1455. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1456. .name = "Line Playback Volume",
  1457. .info = aureon_ac97_vol_info,
  1458. .get = aureon_ac97_vol_get,
  1459. .put = aureon_ac97_vol_put,
  1460. .private_value = AC97_LINE|AUREON_AC97_STEREO,
  1461. .tlv = { .p = db_scale_ac97_gain }
  1462. },
  1463. {
  1464. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1465. .name = "Mic Playback Switch",
  1466. .info = aureon_ac97_mute_info,
  1467. .get = aureon_ac97_mute_get,
  1468. .put = aureon_ac97_mute_put,
  1469. .private_value = AC97_MIC
  1470. },
  1471. {
  1472. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1473. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1474. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1475. .name = "Mic Playback Volume",
  1476. .info = aureon_ac97_vol_info,
  1477. .get = aureon_ac97_vol_get,
  1478. .put = aureon_ac97_vol_put,
  1479. .private_value = AC97_MIC,
  1480. .tlv = { .p = db_scale_ac97_gain }
  1481. },
  1482. {
  1483. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1484. .name = "Mic Boost (+20dB)",
  1485. .info = aureon_ac97_micboost_info,
  1486. .get = aureon_ac97_micboost_get,
  1487. .put = aureon_ac97_micboost_put
  1488. }
  1489. };
  1490. static struct snd_kcontrol_new universe_ac97_controls[] __devinitdata = {
  1491. {
  1492. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1493. .name = "AC97 Playback Switch",
  1494. .info = aureon_ac97_mmute_info,
  1495. .get = aureon_ac97_mmute_get,
  1496. .put = aureon_ac97_mmute_put,
  1497. .private_value = AC97_MASTER
  1498. },
  1499. {
  1500. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1501. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1502. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1503. .name = "AC97 Playback Volume",
  1504. .info = aureon_ac97_vol_info,
  1505. .get = aureon_ac97_vol_get,
  1506. .put = aureon_ac97_vol_put,
  1507. .private_value = AC97_MASTER|AUREON_AC97_STEREO,
  1508. .tlv = { .p = db_scale_ac97_master }
  1509. },
  1510. {
  1511. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1512. .name = "CD Playback Switch",
  1513. .info = aureon_ac97_mute_info,
  1514. .get = aureon_ac97_mute_get,
  1515. .put = aureon_ac97_mute_put,
  1516. .private_value = AC97_AUX
  1517. },
  1518. {
  1519. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1520. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1521. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1522. .name = "CD Playback Volume",
  1523. .info = aureon_ac97_vol_info,
  1524. .get = aureon_ac97_vol_get,
  1525. .put = aureon_ac97_vol_put,
  1526. .private_value = AC97_AUX|AUREON_AC97_STEREO,
  1527. .tlv = { .p = db_scale_ac97_gain }
  1528. },
  1529. {
  1530. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1531. .name = "Phono Playback Switch",
  1532. .info = aureon_ac97_mute_info,
  1533. .get = aureon_ac97_mute_get,
  1534. .put = aureon_ac97_mute_put,
  1535. .private_value = AC97_CD
  1536. },
  1537. {
  1538. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1539. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1540. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1541. .name = "Phono Playback Volume",
  1542. .info = aureon_ac97_vol_info,
  1543. .get = aureon_ac97_vol_get,
  1544. .put = aureon_ac97_vol_put,
  1545. .private_value = AC97_CD|AUREON_AC97_STEREO,
  1546. .tlv = { .p = db_scale_ac97_gain }
  1547. },
  1548. {
  1549. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1550. .name = "Line Playback Switch",
  1551. .info = aureon_ac97_mute_info,
  1552. .get = aureon_ac97_mute_get,
  1553. .put = aureon_ac97_mute_put,
  1554. .private_value = AC97_LINE
  1555. },
  1556. {
  1557. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1558. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1559. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1560. .name = "Line Playback Volume",
  1561. .info = aureon_ac97_vol_info,
  1562. .get = aureon_ac97_vol_get,
  1563. .put = aureon_ac97_vol_put,
  1564. .private_value = AC97_LINE|AUREON_AC97_STEREO,
  1565. .tlv = { .p = db_scale_ac97_gain }
  1566. },
  1567. {
  1568. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1569. .name = "Mic Playback Switch",
  1570. .info = aureon_ac97_mute_info,
  1571. .get = aureon_ac97_mute_get,
  1572. .put = aureon_ac97_mute_put,
  1573. .private_value = AC97_MIC
  1574. },
  1575. {
  1576. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1577. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1578. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1579. .name = "Mic Playback Volume",
  1580. .info = aureon_ac97_vol_info,
  1581. .get = aureon_ac97_vol_get,
  1582. .put = aureon_ac97_vol_put,
  1583. .private_value = AC97_MIC,
  1584. .tlv = { .p = db_scale_ac97_gain }
  1585. },
  1586. {
  1587. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1588. .name = "Mic Boost (+20dB)",
  1589. .info = aureon_ac97_micboost_info,
  1590. .get = aureon_ac97_micboost_get,
  1591. .put = aureon_ac97_micboost_put
  1592. },
  1593. {
  1594. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1595. .name = "Aux Playback Switch",
  1596. .info = aureon_ac97_mute_info,
  1597. .get = aureon_ac97_mute_get,
  1598. .put = aureon_ac97_mute_put,
  1599. .private_value = AC97_VIDEO,
  1600. },
  1601. {
  1602. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1603. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1604. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1605. .name = "Aux Playback Volume",
  1606. .info = aureon_ac97_vol_info,
  1607. .get = aureon_ac97_vol_get,
  1608. .put = aureon_ac97_vol_put,
  1609. .private_value = AC97_VIDEO|AUREON_AC97_STEREO,
  1610. .tlv = { .p = db_scale_ac97_gain }
  1611. },
  1612. {
  1613. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1614. .name = "Aux Source",
  1615. .info = aureon_universe_inmux_info,
  1616. .get = aureon_universe_inmux_get,
  1617. .put = aureon_universe_inmux_put
  1618. }
  1619. };
  1620. static struct snd_kcontrol_new cs8415_controls[] __devinitdata = {
  1621. {
  1622. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1623. .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH),
  1624. .info = aureon_cs8415_mute_info,
  1625. .get = aureon_cs8415_mute_get,
  1626. .put = aureon_cs8415_mute_put
  1627. },
  1628. {
  1629. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1630. .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,NONE) "Source",
  1631. .info = aureon_cs8415_mux_info,
  1632. .get = aureon_cs8415_mux_get,
  1633. .put = aureon_cs8415_mux_put,
  1634. },
  1635. {
  1636. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1637. .name = SNDRV_CTL_NAME_IEC958("Q-subcode ",CAPTURE,DEFAULT),
  1638. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  1639. .info = aureon_cs8415_qsub_info,
  1640. .get = aureon_cs8415_qsub_get,
  1641. },
  1642. {
  1643. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1644. .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,MASK),
  1645. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1646. .info = aureon_cs8415_spdif_info,
  1647. .get = aureon_cs8415_mask_get
  1648. },
  1649. {
  1650. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1651. .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,DEFAULT),
  1652. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  1653. .info = aureon_cs8415_spdif_info,
  1654. .get = aureon_cs8415_spdif_get
  1655. },
  1656. {
  1657. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1658. .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,NONE) "Rate",
  1659. .access =SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  1660. .info = aureon_cs8415_rate_info,
  1661. .get = aureon_cs8415_rate_get
  1662. }
  1663. };
  1664. static int __devinit aureon_add_controls(struct snd_ice1712 *ice)
  1665. {
  1666. unsigned int i, counts;
  1667. int err;
  1668. counts = ARRAY_SIZE(aureon_dac_controls);
  1669. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_AUREON51_SKY)
  1670. counts -= 2; /* no side */
  1671. for (i = 0; i < counts; i++) {
  1672. err = snd_ctl_add(ice->card, snd_ctl_new1(&aureon_dac_controls[i], ice));
  1673. if (err < 0)
  1674. return err;
  1675. }
  1676. for (i = 0; i < ARRAY_SIZE(wm_controls); i++) {
  1677. err = snd_ctl_add(ice->card, snd_ctl_new1(&wm_controls[i], ice));
  1678. if (err < 0)
  1679. return err;
  1680. }
  1681. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_AUREON71_UNIVERSE) {
  1682. for (i = 0; i < ARRAY_SIZE(universe_ac97_controls); i++) {
  1683. err = snd_ctl_add(ice->card, snd_ctl_new1(&universe_ac97_controls[i], ice));
  1684. if (err < 0)
  1685. return err;
  1686. }
  1687. }
  1688. else if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT) {
  1689. for (i = 0; i < ARRAY_SIZE(ac97_controls); i++) {
  1690. err = snd_ctl_add(ice->card, snd_ctl_new1(&ac97_controls[i], ice));
  1691. if (err < 0)
  1692. return err;
  1693. }
  1694. }
  1695. if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT) {
  1696. unsigned char id;
  1697. snd_ice1712_save_gpio_status(ice);
  1698. id = aureon_cs8415_get(ice, CS8415_ID);
  1699. if (id != 0x41)
  1700. snd_printk(KERN_INFO "No CS8415 chip. Skipping CS8415 controls.\n");
  1701. else if ((id & 0x0F) != 0x01)
  1702. snd_printk(KERN_INFO "Detected unsupported CS8415 rev. (%c)\n", (char)((id & 0x0F) + 'A' - 1));
  1703. else {
  1704. for (i = 0; i< ARRAY_SIZE(cs8415_controls); i++) {
  1705. struct snd_kcontrol *kctl;
  1706. err = snd_ctl_add(ice->card, (kctl = snd_ctl_new1(&cs8415_controls[i], ice)));
  1707. if (err < 0)
  1708. return err;
  1709. if (i > 1)
  1710. kctl->id.device = ice->pcm->device;
  1711. }
  1712. }
  1713. snd_ice1712_restore_gpio_status(ice);
  1714. }
  1715. return 0;
  1716. }
  1717. /*
  1718. * initialize the chip
  1719. */
  1720. static int __devinit aureon_init(struct snd_ice1712 *ice)
  1721. {
  1722. static unsigned short wm_inits_aureon[] = {
  1723. /* These come first to reduce init pop noise */
  1724. 0x1b, 0x044, /* ADC Mux (AC'97 source) */
  1725. 0x1c, 0x00B, /* Out Mux1 (VOUT1 = DAC+AUX, VOUT2 = DAC) */
  1726. 0x1d, 0x009, /* Out Mux2 (VOUT2 = DAC, VOUT3 = DAC) */
  1727. 0x18, 0x000, /* All power-up */
  1728. 0x16, 0x122, /* I2S, normal polarity, 24bit */
  1729. 0x17, 0x022, /* 256fs, slave mode */
  1730. 0x00, 0, /* DAC1 analog mute */
  1731. 0x01, 0, /* DAC2 analog mute */
  1732. 0x02, 0, /* DAC3 analog mute */
  1733. 0x03, 0, /* DAC4 analog mute */
  1734. 0x04, 0, /* DAC5 analog mute */
  1735. 0x05, 0, /* DAC6 analog mute */
  1736. 0x06, 0, /* DAC7 analog mute */
  1737. 0x07, 0, /* DAC8 analog mute */
  1738. 0x08, 0x100, /* master analog mute */
  1739. 0x09, 0xff, /* DAC1 digital full */
  1740. 0x0a, 0xff, /* DAC2 digital full */
  1741. 0x0b, 0xff, /* DAC3 digital full */
  1742. 0x0c, 0xff, /* DAC4 digital full */
  1743. 0x0d, 0xff, /* DAC5 digital full */
  1744. 0x0e, 0xff, /* DAC6 digital full */
  1745. 0x0f, 0xff, /* DAC7 digital full */
  1746. 0x10, 0xff, /* DAC8 digital full */
  1747. 0x11, 0x1ff, /* master digital full */
  1748. 0x12, 0x000, /* phase normal */
  1749. 0x13, 0x090, /* unmute DAC L/R */
  1750. 0x14, 0x000, /* all unmute */
  1751. 0x15, 0x000, /* no deemphasis, no ZFLG */
  1752. 0x19, 0x000, /* -12dB ADC/L */
  1753. 0x1a, 0x000, /* -12dB ADC/R */
  1754. (unsigned short)-1
  1755. };
  1756. static unsigned short wm_inits_prodigy[] = {
  1757. /* These come first to reduce init pop noise */
  1758. 0x1b, 0x000, /* ADC Mux */
  1759. 0x1c, 0x009, /* Out Mux1 */
  1760. 0x1d, 0x009, /* Out Mux2 */
  1761. 0x18, 0x000, /* All power-up */
  1762. 0x16, 0x022, /* I2S, normal polarity, 24bit, high-pass on */
  1763. 0x17, 0x006, /* 128fs, slave mode */
  1764. 0x00, 0, /* DAC1 analog mute */
  1765. 0x01, 0, /* DAC2 analog mute */
  1766. 0x02, 0, /* DAC3 analog mute */
  1767. 0x03, 0, /* DAC4 analog mute */
  1768. 0x04, 0, /* DAC5 analog mute */
  1769. 0x05, 0, /* DAC6 analog mute */
  1770. 0x06, 0, /* DAC7 analog mute */
  1771. 0x07, 0, /* DAC8 analog mute */
  1772. 0x08, 0x100, /* master analog mute */
  1773. 0x09, 0x7f, /* DAC1 digital full */
  1774. 0x0a, 0x7f, /* DAC2 digital full */
  1775. 0x0b, 0x7f, /* DAC3 digital full */
  1776. 0x0c, 0x7f, /* DAC4 digital full */
  1777. 0x0d, 0x7f, /* DAC5 digital full */
  1778. 0x0e, 0x7f, /* DAC6 digital full */
  1779. 0x0f, 0x7f, /* DAC7 digital full */
  1780. 0x10, 0x7f, /* DAC8 digital full */
  1781. 0x11, 0x1FF, /* master digital full */
  1782. 0x12, 0x000, /* phase normal */
  1783. 0x13, 0x090, /* unmute DAC L/R */
  1784. 0x14, 0x000, /* all unmute */
  1785. 0x15, 0x000, /* no deemphasis, no ZFLG */
  1786. 0x19, 0x000, /* -12dB ADC/L */
  1787. 0x1a, 0x000, /* -12dB ADC/R */
  1788. (unsigned short)-1
  1789. };
  1790. static unsigned short cs_inits[] = {
  1791. 0x0441, /* RUN */
  1792. 0x0180, /* no mute, OMCK output on RMCK pin */
  1793. 0x0201, /* S/PDIF source on RXP1 */
  1794. 0x0605, /* slave, 24bit, MSB on second OSCLK, SDOUT for right channel when OLRCK is high */
  1795. (unsigned short)-1
  1796. };
  1797. unsigned int tmp;
  1798. unsigned short *p;
  1799. int err, i;
  1800. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_AUREON51_SKY) {
  1801. ice->num_total_dacs = 6;
  1802. ice->num_total_adcs = 2;
  1803. } else {
  1804. /* aureon 7.1 and prodigy 7.1 */
  1805. ice->num_total_dacs = 8;
  1806. ice->num_total_adcs = 2;
  1807. }
  1808. /* to remeber the register values of CS8415 */
  1809. ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
  1810. if (! ice->akm)
  1811. return -ENOMEM;
  1812. ice->akm_codecs = 1;
  1813. if ((err = aureon_ac97_init(ice)) != 0)
  1814. return err;
  1815. snd_ice1712_gpio_set_dir(ice, 0x5fffff); /* fix this for the time being */
  1816. /* reset the wm codec as the SPI mode */
  1817. snd_ice1712_save_gpio_status(ice);
  1818. snd_ice1712_gpio_set_mask(ice, ~(AUREON_WM_RESET|AUREON_WM_CS|AUREON_CS8415_CS|AUREON_HP_SEL));
  1819. tmp = snd_ice1712_gpio_read(ice);
  1820. tmp &= ~AUREON_WM_RESET;
  1821. snd_ice1712_gpio_write(ice, tmp);
  1822. udelay(1);
  1823. tmp |= AUREON_WM_CS | AUREON_CS8415_CS;
  1824. snd_ice1712_gpio_write(ice, tmp);
  1825. udelay(1);
  1826. tmp |= AUREON_WM_RESET;
  1827. snd_ice1712_gpio_write(ice, tmp);
  1828. udelay(1);
  1829. /* initialize WM8770 codec */
  1830. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71 ||
  1831. ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71LT)
  1832. p = wm_inits_prodigy;
  1833. else
  1834. p = wm_inits_aureon;
  1835. for (; *p != (unsigned short)-1; p += 2)
  1836. wm_put(ice, p[0], p[1]);
  1837. /* initialize CS8415A codec */
  1838. if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT) {
  1839. for (p = cs_inits; *p != (unsigned short)-1; p++)
  1840. aureon_spi_write(ice, AUREON_CS8415_CS, *p | 0x200000, 24);
  1841. ice->spec.aureon.cs8415_mux = 1;
  1842. aureon_set_headphone_amp(ice, 1);
  1843. }
  1844. snd_ice1712_restore_gpio_status(ice);
  1845. /* initialize PCA9554 pin directions & set default input*/
  1846. aureon_pca9554_write(ice, PCA9554_DIR, 0x00);
  1847. aureon_pca9554_write(ice, PCA9554_OUT, 0x00); /* internal AUX */
  1848. ice->spec.aureon.master[0] = WM_VOL_MUTE;
  1849. ice->spec.aureon.master[1] = WM_VOL_MUTE;
  1850. for (i = 0; i < ice->num_total_dacs; i++) {
  1851. ice->spec.aureon.vol[i] = WM_VOL_MUTE;
  1852. wm_set_vol(ice, i, ice->spec.aureon.vol[i], ice->spec.aureon.master[i % 2]);
  1853. }
  1854. return 0;
  1855. }
  1856. /*
  1857. * Aureon boards don't provide the EEPROM data except for the vendor IDs.
  1858. * hence the driver needs to sets up it properly.
  1859. */
  1860. static unsigned char aureon51_eeprom[] __devinitdata = {
  1861. 0x0a, /* SYSCONF: clock 512, spdif-in/ADC, 3DACs */
  1862. 0x80, /* ACLINK: I2S */
  1863. 0xfc, /* I2S: vol, 96k, 24bit, 192k */
  1864. 0xc3, /* SPDIF: out-en, out-int, spdif-in */
  1865. 0xff, /* GPIO_DIR */
  1866. 0xff, /* GPIO_DIR1 */
  1867. 0x5f, /* GPIO_DIR2 */
  1868. 0x00, /* GPIO_MASK */
  1869. 0x00, /* GPIO_MASK1 */
  1870. 0x00, /* GPIO_MASK2 */
  1871. 0x00, /* GPIO_STATE */
  1872. 0x00, /* GPIO_STATE1 */
  1873. 0x00, /* GPIO_STATE2 */
  1874. };
  1875. static unsigned char aureon71_eeprom[] __devinitdata = {
  1876. 0x0b, /* SYSCONF: clock 512, spdif-in/ADC, 4DACs */
  1877. 0x80, /* ACLINK: I2S */
  1878. 0xfc, /* I2S: vol, 96k, 24bit, 192k */
  1879. 0xc3, /* SPDIF: out-en, out-int, spdif-in */
  1880. 0xff, /* GPIO_DIR */
  1881. 0xff, /* GPIO_DIR1 */
  1882. 0x5f, /* GPIO_DIR2 */
  1883. 0x00, /* GPIO_MASK */
  1884. 0x00, /* GPIO_MASK1 */
  1885. 0x00, /* GPIO_MASK2 */
  1886. 0x00, /* GPIO_STATE */
  1887. 0x00, /* GPIO_STATE1 */
  1888. 0x00, /* GPIO_STATE2 */
  1889. };
  1890. static unsigned char prodigy71_eeprom[] __devinitdata = {
  1891. 0x0b, /* SYSCONF: clock 512, spdif-in/ADC, 4DACs */
  1892. 0x80, /* ACLINK: I2S */
  1893. 0xfc, /* I2S: vol, 96k, 24bit, 192k */
  1894. 0xc3, /* SPDIF: out-en, out-int, spdif-in */
  1895. 0xff, /* GPIO_DIR */
  1896. 0xff, /* GPIO_DIR1 */
  1897. 0x5f, /* GPIO_DIR2 */
  1898. 0x00, /* GPIO_MASK */
  1899. 0x00, /* GPIO_MASK1 */
  1900. 0x00, /* GPIO_MASK2 */
  1901. 0x00, /* GPIO_STATE */
  1902. 0x00, /* GPIO_STATE1 */
  1903. 0x00, /* GPIO_STATE2 */
  1904. };
  1905. static unsigned char prodigy71lt_eeprom[] __devinitdata = {
  1906. 0x4b, /* SYSCINF: clock 512, spdif-in/ADC, 4DACs */
  1907. 0x80, /* ACLINK: I2S */
  1908. 0xfc, /* I2S: vol, 96k, 24bit, 192k */
  1909. 0xc3, /* SPDIF: out-en, out-int, spdif-in */
  1910. 0xff, /* GPIO_DIR */
  1911. 0xff, /* GPIO_DIR1 */
  1912. 0x5f, /* GPIO_DIR2 */
  1913. 0x00, /* GPIO_MASK */
  1914. 0x00, /* GPIO_MASK1 */
  1915. 0x00, /* GPIO_MASK2 */
  1916. 0x00, /* GPIO_STATE */
  1917. 0x00, /* GPIO_STATE1 */
  1918. 0x00, /* GPIO_STATE2 */
  1919. };
  1920. /* entry point */
  1921. struct snd_ice1712_card_info snd_vt1724_aureon_cards[] __devinitdata = {
  1922. {
  1923. .subvendor = VT1724_SUBDEVICE_AUREON51_SKY,
  1924. .name = "Terratec Aureon 5.1-Sky",
  1925. .model = "aureon51",
  1926. .chip_init = aureon_init,
  1927. .build_controls = aureon_add_controls,
  1928. .eeprom_size = sizeof(aureon51_eeprom),
  1929. .eeprom_data = aureon51_eeprom,
  1930. .driver = "Aureon51",
  1931. },
  1932. {
  1933. .subvendor = VT1724_SUBDEVICE_AUREON71_SPACE,
  1934. .name = "Terratec Aureon 7.1-Space",
  1935. .model = "aureon71",
  1936. .chip_init = aureon_init,
  1937. .build_controls = aureon_add_controls,
  1938. .eeprom_size = sizeof(aureon71_eeprom),
  1939. .eeprom_data = aureon71_eeprom,
  1940. .driver = "Aureon71",
  1941. },
  1942. {
  1943. .subvendor = VT1724_SUBDEVICE_AUREON71_UNIVERSE,
  1944. .name = "Terratec Aureon 7.1-Universe",
  1945. .model = "universe",
  1946. .chip_init = aureon_init,
  1947. .build_controls = aureon_add_controls,
  1948. .eeprom_size = sizeof(aureon71_eeprom),
  1949. .eeprom_data = aureon71_eeprom,
  1950. .driver = "Aureon71Univ", /* keep in 15 letters */
  1951. },
  1952. {
  1953. .subvendor = VT1724_SUBDEVICE_PRODIGY71,
  1954. .name = "Audiotrak Prodigy 7.1",
  1955. .model = "prodigy71",
  1956. .chip_init = aureon_init,
  1957. .build_controls = aureon_add_controls,
  1958. .eeprom_size = sizeof(prodigy71_eeprom),
  1959. .eeprom_data = prodigy71_eeprom,
  1960. .driver = "Prodigy71", /* should be identical with Aureon71 */
  1961. },
  1962. {
  1963. .subvendor = VT1724_SUBDEVICE_PRODIGY71LT,
  1964. .name = "Audiotrak Prodigy 7.1 LT",
  1965. .model = "prodigy71lt",
  1966. .chip_init = aureon_init,
  1967. .build_controls = aureon_add_controls,
  1968. .eeprom_size = sizeof(prodigy71lt_eeprom),
  1969. .eeprom_data = prodigy71lt_eeprom,
  1970. .driver = "Prodigy71LT",
  1971. },
  1972. { } /* terminator */
  1973. };