emufx.c 90 KB

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  1. /*
  2. * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
  3. * Creative Labs, Inc.
  4. * Routines for effect processor FX8010
  5. *
  6. * BUGS:
  7. * --
  8. *
  9. * TODO:
  10. * --
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  25. *
  26. */
  27. #include <sound/driver.h>
  28. #include <linux/pci.h>
  29. #include <linux/capability.h>
  30. #include <linux/delay.h>
  31. #include <linux/slab.h>
  32. #include <linux/vmalloc.h>
  33. #include <linux/init.h>
  34. #include <linux/mutex.h>
  35. #include <sound/core.h>
  36. #include <sound/tlv.h>
  37. #include <sound/emu10k1.h>
  38. #if 0 /* for testing purposes - digital out -> capture */
  39. #define EMU10K1_CAPTURE_DIGITAL_OUT
  40. #endif
  41. #if 0 /* for testing purposes - set S/PDIF to AC3 output */
  42. #define EMU10K1_SET_AC3_IEC958
  43. #endif
  44. #if 0 /* for testing purposes - feed the front signal to Center/LFE outputs */
  45. #define EMU10K1_CENTER_LFE_FROM_FRONT
  46. #endif
  47. /*
  48. * Tables
  49. */
  50. static char *fxbuses[16] = {
  51. /* 0x00 */ "PCM Left",
  52. /* 0x01 */ "PCM Right",
  53. /* 0x02 */ "PCM Surround Left",
  54. /* 0x03 */ "PCM Surround Right",
  55. /* 0x04 */ "MIDI Left",
  56. /* 0x05 */ "MIDI Right",
  57. /* 0x06 */ "Center",
  58. /* 0x07 */ "LFE",
  59. /* 0x08 */ NULL,
  60. /* 0x09 */ NULL,
  61. /* 0x0a */ NULL,
  62. /* 0x0b */ NULL,
  63. /* 0x0c */ "MIDI Reverb",
  64. /* 0x0d */ "MIDI Chorus",
  65. /* 0x0e */ NULL,
  66. /* 0x0f */ NULL
  67. };
  68. static char *creative_ins[16] = {
  69. /* 0x00 */ "AC97 Left",
  70. /* 0x01 */ "AC97 Right",
  71. /* 0x02 */ "TTL IEC958 Left",
  72. /* 0x03 */ "TTL IEC958 Right",
  73. /* 0x04 */ "Zoom Video Left",
  74. /* 0x05 */ "Zoom Video Right",
  75. /* 0x06 */ "Optical IEC958 Left",
  76. /* 0x07 */ "Optical IEC958 Right",
  77. /* 0x08 */ "Line/Mic 1 Left",
  78. /* 0x09 */ "Line/Mic 1 Right",
  79. /* 0x0a */ "Coaxial IEC958 Left",
  80. /* 0x0b */ "Coaxial IEC958 Right",
  81. /* 0x0c */ "Line/Mic 2 Left",
  82. /* 0x0d */ "Line/Mic 2 Right",
  83. /* 0x0e */ NULL,
  84. /* 0x0f */ NULL
  85. };
  86. static char *audigy_ins[16] = {
  87. /* 0x00 */ "AC97 Left",
  88. /* 0x01 */ "AC97 Right",
  89. /* 0x02 */ "Audigy CD Left",
  90. /* 0x03 */ "Audigy CD Right",
  91. /* 0x04 */ "Optical IEC958 Left",
  92. /* 0x05 */ "Optical IEC958 Right",
  93. /* 0x06 */ NULL,
  94. /* 0x07 */ NULL,
  95. /* 0x08 */ "Line/Mic 2 Left",
  96. /* 0x09 */ "Line/Mic 2 Right",
  97. /* 0x0a */ "SPDIF Left",
  98. /* 0x0b */ "SPDIF Right",
  99. /* 0x0c */ "Aux2 Left",
  100. /* 0x0d */ "Aux2 Right",
  101. /* 0x0e */ NULL,
  102. /* 0x0f */ NULL
  103. };
  104. static char *creative_outs[32] = {
  105. /* 0x00 */ "AC97 Left",
  106. /* 0x01 */ "AC97 Right",
  107. /* 0x02 */ "Optical IEC958 Left",
  108. /* 0x03 */ "Optical IEC958 Right",
  109. /* 0x04 */ "Center",
  110. /* 0x05 */ "LFE",
  111. /* 0x06 */ "Headphone Left",
  112. /* 0x07 */ "Headphone Right",
  113. /* 0x08 */ "Surround Left",
  114. /* 0x09 */ "Surround Right",
  115. /* 0x0a */ "PCM Capture Left",
  116. /* 0x0b */ "PCM Capture Right",
  117. /* 0x0c */ "MIC Capture",
  118. /* 0x0d */ "AC97 Surround Left",
  119. /* 0x0e */ "AC97 Surround Right",
  120. /* 0x0f */ NULL,
  121. /* 0x10 */ NULL,
  122. /* 0x11 */ "Analog Center",
  123. /* 0x12 */ "Analog LFE",
  124. /* 0x13 */ NULL,
  125. /* 0x14 */ NULL,
  126. /* 0x15 */ NULL,
  127. /* 0x16 */ NULL,
  128. /* 0x17 */ NULL,
  129. /* 0x18 */ NULL,
  130. /* 0x19 */ NULL,
  131. /* 0x1a */ NULL,
  132. /* 0x1b */ NULL,
  133. /* 0x1c */ NULL,
  134. /* 0x1d */ NULL,
  135. /* 0x1e */ NULL,
  136. /* 0x1f */ NULL,
  137. };
  138. static char *audigy_outs[32] = {
  139. /* 0x00 */ "Digital Front Left",
  140. /* 0x01 */ "Digital Front Right",
  141. /* 0x02 */ "Digital Center",
  142. /* 0x03 */ "Digital LEF",
  143. /* 0x04 */ "Headphone Left",
  144. /* 0x05 */ "Headphone Right",
  145. /* 0x06 */ "Digital Rear Left",
  146. /* 0x07 */ "Digital Rear Right",
  147. /* 0x08 */ "Front Left",
  148. /* 0x09 */ "Front Right",
  149. /* 0x0a */ "Center",
  150. /* 0x0b */ "LFE",
  151. /* 0x0c */ NULL,
  152. /* 0x0d */ NULL,
  153. /* 0x0e */ "Rear Left",
  154. /* 0x0f */ "Rear Right",
  155. /* 0x10 */ "AC97 Front Left",
  156. /* 0x11 */ "AC97 Front Right",
  157. /* 0x12 */ "ADC Caputre Left",
  158. /* 0x13 */ "ADC Capture Right",
  159. /* 0x14 */ NULL,
  160. /* 0x15 */ NULL,
  161. /* 0x16 */ NULL,
  162. /* 0x17 */ NULL,
  163. /* 0x18 */ NULL,
  164. /* 0x19 */ NULL,
  165. /* 0x1a */ NULL,
  166. /* 0x1b */ NULL,
  167. /* 0x1c */ NULL,
  168. /* 0x1d */ NULL,
  169. /* 0x1e */ NULL,
  170. /* 0x1f */ NULL,
  171. };
  172. static const u32 bass_table[41][5] = {
  173. { 0x3e4f844f, 0x84ed4cc3, 0x3cc69927, 0x7b03553a, 0xc4da8486 },
  174. { 0x3e69a17a, 0x84c280fb, 0x3cd77cd4, 0x7b2f2a6f, 0xc4b08d1d },
  175. { 0x3e82ff42, 0x849991d5, 0x3ce7466b, 0x7b5917c6, 0xc48863ee },
  176. { 0x3e9bab3c, 0x847267f0, 0x3cf5ffe8, 0x7b813560, 0xc461f22c },
  177. { 0x3eb3b275, 0x844ced29, 0x3d03b295, 0x7ba79a1c, 0xc43d223b },
  178. { 0x3ecb2174, 0x84290c8b, 0x3d106714, 0x7bcc5ba3, 0xc419dfa5 },
  179. { 0x3ee2044b, 0x8406b244, 0x3d1c2561, 0x7bef8e77, 0xc3f8170f },
  180. { 0x3ef86698, 0x83e5cb96, 0x3d26f4d8, 0x7c114600, 0xc3d7b625 },
  181. { 0x3f0e5390, 0x83c646c9, 0x3d30dc39, 0x7c319498, 0xc3b8ab97 },
  182. { 0x3f23d60b, 0x83a81321, 0x3d39e1af, 0x7c508b9c, 0xc39ae704 },
  183. { 0x3f38f884, 0x838b20d2, 0x3d420ad2, 0x7c6e3b75, 0xc37e58f1 },
  184. { 0x3f4dc52c, 0x836f60ef, 0x3d495cab, 0x7c8ab3a6, 0xc362f2be },
  185. { 0x3f6245e8, 0x8354c565, 0x3d4fdbb8, 0x7ca602d6, 0xc348a69b },
  186. { 0x3f76845f, 0x833b40ec, 0x3d558bf0, 0x7cc036df, 0xc32f677c },
  187. { 0x3f8a8a03, 0x8322c6fb, 0x3d5a70c4, 0x7cd95cd7, 0xc317290b },
  188. { 0x3f9e6014, 0x830b4bc3, 0x3d5e8d25, 0x7cf1811a, 0xc2ffdfa5 },
  189. { 0x3fb20fae, 0x82f4c420, 0x3d61e37f, 0x7d08af56, 0xc2e9804a },
  190. { 0x3fc5a1cc, 0x82df2592, 0x3d6475c3, 0x7d1ef294, 0xc2d40096 },
  191. { 0x3fd91f55, 0x82ca6632, 0x3d664564, 0x7d345541, 0xc2bf56b9 },
  192. { 0x3fec9120, 0x82b67cac, 0x3d675356, 0x7d48e138, 0xc2ab796e },
  193. { 0x40000000, 0x82a36037, 0x3d67a012, 0x7d5c9fc9, 0xc2985fee },
  194. { 0x401374c7, 0x8291088a, 0x3d672b93, 0x7d6f99c3, 0xc28601f2 },
  195. { 0x4026f857, 0x827f6dd7, 0x3d65f559, 0x7d81d77c, 0xc27457a3 },
  196. { 0x403a939f, 0x826e88c5, 0x3d63fc63, 0x7d9360d4, 0xc2635996 },
  197. { 0x404e4faf, 0x825e5266, 0x3d613f32, 0x7da43d42, 0xc25300c6 },
  198. { 0x406235ba, 0x824ec434, 0x3d5dbbc3, 0x7db473d7, 0xc243468e },
  199. { 0x40764f1f, 0x823fd80c, 0x3d596f8f, 0x7dc40b44, 0xc23424a2 },
  200. { 0x408aa576, 0x82318824, 0x3d545787, 0x7dd309e2, 0xc2259509 },
  201. { 0x409f4296, 0x8223cf0b, 0x3d4e7012, 0x7de175b5, 0xc2179218 },
  202. { 0x40b430a0, 0x8216a7a1, 0x3d47b505, 0x7def5475, 0xc20a1670 },
  203. { 0x40c97a0a, 0x820a0d12, 0x3d4021a1, 0x7dfcab8d, 0xc1fd1cf5 },
  204. { 0x40df29a6, 0x81fdfad6, 0x3d37b08d, 0x7e098028, 0xc1f0a0ca },
  205. { 0x40f54ab1, 0x81f26ca9, 0x3d2e5bd1, 0x7e15d72b, 0xc1e49d52 },
  206. { 0x410be8da, 0x81e75e89, 0x3d241cce, 0x7e21b544, 0xc1d90e24 },
  207. { 0x41231051, 0x81dcccb3, 0x3d18ec37, 0x7e2d1ee6, 0xc1cdef10 },
  208. { 0x413acdd0, 0x81d2b39e, 0x3d0cc20a, 0x7e38184e, 0xc1c33c13 },
  209. { 0x41532ea7, 0x81c90ffb, 0x3cff9585, 0x7e42a58b, 0xc1b8f15a },
  210. { 0x416c40cd, 0x81bfdeb2, 0x3cf15d21, 0x7e4cca7c, 0xc1af0b3f },
  211. { 0x418612ea, 0x81b71cdc, 0x3ce20e85, 0x7e568ad3, 0xc1a58640 },
  212. { 0x41a0b465, 0x81aec7c5, 0x3cd19e7c, 0x7e5fea1e, 0xc19c5f03 },
  213. { 0x41bc3573, 0x81a6dcea, 0x3cc000e9, 0x7e68ebc2, 0xc1939250 }
  214. };
  215. static const u32 treble_table[41][5] = {
  216. { 0x0125cba9, 0xfed5debd, 0x00599b6c, 0x0d2506da, 0xfa85b354 },
  217. { 0x0142f67e, 0xfeb03163, 0x0066cd0f, 0x0d14c69d, 0xfa914473 },
  218. { 0x016328bd, 0xfe860158, 0x0075b7f2, 0x0d03eb27, 0xfa9d32d2 },
  219. { 0x0186b438, 0xfe56c982, 0x00869234, 0x0cf27048, 0xfaa97fca },
  220. { 0x01adf358, 0xfe21f5fe, 0x00999842, 0x0ce051c2, 0xfab62ca5 },
  221. { 0x01d949fa, 0xfde6e287, 0x00af0d8d, 0x0ccd8b4a, 0xfac33aa7 },
  222. { 0x02092669, 0xfda4d8bf, 0x00c73d4c, 0x0cba1884, 0xfad0ab07 },
  223. { 0x023e0268, 0xfd5b0e4a, 0x00e27b54, 0x0ca5f509, 0xfade7ef2 },
  224. { 0x0278645c, 0xfd08a2b0, 0x01012509, 0x0c911c63, 0xfaecb788 },
  225. { 0x02b8e091, 0xfcac9d1a, 0x0123a262, 0x0c7b8a14, 0xfafb55df },
  226. { 0x03001a9a, 0xfc45e9ce, 0x014a6709, 0x0c65398f, 0xfb0a5aff },
  227. { 0x034ec6d7, 0xfbd3576b, 0x0175f397, 0x0c4e2643, 0xfb19c7e4 },
  228. { 0x03a5ac15, 0xfb5393ee, 0x01a6d6ed, 0x0c364b94, 0xfb299d7c },
  229. { 0x0405a562, 0xfac52968, 0x01ddafae, 0x0c1da4e2, 0xfb39dca5 },
  230. { 0x046fa3fe, 0xfa267a66, 0x021b2ddd, 0x0c042d8d, 0xfb4a8631 },
  231. { 0x04e4b17f, 0xf975be0f, 0x0260149f, 0x0be9e0f2, 0xfb5b9ae0 },
  232. { 0x0565f220, 0xf8b0fbe5, 0x02ad3c29, 0x0bceba73, 0xfb6d1b60 },
  233. { 0x05f4a745, 0xf7d60722, 0x030393d4, 0x0bb2b578, 0xfb7f084d },
  234. { 0x06923236, 0xf6e279bd, 0x03642465, 0x0b95cd75, 0xfb916233 },
  235. { 0x07401713, 0xf5d3aef9, 0x03d01283, 0x0b77fded, 0xfba42984 },
  236. { 0x08000000, 0xf4a6bd88, 0x0448a161, 0x0b594278, 0xfbb75e9f },
  237. { 0x08d3c097, 0xf3587131, 0x04cf35a4, 0x0b3996c9, 0xfbcb01cb },
  238. { 0x09bd59a2, 0xf1e543f9, 0x05655880, 0x0b18f6b2, 0xfbdf1333 },
  239. { 0x0abefd0f, 0xf04956ca, 0x060cbb12, 0x0af75e2c, 0xfbf392e8 },
  240. { 0x0bdb123e, 0xee806984, 0x06c739fe, 0x0ad4c962, 0xfc0880dd },
  241. { 0x0d143a94, 0xec85d287, 0x0796e150, 0x0ab134b0, 0xfc1ddce5 },
  242. { 0x0e6d5664, 0xea547598, 0x087df0a0, 0x0a8c9cb6, 0xfc33a6ad },
  243. { 0x0fe98a2a, 0xe7e6ba35, 0x097edf83, 0x0a66fe5b, 0xfc49ddc2 },
  244. { 0x118c4421, 0xe536813a, 0x0a9c6248, 0x0a4056d7, 0xfc608185 },
  245. { 0x1359422e, 0xe23d19eb, 0x0bd96efb, 0x0a18a3bf, 0xfc77912c },
  246. { 0x1554982b, 0xdef33645, 0x0d3942bd, 0x09efe312, 0xfc8f0bc1 },
  247. { 0x1782b68a, 0xdb50deb1, 0x0ebf676d, 0x09c6133f, 0xfca6f019 },
  248. { 0x19e8715d, 0xd74d64fd, 0x106fb999, 0x099b3337, 0xfcbf3cd6 },
  249. { 0x1c8b07b8, 0xd2df56ab, 0x124e6ec8, 0x096f4274, 0xfcd7f060 },
  250. { 0x1f702b6d, 0xcdfc6e92, 0x14601c10, 0x0942410b, 0xfcf108e5 },
  251. { 0x229e0933, 0xc89985cd, 0x16a9bcfa, 0x09142fb5, 0xfd0a8451 },
  252. { 0x261b5118, 0xc2aa8409, 0x1930bab6, 0x08e50fdc, 0xfd24604d },
  253. { 0x29ef3f5d, 0xbc224f28, 0x1bfaf396, 0x08b4e3aa, 0xfd3e9a3b },
  254. { 0x2e21a59b, 0xb4f2ba46, 0x1f0ec2d6, 0x0883ae15, 0xfd592f33 },
  255. { 0x32baf44b, 0xad0c7429, 0x227308a3, 0x085172eb, 0xfd741bfd },
  256. { 0x37c4448b, 0xa45ef51d, 0x262f3267, 0x081e36dc, 0xfd8f5d14 }
  257. };
  258. /* dB gain = (float) 20 * log10( float(db_table_value) / 0x8000000 ) */
  259. static const u32 db_table[101] = {
  260. 0x00000000, 0x01571f82, 0x01674b41, 0x01783a1b, 0x0189f540,
  261. 0x019c8651, 0x01aff763, 0x01c45306, 0x01d9a446, 0x01eff6b8,
  262. 0x0207567a, 0x021fd03d, 0x0239714c, 0x02544792, 0x027061a1,
  263. 0x028dcebb, 0x02ac9edc, 0x02cce2bf, 0x02eeabe8, 0x03120cb0,
  264. 0x0337184e, 0x035de2df, 0x03868173, 0x03b10a18, 0x03dd93e9,
  265. 0x040c3713, 0x043d0cea, 0x04702ff3, 0x04a5bbf2, 0x04ddcdfb,
  266. 0x0518847f, 0x0555ff62, 0x05966005, 0x05d9c95d, 0x06206005,
  267. 0x066a4a52, 0x06b7b067, 0x0708bc4c, 0x075d9a01, 0x07b6779d,
  268. 0x08138561, 0x0874f5d5, 0x08dafde1, 0x0945d4ed, 0x09b5b4fd,
  269. 0x0a2adad1, 0x0aa58605, 0x0b25f936, 0x0bac7a24, 0x0c3951d8,
  270. 0x0ccccccc, 0x0d673b17, 0x0e08f093, 0x0eb24510, 0x0f639481,
  271. 0x101d3f2d, 0x10dfa9e6, 0x11ab3e3f, 0x12806ac3, 0x135fa333,
  272. 0x144960c5, 0x153e2266, 0x163e6cfe, 0x174acbb7, 0x1863d04d,
  273. 0x198a1357, 0x1abe349f, 0x1c00db77, 0x1d52b712, 0x1eb47ee6,
  274. 0x2026f30f, 0x21aadcb6, 0x23410e7e, 0x24ea64f9, 0x26a7c71d,
  275. 0x287a26c4, 0x2a62812c, 0x2c61df84, 0x2e795779, 0x30aa0bcf,
  276. 0x32f52cfe, 0x355bf9d8, 0x37dfc033, 0x3a81dda4, 0x3d43c038,
  277. 0x4026e73c, 0x432ce40f, 0x46575af8, 0x49a8040f, 0x4d20ac2a,
  278. 0x50c335d3, 0x54919a57, 0x588dead1, 0x5cba514a, 0x611911ea,
  279. 0x65ac8c2f, 0x6a773c39, 0x6f7bbc23, 0x74bcc56c, 0x7a3d3272,
  280. 0x7fffffff,
  281. };
  282. /* EMU10k1/EMU10k2 DSP control db gain */
  283. static DECLARE_TLV_DB_SCALE(snd_emu10k1_db_scale1, -4000, 40, 1);
  284. static const u32 onoff_table[2] = {
  285. 0x00000000, 0x00000001
  286. };
  287. /*
  288. */
  289. static inline mm_segment_t snd_enter_user(void)
  290. {
  291. mm_segment_t fs = get_fs();
  292. set_fs(get_ds());
  293. return fs;
  294. }
  295. static inline void snd_leave_user(mm_segment_t fs)
  296. {
  297. set_fs(fs);
  298. }
  299. /*
  300. * controls
  301. */
  302. static int snd_emu10k1_gpr_ctl_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  303. {
  304. struct snd_emu10k1_fx8010_ctl *ctl =
  305. (struct snd_emu10k1_fx8010_ctl *) kcontrol->private_value;
  306. if (ctl->min == 0 && ctl->max == 1)
  307. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  308. else
  309. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  310. uinfo->count = ctl->vcount;
  311. uinfo->value.integer.min = ctl->min;
  312. uinfo->value.integer.max = ctl->max;
  313. return 0;
  314. }
  315. static int snd_emu10k1_gpr_ctl_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  316. {
  317. struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
  318. struct snd_emu10k1_fx8010_ctl *ctl =
  319. (struct snd_emu10k1_fx8010_ctl *) kcontrol->private_value;
  320. unsigned long flags;
  321. unsigned int i;
  322. spin_lock_irqsave(&emu->reg_lock, flags);
  323. for (i = 0; i < ctl->vcount; i++)
  324. ucontrol->value.integer.value[i] = ctl->value[i];
  325. spin_unlock_irqrestore(&emu->reg_lock, flags);
  326. return 0;
  327. }
  328. static int snd_emu10k1_gpr_ctl_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  329. {
  330. struct snd_emu10k1 *emu = snd_kcontrol_chip(kcontrol);
  331. struct snd_emu10k1_fx8010_ctl *ctl =
  332. (struct snd_emu10k1_fx8010_ctl *) kcontrol->private_value;
  333. unsigned long flags;
  334. unsigned int nval, val;
  335. unsigned int i, j;
  336. int change = 0;
  337. spin_lock_irqsave(&emu->reg_lock, flags);
  338. for (i = 0; i < ctl->vcount; i++) {
  339. nval = ucontrol->value.integer.value[i];
  340. if (nval < ctl->min)
  341. nval = ctl->min;
  342. if (nval > ctl->max)
  343. nval = ctl->max;
  344. if (nval != ctl->value[i])
  345. change = 1;
  346. val = ctl->value[i] = nval;
  347. switch (ctl->translation) {
  348. case EMU10K1_GPR_TRANSLATION_NONE:
  349. snd_emu10k1_ptr_write(emu, emu->gpr_base + ctl->gpr[i], 0, val);
  350. break;
  351. case EMU10K1_GPR_TRANSLATION_TABLE100:
  352. snd_emu10k1_ptr_write(emu, emu->gpr_base + ctl->gpr[i], 0, db_table[val]);
  353. break;
  354. case EMU10K1_GPR_TRANSLATION_BASS:
  355. if ((ctl->count % 5) != 0 || (ctl->count / 5) != ctl->vcount) {
  356. change = -EIO;
  357. goto __error;
  358. }
  359. for (j = 0; j < 5; j++)
  360. snd_emu10k1_ptr_write(emu, emu->gpr_base + ctl->gpr[j * ctl->vcount + i], 0, bass_table[val][j]);
  361. break;
  362. case EMU10K1_GPR_TRANSLATION_TREBLE:
  363. if ((ctl->count % 5) != 0 || (ctl->count / 5) != ctl->vcount) {
  364. change = -EIO;
  365. goto __error;
  366. }
  367. for (j = 0; j < 5; j++)
  368. snd_emu10k1_ptr_write(emu, emu->gpr_base + ctl->gpr[j * ctl->vcount + i], 0, treble_table[val][j]);
  369. break;
  370. case EMU10K1_GPR_TRANSLATION_ONOFF:
  371. snd_emu10k1_ptr_write(emu, emu->gpr_base + ctl->gpr[i], 0, onoff_table[val]);
  372. break;
  373. }
  374. }
  375. __error:
  376. spin_unlock_irqrestore(&emu->reg_lock, flags);
  377. return change;
  378. }
  379. /*
  380. * Interrupt handler
  381. */
  382. static void snd_emu10k1_fx8010_interrupt(struct snd_emu10k1 *emu)
  383. {
  384. struct snd_emu10k1_fx8010_irq *irq, *nirq;
  385. irq = emu->fx8010.irq_handlers;
  386. while (irq) {
  387. nirq = irq->next; /* irq ptr can be removed from list */
  388. if (snd_emu10k1_ptr_read(emu, emu->gpr_base + irq->gpr_running, 0) & 0xffff0000) {
  389. if (irq->handler)
  390. irq->handler(emu, irq->private_data);
  391. snd_emu10k1_ptr_write(emu, emu->gpr_base + irq->gpr_running, 0, 1);
  392. }
  393. irq = nirq;
  394. }
  395. }
  396. int snd_emu10k1_fx8010_register_irq_handler(struct snd_emu10k1 *emu,
  397. snd_fx8010_irq_handler_t *handler,
  398. unsigned char gpr_running,
  399. void *private_data,
  400. struct snd_emu10k1_fx8010_irq **r_irq)
  401. {
  402. struct snd_emu10k1_fx8010_irq *irq;
  403. unsigned long flags;
  404. irq = kmalloc(sizeof(*irq), GFP_ATOMIC);
  405. if (irq == NULL)
  406. return -ENOMEM;
  407. irq->handler = handler;
  408. irq->gpr_running = gpr_running;
  409. irq->private_data = private_data;
  410. irq->next = NULL;
  411. spin_lock_irqsave(&emu->fx8010.irq_lock, flags);
  412. if (emu->fx8010.irq_handlers == NULL) {
  413. emu->fx8010.irq_handlers = irq;
  414. emu->dsp_interrupt = snd_emu10k1_fx8010_interrupt;
  415. snd_emu10k1_intr_enable(emu, INTE_FXDSPENABLE);
  416. } else {
  417. irq->next = emu->fx8010.irq_handlers;
  418. emu->fx8010.irq_handlers = irq;
  419. }
  420. spin_unlock_irqrestore(&emu->fx8010.irq_lock, flags);
  421. if (r_irq)
  422. *r_irq = irq;
  423. return 0;
  424. }
  425. int snd_emu10k1_fx8010_unregister_irq_handler(struct snd_emu10k1 *emu,
  426. struct snd_emu10k1_fx8010_irq *irq)
  427. {
  428. struct snd_emu10k1_fx8010_irq *tmp;
  429. unsigned long flags;
  430. spin_lock_irqsave(&emu->fx8010.irq_lock, flags);
  431. if ((tmp = emu->fx8010.irq_handlers) == irq) {
  432. emu->fx8010.irq_handlers = tmp->next;
  433. if (emu->fx8010.irq_handlers == NULL) {
  434. snd_emu10k1_intr_disable(emu, INTE_FXDSPENABLE);
  435. emu->dsp_interrupt = NULL;
  436. }
  437. } else {
  438. while (tmp && tmp->next != irq)
  439. tmp = tmp->next;
  440. if (tmp)
  441. tmp->next = tmp->next->next;
  442. }
  443. spin_unlock_irqrestore(&emu->fx8010.irq_lock, flags);
  444. kfree(irq);
  445. return 0;
  446. }
  447. /*************************************************************************
  448. * EMU10K1 effect manager
  449. *************************************************************************/
  450. static void snd_emu10k1_write_op(struct snd_emu10k1_fx8010_code *icode,
  451. unsigned int *ptr,
  452. u32 op, u32 r, u32 a, u32 x, u32 y)
  453. {
  454. u_int32_t *code;
  455. snd_assert(*ptr < 512, return);
  456. code = (u_int32_t __force *)icode->code + (*ptr) * 2;
  457. set_bit(*ptr, icode->code_valid);
  458. code[0] = ((x & 0x3ff) << 10) | (y & 0x3ff);
  459. code[1] = ((op & 0x0f) << 20) | ((r & 0x3ff) << 10) | (a & 0x3ff);
  460. (*ptr)++;
  461. }
  462. #define OP(icode, ptr, op, r, a, x, y) \
  463. snd_emu10k1_write_op(icode, ptr, op, r, a, x, y)
  464. static void snd_emu10k1_audigy_write_op(struct snd_emu10k1_fx8010_code *icode,
  465. unsigned int *ptr,
  466. u32 op, u32 r, u32 a, u32 x, u32 y)
  467. {
  468. u_int32_t *code;
  469. snd_assert(*ptr < 1024, return);
  470. code = (u_int32_t __force *)icode->code + (*ptr) * 2;
  471. set_bit(*ptr, icode->code_valid);
  472. code[0] = ((x & 0x7ff) << 12) | (y & 0x7ff);
  473. code[1] = ((op & 0x0f) << 24) | ((r & 0x7ff) << 12) | (a & 0x7ff);
  474. (*ptr)++;
  475. }
  476. #define A_OP(icode, ptr, op, r, a, x, y) \
  477. snd_emu10k1_audigy_write_op(icode, ptr, op, r, a, x, y)
  478. static void snd_emu10k1_efx_write(struct snd_emu10k1 *emu, unsigned int pc, unsigned int data)
  479. {
  480. pc += emu->audigy ? A_MICROCODEBASE : MICROCODEBASE;
  481. snd_emu10k1_ptr_write(emu, pc, 0, data);
  482. }
  483. unsigned int snd_emu10k1_efx_read(struct snd_emu10k1 *emu, unsigned int pc)
  484. {
  485. pc += emu->audigy ? A_MICROCODEBASE : MICROCODEBASE;
  486. return snd_emu10k1_ptr_read(emu, pc, 0);
  487. }
  488. static int snd_emu10k1_gpr_poke(struct snd_emu10k1 *emu,
  489. struct snd_emu10k1_fx8010_code *icode)
  490. {
  491. int gpr;
  492. u32 val;
  493. for (gpr = 0; gpr < (emu->audigy ? 0x200 : 0x100); gpr++) {
  494. if (!test_bit(gpr, icode->gpr_valid))
  495. continue;
  496. if (get_user(val, &icode->gpr_map[gpr]))
  497. return -EFAULT;
  498. snd_emu10k1_ptr_write(emu, emu->gpr_base + gpr, 0, val);
  499. }
  500. return 0;
  501. }
  502. static int snd_emu10k1_gpr_peek(struct snd_emu10k1 *emu,
  503. struct snd_emu10k1_fx8010_code *icode)
  504. {
  505. int gpr;
  506. u32 val;
  507. for (gpr = 0; gpr < (emu->audigy ? 0x200 : 0x100); gpr++) {
  508. set_bit(gpr, icode->gpr_valid);
  509. val = snd_emu10k1_ptr_read(emu, emu->gpr_base + gpr, 0);
  510. if (put_user(val, &icode->gpr_map[gpr]))
  511. return -EFAULT;
  512. }
  513. return 0;
  514. }
  515. static int snd_emu10k1_tram_poke(struct snd_emu10k1 *emu,
  516. struct snd_emu10k1_fx8010_code *icode)
  517. {
  518. int tram;
  519. u32 addr, val;
  520. for (tram = 0; tram < (emu->audigy ? 0x100 : 0xa0); tram++) {
  521. if (!test_bit(tram, icode->tram_valid))
  522. continue;
  523. if (get_user(val, &icode->tram_data_map[tram]) ||
  524. get_user(addr, &icode->tram_addr_map[tram]))
  525. return -EFAULT;
  526. snd_emu10k1_ptr_write(emu, TANKMEMDATAREGBASE + tram, 0, val);
  527. if (!emu->audigy) {
  528. snd_emu10k1_ptr_write(emu, TANKMEMADDRREGBASE + tram, 0, addr);
  529. } else {
  530. snd_emu10k1_ptr_write(emu, TANKMEMADDRREGBASE + tram, 0, addr << 12);
  531. snd_emu10k1_ptr_write(emu, A_TANKMEMCTLREGBASE + tram, 0, addr >> 20);
  532. }
  533. }
  534. return 0;
  535. }
  536. static int snd_emu10k1_tram_peek(struct snd_emu10k1 *emu,
  537. struct snd_emu10k1_fx8010_code *icode)
  538. {
  539. int tram;
  540. u32 val, addr;
  541. memset(icode->tram_valid, 0, sizeof(icode->tram_valid));
  542. for (tram = 0; tram < (emu->audigy ? 0x100 : 0xa0); tram++) {
  543. set_bit(tram, icode->tram_valid);
  544. val = snd_emu10k1_ptr_read(emu, TANKMEMDATAREGBASE + tram, 0);
  545. if (!emu->audigy) {
  546. addr = snd_emu10k1_ptr_read(emu, TANKMEMADDRREGBASE + tram, 0);
  547. } else {
  548. addr = snd_emu10k1_ptr_read(emu, TANKMEMADDRREGBASE + tram, 0) >> 12;
  549. addr |= snd_emu10k1_ptr_read(emu, A_TANKMEMCTLREGBASE + tram, 0) << 20;
  550. }
  551. if (put_user(val, &icode->tram_data_map[tram]) ||
  552. put_user(addr, &icode->tram_addr_map[tram]))
  553. return -EFAULT;
  554. }
  555. return 0;
  556. }
  557. static int snd_emu10k1_code_poke(struct snd_emu10k1 *emu,
  558. struct snd_emu10k1_fx8010_code *icode)
  559. {
  560. u32 pc, lo, hi;
  561. for (pc = 0; pc < (emu->audigy ? 2*1024 : 2*512); pc += 2) {
  562. if (!test_bit(pc / 2, icode->code_valid))
  563. continue;
  564. if (get_user(lo, &icode->code[pc + 0]) ||
  565. get_user(hi, &icode->code[pc + 1]))
  566. return -EFAULT;
  567. snd_emu10k1_efx_write(emu, pc + 0, lo);
  568. snd_emu10k1_efx_write(emu, pc + 1, hi);
  569. }
  570. return 0;
  571. }
  572. static int snd_emu10k1_code_peek(struct snd_emu10k1 *emu,
  573. struct snd_emu10k1_fx8010_code *icode)
  574. {
  575. u32 pc;
  576. memset(icode->code_valid, 0, sizeof(icode->code_valid));
  577. for (pc = 0; pc < (emu->audigy ? 2*1024 : 2*512); pc += 2) {
  578. set_bit(pc / 2, icode->code_valid);
  579. if (put_user(snd_emu10k1_efx_read(emu, pc + 0), &icode->code[pc + 0]))
  580. return -EFAULT;
  581. if (put_user(snd_emu10k1_efx_read(emu, pc + 1), &icode->code[pc + 1]))
  582. return -EFAULT;
  583. }
  584. return 0;
  585. }
  586. static struct snd_emu10k1_fx8010_ctl *
  587. snd_emu10k1_look_for_ctl(struct snd_emu10k1 *emu, struct snd_ctl_elem_id *id)
  588. {
  589. struct snd_emu10k1_fx8010_ctl *ctl;
  590. struct snd_kcontrol *kcontrol;
  591. struct list_head *list;
  592. list_for_each(list, &emu->fx8010.gpr_ctl) {
  593. ctl = emu10k1_gpr_ctl(list);
  594. kcontrol = ctl->kcontrol;
  595. if (kcontrol->id.iface == id->iface &&
  596. !strcmp(kcontrol->id.name, id->name) &&
  597. kcontrol->id.index == id->index)
  598. return ctl;
  599. }
  600. return NULL;
  601. }
  602. static int snd_emu10k1_verify_controls(struct snd_emu10k1 *emu,
  603. struct snd_emu10k1_fx8010_code *icode)
  604. {
  605. unsigned int i;
  606. struct snd_ctl_elem_id __user *_id;
  607. struct snd_ctl_elem_id id;
  608. struct snd_emu10k1_fx8010_control_gpr __user *_gctl;
  609. struct snd_emu10k1_fx8010_control_gpr *gctl;
  610. int err;
  611. for (i = 0, _id = icode->gpr_del_controls;
  612. i < icode->gpr_del_control_count; i++, _id++) {
  613. if (copy_from_user(&id, _id, sizeof(id)))
  614. return -EFAULT;
  615. if (snd_emu10k1_look_for_ctl(emu, &id) == NULL)
  616. return -ENOENT;
  617. }
  618. gctl = kmalloc(sizeof(*gctl), GFP_KERNEL);
  619. if (! gctl)
  620. return -ENOMEM;
  621. err = 0;
  622. for (i = 0, _gctl = icode->gpr_add_controls;
  623. i < icode->gpr_add_control_count; i++, _gctl++) {
  624. if (copy_from_user(gctl, _gctl, sizeof(*gctl))) {
  625. err = -EFAULT;
  626. goto __error;
  627. }
  628. if (snd_emu10k1_look_for_ctl(emu, &gctl->id))
  629. continue;
  630. down_read(&emu->card->controls_rwsem);
  631. if (snd_ctl_find_id(emu->card, &gctl->id) != NULL) {
  632. up_read(&emu->card->controls_rwsem);
  633. err = -EEXIST;
  634. goto __error;
  635. }
  636. up_read(&emu->card->controls_rwsem);
  637. if (gctl->id.iface != SNDRV_CTL_ELEM_IFACE_MIXER &&
  638. gctl->id.iface != SNDRV_CTL_ELEM_IFACE_PCM) {
  639. err = -EINVAL;
  640. goto __error;
  641. }
  642. }
  643. for (i = 0, _gctl = icode->gpr_list_controls;
  644. i < icode->gpr_list_control_count; i++, _gctl++) {
  645. /* FIXME: we need to check the WRITE access */
  646. if (copy_from_user(gctl, _gctl, sizeof(*gctl))) {
  647. err = -EFAULT;
  648. goto __error;
  649. }
  650. }
  651. __error:
  652. kfree(gctl);
  653. return err;
  654. }
  655. static void snd_emu10k1_ctl_private_free(struct snd_kcontrol *kctl)
  656. {
  657. struct snd_emu10k1_fx8010_ctl *ctl;
  658. ctl = (struct snd_emu10k1_fx8010_ctl *) kctl->private_value;
  659. kctl->private_value = 0;
  660. list_del(&ctl->list);
  661. kfree(ctl);
  662. }
  663. static int snd_emu10k1_add_controls(struct snd_emu10k1 *emu,
  664. struct snd_emu10k1_fx8010_code *icode)
  665. {
  666. unsigned int i, j;
  667. struct snd_emu10k1_fx8010_control_gpr __user *_gctl;
  668. struct snd_emu10k1_fx8010_control_gpr *gctl;
  669. struct snd_emu10k1_fx8010_ctl *ctl, *nctl;
  670. struct snd_kcontrol_new knew;
  671. struct snd_kcontrol *kctl;
  672. struct snd_ctl_elem_value *val;
  673. int err = 0;
  674. val = kmalloc(sizeof(*val), GFP_KERNEL);
  675. gctl = kmalloc(sizeof(*gctl), GFP_KERNEL);
  676. nctl = kmalloc(sizeof(*nctl), GFP_KERNEL);
  677. if (!val || !gctl || !nctl) {
  678. err = -ENOMEM;
  679. goto __error;
  680. }
  681. for (i = 0, _gctl = icode->gpr_add_controls;
  682. i < icode->gpr_add_control_count; i++, _gctl++) {
  683. if (copy_from_user(gctl, _gctl, sizeof(*gctl))) {
  684. err = -EFAULT;
  685. goto __error;
  686. }
  687. if (gctl->id.iface != SNDRV_CTL_ELEM_IFACE_MIXER &&
  688. gctl->id.iface != SNDRV_CTL_ELEM_IFACE_PCM) {
  689. err = -EINVAL;
  690. goto __error;
  691. }
  692. if (! gctl->id.name[0]) {
  693. err = -EINVAL;
  694. goto __error;
  695. }
  696. ctl = snd_emu10k1_look_for_ctl(emu, &gctl->id);
  697. memset(&knew, 0, sizeof(knew));
  698. knew.iface = gctl->id.iface;
  699. knew.name = gctl->id.name;
  700. knew.index = gctl->id.index;
  701. knew.device = gctl->id.device;
  702. knew.subdevice = gctl->id.subdevice;
  703. knew.info = snd_emu10k1_gpr_ctl_info;
  704. if (gctl->tlv.p) {
  705. knew.tlv.p = gctl->tlv.p;
  706. knew.access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
  707. SNDRV_CTL_ELEM_ACCESS_TLV_READ;
  708. }
  709. knew.get = snd_emu10k1_gpr_ctl_get;
  710. knew.put = snd_emu10k1_gpr_ctl_put;
  711. memset(nctl, 0, sizeof(*nctl));
  712. nctl->vcount = gctl->vcount;
  713. nctl->count = gctl->count;
  714. for (j = 0; j < 32; j++) {
  715. nctl->gpr[j] = gctl->gpr[j];
  716. nctl->value[j] = ~gctl->value[j]; /* inverted, we want to write new value in gpr_ctl_put() */
  717. val->value.integer.value[j] = gctl->value[j];
  718. }
  719. nctl->min = gctl->min;
  720. nctl->max = gctl->max;
  721. nctl->translation = gctl->translation;
  722. if (ctl == NULL) {
  723. ctl = kmalloc(sizeof(*ctl), GFP_KERNEL);
  724. if (ctl == NULL) {
  725. err = -ENOMEM;
  726. goto __error;
  727. }
  728. knew.private_value = (unsigned long)ctl;
  729. *ctl = *nctl;
  730. if ((err = snd_ctl_add(emu->card, kctl = snd_ctl_new1(&knew, emu))) < 0) {
  731. kfree(ctl);
  732. goto __error;
  733. }
  734. kctl->private_free = snd_emu10k1_ctl_private_free;
  735. ctl->kcontrol = kctl;
  736. list_add_tail(&ctl->list, &emu->fx8010.gpr_ctl);
  737. } else {
  738. /* overwrite */
  739. nctl->list = ctl->list;
  740. nctl->kcontrol = ctl->kcontrol;
  741. *ctl = *nctl;
  742. snd_ctl_notify(emu->card, SNDRV_CTL_EVENT_MASK_VALUE |
  743. SNDRV_CTL_EVENT_MASK_INFO, &ctl->kcontrol->id);
  744. }
  745. snd_emu10k1_gpr_ctl_put(ctl->kcontrol, val);
  746. }
  747. __error:
  748. kfree(nctl);
  749. kfree(gctl);
  750. kfree(val);
  751. return err;
  752. }
  753. static int snd_emu10k1_del_controls(struct snd_emu10k1 *emu,
  754. struct snd_emu10k1_fx8010_code *icode)
  755. {
  756. unsigned int i;
  757. struct snd_ctl_elem_id id;
  758. struct snd_ctl_elem_id __user *_id;
  759. struct snd_emu10k1_fx8010_ctl *ctl;
  760. struct snd_card *card = emu->card;
  761. for (i = 0, _id = icode->gpr_del_controls;
  762. i < icode->gpr_del_control_count; i++, _id++) {
  763. if (copy_from_user(&id, _id, sizeof(id)))
  764. return -EFAULT;
  765. down_write(&card->controls_rwsem);
  766. ctl = snd_emu10k1_look_for_ctl(emu, &id);
  767. if (ctl)
  768. snd_ctl_remove(card, ctl->kcontrol);
  769. up_write(&card->controls_rwsem);
  770. }
  771. return 0;
  772. }
  773. static int snd_emu10k1_list_controls(struct snd_emu10k1 *emu,
  774. struct snd_emu10k1_fx8010_code *icode)
  775. {
  776. unsigned int i = 0, j;
  777. unsigned int total = 0;
  778. struct snd_emu10k1_fx8010_control_gpr *gctl;
  779. struct snd_emu10k1_fx8010_control_gpr __user *_gctl;
  780. struct snd_emu10k1_fx8010_ctl *ctl;
  781. struct snd_ctl_elem_id *id;
  782. struct list_head *list;
  783. gctl = kmalloc(sizeof(*gctl), GFP_KERNEL);
  784. if (! gctl)
  785. return -ENOMEM;
  786. _gctl = icode->gpr_list_controls;
  787. list_for_each(list, &emu->fx8010.gpr_ctl) {
  788. ctl = emu10k1_gpr_ctl(list);
  789. total++;
  790. if (_gctl && i < icode->gpr_list_control_count) {
  791. memset(gctl, 0, sizeof(*gctl));
  792. id = &ctl->kcontrol->id;
  793. gctl->id.iface = id->iface;
  794. strlcpy(gctl->id.name, id->name, sizeof(gctl->id.name));
  795. gctl->id.index = id->index;
  796. gctl->id.device = id->device;
  797. gctl->id.subdevice = id->subdevice;
  798. gctl->vcount = ctl->vcount;
  799. gctl->count = ctl->count;
  800. for (j = 0; j < 32; j++) {
  801. gctl->gpr[j] = ctl->gpr[j];
  802. gctl->value[j] = ctl->value[j];
  803. }
  804. gctl->min = ctl->min;
  805. gctl->max = ctl->max;
  806. gctl->translation = ctl->translation;
  807. if (copy_to_user(_gctl, gctl, sizeof(*gctl))) {
  808. kfree(gctl);
  809. return -EFAULT;
  810. }
  811. _gctl++;
  812. i++;
  813. }
  814. }
  815. icode->gpr_list_control_total = total;
  816. kfree(gctl);
  817. return 0;
  818. }
  819. static int snd_emu10k1_icode_poke(struct snd_emu10k1 *emu,
  820. struct snd_emu10k1_fx8010_code *icode)
  821. {
  822. int err = 0;
  823. mutex_lock(&emu->fx8010.lock);
  824. if ((err = snd_emu10k1_verify_controls(emu, icode)) < 0)
  825. goto __error;
  826. strlcpy(emu->fx8010.name, icode->name, sizeof(emu->fx8010.name));
  827. /* stop FX processor - this may be dangerous, but it's better to miss
  828. some samples than generate wrong ones - [jk] */
  829. if (emu->audigy)
  830. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg | A_DBG_SINGLE_STEP);
  831. else
  832. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg | EMU10K1_DBG_SINGLE_STEP);
  833. /* ok, do the main job */
  834. if ((err = snd_emu10k1_del_controls(emu, icode)) < 0 ||
  835. (err = snd_emu10k1_gpr_poke(emu, icode)) < 0 ||
  836. (err = snd_emu10k1_tram_poke(emu, icode)) < 0 ||
  837. (err = snd_emu10k1_code_poke(emu, icode)) < 0 ||
  838. (err = snd_emu10k1_add_controls(emu, icode)) < 0)
  839. goto __error;
  840. /* start FX processor when the DSP code is updated */
  841. if (emu->audigy)
  842. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg);
  843. else
  844. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg);
  845. __error:
  846. mutex_unlock(&emu->fx8010.lock);
  847. return err;
  848. }
  849. static int snd_emu10k1_icode_peek(struct snd_emu10k1 *emu,
  850. struct snd_emu10k1_fx8010_code *icode)
  851. {
  852. int err;
  853. mutex_lock(&emu->fx8010.lock);
  854. strlcpy(icode->name, emu->fx8010.name, sizeof(icode->name));
  855. /* ok, do the main job */
  856. err = snd_emu10k1_gpr_peek(emu, icode);
  857. if (err >= 0)
  858. err = snd_emu10k1_tram_peek(emu, icode);
  859. if (err >= 0)
  860. err = snd_emu10k1_code_peek(emu, icode);
  861. if (err >= 0)
  862. err = snd_emu10k1_list_controls(emu, icode);
  863. mutex_unlock(&emu->fx8010.lock);
  864. return err;
  865. }
  866. static int snd_emu10k1_ipcm_poke(struct snd_emu10k1 *emu,
  867. struct snd_emu10k1_fx8010_pcm_rec *ipcm)
  868. {
  869. unsigned int i;
  870. int err = 0;
  871. struct snd_emu10k1_fx8010_pcm *pcm;
  872. if (ipcm->substream >= EMU10K1_FX8010_PCM_COUNT)
  873. return -EINVAL;
  874. if (ipcm->channels > 32)
  875. return -EINVAL;
  876. pcm = &emu->fx8010.pcm[ipcm->substream];
  877. mutex_lock(&emu->fx8010.lock);
  878. spin_lock_irq(&emu->reg_lock);
  879. if (pcm->opened) {
  880. err = -EBUSY;
  881. goto __error;
  882. }
  883. if (ipcm->channels == 0) { /* remove */
  884. pcm->valid = 0;
  885. } else {
  886. /* FIXME: we need to add universal code to the PCM transfer routine */
  887. if (ipcm->channels != 2) {
  888. err = -EINVAL;
  889. goto __error;
  890. }
  891. pcm->valid = 1;
  892. pcm->opened = 0;
  893. pcm->channels = ipcm->channels;
  894. pcm->tram_start = ipcm->tram_start;
  895. pcm->buffer_size = ipcm->buffer_size;
  896. pcm->gpr_size = ipcm->gpr_size;
  897. pcm->gpr_count = ipcm->gpr_count;
  898. pcm->gpr_tmpcount = ipcm->gpr_tmpcount;
  899. pcm->gpr_ptr = ipcm->gpr_ptr;
  900. pcm->gpr_trigger = ipcm->gpr_trigger;
  901. pcm->gpr_running = ipcm->gpr_running;
  902. for (i = 0; i < pcm->channels; i++)
  903. pcm->etram[i] = ipcm->etram[i];
  904. }
  905. __error:
  906. spin_unlock_irq(&emu->reg_lock);
  907. mutex_unlock(&emu->fx8010.lock);
  908. return err;
  909. }
  910. static int snd_emu10k1_ipcm_peek(struct snd_emu10k1 *emu,
  911. struct snd_emu10k1_fx8010_pcm_rec *ipcm)
  912. {
  913. unsigned int i;
  914. int err = 0;
  915. struct snd_emu10k1_fx8010_pcm *pcm;
  916. if (ipcm->substream >= EMU10K1_FX8010_PCM_COUNT)
  917. return -EINVAL;
  918. pcm = &emu->fx8010.pcm[ipcm->substream];
  919. mutex_lock(&emu->fx8010.lock);
  920. spin_lock_irq(&emu->reg_lock);
  921. ipcm->channels = pcm->channels;
  922. ipcm->tram_start = pcm->tram_start;
  923. ipcm->buffer_size = pcm->buffer_size;
  924. ipcm->gpr_size = pcm->gpr_size;
  925. ipcm->gpr_ptr = pcm->gpr_ptr;
  926. ipcm->gpr_count = pcm->gpr_count;
  927. ipcm->gpr_tmpcount = pcm->gpr_tmpcount;
  928. ipcm->gpr_trigger = pcm->gpr_trigger;
  929. ipcm->gpr_running = pcm->gpr_running;
  930. for (i = 0; i < pcm->channels; i++)
  931. ipcm->etram[i] = pcm->etram[i];
  932. ipcm->res1 = ipcm->res2 = 0;
  933. ipcm->pad = 0;
  934. spin_unlock_irq(&emu->reg_lock);
  935. mutex_unlock(&emu->fx8010.lock);
  936. return err;
  937. }
  938. #define SND_EMU10K1_GPR_CONTROLS 44
  939. #define SND_EMU10K1_INPUTS 12
  940. #define SND_EMU10K1_PLAYBACK_CHANNELS 8
  941. #define SND_EMU10K1_CAPTURE_CHANNELS 4
  942. static void __devinit
  943. snd_emu10k1_init_mono_control(struct snd_emu10k1_fx8010_control_gpr *ctl,
  944. const char *name, int gpr, int defval)
  945. {
  946. ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
  947. strcpy(ctl->id.name, name);
  948. ctl->vcount = ctl->count = 1;
  949. ctl->gpr[0] = gpr + 0; ctl->value[0] = defval;
  950. ctl->min = 0;
  951. ctl->max = 100;
  952. ctl->tlv.p = snd_emu10k1_db_scale1;
  953. ctl->translation = EMU10K1_GPR_TRANSLATION_TABLE100;
  954. }
  955. static void __devinit
  956. snd_emu10k1_init_stereo_control(struct snd_emu10k1_fx8010_control_gpr *ctl,
  957. const char *name, int gpr, int defval)
  958. {
  959. ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
  960. strcpy(ctl->id.name, name);
  961. ctl->vcount = ctl->count = 2;
  962. ctl->gpr[0] = gpr + 0; ctl->value[0] = defval;
  963. ctl->gpr[1] = gpr + 1; ctl->value[1] = defval;
  964. ctl->min = 0;
  965. ctl->max = 100;
  966. ctl->tlv.p = snd_emu10k1_db_scale1;
  967. ctl->translation = EMU10K1_GPR_TRANSLATION_TABLE100;
  968. }
  969. static void __devinit
  970. snd_emu10k1_init_mono_onoff_control(struct snd_emu10k1_fx8010_control_gpr *ctl,
  971. const char *name, int gpr, int defval)
  972. {
  973. ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
  974. strcpy(ctl->id.name, name);
  975. ctl->vcount = ctl->count = 1;
  976. ctl->gpr[0] = gpr + 0; ctl->value[0] = defval;
  977. ctl->min = 0;
  978. ctl->max = 1;
  979. ctl->translation = EMU10K1_GPR_TRANSLATION_ONOFF;
  980. }
  981. static void __devinit
  982. snd_emu10k1_init_stereo_onoff_control(struct snd_emu10k1_fx8010_control_gpr *ctl,
  983. const char *name, int gpr, int defval)
  984. {
  985. ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
  986. strcpy(ctl->id.name, name);
  987. ctl->vcount = ctl->count = 2;
  988. ctl->gpr[0] = gpr + 0; ctl->value[0] = defval;
  989. ctl->gpr[1] = gpr + 1; ctl->value[1] = defval;
  990. ctl->min = 0;
  991. ctl->max = 1;
  992. ctl->translation = EMU10K1_GPR_TRANSLATION_ONOFF;
  993. }
  994. /*
  995. * initial DSP configuration for Audigy
  996. */
  997. static int __devinit _snd_emu10k1_audigy_init_efx(struct snd_emu10k1 *emu)
  998. {
  999. int err, i, z, gpr, nctl;
  1000. const int playback = 10;
  1001. const int capture = playback + (SND_EMU10K1_PLAYBACK_CHANNELS * 2); /* we reserve 10 voices */
  1002. const int stereo_mix = capture + 2;
  1003. const int tmp = 0x88;
  1004. u32 ptr;
  1005. struct snd_emu10k1_fx8010_code *icode = NULL;
  1006. struct snd_emu10k1_fx8010_control_gpr *controls = NULL, *ctl;
  1007. u32 *gpr_map;
  1008. mm_segment_t seg;
  1009. if ((icode = kzalloc(sizeof(*icode), GFP_KERNEL)) == NULL ||
  1010. (icode->gpr_map = (u_int32_t __user *)
  1011. kcalloc(512 + 256 + 256 + 2 * 1024, sizeof(u_int32_t),
  1012. GFP_KERNEL)) == NULL ||
  1013. (controls = kcalloc(SND_EMU10K1_GPR_CONTROLS,
  1014. sizeof(*controls), GFP_KERNEL)) == NULL) {
  1015. err = -ENOMEM;
  1016. goto __err;
  1017. }
  1018. gpr_map = (u32 __force *)icode->gpr_map;
  1019. icode->tram_data_map = icode->gpr_map + 512;
  1020. icode->tram_addr_map = icode->tram_data_map + 256;
  1021. icode->code = icode->tram_addr_map + 256;
  1022. /* clear free GPRs */
  1023. for (i = 0; i < 512; i++)
  1024. set_bit(i, icode->gpr_valid);
  1025. /* clear TRAM data & address lines */
  1026. for (i = 0; i < 256; i++)
  1027. set_bit(i, icode->tram_valid);
  1028. strcpy(icode->name, "Audigy DSP code for ALSA");
  1029. ptr = 0;
  1030. nctl = 0;
  1031. gpr = stereo_mix + 10;
  1032. /* stop FX processor */
  1033. snd_emu10k1_ptr_write(emu, A_DBG, 0, (emu->fx8010.dbg = 0) | A_DBG_SINGLE_STEP);
  1034. #if 0
  1035. /* FIX: jcd test */
  1036. for (z = 0; z < 80; z=z+2) {
  1037. A_OP(icode, &ptr, iACC3, A_EXTOUT(z), A_FXBUS(FXBUS_PCM_LEFT_FRONT), A_C_00000000, A_C_00000000); /* left */
  1038. A_OP(icode, &ptr, iACC3, A_EXTOUT(z+1), A_FXBUS(FXBUS_PCM_RIGHT_FRONT), A_C_00000000, A_C_00000000); /* right */
  1039. }
  1040. #endif /* jcd test */
  1041. #if 1
  1042. /* PCM front Playback Volume (independent from stereo mix) */
  1043. A_OP(icode, &ptr, iMAC0, A_GPR(playback), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_LEFT_FRONT));
  1044. A_OP(icode, &ptr, iMAC0, A_GPR(playback+1), A_C_00000000, A_GPR(gpr+1), A_FXBUS(FXBUS_PCM_RIGHT_FRONT));
  1045. snd_emu10k1_init_stereo_control(&controls[nctl++], "PCM Front Playback Volume", gpr, 100);
  1046. gpr += 2;
  1047. /* PCM Surround Playback (independent from stereo mix) */
  1048. A_OP(icode, &ptr, iMAC0, A_GPR(playback+2), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_LEFT_REAR));
  1049. A_OP(icode, &ptr, iMAC0, A_GPR(playback+3), A_C_00000000, A_GPR(gpr+1), A_FXBUS(FXBUS_PCM_RIGHT_REAR));
  1050. snd_emu10k1_init_stereo_control(&controls[nctl++], "PCM Surround Playback Volume", gpr, 100);
  1051. gpr += 2;
  1052. /* PCM Side Playback (independent from stereo mix) */
  1053. if (emu->card_capabilities->spk71) {
  1054. A_OP(icode, &ptr, iMAC0, A_GPR(playback+6), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_LEFT_SIDE));
  1055. A_OP(icode, &ptr, iMAC0, A_GPR(playback+7), A_C_00000000, A_GPR(gpr+1), A_FXBUS(FXBUS_PCM_RIGHT_SIDE));
  1056. snd_emu10k1_init_stereo_control(&controls[nctl++], "PCM Side Playback Volume", gpr, 100);
  1057. gpr += 2;
  1058. }
  1059. /* PCM Center Playback (independent from stereo mix) */
  1060. A_OP(icode, &ptr, iMAC0, A_GPR(playback+4), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_CENTER));
  1061. snd_emu10k1_init_mono_control(&controls[nctl++], "PCM Center Playback Volume", gpr, 100);
  1062. gpr++;
  1063. /* PCM LFE Playback (independent from stereo mix) */
  1064. A_OP(icode, &ptr, iMAC0, A_GPR(playback+5), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_LFE));
  1065. snd_emu10k1_init_mono_control(&controls[nctl++], "PCM LFE Playback Volume", gpr, 100);
  1066. gpr++;
  1067. /*
  1068. * Stereo Mix
  1069. */
  1070. /* Wave (PCM) Playback Volume (will be renamed later) */
  1071. A_OP(icode, &ptr, iMAC0, A_GPR(stereo_mix), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_LEFT));
  1072. A_OP(icode, &ptr, iMAC0, A_GPR(stereo_mix+1), A_C_00000000, A_GPR(gpr+1), A_FXBUS(FXBUS_PCM_RIGHT));
  1073. snd_emu10k1_init_stereo_control(&controls[nctl++], "Wave Playback Volume", gpr, 100);
  1074. gpr += 2;
  1075. /* Synth Playback */
  1076. A_OP(icode, &ptr, iMAC0, A_GPR(stereo_mix+0), A_GPR(stereo_mix+0), A_GPR(gpr), A_FXBUS(FXBUS_MIDI_LEFT));
  1077. A_OP(icode, &ptr, iMAC0, A_GPR(stereo_mix+1), A_GPR(stereo_mix+1), A_GPR(gpr+1), A_FXBUS(FXBUS_MIDI_RIGHT));
  1078. snd_emu10k1_init_stereo_control(&controls[nctl++], "Synth Playback Volume", gpr, 100);
  1079. gpr += 2;
  1080. /* Wave (PCM) Capture */
  1081. A_OP(icode, &ptr, iMAC0, A_GPR(capture+0), A_C_00000000, A_GPR(gpr), A_FXBUS(FXBUS_PCM_LEFT));
  1082. A_OP(icode, &ptr, iMAC0, A_GPR(capture+1), A_C_00000000, A_GPR(gpr+1), A_FXBUS(FXBUS_PCM_RIGHT));
  1083. snd_emu10k1_init_stereo_control(&controls[nctl++], "PCM Capture Volume", gpr, 0);
  1084. gpr += 2;
  1085. /* Synth Capture */
  1086. A_OP(icode, &ptr, iMAC0, A_GPR(capture+0), A_GPR(capture+0), A_GPR(gpr), A_FXBUS(FXBUS_MIDI_LEFT));
  1087. A_OP(icode, &ptr, iMAC0, A_GPR(capture+1), A_GPR(capture+1), A_GPR(gpr+1), A_FXBUS(FXBUS_MIDI_RIGHT));
  1088. snd_emu10k1_init_stereo_control(&controls[nctl++], "Synth Capture Volume", gpr, 0);
  1089. gpr += 2;
  1090. /*
  1091. * inputs
  1092. */
  1093. #define A_ADD_VOLUME_IN(var,vol,input) \
  1094. A_OP(icode, &ptr, iMAC0, A_GPR(var), A_GPR(var), A_GPR(vol), A_EXTIN(input))
  1095. /* AC'97 Playback Volume - used only for mic (renamed later) */
  1096. A_ADD_VOLUME_IN(stereo_mix, gpr, A_EXTIN_AC97_L);
  1097. A_ADD_VOLUME_IN(stereo_mix+1, gpr+1, A_EXTIN_AC97_R);
  1098. snd_emu10k1_init_stereo_control(&controls[nctl++], "AMic Playback Volume", gpr, 0);
  1099. gpr += 2;
  1100. /* AC'97 Capture Volume - used only for mic */
  1101. A_ADD_VOLUME_IN(capture, gpr, A_EXTIN_AC97_L);
  1102. A_ADD_VOLUME_IN(capture+1, gpr+1, A_EXTIN_AC97_R);
  1103. snd_emu10k1_init_stereo_control(&controls[nctl++], "Mic Capture Volume", gpr, 0);
  1104. gpr += 2;
  1105. /* mic capture buffer */
  1106. A_OP(icode, &ptr, iINTERP, A_EXTOUT(A_EXTOUT_MIC_CAP), A_EXTIN(A_EXTIN_AC97_L), 0xcd, A_EXTIN(A_EXTIN_AC97_R));
  1107. /* Audigy CD Playback Volume */
  1108. A_ADD_VOLUME_IN(stereo_mix, gpr, A_EXTIN_SPDIF_CD_L);
  1109. A_ADD_VOLUME_IN(stereo_mix+1, gpr+1, A_EXTIN_SPDIF_CD_R);
  1110. snd_emu10k1_init_stereo_control(&controls[nctl++],
  1111. emu->card_capabilities->ac97_chip ? "Audigy CD Playback Volume" : "CD Playback Volume",
  1112. gpr, 0);
  1113. gpr += 2;
  1114. /* Audigy CD Capture Volume */
  1115. A_ADD_VOLUME_IN(capture, gpr, A_EXTIN_SPDIF_CD_L);
  1116. A_ADD_VOLUME_IN(capture+1, gpr+1, A_EXTIN_SPDIF_CD_R);
  1117. snd_emu10k1_init_stereo_control(&controls[nctl++],
  1118. emu->card_capabilities->ac97_chip ? "Audigy CD Capture Volume" : "CD Capture Volume",
  1119. gpr, 0);
  1120. gpr += 2;
  1121. /* Optical SPDIF Playback Volume */
  1122. A_ADD_VOLUME_IN(stereo_mix, gpr, A_EXTIN_OPT_SPDIF_L);
  1123. A_ADD_VOLUME_IN(stereo_mix+1, gpr+1, A_EXTIN_OPT_SPDIF_R);
  1124. snd_emu10k1_init_stereo_control(&controls[nctl++], SNDRV_CTL_NAME_IEC958("Optical ",PLAYBACK,VOLUME), gpr, 0);
  1125. gpr += 2;
  1126. /* Optical SPDIF Capture Volume */
  1127. A_ADD_VOLUME_IN(capture, gpr, A_EXTIN_OPT_SPDIF_L);
  1128. A_ADD_VOLUME_IN(capture+1, gpr+1, A_EXTIN_OPT_SPDIF_R);
  1129. snd_emu10k1_init_stereo_control(&controls[nctl++], SNDRV_CTL_NAME_IEC958("Optical ",CAPTURE,VOLUME), gpr, 0);
  1130. gpr += 2;
  1131. /* Line2 Playback Volume */
  1132. A_ADD_VOLUME_IN(stereo_mix, gpr, A_EXTIN_LINE2_L);
  1133. A_ADD_VOLUME_IN(stereo_mix+1, gpr+1, A_EXTIN_LINE2_R);
  1134. snd_emu10k1_init_stereo_control(&controls[nctl++],
  1135. emu->card_capabilities->ac97_chip ? "Line2 Playback Volume" : "Line Playback Volume",
  1136. gpr, 0);
  1137. gpr += 2;
  1138. /* Line2 Capture Volume */
  1139. A_ADD_VOLUME_IN(capture, gpr, A_EXTIN_LINE2_L);
  1140. A_ADD_VOLUME_IN(capture+1, gpr+1, A_EXTIN_LINE2_R);
  1141. snd_emu10k1_init_stereo_control(&controls[nctl++],
  1142. emu->card_capabilities->ac97_chip ? "Line2 Capture Volume" : "Line Capture Volume",
  1143. gpr, 0);
  1144. gpr += 2;
  1145. /* Philips ADC Playback Volume */
  1146. A_ADD_VOLUME_IN(stereo_mix, gpr, A_EXTIN_ADC_L);
  1147. A_ADD_VOLUME_IN(stereo_mix+1, gpr+1, A_EXTIN_ADC_R);
  1148. snd_emu10k1_init_stereo_control(&controls[nctl++], "Analog Mix Playback Volume", gpr, 0);
  1149. gpr += 2;
  1150. /* Philips ADC Capture Volume */
  1151. A_ADD_VOLUME_IN(capture, gpr, A_EXTIN_ADC_L);
  1152. A_ADD_VOLUME_IN(capture+1, gpr+1, A_EXTIN_ADC_R);
  1153. snd_emu10k1_init_stereo_control(&controls[nctl++], "Analog Mix Capture Volume", gpr, 0);
  1154. gpr += 2;
  1155. /* Aux2 Playback Volume */
  1156. A_ADD_VOLUME_IN(stereo_mix, gpr, A_EXTIN_AUX2_L);
  1157. A_ADD_VOLUME_IN(stereo_mix+1, gpr+1, A_EXTIN_AUX2_R);
  1158. snd_emu10k1_init_stereo_control(&controls[nctl++],
  1159. emu->card_capabilities->ac97_chip ? "Aux2 Playback Volume" : "Aux Playback Volume",
  1160. gpr, 0);
  1161. gpr += 2;
  1162. /* Aux2 Capture Volume */
  1163. A_ADD_VOLUME_IN(capture, gpr, A_EXTIN_AUX2_L);
  1164. A_ADD_VOLUME_IN(capture+1, gpr+1, A_EXTIN_AUX2_R);
  1165. snd_emu10k1_init_stereo_control(&controls[nctl++],
  1166. emu->card_capabilities->ac97_chip ? "Aux2 Capture Volume" : "Aux Capture Volume",
  1167. gpr, 0);
  1168. gpr += 2;
  1169. /* Stereo Mix Front Playback Volume */
  1170. A_OP(icode, &ptr, iMAC0, A_GPR(playback), A_GPR(playback), A_GPR(gpr), A_GPR(stereo_mix));
  1171. A_OP(icode, &ptr, iMAC0, A_GPR(playback+1), A_GPR(playback+1), A_GPR(gpr+1), A_GPR(stereo_mix+1));
  1172. snd_emu10k1_init_stereo_control(&controls[nctl++], "Front Playback Volume", gpr, 100);
  1173. gpr += 2;
  1174. /* Stereo Mix Surround Playback */
  1175. A_OP(icode, &ptr, iMAC0, A_GPR(playback+2), A_GPR(playback+2), A_GPR(gpr), A_GPR(stereo_mix));
  1176. A_OP(icode, &ptr, iMAC0, A_GPR(playback+3), A_GPR(playback+3), A_GPR(gpr+1), A_GPR(stereo_mix+1));
  1177. snd_emu10k1_init_stereo_control(&controls[nctl++], "Surround Playback Volume", gpr, 0);
  1178. gpr += 2;
  1179. /* Stereo Mix Center Playback */
  1180. /* Center = sub = Left/2 + Right/2 */
  1181. A_OP(icode, &ptr, iINTERP, A_GPR(tmp), A_GPR(stereo_mix), 0xcd, A_GPR(stereo_mix+1));
  1182. A_OP(icode, &ptr, iMAC0, A_GPR(playback+4), A_GPR(playback+4), A_GPR(gpr), A_GPR(tmp));
  1183. snd_emu10k1_init_mono_control(&controls[nctl++], "Center Playback Volume", gpr, 0);
  1184. gpr++;
  1185. /* Stereo Mix LFE Playback */
  1186. A_OP(icode, &ptr, iMAC0, A_GPR(playback+5), A_GPR(playback+5), A_GPR(gpr), A_GPR(tmp));
  1187. snd_emu10k1_init_mono_control(&controls[nctl++], "LFE Playback Volume", gpr, 0);
  1188. gpr++;
  1189. if (emu->card_capabilities->spk71) {
  1190. /* Stereo Mix Side Playback */
  1191. A_OP(icode, &ptr, iMAC0, A_GPR(playback+6), A_GPR(playback+6), A_GPR(gpr), A_GPR(stereo_mix));
  1192. A_OP(icode, &ptr, iMAC0, A_GPR(playback+7), A_GPR(playback+7), A_GPR(gpr+1), A_GPR(stereo_mix+1));
  1193. snd_emu10k1_init_stereo_control(&controls[nctl++], "Side Playback Volume", gpr, 0);
  1194. gpr += 2;
  1195. }
  1196. /*
  1197. * outputs
  1198. */
  1199. #define A_PUT_OUTPUT(out,src) A_OP(icode, &ptr, iACC3, A_EXTOUT(out), A_C_00000000, A_C_00000000, A_GPR(src))
  1200. #define A_PUT_STEREO_OUTPUT(out1,out2,src) \
  1201. {A_PUT_OUTPUT(out1,src); A_PUT_OUTPUT(out2,src+1);}
  1202. #define _A_SWITCH(icode, ptr, dst, src, sw) \
  1203. A_OP((icode), ptr, iMACINT0, dst, A_C_00000000, src, sw);
  1204. #define A_SWITCH(icode, ptr, dst, src, sw) \
  1205. _A_SWITCH(icode, ptr, A_GPR(dst), A_GPR(src), A_GPR(sw))
  1206. #define _A_SWITCH_NEG(icode, ptr, dst, src) \
  1207. A_OP((icode), ptr, iANDXOR, dst, src, A_C_00000001, A_C_00000001);
  1208. #define A_SWITCH_NEG(icode, ptr, dst, src) \
  1209. _A_SWITCH_NEG(icode, ptr, A_GPR(dst), A_GPR(src))
  1210. /*
  1211. * Process tone control
  1212. */
  1213. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 0), A_GPR(playback + 0), A_C_00000000, A_C_00000000); /* left */
  1214. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 1), A_GPR(playback + 1), A_C_00000000, A_C_00000000); /* right */
  1215. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 2), A_GPR(playback + 2), A_C_00000000, A_C_00000000); /* rear left */
  1216. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 3), A_GPR(playback + 3), A_C_00000000, A_C_00000000); /* rear right */
  1217. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 4), A_GPR(playback + 4), A_C_00000000, A_C_00000000); /* center */
  1218. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 5), A_GPR(playback + 5), A_C_00000000, A_C_00000000); /* LFE */
  1219. if (emu->card_capabilities->spk71) {
  1220. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 6), A_GPR(playback + 6), A_C_00000000, A_C_00000000); /* side left */
  1221. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 7), A_GPR(playback + 7), A_C_00000000, A_C_00000000); /* side right */
  1222. }
  1223. ctl = &controls[nctl + 0];
  1224. ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
  1225. strcpy(ctl->id.name, "Tone Control - Bass");
  1226. ctl->vcount = 2;
  1227. ctl->count = 10;
  1228. ctl->min = 0;
  1229. ctl->max = 40;
  1230. ctl->value[0] = ctl->value[1] = 20;
  1231. ctl->translation = EMU10K1_GPR_TRANSLATION_BASS;
  1232. ctl = &controls[nctl + 1];
  1233. ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
  1234. strcpy(ctl->id.name, "Tone Control - Treble");
  1235. ctl->vcount = 2;
  1236. ctl->count = 10;
  1237. ctl->min = 0;
  1238. ctl->max = 40;
  1239. ctl->value[0] = ctl->value[1] = 20;
  1240. ctl->translation = EMU10K1_GPR_TRANSLATION_TREBLE;
  1241. #define BASS_GPR 0x8c
  1242. #define TREBLE_GPR 0x96
  1243. for (z = 0; z < 5; z++) {
  1244. int j;
  1245. for (j = 0; j < 2; j++) {
  1246. controls[nctl + 0].gpr[z * 2 + j] = BASS_GPR + z * 2 + j;
  1247. controls[nctl + 1].gpr[z * 2 + j] = TREBLE_GPR + z * 2 + j;
  1248. }
  1249. }
  1250. for (z = 0; z < 4; z++) { /* front/rear/center-lfe/side */
  1251. int j, k, l, d;
  1252. for (j = 0; j < 2; j++) { /* left/right */
  1253. k = 0xb0 + (z * 8) + (j * 4);
  1254. l = 0xe0 + (z * 8) + (j * 4);
  1255. d = playback + SND_EMU10K1_PLAYBACK_CHANNELS + z * 2 + j;
  1256. A_OP(icode, &ptr, iMAC0, A_C_00000000, A_C_00000000, A_GPR(d), A_GPR(BASS_GPR + 0 + j));
  1257. A_OP(icode, &ptr, iMACMV, A_GPR(k+1), A_GPR(k), A_GPR(k+1), A_GPR(BASS_GPR + 4 + j));
  1258. A_OP(icode, &ptr, iMACMV, A_GPR(k), A_GPR(d), A_GPR(k), A_GPR(BASS_GPR + 2 + j));
  1259. A_OP(icode, &ptr, iMACMV, A_GPR(k+3), A_GPR(k+2), A_GPR(k+3), A_GPR(BASS_GPR + 8 + j));
  1260. A_OP(icode, &ptr, iMAC0, A_GPR(k+2), A_GPR_ACCU, A_GPR(k+2), A_GPR(BASS_GPR + 6 + j));
  1261. A_OP(icode, &ptr, iACC3, A_GPR(k+2), A_GPR(k+2), A_GPR(k+2), A_C_00000000);
  1262. A_OP(icode, &ptr, iMAC0, A_C_00000000, A_C_00000000, A_GPR(k+2), A_GPR(TREBLE_GPR + 0 + j));
  1263. A_OP(icode, &ptr, iMACMV, A_GPR(l+1), A_GPR(l), A_GPR(l+1), A_GPR(TREBLE_GPR + 4 + j));
  1264. A_OP(icode, &ptr, iMACMV, A_GPR(l), A_GPR(k+2), A_GPR(l), A_GPR(TREBLE_GPR + 2 + j));
  1265. A_OP(icode, &ptr, iMACMV, A_GPR(l+3), A_GPR(l+2), A_GPR(l+3), A_GPR(TREBLE_GPR + 8 + j));
  1266. A_OP(icode, &ptr, iMAC0, A_GPR(l+2), A_GPR_ACCU, A_GPR(l+2), A_GPR(TREBLE_GPR + 6 + j));
  1267. A_OP(icode, &ptr, iMACINT0, A_GPR(l+2), A_C_00000000, A_GPR(l+2), A_C_00000010);
  1268. A_OP(icode, &ptr, iACC3, A_GPR(d), A_GPR(l+2), A_C_00000000, A_C_00000000);
  1269. if (z == 2) /* center */
  1270. break;
  1271. }
  1272. }
  1273. nctl += 2;
  1274. #undef BASS_GPR
  1275. #undef TREBLE_GPR
  1276. for (z = 0; z < 8; z++) {
  1277. A_SWITCH(icode, &ptr, tmp + 0, playback + SND_EMU10K1_PLAYBACK_CHANNELS + z, gpr + 0);
  1278. A_SWITCH_NEG(icode, &ptr, tmp + 1, gpr + 0);
  1279. A_SWITCH(icode, &ptr, tmp + 1, playback + z, tmp + 1);
  1280. A_OP(icode, &ptr, iACC3, A_GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + z), A_GPR(tmp + 0), A_GPR(tmp + 1), A_C_00000000);
  1281. }
  1282. snd_emu10k1_init_stereo_onoff_control(controls + nctl++, "Tone Control - Switch", gpr, 0);
  1283. gpr += 2;
  1284. /* Master volume (will be renamed later) */
  1285. A_OP(icode, &ptr, iMAC0, A_GPR(playback+0+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+0+SND_EMU10K1_PLAYBACK_CHANNELS));
  1286. A_OP(icode, &ptr, iMAC0, A_GPR(playback+1+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+1+SND_EMU10K1_PLAYBACK_CHANNELS));
  1287. A_OP(icode, &ptr, iMAC0, A_GPR(playback+2+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+2+SND_EMU10K1_PLAYBACK_CHANNELS));
  1288. A_OP(icode, &ptr, iMAC0, A_GPR(playback+3+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+3+SND_EMU10K1_PLAYBACK_CHANNELS));
  1289. A_OP(icode, &ptr, iMAC0, A_GPR(playback+4+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+4+SND_EMU10K1_PLAYBACK_CHANNELS));
  1290. A_OP(icode, &ptr, iMAC0, A_GPR(playback+5+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+5+SND_EMU10K1_PLAYBACK_CHANNELS));
  1291. A_OP(icode, &ptr, iMAC0, A_GPR(playback+6+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+6+SND_EMU10K1_PLAYBACK_CHANNELS));
  1292. A_OP(icode, &ptr, iMAC0, A_GPR(playback+7+SND_EMU10K1_PLAYBACK_CHANNELS), A_C_00000000, A_GPR(gpr), A_GPR(playback+7+SND_EMU10K1_PLAYBACK_CHANNELS));
  1293. snd_emu10k1_init_mono_control(&controls[nctl++], "Wave Master Playback Volume", gpr, 0);
  1294. gpr += 2;
  1295. /* analog speakers */
  1296. A_PUT_STEREO_OUTPUT(A_EXTOUT_AFRONT_L, A_EXTOUT_AFRONT_R, playback + SND_EMU10K1_PLAYBACK_CHANNELS);
  1297. A_PUT_STEREO_OUTPUT(A_EXTOUT_AREAR_L, A_EXTOUT_AREAR_R, playback+2 + SND_EMU10K1_PLAYBACK_CHANNELS);
  1298. A_PUT_OUTPUT(A_EXTOUT_ACENTER, playback+4 + SND_EMU10K1_PLAYBACK_CHANNELS);
  1299. A_PUT_OUTPUT(A_EXTOUT_ALFE, playback+5 + SND_EMU10K1_PLAYBACK_CHANNELS);
  1300. if (emu->card_capabilities->spk71)
  1301. A_PUT_STEREO_OUTPUT(A_EXTOUT_ASIDE_L, A_EXTOUT_ASIDE_R, playback+6 + SND_EMU10K1_PLAYBACK_CHANNELS);
  1302. /* headphone */
  1303. A_PUT_STEREO_OUTPUT(A_EXTOUT_HEADPHONE_L, A_EXTOUT_HEADPHONE_R, playback + SND_EMU10K1_PLAYBACK_CHANNELS);
  1304. /* digital outputs */
  1305. /* A_PUT_STEREO_OUTPUT(A_EXTOUT_FRONT_L, A_EXTOUT_FRONT_R, playback + SND_EMU10K1_PLAYBACK_CHANNELS); */
  1306. /* IEC958 Optical Raw Playback Switch */
  1307. gpr_map[gpr++] = 0;
  1308. gpr_map[gpr++] = 0x1008;
  1309. gpr_map[gpr++] = 0xffff0000;
  1310. for (z = 0; z < 2; z++) {
  1311. A_OP(icode, &ptr, iMAC0, A_GPR(tmp + 2), A_FXBUS(FXBUS_PT_LEFT + z), A_C_00000000, A_C_00000000);
  1312. A_OP(icode, &ptr, iSKIP, A_GPR_COND, A_GPR_COND, A_GPR(gpr - 2), A_C_00000001);
  1313. A_OP(icode, &ptr, iACC3, A_GPR(tmp + 2), A_C_00000000, A_C_00010000, A_GPR(tmp + 2));
  1314. A_OP(icode, &ptr, iANDXOR, A_GPR(tmp + 2), A_GPR(tmp + 2), A_GPR(gpr - 1), A_C_00000000);
  1315. A_SWITCH(icode, &ptr, tmp + 0, tmp + 2, gpr + z);
  1316. A_SWITCH_NEG(icode, &ptr, tmp + 1, gpr + z);
  1317. A_SWITCH(icode, &ptr, tmp + 1, playback + SND_EMU10K1_PLAYBACK_CHANNELS + z, tmp + 1);
  1318. if ((z==1) && (emu->card_capabilities->spdif_bug)) {
  1319. /* Due to a SPDIF output bug on some Audigy cards, this code delays the Right channel by 1 sample */
  1320. snd_printk(KERN_INFO "Installing spdif_bug patch: %s\n", emu->card_capabilities->name);
  1321. A_OP(icode, &ptr, iACC3, A_EXTOUT(A_EXTOUT_FRONT_L + z), A_GPR(gpr - 3), A_C_00000000, A_C_00000000);
  1322. A_OP(icode, &ptr, iACC3, A_GPR(gpr - 3), A_GPR(tmp + 0), A_GPR(tmp + 1), A_C_00000000);
  1323. } else {
  1324. A_OP(icode, &ptr, iACC3, A_EXTOUT(A_EXTOUT_FRONT_L + z), A_GPR(tmp + 0), A_GPR(tmp + 1), A_C_00000000);
  1325. }
  1326. }
  1327. snd_emu10k1_init_stereo_onoff_control(controls + nctl++, SNDRV_CTL_NAME_IEC958("Optical Raw ",PLAYBACK,SWITCH), gpr, 0);
  1328. gpr += 2;
  1329. A_PUT_STEREO_OUTPUT(A_EXTOUT_REAR_L, A_EXTOUT_REAR_R, playback+2 + SND_EMU10K1_PLAYBACK_CHANNELS);
  1330. A_PUT_OUTPUT(A_EXTOUT_CENTER, playback+4 + SND_EMU10K1_PLAYBACK_CHANNELS);
  1331. A_PUT_OUTPUT(A_EXTOUT_LFE, playback+5 + SND_EMU10K1_PLAYBACK_CHANNELS);
  1332. /* ADC buffer */
  1333. #ifdef EMU10K1_CAPTURE_DIGITAL_OUT
  1334. A_PUT_STEREO_OUTPUT(A_EXTOUT_ADC_CAP_L, A_EXTOUT_ADC_CAP_R, playback + SND_EMU10K1_PLAYBACK_CHANNELS);
  1335. #else
  1336. A_PUT_OUTPUT(A_EXTOUT_ADC_CAP_L, capture);
  1337. A_PUT_OUTPUT(A_EXTOUT_ADC_CAP_R, capture+1);
  1338. #endif
  1339. /* EFX capture - capture the 16 EXTINs */
  1340. for (z = 0; z < 16; z++) {
  1341. A_OP(icode, &ptr, iACC3, A_FXBUS2(z), A_C_00000000, A_C_00000000, A_EXTIN(z));
  1342. }
  1343. #endif /* JCD test */
  1344. /*
  1345. * ok, set up done..
  1346. */
  1347. if (gpr > tmp) {
  1348. snd_BUG();
  1349. err = -EIO;
  1350. goto __err;
  1351. }
  1352. /* clear remaining instruction memory */
  1353. while (ptr < 0x400)
  1354. A_OP(icode, &ptr, 0x0f, 0xc0, 0xc0, 0xcf, 0xc0);
  1355. seg = snd_enter_user();
  1356. icode->gpr_add_control_count = nctl;
  1357. icode->gpr_add_controls = (struct snd_emu10k1_fx8010_control_gpr __user *)controls;
  1358. err = snd_emu10k1_icode_poke(emu, icode);
  1359. snd_leave_user(seg);
  1360. __err:
  1361. kfree(controls);
  1362. if (icode != NULL) {
  1363. kfree((void __force *)icode->gpr_map);
  1364. kfree(icode);
  1365. }
  1366. return err;
  1367. }
  1368. /*
  1369. * initial DSP configuration for Emu10k1
  1370. */
  1371. /* when volume = max, then copy only to avoid volume modification */
  1372. /* with iMAC0 (negative values) */
  1373. static void __devinit _volume(struct snd_emu10k1_fx8010_code *icode, u32 *ptr, u32 dst, u32 src, u32 vol)
  1374. {
  1375. OP(icode, ptr, iMAC0, dst, C_00000000, src, vol);
  1376. OP(icode, ptr, iANDXOR, C_00000000, vol, C_ffffffff, C_7fffffff);
  1377. OP(icode, ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, C_00000001);
  1378. OP(icode, ptr, iACC3, dst, src, C_00000000, C_00000000);
  1379. }
  1380. static void __devinit _volume_add(struct snd_emu10k1_fx8010_code *icode, u32 *ptr, u32 dst, u32 src, u32 vol)
  1381. {
  1382. OP(icode, ptr, iANDXOR, C_00000000, vol, C_ffffffff, C_7fffffff);
  1383. OP(icode, ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, C_00000002);
  1384. OP(icode, ptr, iMACINT0, dst, dst, src, C_00000001);
  1385. OP(icode, ptr, iSKIP, C_00000000, C_7fffffff, C_7fffffff, C_00000001);
  1386. OP(icode, ptr, iMAC0, dst, dst, src, vol);
  1387. }
  1388. static void __devinit _volume_out(struct snd_emu10k1_fx8010_code *icode, u32 *ptr, u32 dst, u32 src, u32 vol)
  1389. {
  1390. OP(icode, ptr, iANDXOR, C_00000000, vol, C_ffffffff, C_7fffffff);
  1391. OP(icode, ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, C_00000002);
  1392. OP(icode, ptr, iACC3, dst, src, C_00000000, C_00000000);
  1393. OP(icode, ptr, iSKIP, C_00000000, C_7fffffff, C_7fffffff, C_00000001);
  1394. OP(icode, ptr, iMAC0, dst, C_00000000, src, vol);
  1395. }
  1396. #define VOLUME(icode, ptr, dst, src, vol) \
  1397. _volume(icode, ptr, GPR(dst), GPR(src), GPR(vol))
  1398. #define VOLUME_IN(icode, ptr, dst, src, vol) \
  1399. _volume(icode, ptr, GPR(dst), EXTIN(src), GPR(vol))
  1400. #define VOLUME_ADD(icode, ptr, dst, src, vol) \
  1401. _volume_add(icode, ptr, GPR(dst), GPR(src), GPR(vol))
  1402. #define VOLUME_ADDIN(icode, ptr, dst, src, vol) \
  1403. _volume_add(icode, ptr, GPR(dst), EXTIN(src), GPR(vol))
  1404. #define VOLUME_OUT(icode, ptr, dst, src, vol) \
  1405. _volume_out(icode, ptr, EXTOUT(dst), GPR(src), GPR(vol))
  1406. #define _SWITCH(icode, ptr, dst, src, sw) \
  1407. OP((icode), ptr, iMACINT0, dst, C_00000000, src, sw);
  1408. #define SWITCH(icode, ptr, dst, src, sw) \
  1409. _SWITCH(icode, ptr, GPR(dst), GPR(src), GPR(sw))
  1410. #define SWITCH_IN(icode, ptr, dst, src, sw) \
  1411. _SWITCH(icode, ptr, GPR(dst), EXTIN(src), GPR(sw))
  1412. #define _SWITCH_NEG(icode, ptr, dst, src) \
  1413. OP((icode), ptr, iANDXOR, dst, src, C_00000001, C_00000001);
  1414. #define SWITCH_NEG(icode, ptr, dst, src) \
  1415. _SWITCH_NEG(icode, ptr, GPR(dst), GPR(src))
  1416. static int __devinit _snd_emu10k1_init_efx(struct snd_emu10k1 *emu)
  1417. {
  1418. int err, i, z, gpr, tmp, playback, capture;
  1419. u32 ptr;
  1420. struct snd_emu10k1_fx8010_code *icode;
  1421. struct snd_emu10k1_fx8010_pcm_rec *ipcm = NULL;
  1422. struct snd_emu10k1_fx8010_control_gpr *controls = NULL, *ctl;
  1423. u32 *gpr_map;
  1424. mm_segment_t seg;
  1425. if ((icode = kzalloc(sizeof(*icode), GFP_KERNEL)) == NULL)
  1426. return -ENOMEM;
  1427. if ((icode->gpr_map = (u_int32_t __user *)
  1428. kcalloc(256 + 160 + 160 + 2 * 512, sizeof(u_int32_t),
  1429. GFP_KERNEL)) == NULL ||
  1430. (controls = kcalloc(SND_EMU10K1_GPR_CONTROLS,
  1431. sizeof(struct snd_emu10k1_fx8010_control_gpr),
  1432. GFP_KERNEL)) == NULL ||
  1433. (ipcm = kzalloc(sizeof(*ipcm), GFP_KERNEL)) == NULL) {
  1434. err = -ENOMEM;
  1435. goto __err;
  1436. }
  1437. gpr_map = (u32 __force *)icode->gpr_map;
  1438. icode->tram_data_map = icode->gpr_map + 256;
  1439. icode->tram_addr_map = icode->tram_data_map + 160;
  1440. icode->code = icode->tram_addr_map + 160;
  1441. /* clear free GPRs */
  1442. for (i = 0; i < 256; i++)
  1443. set_bit(i, icode->gpr_valid);
  1444. /* clear TRAM data & address lines */
  1445. for (i = 0; i < 160; i++)
  1446. set_bit(i, icode->tram_valid);
  1447. strcpy(icode->name, "SB Live! FX8010 code for ALSA v1.2 by Jaroslav Kysela");
  1448. ptr = 0; i = 0;
  1449. /* we have 12 inputs */
  1450. playback = SND_EMU10K1_INPUTS;
  1451. /* we have 6 playback channels and tone control doubles */
  1452. capture = playback + (SND_EMU10K1_PLAYBACK_CHANNELS * 2);
  1453. gpr = capture + SND_EMU10K1_CAPTURE_CHANNELS;
  1454. tmp = 0x88; /* we need 4 temporary GPR */
  1455. /* from 0x8c to 0xff is the area for tone control */
  1456. /* stop FX processor */
  1457. snd_emu10k1_ptr_write(emu, DBG, 0, (emu->fx8010.dbg = 0) | EMU10K1_DBG_SINGLE_STEP);
  1458. /*
  1459. * Process FX Buses
  1460. */
  1461. OP(icode, &ptr, iMACINT0, GPR(0), C_00000000, FXBUS(FXBUS_PCM_LEFT), C_00000004);
  1462. OP(icode, &ptr, iMACINT0, GPR(1), C_00000000, FXBUS(FXBUS_PCM_RIGHT), C_00000004);
  1463. OP(icode, &ptr, iMACINT0, GPR(2), C_00000000, FXBUS(FXBUS_MIDI_LEFT), C_00000004);
  1464. OP(icode, &ptr, iMACINT0, GPR(3), C_00000000, FXBUS(FXBUS_MIDI_RIGHT), C_00000004);
  1465. OP(icode, &ptr, iMACINT0, GPR(4), C_00000000, FXBUS(FXBUS_PCM_LEFT_REAR), C_00000004);
  1466. OP(icode, &ptr, iMACINT0, GPR(5), C_00000000, FXBUS(FXBUS_PCM_RIGHT_REAR), C_00000004);
  1467. OP(icode, &ptr, iMACINT0, GPR(6), C_00000000, FXBUS(FXBUS_PCM_CENTER), C_00000004);
  1468. OP(icode, &ptr, iMACINT0, GPR(7), C_00000000, FXBUS(FXBUS_PCM_LFE), C_00000004);
  1469. OP(icode, &ptr, iMACINT0, GPR(8), C_00000000, C_00000000, C_00000000); /* S/PDIF left */
  1470. OP(icode, &ptr, iMACINT0, GPR(9), C_00000000, C_00000000, C_00000000); /* S/PDIF right */
  1471. OP(icode, &ptr, iMACINT0, GPR(10), C_00000000, FXBUS(FXBUS_PCM_LEFT_FRONT), C_00000004);
  1472. OP(icode, &ptr, iMACINT0, GPR(11), C_00000000, FXBUS(FXBUS_PCM_RIGHT_FRONT), C_00000004);
  1473. /* Raw S/PDIF PCM */
  1474. ipcm->substream = 0;
  1475. ipcm->channels = 2;
  1476. ipcm->tram_start = 0;
  1477. ipcm->buffer_size = (64 * 1024) / 2;
  1478. ipcm->gpr_size = gpr++;
  1479. ipcm->gpr_ptr = gpr++;
  1480. ipcm->gpr_count = gpr++;
  1481. ipcm->gpr_tmpcount = gpr++;
  1482. ipcm->gpr_trigger = gpr++;
  1483. ipcm->gpr_running = gpr++;
  1484. ipcm->etram[0] = 0;
  1485. ipcm->etram[1] = 1;
  1486. gpr_map[gpr + 0] = 0xfffff000;
  1487. gpr_map[gpr + 1] = 0xffff0000;
  1488. gpr_map[gpr + 2] = 0x70000000;
  1489. gpr_map[gpr + 3] = 0x00000007;
  1490. gpr_map[gpr + 4] = 0x001f << 11;
  1491. gpr_map[gpr + 5] = 0x001c << 11;
  1492. gpr_map[gpr + 6] = (0x22 - 0x01) - 1; /* skip at 01 to 22 */
  1493. gpr_map[gpr + 7] = (0x22 - 0x06) - 1; /* skip at 06 to 22 */
  1494. gpr_map[gpr + 8] = 0x2000000 + (2<<11);
  1495. gpr_map[gpr + 9] = 0x4000000 + (2<<11);
  1496. gpr_map[gpr + 10] = 1<<11;
  1497. gpr_map[gpr + 11] = (0x24 - 0x0a) - 1; /* skip at 0a to 24 */
  1498. gpr_map[gpr + 12] = 0;
  1499. /* if the trigger flag is not set, skip */
  1500. /* 00: */ OP(icode, &ptr, iMAC0, C_00000000, GPR(ipcm->gpr_trigger), C_00000000, C_00000000);
  1501. /* 01: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_ZERO, GPR(gpr + 6));
  1502. /* if the running flag is set, we're running */
  1503. /* 02: */ OP(icode, &ptr, iMAC0, C_00000000, GPR(ipcm->gpr_running), C_00000000, C_00000000);
  1504. /* 03: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, C_00000004);
  1505. /* wait until ((GPR_DBAC>>11) & 0x1f) == 0x1c) */
  1506. /* 04: */ OP(icode, &ptr, iANDXOR, GPR(tmp + 0), GPR_DBAC, GPR(gpr + 4), C_00000000);
  1507. /* 05: */ OP(icode, &ptr, iMACINT0, C_00000000, GPR(tmp + 0), C_ffffffff, GPR(gpr + 5));
  1508. /* 06: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, GPR(gpr + 7));
  1509. /* 07: */ OP(icode, &ptr, iACC3, GPR(gpr + 12), C_00000010, C_00000001, C_00000000);
  1510. /* 08: */ OP(icode, &ptr, iANDXOR, GPR(ipcm->gpr_running), GPR(ipcm->gpr_running), C_00000000, C_00000001);
  1511. /* 09: */ OP(icode, &ptr, iACC3, GPR(gpr + 12), GPR(gpr + 12), C_ffffffff, C_00000000);
  1512. /* 0a: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, GPR(gpr + 11));
  1513. /* 0b: */ OP(icode, &ptr, iACC3, GPR(gpr + 12), C_00000001, C_00000000, C_00000000);
  1514. /* 0c: */ OP(icode, &ptr, iANDXOR, GPR(tmp + 0), ETRAM_DATA(ipcm->etram[0]), GPR(gpr + 0), C_00000000);
  1515. /* 0d: */ OP(icode, &ptr, iLOG, GPR(tmp + 0), GPR(tmp + 0), GPR(gpr + 3), C_00000000);
  1516. /* 0e: */ OP(icode, &ptr, iANDXOR, GPR(8), GPR(tmp + 0), GPR(gpr + 1), GPR(gpr + 2));
  1517. /* 0f: */ OP(icode, &ptr, iSKIP, C_00000000, GPR_COND, CC_REG_MINUS, C_00000001);
  1518. /* 10: */ OP(icode, &ptr, iANDXOR, GPR(8), GPR(8), GPR(gpr + 1), GPR(gpr + 2));
  1519. /* 11: */ OP(icode, &ptr, iANDXOR, GPR(tmp + 0), ETRAM_DATA(ipcm->etram[1]), GPR(gpr + 0), C_00000000);
  1520. /* 12: */ OP(icode, &ptr, iLOG, GPR(tmp + 0), GPR(tmp + 0), GPR(gpr + 3), C_00000000);
  1521. /* 13: */ OP(icode, &ptr, iANDXOR, GPR(9), GPR(tmp + 0), GPR(gpr + 1), GPR(gpr + 2));
  1522. /* 14: */ OP(icode, &ptr, iSKIP, C_00000000, GPR_COND, CC_REG_MINUS, C_00000001);
  1523. /* 15: */ OP(icode, &ptr, iANDXOR, GPR(9), GPR(9), GPR(gpr + 1), GPR(gpr + 2));
  1524. /* 16: */ OP(icode, &ptr, iACC3, GPR(tmp + 0), GPR(ipcm->gpr_ptr), C_00000001, C_00000000);
  1525. /* 17: */ OP(icode, &ptr, iMACINT0, C_00000000, GPR(tmp + 0), C_ffffffff, GPR(ipcm->gpr_size));
  1526. /* 18: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_MINUS, C_00000001);
  1527. /* 19: */ OP(icode, &ptr, iACC3, GPR(tmp + 0), C_00000000, C_00000000, C_00000000);
  1528. /* 1a: */ OP(icode, &ptr, iACC3, GPR(ipcm->gpr_ptr), GPR(tmp + 0), C_00000000, C_00000000);
  1529. /* 1b: */ OP(icode, &ptr, iACC3, GPR(ipcm->gpr_tmpcount), GPR(ipcm->gpr_tmpcount), C_ffffffff, C_00000000);
  1530. /* 1c: */ OP(icode, &ptr, iSKIP, GPR_COND, GPR_COND, CC_REG_NONZERO, C_00000002);
  1531. /* 1d: */ OP(icode, &ptr, iACC3, GPR(ipcm->gpr_tmpcount), GPR(ipcm->gpr_count), C_00000000, C_00000000);
  1532. /* 1e: */ OP(icode, &ptr, iACC3, GPR_IRQ, C_80000000, C_00000000, C_00000000);
  1533. /* 1f: */ OP(icode, &ptr, iANDXOR, GPR(ipcm->gpr_running), GPR(ipcm->gpr_running), C_00000001, C_00010000);
  1534. /* 20: */ OP(icode, &ptr, iANDXOR, GPR(ipcm->gpr_running), GPR(ipcm->gpr_running), C_00010000, C_00000001);
  1535. /* 21: */ OP(icode, &ptr, iSKIP, C_00000000, C_7fffffff, C_7fffffff, C_00000002);
  1536. /* 22: */ OP(icode, &ptr, iMACINT1, ETRAM_ADDR(ipcm->etram[0]), GPR(gpr + 8), GPR_DBAC, C_ffffffff);
  1537. /* 23: */ OP(icode, &ptr, iMACINT1, ETRAM_ADDR(ipcm->etram[1]), GPR(gpr + 9), GPR_DBAC, C_ffffffff);
  1538. /* 24: */
  1539. gpr += 13;
  1540. /* Wave Playback Volume */
  1541. for (z = 0; z < 2; z++)
  1542. VOLUME(icode, &ptr, playback + z, z, gpr + z);
  1543. snd_emu10k1_init_stereo_control(controls + i++, "Wave Playback Volume", gpr, 100);
  1544. gpr += 2;
  1545. /* Wave Surround Playback Volume */
  1546. for (z = 0; z < 2; z++)
  1547. VOLUME(icode, &ptr, playback + 2 + z, z, gpr + z);
  1548. snd_emu10k1_init_stereo_control(controls + i++, "Wave Surround Playback Volume", gpr, 0);
  1549. gpr += 2;
  1550. /* Wave Center/LFE Playback Volume */
  1551. OP(icode, &ptr, iACC3, GPR(tmp + 0), FXBUS(FXBUS_PCM_LEFT), FXBUS(FXBUS_PCM_RIGHT), C_00000000);
  1552. OP(icode, &ptr, iMACINT0, GPR(tmp + 0), C_00000000, GPR(tmp + 0), C_00000002);
  1553. VOLUME(icode, &ptr, playback + 4, tmp + 0, gpr);
  1554. snd_emu10k1_init_mono_control(controls + i++, "Wave Center Playback Volume", gpr++, 0);
  1555. VOLUME(icode, &ptr, playback + 5, tmp + 0, gpr);
  1556. snd_emu10k1_init_mono_control(controls + i++, "Wave LFE Playback Volume", gpr++, 0);
  1557. /* Wave Capture Volume + Switch */
  1558. for (z = 0; z < 2; z++) {
  1559. SWITCH(icode, &ptr, tmp + 0, z, gpr + 2 + z);
  1560. VOLUME(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1561. }
  1562. snd_emu10k1_init_stereo_control(controls + i++, "Wave Capture Volume", gpr, 0);
  1563. snd_emu10k1_init_stereo_onoff_control(controls + i++, "Wave Capture Switch", gpr + 2, 0);
  1564. gpr += 4;
  1565. /* Synth Playback Volume */
  1566. for (z = 0; z < 2; z++)
  1567. VOLUME_ADD(icode, &ptr, playback + z, 2 + z, gpr + z);
  1568. snd_emu10k1_init_stereo_control(controls + i++, "Synth Playback Volume", gpr, 100);
  1569. gpr += 2;
  1570. /* Synth Capture Volume + Switch */
  1571. for (z = 0; z < 2; z++) {
  1572. SWITCH(icode, &ptr, tmp + 0, 2 + z, gpr + 2 + z);
  1573. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1574. }
  1575. snd_emu10k1_init_stereo_control(controls + i++, "Synth Capture Volume", gpr, 0);
  1576. snd_emu10k1_init_stereo_onoff_control(controls + i++, "Synth Capture Switch", gpr + 2, 0);
  1577. gpr += 4;
  1578. /* Surround Digital Playback Volume (renamed later without Digital) */
  1579. for (z = 0; z < 2; z++)
  1580. VOLUME_ADD(icode, &ptr, playback + 2 + z, 4 + z, gpr + z);
  1581. snd_emu10k1_init_stereo_control(controls + i++, "Surround Digital Playback Volume", gpr, 100);
  1582. gpr += 2;
  1583. /* Surround Capture Volume + Switch */
  1584. for (z = 0; z < 2; z++) {
  1585. SWITCH(icode, &ptr, tmp + 0, 4 + z, gpr + 2 + z);
  1586. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1587. }
  1588. snd_emu10k1_init_stereo_control(controls + i++, "Surround Capture Volume", gpr, 0);
  1589. snd_emu10k1_init_stereo_onoff_control(controls + i++, "Surround Capture Switch", gpr + 2, 0);
  1590. gpr += 4;
  1591. /* Center Playback Volume (renamed later without Digital) */
  1592. VOLUME_ADD(icode, &ptr, playback + 4, 6, gpr);
  1593. snd_emu10k1_init_mono_control(controls + i++, "Center Digital Playback Volume", gpr++, 100);
  1594. /* LFE Playback Volume + Switch (renamed later without Digital) */
  1595. VOLUME_ADD(icode, &ptr, playback + 5, 7, gpr);
  1596. snd_emu10k1_init_mono_control(controls + i++, "LFE Digital Playback Volume", gpr++, 100);
  1597. /* Front Playback Volume */
  1598. for (z = 0; z < 2; z++)
  1599. VOLUME_ADD(icode, &ptr, playback + z, 10 + z, gpr + z);
  1600. snd_emu10k1_init_stereo_control(controls + i++, "Front Playback Volume", gpr, 100);
  1601. gpr += 2;
  1602. /* Front Capture Volume + Switch */
  1603. for (z = 0; z < 2; z++) {
  1604. SWITCH(icode, &ptr, tmp + 0, 10 + z, gpr + 2);
  1605. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1606. }
  1607. snd_emu10k1_init_stereo_control(controls + i++, "Front Capture Volume", gpr, 0);
  1608. snd_emu10k1_init_mono_onoff_control(controls + i++, "Front Capture Switch", gpr + 2, 0);
  1609. gpr += 3;
  1610. /*
  1611. * Process inputs
  1612. */
  1613. if (emu->fx8010.extin_mask & ((1<<EXTIN_AC97_L)|(1<<EXTIN_AC97_R))) {
  1614. /* AC'97 Playback Volume */
  1615. VOLUME_ADDIN(icode, &ptr, playback + 0, EXTIN_AC97_L, gpr); gpr++;
  1616. VOLUME_ADDIN(icode, &ptr, playback + 1, EXTIN_AC97_R, gpr); gpr++;
  1617. snd_emu10k1_init_stereo_control(controls + i++, "AC97 Playback Volume", gpr-2, 0);
  1618. /* AC'97 Capture Volume */
  1619. VOLUME_ADDIN(icode, &ptr, capture + 0, EXTIN_AC97_L, gpr); gpr++;
  1620. VOLUME_ADDIN(icode, &ptr, capture + 1, EXTIN_AC97_R, gpr); gpr++;
  1621. snd_emu10k1_init_stereo_control(controls + i++, "AC97 Capture Volume", gpr-2, 100);
  1622. }
  1623. if (emu->fx8010.extin_mask & ((1<<EXTIN_SPDIF_CD_L)|(1<<EXTIN_SPDIF_CD_R))) {
  1624. /* IEC958 TTL Playback Volume */
  1625. for (z = 0; z < 2; z++)
  1626. VOLUME_ADDIN(icode, &ptr, playback + z, EXTIN_SPDIF_CD_L + z, gpr + z);
  1627. snd_emu10k1_init_stereo_control(controls + i++, SNDRV_CTL_NAME_IEC958("TTL ",PLAYBACK,VOLUME), gpr, 0);
  1628. gpr += 2;
  1629. /* IEC958 TTL Capture Volume + Switch */
  1630. for (z = 0; z < 2; z++) {
  1631. SWITCH_IN(icode, &ptr, tmp + 0, EXTIN_SPDIF_CD_L + z, gpr + 2 + z);
  1632. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1633. }
  1634. snd_emu10k1_init_stereo_control(controls + i++, SNDRV_CTL_NAME_IEC958("TTL ",CAPTURE,VOLUME), gpr, 0);
  1635. snd_emu10k1_init_stereo_onoff_control(controls + i++, SNDRV_CTL_NAME_IEC958("TTL ",CAPTURE,SWITCH), gpr + 2, 0);
  1636. gpr += 4;
  1637. }
  1638. if (emu->fx8010.extin_mask & ((1<<EXTIN_ZOOM_L)|(1<<EXTIN_ZOOM_R))) {
  1639. /* Zoom Video Playback Volume */
  1640. for (z = 0; z < 2; z++)
  1641. VOLUME_ADDIN(icode, &ptr, playback + z, EXTIN_ZOOM_L + z, gpr + z);
  1642. snd_emu10k1_init_stereo_control(controls + i++, "Zoom Video Playback Volume", gpr, 0);
  1643. gpr += 2;
  1644. /* Zoom Video Capture Volume + Switch */
  1645. for (z = 0; z < 2; z++) {
  1646. SWITCH_IN(icode, &ptr, tmp + 0, EXTIN_ZOOM_L + z, gpr + 2 + z);
  1647. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1648. }
  1649. snd_emu10k1_init_stereo_control(controls + i++, "Zoom Video Capture Volume", gpr, 0);
  1650. snd_emu10k1_init_stereo_onoff_control(controls + i++, "Zoom Video Capture Switch", gpr + 2, 0);
  1651. gpr += 4;
  1652. }
  1653. if (emu->fx8010.extin_mask & ((1<<EXTIN_TOSLINK_L)|(1<<EXTIN_TOSLINK_R))) {
  1654. /* IEC958 Optical Playback Volume */
  1655. for (z = 0; z < 2; z++)
  1656. VOLUME_ADDIN(icode, &ptr, playback + z, EXTIN_TOSLINK_L + z, gpr + z);
  1657. snd_emu10k1_init_stereo_control(controls + i++, SNDRV_CTL_NAME_IEC958("LiveDrive ",PLAYBACK,VOLUME), gpr, 0);
  1658. gpr += 2;
  1659. /* IEC958 Optical Capture Volume */
  1660. for (z = 0; z < 2; z++) {
  1661. SWITCH_IN(icode, &ptr, tmp + 0, EXTIN_TOSLINK_L + z, gpr + 2 + z);
  1662. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1663. }
  1664. snd_emu10k1_init_stereo_control(controls + i++, SNDRV_CTL_NAME_IEC958("LiveDrive ",CAPTURE,VOLUME), gpr, 0);
  1665. snd_emu10k1_init_stereo_onoff_control(controls + i++, SNDRV_CTL_NAME_IEC958("LiveDrive ",CAPTURE,SWITCH), gpr + 2, 0);
  1666. gpr += 4;
  1667. }
  1668. if (emu->fx8010.extin_mask & ((1<<EXTIN_LINE1_L)|(1<<EXTIN_LINE1_R))) {
  1669. /* Line LiveDrive Playback Volume */
  1670. for (z = 0; z < 2; z++)
  1671. VOLUME_ADDIN(icode, &ptr, playback + z, EXTIN_LINE1_L + z, gpr + z);
  1672. snd_emu10k1_init_stereo_control(controls + i++, "Line LiveDrive Playback Volume", gpr, 0);
  1673. gpr += 2;
  1674. /* Line LiveDrive Capture Volume + Switch */
  1675. for (z = 0; z < 2; z++) {
  1676. SWITCH_IN(icode, &ptr, tmp + 0, EXTIN_LINE1_L + z, gpr + 2 + z);
  1677. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1678. }
  1679. snd_emu10k1_init_stereo_control(controls + i++, "Line LiveDrive Capture Volume", gpr, 0);
  1680. snd_emu10k1_init_stereo_onoff_control(controls + i++, "Line LiveDrive Capture Switch", gpr + 2, 0);
  1681. gpr += 4;
  1682. }
  1683. if (emu->fx8010.extin_mask & ((1<<EXTIN_COAX_SPDIF_L)|(1<<EXTIN_COAX_SPDIF_R))) {
  1684. /* IEC958 Coax Playback Volume */
  1685. for (z = 0; z < 2; z++)
  1686. VOLUME_ADDIN(icode, &ptr, playback + z, EXTIN_COAX_SPDIF_L + z, gpr + z);
  1687. snd_emu10k1_init_stereo_control(controls + i++, SNDRV_CTL_NAME_IEC958("Coaxial ",PLAYBACK,VOLUME), gpr, 0);
  1688. gpr += 2;
  1689. /* IEC958 Coax Capture Volume + Switch */
  1690. for (z = 0; z < 2; z++) {
  1691. SWITCH_IN(icode, &ptr, tmp + 0, EXTIN_COAX_SPDIF_L + z, gpr + 2 + z);
  1692. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1693. }
  1694. snd_emu10k1_init_stereo_control(controls + i++, SNDRV_CTL_NAME_IEC958("Coaxial ",CAPTURE,VOLUME), gpr, 0);
  1695. snd_emu10k1_init_stereo_onoff_control(controls + i++, SNDRV_CTL_NAME_IEC958("Coaxial ",CAPTURE,SWITCH), gpr + 2, 0);
  1696. gpr += 4;
  1697. }
  1698. if (emu->fx8010.extin_mask & ((1<<EXTIN_LINE2_L)|(1<<EXTIN_LINE2_R))) {
  1699. /* Line LiveDrive Playback Volume */
  1700. for (z = 0; z < 2; z++)
  1701. VOLUME_ADDIN(icode, &ptr, playback + z, EXTIN_LINE2_L + z, gpr + z);
  1702. snd_emu10k1_init_stereo_control(controls + i++, "Line2 LiveDrive Playback Volume", gpr, 0);
  1703. controls[i-1].id.index = 1;
  1704. gpr += 2;
  1705. /* Line LiveDrive Capture Volume */
  1706. for (z = 0; z < 2; z++) {
  1707. SWITCH_IN(icode, &ptr, tmp + 0, EXTIN_LINE2_L + z, gpr + 2 + z);
  1708. VOLUME_ADD(icode, &ptr, capture + z, tmp + 0, gpr + z);
  1709. }
  1710. snd_emu10k1_init_stereo_control(controls + i++, "Line2 LiveDrive Capture Volume", gpr, 0);
  1711. controls[i-1].id.index = 1;
  1712. snd_emu10k1_init_stereo_onoff_control(controls + i++, "Line2 LiveDrive Capture Switch", gpr + 2, 0);
  1713. controls[i-1].id.index = 1;
  1714. gpr += 4;
  1715. }
  1716. /*
  1717. * Process tone control
  1718. */
  1719. OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 0), GPR(playback + 0), C_00000000, C_00000000); /* left */
  1720. OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 1), GPR(playback + 1), C_00000000, C_00000000); /* right */
  1721. OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 2), GPR(playback + 2), C_00000000, C_00000000); /* rear left */
  1722. OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 3), GPR(playback + 3), C_00000000, C_00000000); /* rear right */
  1723. OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 4), GPR(playback + 4), C_00000000, C_00000000); /* center */
  1724. OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 5), GPR(playback + 5), C_00000000, C_00000000); /* LFE */
  1725. ctl = &controls[i + 0];
  1726. ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
  1727. strcpy(ctl->id.name, "Tone Control - Bass");
  1728. ctl->vcount = 2;
  1729. ctl->count = 10;
  1730. ctl->min = 0;
  1731. ctl->max = 40;
  1732. ctl->value[0] = ctl->value[1] = 20;
  1733. ctl->translation = EMU10K1_GPR_TRANSLATION_BASS;
  1734. ctl = &controls[i + 1];
  1735. ctl->id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
  1736. strcpy(ctl->id.name, "Tone Control - Treble");
  1737. ctl->vcount = 2;
  1738. ctl->count = 10;
  1739. ctl->min = 0;
  1740. ctl->max = 40;
  1741. ctl->value[0] = ctl->value[1] = 20;
  1742. ctl->translation = EMU10K1_GPR_TRANSLATION_TREBLE;
  1743. #define BASS_GPR 0x8c
  1744. #define TREBLE_GPR 0x96
  1745. for (z = 0; z < 5; z++) {
  1746. int j;
  1747. for (j = 0; j < 2; j++) {
  1748. controls[i + 0].gpr[z * 2 + j] = BASS_GPR + z * 2 + j;
  1749. controls[i + 1].gpr[z * 2 + j] = TREBLE_GPR + z * 2 + j;
  1750. }
  1751. }
  1752. for (z = 0; z < 3; z++) { /* front/rear/center-lfe */
  1753. int j, k, l, d;
  1754. for (j = 0; j < 2; j++) { /* left/right */
  1755. k = 0xa0 + (z * 8) + (j * 4);
  1756. l = 0xd0 + (z * 8) + (j * 4);
  1757. d = playback + SND_EMU10K1_PLAYBACK_CHANNELS + z * 2 + j;
  1758. OP(icode, &ptr, iMAC0, C_00000000, C_00000000, GPR(d), GPR(BASS_GPR + 0 + j));
  1759. OP(icode, &ptr, iMACMV, GPR(k+1), GPR(k), GPR(k+1), GPR(BASS_GPR + 4 + j));
  1760. OP(icode, &ptr, iMACMV, GPR(k), GPR(d), GPR(k), GPR(BASS_GPR + 2 + j));
  1761. OP(icode, &ptr, iMACMV, GPR(k+3), GPR(k+2), GPR(k+3), GPR(BASS_GPR + 8 + j));
  1762. OP(icode, &ptr, iMAC0, GPR(k+2), GPR_ACCU, GPR(k+2), GPR(BASS_GPR + 6 + j));
  1763. OP(icode, &ptr, iACC3, GPR(k+2), GPR(k+2), GPR(k+2), C_00000000);
  1764. OP(icode, &ptr, iMAC0, C_00000000, C_00000000, GPR(k+2), GPR(TREBLE_GPR + 0 + j));
  1765. OP(icode, &ptr, iMACMV, GPR(l+1), GPR(l), GPR(l+1), GPR(TREBLE_GPR + 4 + j));
  1766. OP(icode, &ptr, iMACMV, GPR(l), GPR(k+2), GPR(l), GPR(TREBLE_GPR + 2 + j));
  1767. OP(icode, &ptr, iMACMV, GPR(l+3), GPR(l+2), GPR(l+3), GPR(TREBLE_GPR + 8 + j));
  1768. OP(icode, &ptr, iMAC0, GPR(l+2), GPR_ACCU, GPR(l+2), GPR(TREBLE_GPR + 6 + j));
  1769. OP(icode, &ptr, iMACINT0, GPR(l+2), C_00000000, GPR(l+2), C_00000010);
  1770. OP(icode, &ptr, iACC3, GPR(d), GPR(l+2), C_00000000, C_00000000);
  1771. if (z == 2) /* center */
  1772. break;
  1773. }
  1774. }
  1775. i += 2;
  1776. #undef BASS_GPR
  1777. #undef TREBLE_GPR
  1778. for (z = 0; z < 6; z++) {
  1779. SWITCH(icode, &ptr, tmp + 0, playback + SND_EMU10K1_PLAYBACK_CHANNELS + z, gpr + 0);
  1780. SWITCH_NEG(icode, &ptr, tmp + 1, gpr + 0);
  1781. SWITCH(icode, &ptr, tmp + 1, playback + z, tmp + 1);
  1782. OP(icode, &ptr, iACC3, GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + z), GPR(tmp + 0), GPR(tmp + 1), C_00000000);
  1783. }
  1784. snd_emu10k1_init_stereo_onoff_control(controls + i++, "Tone Control - Switch", gpr, 0);
  1785. gpr += 2;
  1786. /*
  1787. * Process outputs
  1788. */
  1789. if (emu->fx8010.extout_mask & ((1<<EXTOUT_AC97_L)|(1<<EXTOUT_AC97_R))) {
  1790. /* AC'97 Playback Volume */
  1791. for (z = 0; z < 2; z++)
  1792. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_L + z), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + z), C_00000000, C_00000000);
  1793. }
  1794. if (emu->fx8010.extout_mask & ((1<<EXTOUT_TOSLINK_L)|(1<<EXTOUT_TOSLINK_R))) {
  1795. /* IEC958 Optical Raw Playback Switch */
  1796. for (z = 0; z < 2; z++) {
  1797. SWITCH(icode, &ptr, tmp + 0, 8 + z, gpr + z);
  1798. SWITCH_NEG(icode, &ptr, tmp + 1, gpr + z);
  1799. SWITCH(icode, &ptr, tmp + 1, playback + SND_EMU10K1_PLAYBACK_CHANNELS + z, tmp + 1);
  1800. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_TOSLINK_L + z), GPR(tmp + 0), GPR(tmp + 1), C_00000000);
  1801. #ifdef EMU10K1_CAPTURE_DIGITAL_OUT
  1802. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ADC_CAP_L + z), GPR(tmp + 0), GPR(tmp + 1), C_00000000);
  1803. #endif
  1804. }
  1805. snd_emu10k1_init_stereo_onoff_control(controls + i++, SNDRV_CTL_NAME_IEC958("Optical Raw ",PLAYBACK,SWITCH), gpr, 0);
  1806. gpr += 2;
  1807. }
  1808. if (emu->fx8010.extout_mask & ((1<<EXTOUT_HEADPHONE_L)|(1<<EXTOUT_HEADPHONE_R))) {
  1809. /* Headphone Playback Volume */
  1810. for (z = 0; z < 2; z++) {
  1811. SWITCH(icode, &ptr, tmp + 0, playback + SND_EMU10K1_PLAYBACK_CHANNELS + 4 + z, gpr + 2 + z);
  1812. SWITCH_NEG(icode, &ptr, tmp + 1, gpr + 2 + z);
  1813. SWITCH(icode, &ptr, tmp + 1, playback + SND_EMU10K1_PLAYBACK_CHANNELS + z, tmp + 1);
  1814. OP(icode, &ptr, iACC3, GPR(tmp + 0), GPR(tmp + 0), GPR(tmp + 1), C_00000000);
  1815. VOLUME_OUT(icode, &ptr, EXTOUT_HEADPHONE_L + z, tmp + 0, gpr + z);
  1816. }
  1817. snd_emu10k1_init_stereo_control(controls + i++, "Headphone Playback Volume", gpr + 0, 0);
  1818. controls[i-1].id.index = 1; /* AC'97 can have also Headphone control */
  1819. snd_emu10k1_init_mono_onoff_control(controls + i++, "Headphone Center Playback Switch", gpr + 2, 0);
  1820. controls[i-1].id.index = 1;
  1821. snd_emu10k1_init_mono_onoff_control(controls + i++, "Headphone LFE Playback Switch", gpr + 3, 0);
  1822. controls[i-1].id.index = 1;
  1823. gpr += 4;
  1824. }
  1825. if (emu->fx8010.extout_mask & ((1<<EXTOUT_REAR_L)|(1<<EXTOUT_REAR_R)))
  1826. for (z = 0; z < 2; z++)
  1827. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_REAR_L + z), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 2 + z), C_00000000, C_00000000);
  1828. if (emu->fx8010.extout_mask & ((1<<EXTOUT_AC97_REAR_L)|(1<<EXTOUT_AC97_REAR_R)))
  1829. for (z = 0; z < 2; z++)
  1830. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_REAR_L + z), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 2 + z), C_00000000, C_00000000);
  1831. if (emu->fx8010.extout_mask & (1<<EXTOUT_AC97_CENTER)) {
  1832. #ifndef EMU10K1_CENTER_LFE_FROM_FRONT
  1833. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_CENTER), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 4), C_00000000, C_00000000);
  1834. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ACENTER), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 4), C_00000000, C_00000000);
  1835. #else
  1836. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_CENTER), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 0), C_00000000, C_00000000);
  1837. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ACENTER), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 0), C_00000000, C_00000000);
  1838. #endif
  1839. }
  1840. if (emu->fx8010.extout_mask & (1<<EXTOUT_AC97_LFE)) {
  1841. #ifndef EMU10K1_CENTER_LFE_FROM_FRONT
  1842. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_LFE), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 5), C_00000000, C_00000000);
  1843. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ALFE), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 5), C_00000000, C_00000000);
  1844. #else
  1845. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_AC97_LFE), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 1), C_00000000, C_00000000);
  1846. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ALFE), GPR(playback + SND_EMU10K1_PLAYBACK_CHANNELS + 1), C_00000000, C_00000000);
  1847. #endif
  1848. }
  1849. #ifndef EMU10K1_CAPTURE_DIGITAL_OUT
  1850. for (z = 0; z < 2; z++)
  1851. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_ADC_CAP_L + z), GPR(capture + z), C_00000000, C_00000000);
  1852. #endif
  1853. if (emu->fx8010.extout_mask & (1<<EXTOUT_MIC_CAP))
  1854. OP(icode, &ptr, iACC3, EXTOUT(EXTOUT_MIC_CAP), GPR(capture + 2), C_00000000, C_00000000);
  1855. /* EFX capture - capture the 16 EXTINS */
  1856. if (emu->card_capabilities->sblive51) {
  1857. /* On the Live! 5.1, FXBUS2(1) and FXBUS(2) are shared with EXTOUT_ACENTER
  1858. * and EXTOUT_ALFE, so we can't connect inputs to them for multitrack recording.
  1859. *
  1860. * Since only 14 of the 16 EXTINs are used, this is not a big problem.
  1861. * We route AC97L and R to FX capture 14 and 15, SPDIF CD in to FX capture
  1862. * 0 and 3, then the rest of the EXTINs to the corresponding FX capture
  1863. * channel. Multitrack recorders will still see the center/lfe output signal
  1864. * on the second and third channels.
  1865. */
  1866. OP(icode, &ptr, iACC3, FXBUS2(14), C_00000000, C_00000000, EXTIN(0));
  1867. OP(icode, &ptr, iACC3, FXBUS2(15), C_00000000, C_00000000, EXTIN(1));
  1868. OP(icode, &ptr, iACC3, FXBUS2(0), C_00000000, C_00000000, EXTIN(2));
  1869. OP(icode, &ptr, iACC3, FXBUS2(3), C_00000000, C_00000000, EXTIN(3));
  1870. for (z = 4; z < 14; z++)
  1871. OP(icode, &ptr, iACC3, FXBUS2(z), C_00000000, C_00000000, EXTIN(z));
  1872. } else {
  1873. for (z = 0; z < 16; z++)
  1874. OP(icode, &ptr, iACC3, FXBUS2(z), C_00000000, C_00000000, EXTIN(z));
  1875. }
  1876. if (gpr > tmp) {
  1877. snd_BUG();
  1878. err = -EIO;
  1879. goto __err;
  1880. }
  1881. if (i > SND_EMU10K1_GPR_CONTROLS) {
  1882. snd_BUG();
  1883. err = -EIO;
  1884. goto __err;
  1885. }
  1886. /* clear remaining instruction memory */
  1887. while (ptr < 0x200)
  1888. OP(icode, &ptr, iACC3, C_00000000, C_00000000, C_00000000, C_00000000);
  1889. if ((err = snd_emu10k1_fx8010_tram_setup(emu, ipcm->buffer_size)) < 0)
  1890. goto __err;
  1891. seg = snd_enter_user();
  1892. icode->gpr_add_control_count = i;
  1893. icode->gpr_add_controls = (struct snd_emu10k1_fx8010_control_gpr __user *)controls;
  1894. err = snd_emu10k1_icode_poke(emu, icode);
  1895. snd_leave_user(seg);
  1896. if (err >= 0)
  1897. err = snd_emu10k1_ipcm_poke(emu, ipcm);
  1898. __err:
  1899. kfree(ipcm);
  1900. kfree(controls);
  1901. if (icode != NULL) {
  1902. kfree((void __force *)icode->gpr_map);
  1903. kfree(icode);
  1904. }
  1905. return err;
  1906. }
  1907. int __devinit snd_emu10k1_init_efx(struct snd_emu10k1 *emu)
  1908. {
  1909. spin_lock_init(&emu->fx8010.irq_lock);
  1910. INIT_LIST_HEAD(&emu->fx8010.gpr_ctl);
  1911. if (emu->audigy)
  1912. return _snd_emu10k1_audigy_init_efx(emu);
  1913. else
  1914. return _snd_emu10k1_init_efx(emu);
  1915. }
  1916. void snd_emu10k1_free_efx(struct snd_emu10k1 *emu)
  1917. {
  1918. /* stop processor */
  1919. if (emu->audigy)
  1920. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg = A_DBG_SINGLE_STEP);
  1921. else
  1922. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg = EMU10K1_DBG_SINGLE_STEP);
  1923. }
  1924. #if 0 // FIXME: who use them?
  1925. int snd_emu10k1_fx8010_tone_control_activate(struct snd_emu10k1 *emu, int output)
  1926. {
  1927. if (output < 0 || output >= 6)
  1928. return -EINVAL;
  1929. snd_emu10k1_ptr_write(emu, emu->gpr_base + 0x94 + output, 0, 1);
  1930. return 0;
  1931. }
  1932. int snd_emu10k1_fx8010_tone_control_deactivate(struct snd_emu10k1 *emu, int output)
  1933. {
  1934. if (output < 0 || output >= 6)
  1935. return -EINVAL;
  1936. snd_emu10k1_ptr_write(emu, emu->gpr_base + 0x94 + output, 0, 0);
  1937. return 0;
  1938. }
  1939. #endif
  1940. int snd_emu10k1_fx8010_tram_setup(struct snd_emu10k1 *emu, u32 size)
  1941. {
  1942. u8 size_reg = 0;
  1943. /* size is in samples */
  1944. if (size != 0) {
  1945. size = (size - 1) >> 13;
  1946. while (size) {
  1947. size >>= 1;
  1948. size_reg++;
  1949. }
  1950. size = 0x2000 << size_reg;
  1951. }
  1952. if ((emu->fx8010.etram_pages.bytes / 2) == size)
  1953. return 0;
  1954. spin_lock_irq(&emu->emu_lock);
  1955. outl(HCFG_LOCKTANKCACHE_MASK | inl(emu->port + HCFG), emu->port + HCFG);
  1956. spin_unlock_irq(&emu->emu_lock);
  1957. snd_emu10k1_ptr_write(emu, TCB, 0, 0);
  1958. snd_emu10k1_ptr_write(emu, TCBS, 0, 0);
  1959. if (emu->fx8010.etram_pages.area != NULL) {
  1960. snd_dma_free_pages(&emu->fx8010.etram_pages);
  1961. emu->fx8010.etram_pages.area = NULL;
  1962. emu->fx8010.etram_pages.bytes = 0;
  1963. }
  1964. if (size > 0) {
  1965. if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(emu->pci),
  1966. size * 2, &emu->fx8010.etram_pages) < 0)
  1967. return -ENOMEM;
  1968. memset(emu->fx8010.etram_pages.area, 0, size * 2);
  1969. snd_emu10k1_ptr_write(emu, TCB, 0, emu->fx8010.etram_pages.addr);
  1970. snd_emu10k1_ptr_write(emu, TCBS, 0, size_reg);
  1971. spin_lock_irq(&emu->emu_lock);
  1972. outl(inl(emu->port + HCFG) & ~HCFG_LOCKTANKCACHE_MASK, emu->port + HCFG);
  1973. spin_unlock_irq(&emu->emu_lock);
  1974. }
  1975. return 0;
  1976. }
  1977. static int snd_emu10k1_fx8010_open(struct snd_hwdep * hw, struct file *file)
  1978. {
  1979. return 0;
  1980. }
  1981. static void copy_string(char *dst, char *src, char *null, int idx)
  1982. {
  1983. if (src == NULL)
  1984. sprintf(dst, "%s %02X", null, idx);
  1985. else
  1986. strcpy(dst, src);
  1987. }
  1988. static int snd_emu10k1_fx8010_info(struct snd_emu10k1 *emu,
  1989. struct snd_emu10k1_fx8010_info *info)
  1990. {
  1991. char **fxbus, **extin, **extout;
  1992. unsigned short fxbus_mask, extin_mask, extout_mask;
  1993. int res;
  1994. memset(info, 0, sizeof(info));
  1995. info->internal_tram_size = emu->fx8010.itram_size;
  1996. info->external_tram_size = emu->fx8010.etram_pages.bytes / 2;
  1997. fxbus = fxbuses;
  1998. extin = emu->audigy ? audigy_ins : creative_ins;
  1999. extout = emu->audigy ? audigy_outs : creative_outs;
  2000. fxbus_mask = emu->fx8010.fxbus_mask;
  2001. extin_mask = emu->fx8010.extin_mask;
  2002. extout_mask = emu->fx8010.extout_mask;
  2003. for (res = 0; res < 16; res++, fxbus++, extin++, extout++) {
  2004. copy_string(info->fxbus_names[res], fxbus_mask & (1 << res) ? *fxbus : NULL, "FXBUS", res);
  2005. copy_string(info->extin_names[res], extin_mask & (1 << res) ? *extin : NULL, "Unused", res);
  2006. copy_string(info->extout_names[res], extout_mask & (1 << res) ? *extout : NULL, "Unused", res);
  2007. }
  2008. for (res = 16; res < 32; res++, extout++)
  2009. copy_string(info->extout_names[res], extout_mask & (1 << res) ? *extout : NULL, "Unused", res);
  2010. info->gpr_controls = emu->fx8010.gpr_count;
  2011. return 0;
  2012. }
  2013. static int snd_emu10k1_fx8010_ioctl(struct snd_hwdep * hw, struct file *file, unsigned int cmd, unsigned long arg)
  2014. {
  2015. struct snd_emu10k1 *emu = hw->private_data;
  2016. struct snd_emu10k1_fx8010_info *info;
  2017. struct snd_emu10k1_fx8010_code *icode;
  2018. struct snd_emu10k1_fx8010_pcm_rec *ipcm;
  2019. unsigned int addr;
  2020. void __user *argp = (void __user *)arg;
  2021. int res;
  2022. switch (cmd) {
  2023. case SNDRV_EMU10K1_IOCTL_INFO:
  2024. info = kmalloc(sizeof(*info), GFP_KERNEL);
  2025. if (!info)
  2026. return -ENOMEM;
  2027. if ((res = snd_emu10k1_fx8010_info(emu, info)) < 0) {
  2028. kfree(info);
  2029. return res;
  2030. }
  2031. if (copy_to_user(argp, info, sizeof(*info))) {
  2032. kfree(info);
  2033. return -EFAULT;
  2034. }
  2035. kfree(info);
  2036. return 0;
  2037. case SNDRV_EMU10K1_IOCTL_CODE_POKE:
  2038. if (!capable(CAP_SYS_ADMIN))
  2039. return -EPERM;
  2040. icode = kmalloc(sizeof(*icode), GFP_KERNEL);
  2041. if (icode == NULL)
  2042. return -ENOMEM;
  2043. if (copy_from_user(icode, argp, sizeof(*icode))) {
  2044. kfree(icode);
  2045. return -EFAULT;
  2046. }
  2047. res = snd_emu10k1_icode_poke(emu, icode);
  2048. kfree(icode);
  2049. return res;
  2050. case SNDRV_EMU10K1_IOCTL_CODE_PEEK:
  2051. icode = kmalloc(sizeof(*icode), GFP_KERNEL);
  2052. if (icode == NULL)
  2053. return -ENOMEM;
  2054. if (copy_from_user(icode, argp, sizeof(*icode))) {
  2055. kfree(icode);
  2056. return -EFAULT;
  2057. }
  2058. res = snd_emu10k1_icode_peek(emu, icode);
  2059. if (res == 0 && copy_to_user(argp, icode, sizeof(*icode))) {
  2060. kfree(icode);
  2061. return -EFAULT;
  2062. }
  2063. kfree(icode);
  2064. return res;
  2065. case SNDRV_EMU10K1_IOCTL_PCM_POKE:
  2066. ipcm = kmalloc(sizeof(*ipcm), GFP_KERNEL);
  2067. if (ipcm == NULL)
  2068. return -ENOMEM;
  2069. if (copy_from_user(ipcm, argp, sizeof(*ipcm))) {
  2070. kfree(ipcm);
  2071. return -EFAULT;
  2072. }
  2073. res = snd_emu10k1_ipcm_poke(emu, ipcm);
  2074. kfree(ipcm);
  2075. return res;
  2076. case SNDRV_EMU10K1_IOCTL_PCM_PEEK:
  2077. ipcm = kzalloc(sizeof(*ipcm), GFP_KERNEL);
  2078. if (ipcm == NULL)
  2079. return -ENOMEM;
  2080. if (copy_from_user(ipcm, argp, sizeof(*ipcm))) {
  2081. kfree(ipcm);
  2082. return -EFAULT;
  2083. }
  2084. res = snd_emu10k1_ipcm_peek(emu, ipcm);
  2085. if (res == 0 && copy_to_user(argp, ipcm, sizeof(*ipcm))) {
  2086. kfree(ipcm);
  2087. return -EFAULT;
  2088. }
  2089. kfree(ipcm);
  2090. return res;
  2091. case SNDRV_EMU10K1_IOCTL_TRAM_SETUP:
  2092. if (!capable(CAP_SYS_ADMIN))
  2093. return -EPERM;
  2094. if (get_user(addr, (unsigned int __user *)argp))
  2095. return -EFAULT;
  2096. mutex_lock(&emu->fx8010.lock);
  2097. res = snd_emu10k1_fx8010_tram_setup(emu, addr);
  2098. mutex_unlock(&emu->fx8010.lock);
  2099. return res;
  2100. case SNDRV_EMU10K1_IOCTL_STOP:
  2101. if (!capable(CAP_SYS_ADMIN))
  2102. return -EPERM;
  2103. if (emu->audigy)
  2104. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg |= A_DBG_SINGLE_STEP);
  2105. else
  2106. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg |= EMU10K1_DBG_SINGLE_STEP);
  2107. return 0;
  2108. case SNDRV_EMU10K1_IOCTL_CONTINUE:
  2109. if (!capable(CAP_SYS_ADMIN))
  2110. return -EPERM;
  2111. if (emu->audigy)
  2112. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg = 0);
  2113. else
  2114. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg = 0);
  2115. return 0;
  2116. case SNDRV_EMU10K1_IOCTL_ZERO_TRAM_COUNTER:
  2117. if (!capable(CAP_SYS_ADMIN))
  2118. return -EPERM;
  2119. if (emu->audigy)
  2120. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg | A_DBG_ZC);
  2121. else
  2122. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg | EMU10K1_DBG_ZC);
  2123. udelay(10);
  2124. if (emu->audigy)
  2125. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg);
  2126. else
  2127. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg);
  2128. return 0;
  2129. case SNDRV_EMU10K1_IOCTL_SINGLE_STEP:
  2130. if (!capable(CAP_SYS_ADMIN))
  2131. return -EPERM;
  2132. if (get_user(addr, (unsigned int __user *)argp))
  2133. return -EFAULT;
  2134. if (addr > 0x1ff)
  2135. return -EINVAL;
  2136. if (emu->audigy)
  2137. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg |= A_DBG_SINGLE_STEP | addr);
  2138. else
  2139. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg |= EMU10K1_DBG_SINGLE_STEP | addr);
  2140. udelay(10);
  2141. if (emu->audigy)
  2142. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg |= A_DBG_SINGLE_STEP | A_DBG_STEP_ADDR | addr);
  2143. else
  2144. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg |= EMU10K1_DBG_SINGLE_STEP | EMU10K1_DBG_STEP | addr);
  2145. return 0;
  2146. case SNDRV_EMU10K1_IOCTL_DBG_READ:
  2147. if (emu->audigy)
  2148. addr = snd_emu10k1_ptr_read(emu, A_DBG, 0);
  2149. else
  2150. addr = snd_emu10k1_ptr_read(emu, DBG, 0);
  2151. if (put_user(addr, (unsigned int __user *)argp))
  2152. return -EFAULT;
  2153. return 0;
  2154. }
  2155. return -ENOTTY;
  2156. }
  2157. static int snd_emu10k1_fx8010_release(struct snd_hwdep * hw, struct file *file)
  2158. {
  2159. return 0;
  2160. }
  2161. int __devinit snd_emu10k1_fx8010_new(struct snd_emu10k1 *emu, int device, struct snd_hwdep ** rhwdep)
  2162. {
  2163. struct snd_hwdep *hw;
  2164. int err;
  2165. if (rhwdep)
  2166. *rhwdep = NULL;
  2167. if ((err = snd_hwdep_new(emu->card, "FX8010", device, &hw)) < 0)
  2168. return err;
  2169. strcpy(hw->name, "EMU10K1 (FX8010)");
  2170. hw->iface = SNDRV_HWDEP_IFACE_EMU10K1;
  2171. hw->ops.open = snd_emu10k1_fx8010_open;
  2172. hw->ops.ioctl = snd_emu10k1_fx8010_ioctl;
  2173. hw->ops.release = snd_emu10k1_fx8010_release;
  2174. hw->private_data = emu;
  2175. if (rhwdep)
  2176. *rhwdep = hw;
  2177. return 0;
  2178. }
  2179. #ifdef CONFIG_PM
  2180. int __devinit snd_emu10k1_efx_alloc_pm_buffer(struct snd_emu10k1 *emu)
  2181. {
  2182. int len;
  2183. len = emu->audigy ? 0x200 : 0x100;
  2184. emu->saved_gpr = kmalloc(len * 4, GFP_KERNEL);
  2185. if (! emu->saved_gpr)
  2186. return -ENOMEM;
  2187. len = emu->audigy ? 0x100 : 0xa0;
  2188. emu->tram_val_saved = kmalloc(len * 4, GFP_KERNEL);
  2189. emu->tram_addr_saved = kmalloc(len * 4, GFP_KERNEL);
  2190. if (! emu->tram_val_saved || ! emu->tram_addr_saved)
  2191. return -ENOMEM;
  2192. len = emu->audigy ? 2 * 1024 : 2 * 512;
  2193. emu->saved_icode = vmalloc(len * 4);
  2194. if (! emu->saved_icode)
  2195. return -ENOMEM;
  2196. return 0;
  2197. }
  2198. void snd_emu10k1_efx_free_pm_buffer(struct snd_emu10k1 *emu)
  2199. {
  2200. kfree(emu->saved_gpr);
  2201. kfree(emu->tram_val_saved);
  2202. kfree(emu->tram_addr_saved);
  2203. vfree(emu->saved_icode);
  2204. }
  2205. /*
  2206. * save/restore GPR, TRAM and codes
  2207. */
  2208. void snd_emu10k1_efx_suspend(struct snd_emu10k1 *emu)
  2209. {
  2210. int i, len;
  2211. len = emu->audigy ? 0x200 : 0x100;
  2212. for (i = 0; i < len; i++)
  2213. emu->saved_gpr[i] = snd_emu10k1_ptr_read(emu, emu->gpr_base + i, 0);
  2214. len = emu->audigy ? 0x100 : 0xa0;
  2215. for (i = 0; i < len; i++) {
  2216. emu->tram_val_saved[i] = snd_emu10k1_ptr_read(emu, TANKMEMDATAREGBASE + i, 0);
  2217. emu->tram_addr_saved[i] = snd_emu10k1_ptr_read(emu, TANKMEMADDRREGBASE + i, 0);
  2218. if (emu->audigy) {
  2219. emu->tram_addr_saved[i] >>= 12;
  2220. emu->tram_addr_saved[i] |=
  2221. snd_emu10k1_ptr_read(emu, A_TANKMEMCTLREGBASE + i, 0) << 20;
  2222. }
  2223. }
  2224. len = emu->audigy ? 2 * 1024 : 2 * 512;
  2225. for (i = 0; i < len; i++)
  2226. emu->saved_icode[i] = snd_emu10k1_efx_read(emu, i);
  2227. }
  2228. void snd_emu10k1_efx_resume(struct snd_emu10k1 *emu)
  2229. {
  2230. int i, len;
  2231. /* set up TRAM */
  2232. if (emu->fx8010.etram_pages.bytes > 0) {
  2233. unsigned size, size_reg = 0;
  2234. size = emu->fx8010.etram_pages.bytes / 2;
  2235. size = (size - 1) >> 13;
  2236. while (size) {
  2237. size >>= 1;
  2238. size_reg++;
  2239. }
  2240. outl(HCFG_LOCKTANKCACHE_MASK | inl(emu->port + HCFG), emu->port + HCFG);
  2241. snd_emu10k1_ptr_write(emu, TCB, 0, emu->fx8010.etram_pages.addr);
  2242. snd_emu10k1_ptr_write(emu, TCBS, 0, size_reg);
  2243. outl(inl(emu->port + HCFG) & ~HCFG_LOCKTANKCACHE_MASK, emu->port + HCFG);
  2244. }
  2245. if (emu->audigy)
  2246. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg | A_DBG_SINGLE_STEP);
  2247. else
  2248. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg | EMU10K1_DBG_SINGLE_STEP);
  2249. len = emu->audigy ? 0x200 : 0x100;
  2250. for (i = 0; i < len; i++)
  2251. snd_emu10k1_ptr_write(emu, emu->gpr_base + i, 0, emu->saved_gpr[i]);
  2252. len = emu->audigy ? 0x100 : 0xa0;
  2253. for (i = 0; i < len; i++) {
  2254. snd_emu10k1_ptr_write(emu, TANKMEMDATAREGBASE + i, 0,
  2255. emu->tram_val_saved[i]);
  2256. if (! emu->audigy)
  2257. snd_emu10k1_ptr_write(emu, TANKMEMADDRREGBASE + i, 0,
  2258. emu->tram_addr_saved[i]);
  2259. else {
  2260. snd_emu10k1_ptr_write(emu, TANKMEMADDRREGBASE + i, 0,
  2261. emu->tram_addr_saved[i] << 12);
  2262. snd_emu10k1_ptr_write(emu, TANKMEMADDRREGBASE + i, 0,
  2263. emu->tram_addr_saved[i] >> 20);
  2264. }
  2265. }
  2266. len = emu->audigy ? 2 * 1024 : 2 * 512;
  2267. for (i = 0; i < len; i++)
  2268. snd_emu10k1_efx_write(emu, i, emu->saved_icode[i]);
  2269. /* start FX processor when the DSP code is updated */
  2270. if (emu->audigy)
  2271. snd_emu10k1_ptr_write(emu, A_DBG, 0, emu->fx8010.dbg);
  2272. else
  2273. snd_emu10k1_ptr_write(emu, DBG, 0, emu->fx8010.dbg);
  2274. }
  2275. #endif