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rbtx4938.h

rbtx4938.h 9.1 KB
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  1. /*
    2. 

  2.  * linux/include/asm-mips/tx4938/rbtx4938.h
    3. 

  3.  * Definitions for TX4937/TX4938
    4. 

  4.  *
    5. 

  5.  * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
    6. 

  6.  * terms of the GNU General Public License version 2. This program is
    7. 

  7.  * licensed "as is" without any warranty of any kind, whether express
    8. 

  8.  * or implied.
    9. 

  9.  *
    10. 

  10.  * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
    11. 

  11.  */
    12. 

  12. #ifndef __ASM_TX_BOARDS_RBTX4938_H
    13. 

  13. #define __ASM_TX_BOARDS_RBTX4938_H
    14. 

  14. 

  15. #include <asm/addrspace.h>
    16. 

  16. #include <asm/tx4938/tx4938.h>
    17. 

  17. 

  18. /* CS */
    19. 

  19. #define RBTX4938_CE0	0x1c000000	/* 64M */
    20. 

  20. #define RBTX4938_CE2	0x17f00000	/* 1M */
    21. 

  21. 

  22. /* Address map */
    23. 

  23. #define RBTX4938_FPGA_REG_ADDR	(KSEG1 + RBTX4938_CE2 + 0x00000000)
    24. 

  24. #define RBTX4938_FPGA_REV_ADDR	(KSEG1 + RBTX4938_CE2 + 0x00000002)
    25. 

  25. #define RBTX4938_CONFIG1_ADDR	(KSEG1 + RBTX4938_CE2 + 0x00000004)
    26. 

  26. #define RBTX4938_CONFIG2_ADDR	(KSEG1 + RBTX4938_CE2 + 0x00000006)
    27. 

  27. #define RBTX4938_CONFIG3_ADDR	(KSEG1 + RBTX4938_CE2 + 0x00000008)
    28. 

  28. #define RBTX4938_LED_ADDR	(KSEG1 + RBTX4938_CE2 + 0x00001000)
    29. 

  29. #define RBTX4938_DIPSW_ADDR	(KSEG1 + RBTX4938_CE2 + 0x00001002)
    30. 

  30. #define RBTX4938_BDIPSW_ADDR	(KSEG1 + RBTX4938_CE2 + 0x00001004)
    31. 

  31. #define RBTX4938_IMASK_ADDR	(KSEG1 + RBTX4938_CE2 + 0x00002000)
    32. 

  32. #define RBTX4938_IMASK2_ADDR	(KSEG1 + RBTX4938_CE2 + 0x00002002)
    33. 

  33. #define RBTX4938_INTPOL_ADDR	(KSEG1 + RBTX4938_CE2 + 0x00002004)
    34. 

  34. #define RBTX4938_ISTAT_ADDR	(KSEG1 + RBTX4938_CE2 + 0x00002006)
    35. 

  35. #define RBTX4938_ISTAT2_ADDR	(KSEG1 + RBTX4938_CE2 + 0x00002008)
    36. 

  36. #define RBTX4938_IMSTAT_ADDR	(KSEG1 + RBTX4938_CE2 + 0x0000200a)
    37. 

  37. #define RBTX4938_IMSTAT2_ADDR	(KSEG1 + RBTX4938_CE2 + 0x0000200c)
    38. 

  38. #define RBTX4938_SOFTINT_ADDR	(KSEG1 + RBTX4938_CE2 + 0x00003000)
    39. 

  39. #define RBTX4938_PIOSEL_ADDR	(KSEG1 + RBTX4938_CE2 + 0x00005000)
    40. 

  40. #define RBTX4938_SPICS_ADDR	(KSEG1 + RBTX4938_CE2 + 0x00005002)
    41. 

  41. #define RBTX4938_SFPWR_ADDR	(KSEG1 + RBTX4938_CE2 + 0x00005008)
    42. 

  42. #define RBTX4938_SFVOL_ADDR	(KSEG1 + RBTX4938_CE2 + 0x0000500a)
    43. 

  43. #define RBTX4938_SOFTRESET_ADDR	(KSEG1 + RBTX4938_CE2 + 0x00007000)
    44. 

  44. #define RBTX4938_SOFTRESETLOCK_ADDR	(KSEG1 + RBTX4938_CE2 + 0x00007002)
    45. 

  45. #define RBTX4938_PCIRESET_ADDR	(KSEG1 + RBTX4938_CE2 + 0x00007004)
    46. 

  46. #define RBTX4938_ETHER_BASE	(KSEG1 + RBTX4938_CE2 + 0x00020000)
    47. 

  47. 

  48. /* Ethernet port address (Jumperless Mode (W12:Open)) */
    49. 

  49. #define RBTX4938_ETHER_ADDR	(RBTX4938_ETHER_BASE + 0x280)
    50. 

  50. 

  51. /* bits for ISTAT/IMASK/IMSTAT */
    52. 

  52. #define RBTX4938_INTB_PCID	0
    53. 

  53. #define RBTX4938_INTB_PCIC	1
    54. 

  54. #define RBTX4938_INTB_PCIB	2
    55. 

  55. #define RBTX4938_INTB_PCIA	3
    56. 

  56. #define RBTX4938_INTB_RTC	4
    57. 

  57. #define RBTX4938_INTB_ATA	5
    58. 

  58. #define RBTX4938_INTB_MODEM	6
    59. 

  59. #define RBTX4938_INTB_SWINT	7
    60. 

  60. #define RBTX4938_INTF_PCID	(1 << RBTX4938_INTB_PCID)
    61. 

  61. #define RBTX4938_INTF_PCIC	(1 << RBTX4938_INTB_PCIC)
    62. 

  62. #define RBTX4938_INTF_PCIB	(1 << RBTX4938_INTB_PCIB)
    63. 

  63. #define RBTX4938_INTF_PCIA	(1 << RBTX4938_INTB_PCIA)
    64. 

  64. #define RBTX4938_INTF_RTC	(1 << RBTX4938_INTB_RTC)
    65. 

  65. #define RBTX4938_INTF_ATA	(1 << RBTX4938_INTB_ATA)
    66. 

  66. #define RBTX4938_INTF_MODEM	(1 << RBTX4938_INTB_MODEM)
    67. 

  67. #define RBTX4938_INTF_SWINT	(1 << RBTX4938_INTB_SWINT)
    68. 

  68. 

  69. #define rbtx4938_fpga_rev_ptr	\
    70. 

  70. 	((volatile unsigned char *)RBTX4938_FPGA_REV_ADDR)
    71. 

  71. #define rbtx4938_led_ptr	\
    72. 

  72. 	((volatile unsigned char *)RBTX4938_LED_ADDR)
    73. 

  73. #define rbtx4938_dipsw_ptr	\
    74. 

  74. 	((volatile unsigned char *)RBTX4938_DIPSW_ADDR)
    75. 

  75. #define rbtx4938_bdipsw_ptr	\
    76. 

  76. 	((volatile unsigned char *)RBTX4938_BDIPSW_ADDR)
    77. 

  77. #define rbtx4938_imask_ptr	\
    78. 

  78. 	((volatile unsigned char *)RBTX4938_IMASK_ADDR)
    79. 

  79. #define rbtx4938_imask2_ptr	\
    80. 

  80. 	((volatile unsigned char *)RBTX4938_IMASK2_ADDR)
    81. 

  81. #define rbtx4938_intpol_ptr	\
    82. 

  82. 	((volatile unsigned char *)RBTX4938_INTPOL_ADDR)
    83. 

  83. #define rbtx4938_istat_ptr	\
    84. 

  84. 	((volatile unsigned char *)RBTX4938_ISTAT_ADDR)
    85. 

  85. #define rbtx4938_istat2_ptr	\
    86. 

  86. 	((volatile unsigned char *)RBTX4938_ISTAT2_ADDR)
    87. 

  87. #define rbtx4938_imstat_ptr	\
    88. 

  88. 	((volatile unsigned char *)RBTX4938_IMSTAT_ADDR)
    89. 

  89. #define rbtx4938_imstat2_ptr	\
    90. 

  90. 	((volatile unsigned char *)RBTX4938_IMSTAT2_ADDR)
    91. 

  91. #define rbtx4938_softint_ptr	\
    92. 

  92. 	((volatile unsigned char *)RBTX4938_SOFTINT_ADDR)
    93. 

  93. #define rbtx4938_piosel_ptr	\
    94. 

  94. 	((volatile unsigned char *)RBTX4938_PIOSEL_ADDR)
    95. 

  95. #define rbtx4938_spics_ptr	\
    96. 

  96. 	((volatile unsigned char *)RBTX4938_SPICS_ADDR)
    97. 

  97. #define rbtx4938_sfpwr_ptr	\
    98. 

  98. 	((volatile unsigned char *)RBTX4938_SFPWR_ADDR)
    99. 

  99. #define rbtx4938_sfvol_ptr	\
    100. 

  100. 	((volatile unsigned char *)RBTX4938_SFVOL_ADDR)
    101. 

  101. #define rbtx4938_softreset_ptr	\
    102. 

  102. 	((volatile unsigned char *)RBTX4938_SOFTRESET_ADDR)
    103. 

  103. #define rbtx4938_softresetlock_ptr	\
    104. 

  104. 	((volatile unsigned char *)RBTX4938_SOFTRESETLOCK_ADDR)
    105. 

  105. #define rbtx4938_pcireset_ptr	\
    106. 

  106. 	((volatile unsigned char *)RBTX4938_PCIRESET_ADDR)
    107. 

  107. 

  108. /* SPI */
    109. 

  109. #define RBTX4938_SEEPROM1_CHIPID	0
    110. 

  110. #define RBTX4938_SEEPROM2_CHIPID	1
    111. 

  111. #define RBTX4938_SEEPROM3_CHIPID	2
    112. 

  112. #define RBTX4938_SRTC_CHIPID	3
    113. 

  113. 

  114. /*
    115. 

  115.  * IRQ mappings
    116. 

  116.  */
    117. 

  117. 

  118. #define RBTX4938_SOFT_INT0	0	/* not used */
    119. 

  119. #define RBTX4938_SOFT_INT1	1	/* not used */
    120. 

  120. #define RBTX4938_IRC_INT	2
    121. 

  121. #define RBTX4938_TIMER_INT	7
    122. 

  122. 

  123. /* These are the virtual IRQ numbers, we divide all IRQ's into
    124. 

  124.  * 'spaces', the 'space' determines where and how to enable/disable
    125. 

  125.  * that particular IRQ on an RBTX4938 machine.  Add new 'spaces' as new
    126. 

  126.  * IRQ hardware is supported.
    127. 

  127.  */
    128. 

  128. #define RBTX4938_NR_IRQ_LOCAL	8
    129. 

  129. #define RBTX4938_NR_IRQ_IRC	32	/* On-Chip IRC */
    130. 

  130. #define RBTX4938_NR_IRQ_IOC	8
    131. 

  131. 

  132. #define MI8259_IRQ_ISA_RAW_BEG   0	/* optional backplane i8259 */
    133. 

  133. #define MI8259_IRQ_ISA_RAW_END  15
    134. 

  134. #define TX4938_IRQ_CP0_RAW_BEG   0	/* tx4938 cpu built-in cp0 */
    135. 

  135. #define TX4938_IRQ_CP0_RAW_END   7
    136. 

  136. #define TX4938_IRQ_PIC_RAW_BEG   0	/* tx4938 cpu build-in pic */
    137. 

  137. #define TX4938_IRQ_PIC_RAW_END  31
    138. 

  138. 

  139. #define MI8259_IRQ_ISA_BEG                          MI8259_IRQ_ISA_RAW_BEG	/*  0 */
    140. 

  140. #define MI8259_IRQ_ISA_END                          MI8259_IRQ_ISA_RAW_END	/* 15 */
    141. 

  141. 

  142. #define TX4938_IRQ_CP0_BEG  ((MI8259_IRQ_ISA_END+1)+TX4938_IRQ_CP0_RAW_BEG)	/* 16 */
    143. 

  143. #define TX4938_IRQ_CP0_END  ((MI8259_IRQ_ISA_END+1)+TX4938_IRQ_CP0_RAW_END)	/* 23 */
    144. 

  144. 

  145. #define TX4938_IRQ_PIC_BEG  ((TX4938_IRQ_CP0_END+1)+TX4938_IRQ_PIC_RAW_BEG)	/* 24 */
    146. 

  146. #define TX4938_IRQ_PIC_END  ((TX4938_IRQ_CP0_END+1)+TX4938_IRQ_PIC_RAW_END)	/* 55 */
    147. 

  147. #define TX4938_IRQ_NEST_EXT_ON_PIC  (TX4938_IRQ_PIC_BEG+2)
    148. 

  148. #define TX4938_IRQ_NEST_PIC_ON_CP0  (TX4938_IRQ_CP0_BEG+2)
    149. 

  149. #define TX4938_IRQ_USER0            (TX4938_IRQ_CP0_BEG+0)
    150. 

  150. #define TX4938_IRQ_USER1            (TX4938_IRQ_CP0_BEG+1)
    151. 

  151. #define TX4938_IRQ_CPU_TIMER        (TX4938_IRQ_CP0_BEG+7)
    152. 

  152. 

  153. #define TOSHIBA_RBTX4938_IRQ_IOC_RAW_BEG   0
    154. 

  154. #define TOSHIBA_RBTX4938_IRQ_IOC_RAW_END   7
    155. 

  155. 

  156. #define TOSHIBA_RBTX4938_IRQ_IOC_BEG  ((TX4938_IRQ_PIC_END+1)+TOSHIBA_RBTX4938_IRQ_IOC_RAW_BEG) /* 56 */
    157. 

  157. #define TOSHIBA_RBTX4938_IRQ_IOC_END  ((TX4938_IRQ_PIC_END+1)+TOSHIBA_RBTX4938_IRQ_IOC_RAW_END) /* 63 */
    158. 

  158. #define RBTX4938_IRQ_LOCAL	TX4938_IRQ_CP0_BEG
    159. 

  159. #define RBTX4938_IRQ_IRC	(RBTX4938_IRQ_LOCAL + RBTX4938_NR_IRQ_LOCAL)
    160. 

  160. #define RBTX4938_IRQ_IOC	(RBTX4938_IRQ_IRC + RBTX4938_NR_IRQ_IRC)
    161. 

  161. #define RBTX4938_IRQ_END	(RBTX4938_IRQ_IOC + RBTX4938_NR_IRQ_IOC)
    162. 

  162. 

  163. #define RBTX4938_IRQ_LOCAL_SOFT0	(RBTX4938_IRQ_LOCAL + RBTX4938_SOFT_INT0)
    164. 

  164. #define RBTX4938_IRQ_LOCAL_SOFT1	(RBTX4938_IRQ_LOCAL + RBTX4938_SOFT_INT1)
    165. 

  165. #define RBTX4938_IRQ_LOCAL_IRC	(RBTX4938_IRQ_LOCAL + RBTX4938_IRC_INT)
    166. 

  166. #define RBTX4938_IRQ_LOCAL_TIMER	(RBTX4938_IRQ_LOCAL + RBTX4938_TIMER_INT)
    167. 

  167. #define RBTX4938_IRQ_IRC_ECCERR	(RBTX4938_IRQ_IRC + TX4938_IR_ECCERR)
    168. 

  168. #define RBTX4938_IRQ_IRC_WTOERR	(RBTX4938_IRQ_IRC + TX4938_IR_WTOERR)
    169. 

  169. #define RBTX4938_IRQ_IRC_INT(n)	(RBTX4938_IRQ_IRC + TX4938_IR_INT(n))
    170. 

  170. #define RBTX4938_IRQ_IRC_SIO(n)	(RBTX4938_IRQ_IRC + TX4938_IR_SIO(n))
    171. 

  171. #define RBTX4938_IRQ_IRC_DMA(ch,n)	(RBTX4938_IRQ_IRC + TX4938_IR_DMA(ch,n))
    172. 

  172. #define RBTX4938_IRQ_IRC_PIO	(RBTX4938_IRQ_IRC + TX4938_IR_PIO)
    173. 

  173. #define RBTX4938_IRQ_IRC_PDMAC	(RBTX4938_IRQ_IRC + TX4938_IR_PDMAC)
    174. 

  174. #define RBTX4938_IRQ_IRC_PCIC	(RBTX4938_IRQ_IRC + TX4938_IR_PCIC)
    175. 

  175. #define RBTX4938_IRQ_IRC_TMR(n)	(RBTX4938_IRQ_IRC + TX4938_IR_TMR(n))
    176. 

  176. #define RBTX4938_IRQ_IRC_NDFMC	(RBTX4938_IRQ_IRC + TX4938_IR_NDFMC)
    177. 

  177. #define RBTX4938_IRQ_IRC_PCIERR	(RBTX4938_IRQ_IRC + TX4938_IR_PCIERR)
    178. 

  178. #define RBTX4938_IRQ_IRC_PCIPME	(RBTX4938_IRQ_IRC + TX4938_IR_PCIPME)
    179. 

  179. #define RBTX4938_IRQ_IRC_ACLC	(RBTX4938_IRQ_IRC + TX4938_IR_ACLC)
    180. 

  180. #define RBTX4938_IRQ_IRC_ACLCPME	(RBTX4938_IRQ_IRC + TX4938_IR_ACLCPME)
    181. 

  181. #define RBTX4938_IRQ_IRC_PCIC1	(RBTX4938_IRQ_IRC + TX4938_IR_PCIC1)
    182. 

  182. #define RBTX4938_IRQ_IRC_SPI	(RBTX4938_IRQ_IRC + TX4938_IR_SPI)
    183. 

  183. #define RBTX4938_IRQ_IOC_PCID	(RBTX4938_IRQ_IOC + RBTX4938_INTB_PCID)
    184. 

  184. #define RBTX4938_IRQ_IOC_PCIC	(RBTX4938_IRQ_IOC + RBTX4938_INTB_PCIC)
    185. 

  185. #define RBTX4938_IRQ_IOC_PCIB	(RBTX4938_IRQ_IOC + RBTX4938_INTB_PCIB)
    186. 

  186. #define RBTX4938_IRQ_IOC_PCIA	(RBTX4938_IRQ_IOC + RBTX4938_INTB_PCIA)
    187. 

  187. #define RBTX4938_IRQ_IOC_RTC	(RBTX4938_IRQ_IOC + RBTX4938_INTB_RTC)
    188. 

  188. #define RBTX4938_IRQ_IOC_ATA	(RBTX4938_IRQ_IOC + RBTX4938_INTB_ATA)
    189. 

  189. #define RBTX4938_IRQ_IOC_MODEM	(RBTX4938_IRQ_IOC + RBTX4938_INTB_MODEM)
    190. 

  190. #define RBTX4938_IRQ_IOC_SWINT	(RBTX4938_IRQ_IOC + RBTX4938_INTB_SWINT)
    191. 

  191. 

  192. 

  193. /* IOC (PCI, etc) */
    194. 

  194. #define RBTX4938_IRQ_IOCINT	(TX4938_IRQ_NEST_EXT_ON_PIC)
    195. 

  195. /* Onboard 10M Ether */
    196. 

  196. #define RBTX4938_IRQ_ETHER	(TX4938_IRQ_NEST_EXT_ON_PIC + 1)
    197. 

  197. 

  198. #define RBTX4938_RTL_8019_BASE (RBTX4938_ETHER_ADDR - mips_io_port_base)
    199. 

  199. #define RBTX4938_RTL_8019_IRQ  (RBTX4938_IRQ_ETHER)
    200. 

  200. 

  201. /* IRCR : Int. Control */
    202. 

  202. #define TX4938_IRCR_LOW  0x00000000
    203. 

  203. #define TX4938_IRCR_HIGH 0x00000001
    204. 

  204. #define TX4938_IRCR_DOWN 0x00000002
    205. 

  205. #define TX4938_IRCR_UP   0x00000003
    206. 

  206. 

  207. #endif /* __ASM_TX_BOARDS_RBTX4938_H */
    208.