bitops.h 7.1 KB

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  1. #ifndef _M68KNOMMU_BITOPS_H
  2. #define _M68KNOMMU_BITOPS_H
  3. /*
  4. * Copyright 1992, Linus Torvalds.
  5. */
  6. #include <linux/compiler.h>
  7. #include <asm/byteorder.h> /* swab32 */
  8. #include <asm/system.h> /* save_flags */
  9. #ifdef __KERNEL__
  10. #include <asm-generic/bitops/ffs.h>
  11. #include <asm-generic/bitops/__ffs.h>
  12. #include <asm-generic/bitops/sched.h>
  13. #include <asm-generic/bitops/ffz.h>
  14. static __inline__ void set_bit(int nr, volatile unsigned long * addr)
  15. {
  16. #ifdef CONFIG_COLDFIRE
  17. __asm__ __volatile__ ("lea %0,%%a0; bset %1,(%%a0)"
  18. : "+m" (((volatile char *)addr)[(nr^31) >> 3])
  19. : "d" (nr)
  20. : "%a0", "cc");
  21. #else
  22. __asm__ __volatile__ ("bset %1,%0"
  23. : "+m" (((volatile char *)addr)[(nr^31) >> 3])
  24. : "di" (nr)
  25. : "cc");
  26. #endif
  27. }
  28. #define __set_bit(nr, addr) set_bit(nr, addr)
  29. /*
  30. * clear_bit() doesn't provide any barrier for the compiler.
  31. */
  32. #define smp_mb__before_clear_bit() barrier()
  33. #define smp_mb__after_clear_bit() barrier()
  34. static __inline__ void clear_bit(int nr, volatile unsigned long * addr)
  35. {
  36. #ifdef CONFIG_COLDFIRE
  37. __asm__ __volatile__ ("lea %0,%%a0; bclr %1,(%%a0)"
  38. : "+m" (((volatile char *)addr)[(nr^31) >> 3])
  39. : "d" (nr)
  40. : "%a0", "cc");
  41. #else
  42. __asm__ __volatile__ ("bclr %1,%0"
  43. : "+m" (((volatile char *)addr)[(nr^31) >> 3])
  44. : "di" (nr)
  45. : "cc");
  46. #endif
  47. }
  48. #define __clear_bit(nr, addr) clear_bit(nr, addr)
  49. static __inline__ void change_bit(int nr, volatile unsigned long * addr)
  50. {
  51. #ifdef CONFIG_COLDFIRE
  52. __asm__ __volatile__ ("lea %0,%%a0; bchg %1,(%%a0)"
  53. : "+m" (((volatile char *)addr)[(nr^31) >> 3])
  54. : "d" (nr)
  55. : "%a0", "cc");
  56. #else
  57. __asm__ __volatile__ ("bchg %1,%0"
  58. : "+m" (((volatile char *)addr)[(nr^31) >> 3])
  59. : "di" (nr)
  60. : "cc");
  61. #endif
  62. }
  63. #define __change_bit(nr, addr) change_bit(nr, addr)
  64. static __inline__ int test_and_set_bit(int nr, volatile unsigned long * addr)
  65. {
  66. char retval;
  67. #ifdef CONFIG_COLDFIRE
  68. __asm__ __volatile__ ("lea %1,%%a0; bset %2,(%%a0); sne %0"
  69. : "=d" (retval), "+m" (((volatile char *)addr)[(nr^31) >> 3])
  70. : "d" (nr)
  71. : "%a0");
  72. #else
  73. __asm__ __volatile__ ("bset %2,%1; sne %0"
  74. : "=d" (retval), "+m" (((volatile char *)addr)[(nr^31) >> 3])
  75. : "di" (nr)
  76. /* No clobber */);
  77. #endif
  78. return retval;
  79. }
  80. #define __test_and_set_bit(nr, addr) test_and_set_bit(nr, addr)
  81. static __inline__ int test_and_clear_bit(int nr, volatile unsigned long * addr)
  82. {
  83. char retval;
  84. #ifdef CONFIG_COLDFIRE
  85. __asm__ __volatile__ ("lea %1,%%a0; bclr %2,(%%a0); sne %0"
  86. : "=d" (retval), "+m" (((volatile char *)addr)[(nr^31) >> 3])
  87. : "d" (nr)
  88. : "%a0");
  89. #else
  90. __asm__ __volatile__ ("bclr %2,%1; sne %0"
  91. : "=d" (retval), "+m" (((volatile char *)addr)[(nr^31) >> 3])
  92. : "di" (nr)
  93. /* No clobber */);
  94. #endif
  95. return retval;
  96. }
  97. #define __test_and_clear_bit(nr, addr) test_and_clear_bit(nr, addr)
  98. static __inline__ int test_and_change_bit(int nr, volatile unsigned long * addr)
  99. {
  100. char retval;
  101. #ifdef CONFIG_COLDFIRE
  102. __asm__ __volatile__ ("lea %1,%%a0\n\tbchg %2,(%%a0)\n\tsne %0"
  103. : "=d" (retval), "+m" (((volatile char *)addr)[(nr^31) >> 3])
  104. : "d" (nr)
  105. : "%a0");
  106. #else
  107. __asm__ __volatile__ ("bchg %2,%1; sne %0"
  108. : "=d" (retval), "+m" (((volatile char *)addr)[(nr^31) >> 3])
  109. : "di" (nr)
  110. /* No clobber */);
  111. #endif
  112. return retval;
  113. }
  114. #define __test_and_change_bit(nr, addr) test_and_change_bit(nr, addr)
  115. /*
  116. * This routine doesn't need to be atomic.
  117. */
  118. static __inline__ int __constant_test_bit(int nr, const volatile unsigned long * addr)
  119. {
  120. return ((1UL << (nr & 31)) & (((const volatile unsigned int *) addr)[nr >> 5])) != 0;
  121. }
  122. static __inline__ int __test_bit(int nr, const volatile unsigned long * addr)
  123. {
  124. int * a = (int *) addr;
  125. int mask;
  126. a += nr >> 5;
  127. mask = 1 << (nr & 0x1f);
  128. return ((mask & *a) != 0);
  129. }
  130. #define test_bit(nr,addr) \
  131. (__builtin_constant_p(nr) ? \
  132. __constant_test_bit((nr),(addr)) : \
  133. __test_bit((nr),(addr)))
  134. #include <asm-generic/bitops/find.h>
  135. #include <asm-generic/bitops/hweight.h>
  136. static __inline__ int ext2_set_bit(int nr, volatile void * addr)
  137. {
  138. char retval;
  139. #ifdef CONFIG_COLDFIRE
  140. __asm__ __volatile__ ("lea %1,%%a0; bset %2,(%%a0); sne %0"
  141. : "=d" (retval), "+m" (((volatile char *)addr)[nr >> 3])
  142. : "d" (nr)
  143. : "%a0");
  144. #else
  145. __asm__ __volatile__ ("bset %2,%1; sne %0"
  146. : "=d" (retval), "+m" (((volatile char *)addr)[nr >> 3])
  147. : "di" (nr)
  148. /* No clobber */);
  149. #endif
  150. return retval;
  151. }
  152. static __inline__ int ext2_clear_bit(int nr, volatile void * addr)
  153. {
  154. char retval;
  155. #ifdef CONFIG_COLDFIRE
  156. __asm__ __volatile__ ("lea %1,%%a0; bclr %2,(%%a0); sne %0"
  157. : "=d" (retval), "+m" (((volatile char *)addr)[nr >> 3])
  158. : "d" (nr)
  159. : "%a0");
  160. #else
  161. __asm__ __volatile__ ("bclr %2,%1; sne %0"
  162. : "=d" (retval), "+m" (((volatile char *)addr)[nr >> 3])
  163. : "di" (nr)
  164. /* No clobber */);
  165. #endif
  166. return retval;
  167. }
  168. #define ext2_set_bit_atomic(lock, nr, addr) \
  169. ({ \
  170. int ret; \
  171. spin_lock(lock); \
  172. ret = ext2_set_bit((nr), (addr)); \
  173. spin_unlock(lock); \
  174. ret; \
  175. })
  176. #define ext2_clear_bit_atomic(lock, nr, addr) \
  177. ({ \
  178. int ret; \
  179. spin_lock(lock); \
  180. ret = ext2_clear_bit((nr), (addr)); \
  181. spin_unlock(lock); \
  182. ret; \
  183. })
  184. static __inline__ int ext2_test_bit(int nr, const volatile void * addr)
  185. {
  186. char retval;
  187. #ifdef CONFIG_COLDFIRE
  188. __asm__ __volatile__ ("lea %1,%%a0; btst %2,(%%a0); sne %0"
  189. : "=d" (retval)
  190. : "m" (((const volatile char *)addr)[nr >> 3]), "d" (nr)
  191. : "%a0");
  192. #else
  193. __asm__ __volatile__ ("btst %2,%1; sne %0"
  194. : "=d" (retval)
  195. : "m" (((const volatile char *)addr)[nr >> 3]), "di" (nr)
  196. /* No clobber */);
  197. #endif
  198. return retval;
  199. }
  200. #define ext2_find_first_zero_bit(addr, size) \
  201. ext2_find_next_zero_bit((addr), (size), 0)
  202. static __inline__ unsigned long ext2_find_next_zero_bit(void *addr, unsigned long size, unsigned long offset)
  203. {
  204. unsigned long *p = ((unsigned long *) addr) + (offset >> 5);
  205. unsigned long result = offset & ~31UL;
  206. unsigned long tmp;
  207. if (offset >= size)
  208. return size;
  209. size -= result;
  210. offset &= 31UL;
  211. if(offset) {
  212. /* We hold the little endian value in tmp, but then the
  213. * shift is illegal. So we could keep a big endian value
  214. * in tmp, like this:
  215. *
  216. * tmp = __swab32(*(p++));
  217. * tmp |= ~0UL >> (32-offset);
  218. *
  219. * but this would decrease preformance, so we change the
  220. * shift:
  221. */
  222. tmp = *(p++);
  223. tmp |= __swab32(~0UL >> (32-offset));
  224. if(size < 32)
  225. goto found_first;
  226. if(~tmp)
  227. goto found_middle;
  228. size -= 32;
  229. result += 32;
  230. }
  231. while(size & ~31UL) {
  232. if(~(tmp = *(p++)))
  233. goto found_middle;
  234. result += 32;
  235. size -= 32;
  236. }
  237. if(!size)
  238. return result;
  239. tmp = *p;
  240. found_first:
  241. /* tmp is little endian, so we would have to swab the shift,
  242. * see above. But then we have to swab tmp below for ffz, so
  243. * we might as well do this here.
  244. */
  245. return result + ffz(__swab32(tmp) | (~0UL << size));
  246. found_middle:
  247. return result + ffz(__swab32(tmp));
  248. }
  249. #include <asm-generic/bitops/minix.h>
  250. #endif /* __KERNEL__ */
  251. #include <asm-generic/bitops/fls.h>
  252. #include <asm-generic/bitops/fls64.h>
  253. #endif /* _M68KNOMMU_BITOPS_H */