sn_sal.h 31 KB

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  1. #ifndef _ASM_IA64_SN_SN_SAL_H
  2. #define _ASM_IA64_SN_SN_SAL_H
  3. /*
  4. * System Abstraction Layer definitions for IA64
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file "COPYING" in the main directory of this archive
  8. * for more details.
  9. *
  10. * Copyright (c) 2000-2006 Silicon Graphics, Inc. All rights reserved.
  11. */
  12. #include <asm/sal.h>
  13. #include <asm/sn/sn_cpuid.h>
  14. #include <asm/sn/arch.h>
  15. #include <asm/sn/geo.h>
  16. #include <asm/sn/nodepda.h>
  17. #include <asm/sn/shub_mmr.h>
  18. // SGI Specific Calls
  19. #define SN_SAL_POD_MODE 0x02000001
  20. #define SN_SAL_SYSTEM_RESET 0x02000002
  21. #define SN_SAL_PROBE 0x02000003
  22. #define SN_SAL_GET_MASTER_NASID 0x02000004
  23. #define SN_SAL_GET_KLCONFIG_ADDR 0x02000005
  24. #define SN_SAL_LOG_CE 0x02000006
  25. #define SN_SAL_REGISTER_CE 0x02000007
  26. #define SN_SAL_GET_PARTITION_ADDR 0x02000009
  27. #define SN_SAL_XP_ADDR_REGION 0x0200000f
  28. #define SN_SAL_NO_FAULT_ZONE_VIRTUAL 0x02000010
  29. #define SN_SAL_NO_FAULT_ZONE_PHYSICAL 0x02000011
  30. #define SN_SAL_PRINT_ERROR 0x02000012
  31. #define SN_SAL_SET_ERROR_HANDLING_FEATURES 0x0200001a // reentrant
  32. #define SN_SAL_GET_FIT_COMPT 0x0200001b // reentrant
  33. #define SN_SAL_GET_SAPIC_INFO 0x0200001d
  34. #define SN_SAL_GET_SN_INFO 0x0200001e
  35. #define SN_SAL_CONSOLE_PUTC 0x02000021
  36. #define SN_SAL_CONSOLE_GETC 0x02000022
  37. #define SN_SAL_CONSOLE_PUTS 0x02000023
  38. #define SN_SAL_CONSOLE_GETS 0x02000024
  39. #define SN_SAL_CONSOLE_GETS_TIMEOUT 0x02000025
  40. #define SN_SAL_CONSOLE_POLL 0x02000026
  41. #define SN_SAL_CONSOLE_INTR 0x02000027
  42. #define SN_SAL_CONSOLE_PUTB 0x02000028
  43. #define SN_SAL_CONSOLE_XMIT_CHARS 0x0200002a
  44. #define SN_SAL_CONSOLE_READC 0x0200002b
  45. #define SN_SAL_SYSCTL_OP 0x02000030
  46. #define SN_SAL_SYSCTL_MODID_GET 0x02000031
  47. #define SN_SAL_SYSCTL_GET 0x02000032
  48. #define SN_SAL_SYSCTL_IOBRICK_MODULE_GET 0x02000033
  49. #define SN_SAL_SYSCTL_IO_PORTSPEED_GET 0x02000035
  50. #define SN_SAL_SYSCTL_SLAB_GET 0x02000036
  51. #define SN_SAL_BUS_CONFIG 0x02000037
  52. #define SN_SAL_SYS_SERIAL_GET 0x02000038
  53. #define SN_SAL_PARTITION_SERIAL_GET 0x02000039
  54. #define SN_SAL_SYSCTL_PARTITION_GET 0x0200003a
  55. #define SN_SAL_SYSTEM_POWER_DOWN 0x0200003b
  56. #define SN_SAL_GET_MASTER_BASEIO_NASID 0x0200003c
  57. #define SN_SAL_COHERENCE 0x0200003d
  58. #define SN_SAL_MEMPROTECT 0x0200003e
  59. #define SN_SAL_SYSCTL_FRU_CAPTURE 0x0200003f
  60. #define SN_SAL_SYSCTL_IOBRICK_PCI_OP 0x02000042 // reentrant
  61. #define SN_SAL_IROUTER_OP 0x02000043
  62. #define SN_SAL_SYSCTL_EVENT 0x02000044
  63. #define SN_SAL_IOIF_INTERRUPT 0x0200004a
  64. #define SN_SAL_HWPERF_OP 0x02000050 // lock
  65. #define SN_SAL_IOIF_ERROR_INTERRUPT 0x02000051
  66. #define SN_SAL_IOIF_PCI_SAFE 0x02000052
  67. #define SN_SAL_IOIF_SLOT_ENABLE 0x02000053
  68. #define SN_SAL_IOIF_SLOT_DISABLE 0x02000054
  69. #define SN_SAL_IOIF_GET_HUBDEV_INFO 0x02000055
  70. #define SN_SAL_IOIF_GET_PCIBUS_INFO 0x02000056
  71. #define SN_SAL_IOIF_GET_PCIDEV_INFO 0x02000057
  72. #define SN_SAL_IOIF_GET_WIDGET_DMAFLUSH_LIST 0x02000058 // deprecated
  73. #define SN_SAL_IOIF_GET_DEVICE_DMAFLUSH_LIST 0x0200005a
  74. #define SN_SAL_HUB_ERROR_INTERRUPT 0x02000060
  75. #define SN_SAL_BTE_RECOVER 0x02000061
  76. #define SN_SAL_RESERVED_DO_NOT_USE 0x02000062
  77. #define SN_SAL_IOIF_GET_PCI_TOPOLOGY 0x02000064
  78. #define SN_SAL_GET_PROM_FEATURE_SET 0x02000065
  79. #define SN_SAL_SET_OS_FEATURE_SET 0x02000066
  80. #define SN_SAL_INJECT_ERROR 0x02000067
  81. #define SN_SAL_SET_CPU_NUMBER 0x02000068
  82. /*
  83. * Service-specific constants
  84. */
  85. /* Console interrupt manipulation */
  86. /* action codes */
  87. #define SAL_CONSOLE_INTR_OFF 0 /* turn the interrupt off */
  88. #define SAL_CONSOLE_INTR_ON 1 /* turn the interrupt on */
  89. #define SAL_CONSOLE_INTR_STATUS 2 /* retrieve the interrupt status */
  90. /* interrupt specification & status return codes */
  91. #define SAL_CONSOLE_INTR_XMIT 1 /* output interrupt */
  92. #define SAL_CONSOLE_INTR_RECV 2 /* input interrupt */
  93. /* interrupt handling */
  94. #define SAL_INTR_ALLOC 1
  95. #define SAL_INTR_FREE 2
  96. /*
  97. * operations available on the generic SN_SAL_SYSCTL_OP
  98. * runtime service
  99. */
  100. #define SAL_SYSCTL_OP_IOBOARD 0x0001 /* retrieve board type */
  101. #define SAL_SYSCTL_OP_TIO_JLCK_RST 0x0002 /* issue TIO clock reset */
  102. /*
  103. * IRouter (i.e. generalized system controller) operations
  104. */
  105. #define SAL_IROUTER_OPEN 0 /* open a subchannel */
  106. #define SAL_IROUTER_CLOSE 1 /* close a subchannel */
  107. #define SAL_IROUTER_SEND 2 /* send part of an IRouter packet */
  108. #define SAL_IROUTER_RECV 3 /* receive part of an IRouter packet */
  109. #define SAL_IROUTER_INTR_STATUS 4 /* check the interrupt status for
  110. * an open subchannel
  111. */
  112. #define SAL_IROUTER_INTR_ON 5 /* enable an interrupt */
  113. #define SAL_IROUTER_INTR_OFF 6 /* disable an interrupt */
  114. #define SAL_IROUTER_INIT 7 /* initialize IRouter driver */
  115. /* IRouter interrupt mask bits */
  116. #define SAL_IROUTER_INTR_XMIT SAL_CONSOLE_INTR_XMIT
  117. #define SAL_IROUTER_INTR_RECV SAL_CONSOLE_INTR_RECV
  118. /*
  119. * Error Handling Features
  120. */
  121. #define SAL_ERR_FEAT_MCA_SLV_TO_OS_INIT_SLV 0x1 // obsolete
  122. #define SAL_ERR_FEAT_LOG_SBES 0x2 // obsolete
  123. #define SAL_ERR_FEAT_MFR_OVERRIDE 0x4
  124. #define SAL_ERR_FEAT_SBE_THRESHOLD 0xffff0000
  125. /*
  126. * SAL Error Codes
  127. */
  128. #define SALRET_MORE_PASSES 1
  129. #define SALRET_OK 0
  130. #define SALRET_NOT_IMPLEMENTED (-1)
  131. #define SALRET_INVALID_ARG (-2)
  132. #define SALRET_ERROR (-3)
  133. #define SN_SAL_FAKE_PROM 0x02009999
  134. /**
  135. * sn_sal_revision - get the SGI SAL revision number
  136. *
  137. * The SGI PROM stores its version in the sal_[ab]_rev_(major|minor).
  138. * This routine simply extracts the major and minor values and
  139. * presents them in a u32 format.
  140. *
  141. * For example, version 4.05 would be represented at 0x0405.
  142. */
  143. static inline u32
  144. sn_sal_rev(void)
  145. {
  146. struct ia64_sal_systab *systab = __va(efi.sal_systab);
  147. return (u32)(systab->sal_b_rev_major << 8 | systab->sal_b_rev_minor);
  148. }
  149. /*
  150. * Returns the master console nasid, if the call fails, return an illegal
  151. * value.
  152. */
  153. static inline u64
  154. ia64_sn_get_console_nasid(void)
  155. {
  156. struct ia64_sal_retval ret_stuff;
  157. ret_stuff.status = 0;
  158. ret_stuff.v0 = 0;
  159. ret_stuff.v1 = 0;
  160. ret_stuff.v2 = 0;
  161. SAL_CALL(ret_stuff, SN_SAL_GET_MASTER_NASID, 0, 0, 0, 0, 0, 0, 0);
  162. if (ret_stuff.status < 0)
  163. return ret_stuff.status;
  164. /* Master console nasid is in 'v0' */
  165. return ret_stuff.v0;
  166. }
  167. /*
  168. * Returns the master baseio nasid, if the call fails, return an illegal
  169. * value.
  170. */
  171. static inline u64
  172. ia64_sn_get_master_baseio_nasid(void)
  173. {
  174. struct ia64_sal_retval ret_stuff;
  175. ret_stuff.status = 0;
  176. ret_stuff.v0 = 0;
  177. ret_stuff.v1 = 0;
  178. ret_stuff.v2 = 0;
  179. SAL_CALL(ret_stuff, SN_SAL_GET_MASTER_BASEIO_NASID, 0, 0, 0, 0, 0, 0, 0);
  180. if (ret_stuff.status < 0)
  181. return ret_stuff.status;
  182. /* Master baseio nasid is in 'v0' */
  183. return ret_stuff.v0;
  184. }
  185. static inline void *
  186. ia64_sn_get_klconfig_addr(nasid_t nasid)
  187. {
  188. struct ia64_sal_retval ret_stuff;
  189. ret_stuff.status = 0;
  190. ret_stuff.v0 = 0;
  191. ret_stuff.v1 = 0;
  192. ret_stuff.v2 = 0;
  193. SAL_CALL(ret_stuff, SN_SAL_GET_KLCONFIG_ADDR, (u64)nasid, 0, 0, 0, 0, 0, 0);
  194. return ret_stuff.v0 ? __va(ret_stuff.v0) : NULL;
  195. }
  196. /*
  197. * Returns the next console character.
  198. */
  199. static inline u64
  200. ia64_sn_console_getc(int *ch)
  201. {
  202. struct ia64_sal_retval ret_stuff;
  203. ret_stuff.status = 0;
  204. ret_stuff.v0 = 0;
  205. ret_stuff.v1 = 0;
  206. ret_stuff.v2 = 0;
  207. SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_GETC, 0, 0, 0, 0, 0, 0, 0);
  208. /* character is in 'v0' */
  209. *ch = (int)ret_stuff.v0;
  210. return ret_stuff.status;
  211. }
  212. /*
  213. * Read a character from the SAL console device, after a previous interrupt
  214. * or poll operation has given us to know that a character is available
  215. * to be read.
  216. */
  217. static inline u64
  218. ia64_sn_console_readc(void)
  219. {
  220. struct ia64_sal_retval ret_stuff;
  221. ret_stuff.status = 0;
  222. ret_stuff.v0 = 0;
  223. ret_stuff.v1 = 0;
  224. ret_stuff.v2 = 0;
  225. SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_READC, 0, 0, 0, 0, 0, 0, 0);
  226. /* character is in 'v0' */
  227. return ret_stuff.v0;
  228. }
  229. /*
  230. * Sends the given character to the console.
  231. */
  232. static inline u64
  233. ia64_sn_console_putc(char ch)
  234. {
  235. struct ia64_sal_retval ret_stuff;
  236. ret_stuff.status = 0;
  237. ret_stuff.v0 = 0;
  238. ret_stuff.v1 = 0;
  239. ret_stuff.v2 = 0;
  240. SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_PUTC, (u64)ch, 0, 0, 0, 0, 0, 0);
  241. return ret_stuff.status;
  242. }
  243. /*
  244. * Sends the given buffer to the console.
  245. */
  246. static inline u64
  247. ia64_sn_console_putb(const char *buf, int len)
  248. {
  249. struct ia64_sal_retval ret_stuff;
  250. ret_stuff.status = 0;
  251. ret_stuff.v0 = 0;
  252. ret_stuff.v1 = 0;
  253. ret_stuff.v2 = 0;
  254. SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_PUTB, (u64)buf, (u64)len, 0, 0, 0, 0, 0);
  255. if ( ret_stuff.status == 0 ) {
  256. return ret_stuff.v0;
  257. }
  258. return (u64)0;
  259. }
  260. /*
  261. * Print a platform error record
  262. */
  263. static inline u64
  264. ia64_sn_plat_specific_err_print(int (*hook)(const char*, ...), char *rec)
  265. {
  266. struct ia64_sal_retval ret_stuff;
  267. ret_stuff.status = 0;
  268. ret_stuff.v0 = 0;
  269. ret_stuff.v1 = 0;
  270. ret_stuff.v2 = 0;
  271. SAL_CALL_REENTRANT(ret_stuff, SN_SAL_PRINT_ERROR, (u64)hook, (u64)rec, 0, 0, 0, 0, 0);
  272. return ret_stuff.status;
  273. }
  274. /*
  275. * Check for Platform errors
  276. */
  277. static inline u64
  278. ia64_sn_plat_cpei_handler(void)
  279. {
  280. struct ia64_sal_retval ret_stuff;
  281. ret_stuff.status = 0;
  282. ret_stuff.v0 = 0;
  283. ret_stuff.v1 = 0;
  284. ret_stuff.v2 = 0;
  285. SAL_CALL_NOLOCK(ret_stuff, SN_SAL_LOG_CE, 0, 0, 0, 0, 0, 0, 0);
  286. return ret_stuff.status;
  287. }
  288. /*
  289. * Set Error Handling Features (Obsolete)
  290. */
  291. static inline u64
  292. ia64_sn_plat_set_error_handling_features(void)
  293. {
  294. struct ia64_sal_retval ret_stuff;
  295. ret_stuff.status = 0;
  296. ret_stuff.v0 = 0;
  297. ret_stuff.v1 = 0;
  298. ret_stuff.v2 = 0;
  299. SAL_CALL_REENTRANT(ret_stuff, SN_SAL_SET_ERROR_HANDLING_FEATURES,
  300. SAL_ERR_FEAT_LOG_SBES,
  301. 0, 0, 0, 0, 0, 0);
  302. return ret_stuff.status;
  303. }
  304. /*
  305. * Checks for console input.
  306. */
  307. static inline u64
  308. ia64_sn_console_check(int *result)
  309. {
  310. struct ia64_sal_retval ret_stuff;
  311. ret_stuff.status = 0;
  312. ret_stuff.v0 = 0;
  313. ret_stuff.v1 = 0;
  314. ret_stuff.v2 = 0;
  315. SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_POLL, 0, 0, 0, 0, 0, 0, 0);
  316. /* result is in 'v0' */
  317. *result = (int)ret_stuff.v0;
  318. return ret_stuff.status;
  319. }
  320. /*
  321. * Checks console interrupt status
  322. */
  323. static inline u64
  324. ia64_sn_console_intr_status(void)
  325. {
  326. struct ia64_sal_retval ret_stuff;
  327. ret_stuff.status = 0;
  328. ret_stuff.v0 = 0;
  329. ret_stuff.v1 = 0;
  330. ret_stuff.v2 = 0;
  331. SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_INTR,
  332. 0, SAL_CONSOLE_INTR_STATUS,
  333. 0, 0, 0, 0, 0);
  334. if (ret_stuff.status == 0) {
  335. return ret_stuff.v0;
  336. }
  337. return 0;
  338. }
  339. /*
  340. * Enable an interrupt on the SAL console device.
  341. */
  342. static inline void
  343. ia64_sn_console_intr_enable(u64 intr)
  344. {
  345. struct ia64_sal_retval ret_stuff;
  346. ret_stuff.status = 0;
  347. ret_stuff.v0 = 0;
  348. ret_stuff.v1 = 0;
  349. ret_stuff.v2 = 0;
  350. SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_INTR,
  351. intr, SAL_CONSOLE_INTR_ON,
  352. 0, 0, 0, 0, 0);
  353. }
  354. /*
  355. * Disable an interrupt on the SAL console device.
  356. */
  357. static inline void
  358. ia64_sn_console_intr_disable(u64 intr)
  359. {
  360. struct ia64_sal_retval ret_stuff;
  361. ret_stuff.status = 0;
  362. ret_stuff.v0 = 0;
  363. ret_stuff.v1 = 0;
  364. ret_stuff.v2 = 0;
  365. SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_INTR,
  366. intr, SAL_CONSOLE_INTR_OFF,
  367. 0, 0, 0, 0, 0);
  368. }
  369. /*
  370. * Sends a character buffer to the console asynchronously.
  371. */
  372. static inline u64
  373. ia64_sn_console_xmit_chars(char *buf, int len)
  374. {
  375. struct ia64_sal_retval ret_stuff;
  376. ret_stuff.status = 0;
  377. ret_stuff.v0 = 0;
  378. ret_stuff.v1 = 0;
  379. ret_stuff.v2 = 0;
  380. SAL_CALL_NOLOCK(ret_stuff, SN_SAL_CONSOLE_XMIT_CHARS,
  381. (u64)buf, (u64)len,
  382. 0, 0, 0, 0, 0);
  383. if (ret_stuff.status == 0) {
  384. return ret_stuff.v0;
  385. }
  386. return 0;
  387. }
  388. /*
  389. * Returns the iobrick module Id
  390. */
  391. static inline u64
  392. ia64_sn_sysctl_iobrick_module_get(nasid_t nasid, int *result)
  393. {
  394. struct ia64_sal_retval ret_stuff;
  395. ret_stuff.status = 0;
  396. ret_stuff.v0 = 0;
  397. ret_stuff.v1 = 0;
  398. ret_stuff.v2 = 0;
  399. SAL_CALL_NOLOCK(ret_stuff, SN_SAL_SYSCTL_IOBRICK_MODULE_GET, nasid, 0, 0, 0, 0, 0, 0);
  400. /* result is in 'v0' */
  401. *result = (int)ret_stuff.v0;
  402. return ret_stuff.status;
  403. }
  404. /**
  405. * ia64_sn_pod_mode - call the SN_SAL_POD_MODE function
  406. *
  407. * SN_SAL_POD_MODE actually takes an argument, but it's always
  408. * 0 when we call it from the kernel, so we don't have to expose
  409. * it to the caller.
  410. */
  411. static inline u64
  412. ia64_sn_pod_mode(void)
  413. {
  414. struct ia64_sal_retval isrv;
  415. SAL_CALL_REENTRANT(isrv, SN_SAL_POD_MODE, 0, 0, 0, 0, 0, 0, 0);
  416. if (isrv.status)
  417. return 0;
  418. return isrv.v0;
  419. }
  420. /**
  421. * ia64_sn_probe_mem - read from memory safely
  422. * @addr: address to probe
  423. * @size: number bytes to read (1,2,4,8)
  424. * @data_ptr: address to store value read by probe (-1 returned if probe fails)
  425. *
  426. * Call into the SAL to do a memory read. If the read generates a machine
  427. * check, this routine will recover gracefully and return -1 to the caller.
  428. * @addr is usually a kernel virtual address in uncached space (i.e. the
  429. * address starts with 0xc), but if called in physical mode, @addr should
  430. * be a physical address.
  431. *
  432. * Return values:
  433. * 0 - probe successful
  434. * 1 - probe failed (generated MCA)
  435. * 2 - Bad arg
  436. * <0 - PAL error
  437. */
  438. static inline u64
  439. ia64_sn_probe_mem(long addr, long size, void *data_ptr)
  440. {
  441. struct ia64_sal_retval isrv;
  442. SAL_CALL(isrv, SN_SAL_PROBE, addr, size, 0, 0, 0, 0, 0);
  443. if (data_ptr) {
  444. switch (size) {
  445. case 1:
  446. *((u8*)data_ptr) = (u8)isrv.v0;
  447. break;
  448. case 2:
  449. *((u16*)data_ptr) = (u16)isrv.v0;
  450. break;
  451. case 4:
  452. *((u32*)data_ptr) = (u32)isrv.v0;
  453. break;
  454. case 8:
  455. *((u64*)data_ptr) = (u64)isrv.v0;
  456. break;
  457. default:
  458. isrv.status = 2;
  459. }
  460. }
  461. return isrv.status;
  462. }
  463. /*
  464. * Retrieve the system serial number as an ASCII string.
  465. */
  466. static inline u64
  467. ia64_sn_sys_serial_get(char *buf)
  468. {
  469. struct ia64_sal_retval ret_stuff;
  470. SAL_CALL_NOLOCK(ret_stuff, SN_SAL_SYS_SERIAL_GET, buf, 0, 0, 0, 0, 0, 0);
  471. return ret_stuff.status;
  472. }
  473. extern char sn_system_serial_number_string[];
  474. extern u64 sn_partition_serial_number;
  475. static inline char *
  476. sn_system_serial_number(void) {
  477. if (sn_system_serial_number_string[0]) {
  478. return(sn_system_serial_number_string);
  479. } else {
  480. ia64_sn_sys_serial_get(sn_system_serial_number_string);
  481. return(sn_system_serial_number_string);
  482. }
  483. }
  484. /*
  485. * Returns a unique id number for this system and partition (suitable for
  486. * use with license managers), based in part on the system serial number.
  487. */
  488. static inline u64
  489. ia64_sn_partition_serial_get(void)
  490. {
  491. struct ia64_sal_retval ret_stuff;
  492. ia64_sal_oemcall_reentrant(&ret_stuff, SN_SAL_PARTITION_SERIAL_GET, 0,
  493. 0, 0, 0, 0, 0, 0);
  494. if (ret_stuff.status != 0)
  495. return 0;
  496. return ret_stuff.v0;
  497. }
  498. static inline u64
  499. sn_partition_serial_number_val(void) {
  500. if (unlikely(sn_partition_serial_number == 0)) {
  501. sn_partition_serial_number = ia64_sn_partition_serial_get();
  502. }
  503. return sn_partition_serial_number;
  504. }
  505. /*
  506. * Returns the partition id of the nasid passed in as an argument,
  507. * or INVALID_PARTID if the partition id cannot be retrieved.
  508. */
  509. static inline partid_t
  510. ia64_sn_sysctl_partition_get(nasid_t nasid)
  511. {
  512. struct ia64_sal_retval ret_stuff;
  513. SAL_CALL(ret_stuff, SN_SAL_SYSCTL_PARTITION_GET, nasid,
  514. 0, 0, 0, 0, 0, 0);
  515. if (ret_stuff.status != 0)
  516. return -1;
  517. return ((partid_t)ret_stuff.v0);
  518. }
  519. /*
  520. * Returns the physical address of the partition's reserved page through
  521. * an iterative number of calls.
  522. *
  523. * On first call, 'cookie' and 'len' should be set to 0, and 'addr'
  524. * set to the nasid of the partition whose reserved page's address is
  525. * being sought.
  526. * On subsequent calls, pass the values, that were passed back on the
  527. * previous call.
  528. *
  529. * While the return status equals SALRET_MORE_PASSES, keep calling
  530. * this function after first copying 'len' bytes starting at 'addr'
  531. * into 'buf'. Once the return status equals SALRET_OK, 'addr' will
  532. * be the physical address of the partition's reserved page. If the
  533. * return status equals neither of these, an error as occurred.
  534. */
  535. static inline s64
  536. sn_partition_reserved_page_pa(u64 buf, u64 *cookie, u64 *addr, u64 *len)
  537. {
  538. struct ia64_sal_retval rv;
  539. ia64_sal_oemcall_reentrant(&rv, SN_SAL_GET_PARTITION_ADDR, *cookie,
  540. *addr, buf, *len, 0, 0, 0);
  541. *cookie = rv.v0;
  542. *addr = rv.v1;
  543. *len = rv.v2;
  544. return rv.status;
  545. }
  546. /*
  547. * Register or unregister a physical address range being referenced across
  548. * a partition boundary for which certain SAL errors should be scanned for,
  549. * cleaned up and ignored. This is of value for kernel partitioning code only.
  550. * Values for the operation argument:
  551. * 1 = register this address range with SAL
  552. * 0 = unregister this address range with SAL
  553. *
  554. * SAL maintains a reference count on an address range in case it is registered
  555. * multiple times.
  556. *
  557. * On success, returns the reference count of the address range after the SAL
  558. * call has performed the current registration/unregistration. Returns a
  559. * negative value if an error occurred.
  560. */
  561. static inline int
  562. sn_register_xp_addr_region(u64 paddr, u64 len, int operation)
  563. {
  564. struct ia64_sal_retval ret_stuff;
  565. ia64_sal_oemcall(&ret_stuff, SN_SAL_XP_ADDR_REGION, paddr, len,
  566. (u64)operation, 0, 0, 0, 0);
  567. return ret_stuff.status;
  568. }
  569. /*
  570. * Register or unregister an instruction range for which SAL errors should
  571. * be ignored. If an error occurs while in the registered range, SAL jumps
  572. * to return_addr after ignoring the error. Values for the operation argument:
  573. * 1 = register this instruction range with SAL
  574. * 0 = unregister this instruction range with SAL
  575. *
  576. * Returns 0 on success, or a negative value if an error occurred.
  577. */
  578. static inline int
  579. sn_register_nofault_code(u64 start_addr, u64 end_addr, u64 return_addr,
  580. int virtual, int operation)
  581. {
  582. struct ia64_sal_retval ret_stuff;
  583. u64 call;
  584. if (virtual) {
  585. call = SN_SAL_NO_FAULT_ZONE_VIRTUAL;
  586. } else {
  587. call = SN_SAL_NO_FAULT_ZONE_PHYSICAL;
  588. }
  589. ia64_sal_oemcall(&ret_stuff, call, start_addr, end_addr, return_addr,
  590. (u64)1, 0, 0, 0);
  591. return ret_stuff.status;
  592. }
  593. /*
  594. * Change or query the coherence domain for this partition. Each cpu-based
  595. * nasid is represented by a bit in an array of 64-bit words:
  596. * 0 = not in this partition's coherency domain
  597. * 1 = in this partition's coherency domain
  598. *
  599. * It is not possible for the local system's nasids to be removed from
  600. * the coherency domain. Purpose of the domain arguments:
  601. * new_domain = set the coherence domain to the given nasids
  602. * old_domain = return the current coherence domain
  603. *
  604. * Returns 0 on success, or a negative value if an error occurred.
  605. */
  606. static inline int
  607. sn_change_coherence(u64 *new_domain, u64 *old_domain)
  608. {
  609. struct ia64_sal_retval ret_stuff;
  610. ia64_sal_oemcall(&ret_stuff, SN_SAL_COHERENCE, (u64)new_domain,
  611. (u64)old_domain, 0, 0, 0, 0, 0);
  612. return ret_stuff.status;
  613. }
  614. /*
  615. * Change memory access protections for a physical address range.
  616. * nasid_array is not used on Altix, but may be in future architectures.
  617. * Available memory protection access classes are defined after the function.
  618. */
  619. static inline int
  620. sn_change_memprotect(u64 paddr, u64 len, u64 perms, u64 *nasid_array)
  621. {
  622. struct ia64_sal_retval ret_stuff;
  623. ia64_sal_oemcall_nolock(&ret_stuff, SN_SAL_MEMPROTECT, paddr, len,
  624. (u64)nasid_array, perms, 0, 0, 0);
  625. return ret_stuff.status;
  626. }
  627. #define SN_MEMPROT_ACCESS_CLASS_0 0x14a080
  628. #define SN_MEMPROT_ACCESS_CLASS_1 0x2520c2
  629. #define SN_MEMPROT_ACCESS_CLASS_2 0x14a1ca
  630. #define SN_MEMPROT_ACCESS_CLASS_3 0x14a290
  631. #define SN_MEMPROT_ACCESS_CLASS_6 0x084080
  632. #define SN_MEMPROT_ACCESS_CLASS_7 0x021080
  633. /*
  634. * Turns off system power.
  635. */
  636. static inline void
  637. ia64_sn_power_down(void)
  638. {
  639. struct ia64_sal_retval ret_stuff;
  640. SAL_CALL(ret_stuff, SN_SAL_SYSTEM_POWER_DOWN, 0, 0, 0, 0, 0, 0, 0);
  641. while(1)
  642. cpu_relax();
  643. /* never returns */
  644. }
  645. /**
  646. * ia64_sn_fru_capture - tell the system controller to capture hw state
  647. *
  648. * This routine will call the SAL which will tell the system controller(s)
  649. * to capture hw mmr information from each SHub in the system.
  650. */
  651. static inline u64
  652. ia64_sn_fru_capture(void)
  653. {
  654. struct ia64_sal_retval isrv;
  655. SAL_CALL(isrv, SN_SAL_SYSCTL_FRU_CAPTURE, 0, 0, 0, 0, 0, 0, 0);
  656. if (isrv.status)
  657. return 0;
  658. return isrv.v0;
  659. }
  660. /*
  661. * Performs an operation on a PCI bus or slot -- power up, power down
  662. * or reset.
  663. */
  664. static inline u64
  665. ia64_sn_sysctl_iobrick_pci_op(nasid_t n, u64 connection_type,
  666. u64 bus, char slot,
  667. u64 action)
  668. {
  669. struct ia64_sal_retval rv = {0, 0, 0, 0};
  670. SAL_CALL_NOLOCK(rv, SN_SAL_SYSCTL_IOBRICK_PCI_OP, connection_type, n, action,
  671. bus, (u64) slot, 0, 0);
  672. if (rv.status)
  673. return rv.v0;
  674. return 0;
  675. }
  676. /*
  677. * Open a subchannel for sending arbitrary data to the system
  678. * controller network via the system controller device associated with
  679. * 'nasid'. Return the subchannel number or a negative error code.
  680. */
  681. static inline int
  682. ia64_sn_irtr_open(nasid_t nasid)
  683. {
  684. struct ia64_sal_retval rv;
  685. SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_OPEN, nasid,
  686. 0, 0, 0, 0, 0);
  687. return (int) rv.v0;
  688. }
  689. /*
  690. * Close system controller subchannel 'subch' previously opened on 'nasid'.
  691. */
  692. static inline int
  693. ia64_sn_irtr_close(nasid_t nasid, int subch)
  694. {
  695. struct ia64_sal_retval rv;
  696. SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_CLOSE,
  697. (u64) nasid, (u64) subch, 0, 0, 0, 0);
  698. return (int) rv.status;
  699. }
  700. /*
  701. * Read data from system controller associated with 'nasid' on
  702. * subchannel 'subch'. The buffer to be filled is pointed to by
  703. * 'buf', and its capacity is in the integer pointed to by 'len'. The
  704. * referent of 'len' is set to the number of bytes read by the SAL
  705. * call. The return value is either SALRET_OK (for bytes read) or
  706. * SALRET_ERROR (for error or "no data available").
  707. */
  708. static inline int
  709. ia64_sn_irtr_recv(nasid_t nasid, int subch, char *buf, int *len)
  710. {
  711. struct ia64_sal_retval rv;
  712. SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_RECV,
  713. (u64) nasid, (u64) subch, (u64) buf, (u64) len,
  714. 0, 0);
  715. return (int) rv.status;
  716. }
  717. /*
  718. * Write data to the system controller network via the system
  719. * controller associated with 'nasid' on suchannel 'subch'. The
  720. * buffer to be written out is pointed to by 'buf', and 'len' is the
  721. * number of bytes to be written. The return value is either the
  722. * number of bytes written (which could be zero) or a negative error
  723. * code.
  724. */
  725. static inline int
  726. ia64_sn_irtr_send(nasid_t nasid, int subch, char *buf, int len)
  727. {
  728. struct ia64_sal_retval rv;
  729. SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_SEND,
  730. (u64) nasid, (u64) subch, (u64) buf, (u64) len,
  731. 0, 0);
  732. return (int) rv.v0;
  733. }
  734. /*
  735. * Check whether any interrupts are pending for the system controller
  736. * associated with 'nasid' and its subchannel 'subch'. The return
  737. * value is a mask of pending interrupts (SAL_IROUTER_INTR_XMIT and/or
  738. * SAL_IROUTER_INTR_RECV).
  739. */
  740. static inline int
  741. ia64_sn_irtr_intr(nasid_t nasid, int subch)
  742. {
  743. struct ia64_sal_retval rv;
  744. SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_INTR_STATUS,
  745. (u64) nasid, (u64) subch, 0, 0, 0, 0);
  746. return (int) rv.v0;
  747. }
  748. /*
  749. * Enable the interrupt indicated by the intr parameter (either
  750. * SAL_IROUTER_INTR_XMIT or SAL_IROUTER_INTR_RECV).
  751. */
  752. static inline int
  753. ia64_sn_irtr_intr_enable(nasid_t nasid, int subch, u64 intr)
  754. {
  755. struct ia64_sal_retval rv;
  756. SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_INTR_ON,
  757. (u64) nasid, (u64) subch, intr, 0, 0, 0);
  758. return (int) rv.v0;
  759. }
  760. /*
  761. * Disable the interrupt indicated by the intr parameter (either
  762. * SAL_IROUTER_INTR_XMIT or SAL_IROUTER_INTR_RECV).
  763. */
  764. static inline int
  765. ia64_sn_irtr_intr_disable(nasid_t nasid, int subch, u64 intr)
  766. {
  767. struct ia64_sal_retval rv;
  768. SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_INTR_OFF,
  769. (u64) nasid, (u64) subch, intr, 0, 0, 0);
  770. return (int) rv.v0;
  771. }
  772. /*
  773. * Set up a node as the point of contact for system controller
  774. * environmental event delivery.
  775. */
  776. static inline int
  777. ia64_sn_sysctl_event_init(nasid_t nasid)
  778. {
  779. struct ia64_sal_retval rv;
  780. SAL_CALL_REENTRANT(rv, SN_SAL_SYSCTL_EVENT, (u64) nasid,
  781. 0, 0, 0, 0, 0, 0);
  782. return (int) rv.v0;
  783. }
  784. /*
  785. * Ask the system controller on the specified nasid to reset
  786. * the CX corelet clock. Only valid on TIO nodes.
  787. */
  788. static inline int
  789. ia64_sn_sysctl_tio_clock_reset(nasid_t nasid)
  790. {
  791. struct ia64_sal_retval rv;
  792. SAL_CALL_REENTRANT(rv, SN_SAL_SYSCTL_OP, SAL_SYSCTL_OP_TIO_JLCK_RST,
  793. nasid, 0, 0, 0, 0, 0);
  794. if (rv.status != 0)
  795. return (int)rv.status;
  796. if (rv.v0 != 0)
  797. return (int)rv.v0;
  798. return 0;
  799. }
  800. /*
  801. * Get the associated ioboard type for a given nasid.
  802. */
  803. static inline s64
  804. ia64_sn_sysctl_ioboard_get(nasid_t nasid, u16 *ioboard)
  805. {
  806. struct ia64_sal_retval isrv;
  807. SAL_CALL_REENTRANT(isrv, SN_SAL_SYSCTL_OP, SAL_SYSCTL_OP_IOBOARD,
  808. nasid, 0, 0, 0, 0, 0);
  809. if (isrv.v0 != 0) {
  810. *ioboard = isrv.v0;
  811. return isrv.status;
  812. }
  813. if (isrv.v1 != 0) {
  814. *ioboard = isrv.v1;
  815. return isrv.status;
  816. }
  817. return isrv.status;
  818. }
  819. /**
  820. * ia64_sn_get_fit_compt - read a FIT entry from the PROM header
  821. * @nasid: NASID of node to read
  822. * @index: FIT entry index to be retrieved (0..n)
  823. * @fitentry: 16 byte buffer where FIT entry will be stored.
  824. * @banbuf: optional buffer for retrieving banner
  825. * @banlen: length of banner buffer
  826. *
  827. * Access to the physical PROM chips needs to be serialized since reads and
  828. * writes can't occur at the same time, so we need to call into the SAL when
  829. * we want to look at the FIT entries on the chips.
  830. *
  831. * Returns:
  832. * %SALRET_OK if ok
  833. * %SALRET_INVALID_ARG if index too big
  834. * %SALRET_NOT_IMPLEMENTED if running on older PROM
  835. * ??? if nasid invalid OR banner buffer not large enough
  836. */
  837. static inline int
  838. ia64_sn_get_fit_compt(u64 nasid, u64 index, void *fitentry, void *banbuf,
  839. u64 banlen)
  840. {
  841. struct ia64_sal_retval rv;
  842. SAL_CALL_NOLOCK(rv, SN_SAL_GET_FIT_COMPT, nasid, index, fitentry,
  843. banbuf, banlen, 0, 0);
  844. return (int) rv.status;
  845. }
  846. /*
  847. * Initialize the SAL components of the system controller
  848. * communication driver; specifically pass in a sizable buffer that
  849. * can be used for allocation of subchannel queues as new subchannels
  850. * are opened. "buf" points to the buffer, and "len" specifies its
  851. * length.
  852. */
  853. static inline int
  854. ia64_sn_irtr_init(nasid_t nasid, void *buf, int len)
  855. {
  856. struct ia64_sal_retval rv;
  857. SAL_CALL_REENTRANT(rv, SN_SAL_IROUTER_OP, SAL_IROUTER_INIT,
  858. (u64) nasid, (u64) buf, (u64) len, 0, 0, 0);
  859. return (int) rv.status;
  860. }
  861. /*
  862. * Returns the nasid, subnode & slice corresponding to a SAPIC ID
  863. *
  864. * In:
  865. * arg0 - SN_SAL_GET_SAPIC_INFO
  866. * arg1 - sapicid (lid >> 16)
  867. * Out:
  868. * v0 - nasid
  869. * v1 - subnode
  870. * v2 - slice
  871. */
  872. static inline u64
  873. ia64_sn_get_sapic_info(int sapicid, int *nasid, int *subnode, int *slice)
  874. {
  875. struct ia64_sal_retval ret_stuff;
  876. ret_stuff.status = 0;
  877. ret_stuff.v0 = 0;
  878. ret_stuff.v1 = 0;
  879. ret_stuff.v2 = 0;
  880. SAL_CALL_NOLOCK(ret_stuff, SN_SAL_GET_SAPIC_INFO, sapicid, 0, 0, 0, 0, 0, 0);
  881. /***** BEGIN HACK - temp til old proms no longer supported ********/
  882. if (ret_stuff.status == SALRET_NOT_IMPLEMENTED) {
  883. if (nasid) *nasid = sapicid & 0xfff;
  884. if (subnode) *subnode = (sapicid >> 13) & 1;
  885. if (slice) *slice = (sapicid >> 12) & 3;
  886. return 0;
  887. }
  888. /***** END HACK *******/
  889. if (ret_stuff.status < 0)
  890. return ret_stuff.status;
  891. if (nasid) *nasid = (int) ret_stuff.v0;
  892. if (subnode) *subnode = (int) ret_stuff.v1;
  893. if (slice) *slice = (int) ret_stuff.v2;
  894. return 0;
  895. }
  896. /*
  897. * Returns information about the HUB/SHUB.
  898. * In:
  899. * arg0 - SN_SAL_GET_SN_INFO
  900. * arg1 - 0 (other values reserved for future use)
  901. * Out:
  902. * v0
  903. * [7:0] - shub type (0=shub1, 1=shub2)
  904. * [15:8] - Log2 max number of nodes in entire system (includes
  905. * C-bricks, I-bricks, etc)
  906. * [23:16] - Log2 of nodes per sharing domain
  907. * [31:24] - partition ID
  908. * [39:32] - coherency_id
  909. * [47:40] - regionsize
  910. * v1
  911. * [15:0] - nasid mask (ex., 0x7ff for 11 bit nasid)
  912. * [23:15] - bit position of low nasid bit
  913. */
  914. static inline u64
  915. ia64_sn_get_sn_info(int fc, u8 *shubtype, u16 *nasid_bitmask, u8 *nasid_shift,
  916. u8 *systemsize, u8 *sharing_domain_size, u8 *partid, u8 *coher, u8 *reg)
  917. {
  918. struct ia64_sal_retval ret_stuff;
  919. ret_stuff.status = 0;
  920. ret_stuff.v0 = 0;
  921. ret_stuff.v1 = 0;
  922. ret_stuff.v2 = 0;
  923. SAL_CALL_NOLOCK(ret_stuff, SN_SAL_GET_SN_INFO, fc, 0, 0, 0, 0, 0, 0);
  924. /***** BEGIN HACK - temp til old proms no longer supported ********/
  925. if (ret_stuff.status == SALRET_NOT_IMPLEMENTED) {
  926. int nasid = get_sapicid() & 0xfff;
  927. #define SH_SHUB_ID_NODES_PER_BIT_MASK 0x001f000000000000UL
  928. #define SH_SHUB_ID_NODES_PER_BIT_SHFT 48
  929. if (shubtype) *shubtype = 0;
  930. if (nasid_bitmask) *nasid_bitmask = 0x7ff;
  931. if (nasid_shift) *nasid_shift = 38;
  932. if (systemsize) *systemsize = 10;
  933. if (sharing_domain_size) *sharing_domain_size = 8;
  934. if (partid) *partid = ia64_sn_sysctl_partition_get(nasid);
  935. if (coher) *coher = nasid >> 9;
  936. if (reg) *reg = (HUB_L((u64 *) LOCAL_MMR_ADDR(SH1_SHUB_ID)) & SH_SHUB_ID_NODES_PER_BIT_MASK) >>
  937. SH_SHUB_ID_NODES_PER_BIT_SHFT;
  938. return 0;
  939. }
  940. /***** END HACK *******/
  941. if (ret_stuff.status < 0)
  942. return ret_stuff.status;
  943. if (shubtype) *shubtype = ret_stuff.v0 & 0xff;
  944. if (systemsize) *systemsize = (ret_stuff.v0 >> 8) & 0xff;
  945. if (sharing_domain_size) *sharing_domain_size = (ret_stuff.v0 >> 16) & 0xff;
  946. if (partid) *partid = (ret_stuff.v0 >> 24) & 0xff;
  947. if (coher) *coher = (ret_stuff.v0 >> 32) & 0xff;
  948. if (reg) *reg = (ret_stuff.v0 >> 40) & 0xff;
  949. if (nasid_bitmask) *nasid_bitmask = (ret_stuff.v1 & 0xffff);
  950. if (nasid_shift) *nasid_shift = (ret_stuff.v1 >> 16) & 0xff;
  951. return 0;
  952. }
  953. /*
  954. * This is the access point to the Altix PROM hardware performance
  955. * and status monitoring interface. For info on using this, see
  956. * include/asm-ia64/sn/sn2/sn_hwperf.h
  957. */
  958. static inline int
  959. ia64_sn_hwperf_op(nasid_t nasid, u64 opcode, u64 a0, u64 a1, u64 a2,
  960. u64 a3, u64 a4, int *v0)
  961. {
  962. struct ia64_sal_retval rv;
  963. SAL_CALL_NOLOCK(rv, SN_SAL_HWPERF_OP, (u64)nasid,
  964. opcode, a0, a1, a2, a3, a4);
  965. if (v0)
  966. *v0 = (int) rv.v0;
  967. return (int) rv.status;
  968. }
  969. static inline int
  970. ia64_sn_ioif_get_pci_topology(u64 buf, u64 len)
  971. {
  972. struct ia64_sal_retval rv;
  973. SAL_CALL_NOLOCK(rv, SN_SAL_IOIF_GET_PCI_TOPOLOGY, buf, len, 0, 0, 0, 0, 0);
  974. return (int) rv.status;
  975. }
  976. /*
  977. * BTE error recovery is implemented in SAL
  978. */
  979. static inline int
  980. ia64_sn_bte_recovery(nasid_t nasid)
  981. {
  982. struct ia64_sal_retval rv;
  983. rv.status = 0;
  984. SAL_CALL_NOLOCK(rv, SN_SAL_BTE_RECOVER, (u64)nasid, 0, 0, 0, 0, 0, 0);
  985. if (rv.status == SALRET_NOT_IMPLEMENTED)
  986. return 0;
  987. return (int) rv.status;
  988. }
  989. static inline int
  990. ia64_sn_is_fake_prom(void)
  991. {
  992. struct ia64_sal_retval rv;
  993. SAL_CALL_NOLOCK(rv, SN_SAL_FAKE_PROM, 0, 0, 0, 0, 0, 0, 0);
  994. return (rv.status == 0);
  995. }
  996. static inline int
  997. ia64_sn_get_prom_feature_set(int set, unsigned long *feature_set)
  998. {
  999. struct ia64_sal_retval rv;
  1000. SAL_CALL_NOLOCK(rv, SN_SAL_GET_PROM_FEATURE_SET, set, 0, 0, 0, 0, 0, 0);
  1001. if (rv.status != 0)
  1002. return rv.status;
  1003. *feature_set = rv.v0;
  1004. return 0;
  1005. }
  1006. static inline int
  1007. ia64_sn_set_os_feature(int feature)
  1008. {
  1009. struct ia64_sal_retval rv;
  1010. SAL_CALL_NOLOCK(rv, SN_SAL_SET_OS_FEATURE_SET, feature, 0, 0, 0, 0, 0, 0);
  1011. return rv.status;
  1012. }
  1013. static inline int
  1014. sn_inject_error(u64 paddr, u64 *data, u64 *ecc)
  1015. {
  1016. struct ia64_sal_retval ret_stuff;
  1017. ia64_sal_oemcall_nolock(&ret_stuff, SN_SAL_INJECT_ERROR, paddr, (u64)data,
  1018. (u64)ecc, 0, 0, 0, 0);
  1019. return ret_stuff.status;
  1020. }
  1021. static inline int
  1022. ia64_sn_set_cpu_number(int cpu)
  1023. {
  1024. struct ia64_sal_retval rv;
  1025. SAL_CALL_NOLOCK(rv, SN_SAL_SET_CPU_NUMBER, cpu, 0, 0, 0, 0, 0, 0);
  1026. return rv.status;
  1027. }
  1028. #endif /* _ASM_IA64_SN_SN_SAL_H */