mmu_context.h 1.7 KB

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  1. #ifndef __I386_SCHED_H
  2. #define __I386_SCHED_H
  3. #include <asm/desc.h>
  4. #include <asm/atomic.h>
  5. #include <asm/pgalloc.h>
  6. #include <asm/tlbflush.h>
  7. /*
  8. * Used for LDT copy/destruction.
  9. */
  10. int init_new_context(struct task_struct *tsk, struct mm_struct *mm);
  11. void destroy_context(struct mm_struct *mm);
  12. static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
  13. {
  14. #ifdef CONFIG_SMP
  15. unsigned cpu = smp_processor_id();
  16. if (per_cpu(cpu_tlbstate, cpu).state == TLBSTATE_OK)
  17. per_cpu(cpu_tlbstate, cpu).state = TLBSTATE_LAZY;
  18. #endif
  19. }
  20. static inline void switch_mm(struct mm_struct *prev,
  21. struct mm_struct *next,
  22. struct task_struct *tsk)
  23. {
  24. int cpu = smp_processor_id();
  25. if (likely(prev != next)) {
  26. /* stop flush ipis for the previous mm */
  27. cpu_clear(cpu, prev->cpu_vm_mask);
  28. #ifdef CONFIG_SMP
  29. per_cpu(cpu_tlbstate, cpu).state = TLBSTATE_OK;
  30. per_cpu(cpu_tlbstate, cpu).active_mm = next;
  31. #endif
  32. cpu_set(cpu, next->cpu_vm_mask);
  33. /* Re-load page tables */
  34. load_cr3(next->pgd);
  35. /*
  36. * load the LDT, if the LDT is different:
  37. */
  38. if (unlikely(prev->context.ldt != next->context.ldt))
  39. load_LDT_nolock(&next->context, cpu);
  40. }
  41. #ifdef CONFIG_SMP
  42. else {
  43. per_cpu(cpu_tlbstate, cpu).state = TLBSTATE_OK;
  44. BUG_ON(per_cpu(cpu_tlbstate, cpu).active_mm != next);
  45. if (!cpu_test_and_set(cpu, next->cpu_vm_mask)) {
  46. /* We were in lazy tlb mode and leave_mm disabled
  47. * tlb flush IPI delivery. We must reload %cr3.
  48. */
  49. load_cr3(next->pgd);
  50. load_LDT_nolock(&next->context, cpu);
  51. }
  52. }
  53. #endif
  54. }
  55. #define deactivate_mm(tsk, mm) \
  56. asm("movl %0,%%fs ; movl %0,%%gs": :"r" (0))
  57. #define activate_mm(prev, next) \
  58. switch_mm((prev),(next),NULL)
  59. #endif