ohci-pci.c 6.6 KB

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  1. /*
  2. * OHCI HCD (Host Controller Driver) for USB.
  3. *
  4. * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
  5. * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
  6. *
  7. * [ Initialisation is based on Linus' ]
  8. * [ uhci code and gregs ohci fragments ]
  9. * [ (C) Copyright 1999 Linus Torvalds ]
  10. * [ (C) Copyright 1999 Gregory P. Smith]
  11. *
  12. * PCI Bus Glue
  13. *
  14. * This file is licenced under the GPL.
  15. */
  16. #ifndef CONFIG_PCI
  17. #error "This file is PCI bus glue. CONFIG_PCI must be defined."
  18. #endif
  19. /*-------------------------------------------------------------------------*/
  20. static int
  21. ohci_pci_reset (struct usb_hcd *hcd)
  22. {
  23. struct ohci_hcd *ohci = hcd_to_ohci (hcd);
  24. ohci_hcd_init (ohci);
  25. return ohci_init (ohci);
  26. }
  27. static int __devinit
  28. ohci_pci_start (struct usb_hcd *hcd)
  29. {
  30. struct ohci_hcd *ohci = hcd_to_ohci (hcd);
  31. int ret;
  32. /* REVISIT this whole block should move to reset(), which handles
  33. * all the other one-time init.
  34. */
  35. if (hcd->self.controller) {
  36. struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
  37. /* AMD 756, for most chips (early revs), corrupts register
  38. * values on read ... so enable the vendor workaround.
  39. */
  40. if (pdev->vendor == PCI_VENDOR_ID_AMD
  41. && pdev->device == 0x740c) {
  42. ohci->flags = OHCI_QUIRK_AMD756;
  43. ohci_dbg (ohci, "AMD756 erratum 4 workaround\n");
  44. /* also erratum 10 (suspend/resume issues) */
  45. device_init_wakeup(&hcd->self.root_hub->dev, 0);
  46. }
  47. /* FIXME for some of the early AMD 760 southbridges, OHCI
  48. * won't work at all. blacklist them.
  49. */
  50. /* Apple's OHCI driver has a lot of bizarre workarounds
  51. * for this chip. Evidently control and bulk lists
  52. * can get confused. (B&W G3 models, and ...)
  53. */
  54. else if (pdev->vendor == PCI_VENDOR_ID_OPTI
  55. && pdev->device == 0xc861) {
  56. ohci_dbg (ohci,
  57. "WARNING: OPTi workarounds unavailable\n");
  58. }
  59. /* Check for NSC87560. We have to look at the bridge (fn1) to
  60. * identify the USB (fn2). This quirk might apply to more or
  61. * even all NSC stuff.
  62. */
  63. else if (pdev->vendor == PCI_VENDOR_ID_NS) {
  64. struct pci_dev *b;
  65. b = pci_get_slot (pdev->bus,
  66. PCI_DEVFN (PCI_SLOT (pdev->devfn), 1));
  67. if (b && b->device == PCI_DEVICE_ID_NS_87560_LIO
  68. && b->vendor == PCI_VENDOR_ID_NS) {
  69. ohci->flags |= OHCI_QUIRK_SUPERIO;
  70. ohci_dbg (ohci, "Using NSC SuperIO setup\n");
  71. }
  72. pci_dev_put(b);
  73. }
  74. /* Check for Compaq's ZFMicro chipset, which needs short
  75. * delays before control or bulk queues get re-activated
  76. * in finish_unlinks()
  77. */
  78. else if (pdev->vendor == PCI_VENDOR_ID_COMPAQ
  79. && pdev->device == 0xa0f8) {
  80. ohci->flags |= OHCI_QUIRK_ZFMICRO;
  81. ohci_dbg (ohci,
  82. "enabled Compaq ZFMicro chipset quirk\n");
  83. }
  84. /* RWC may not be set for add-in PCI cards, since boot
  85. * firmware probably ignored them. This transfers PCI
  86. * PM wakeup capabilities (once the PCI layer is fixed).
  87. */
  88. if (device_may_wakeup(&pdev->dev))
  89. ohci->hc_control |= OHCI_CTRL_RWC;
  90. }
  91. /* NOTE: there may have already been a first reset, to
  92. * keep bios/smm irqs from making trouble
  93. */
  94. if ((ret = ohci_run (ohci)) < 0) {
  95. ohci_err (ohci, "can't start\n");
  96. ohci_stop (hcd);
  97. return ret;
  98. }
  99. return 0;
  100. }
  101. #ifdef CONFIG_PM
  102. static int ohci_pci_suspend (struct usb_hcd *hcd, pm_message_t message)
  103. {
  104. struct ohci_hcd *ohci = hcd_to_ohci (hcd);
  105. unsigned long flags;
  106. int rc = 0;
  107. /* Root hub was already suspended. Disable irq emission and
  108. * mark HW unaccessible, bail out if RH has been resumed. Use
  109. * the spinlock to properly synchronize with possible pending
  110. * RH suspend or resume activity.
  111. *
  112. * This is still racy as hcd->state is manipulated outside of
  113. * any locks =P But that will be a different fix.
  114. */
  115. spin_lock_irqsave (&ohci->lock, flags);
  116. if (hcd->state != HC_STATE_SUSPENDED) {
  117. rc = -EINVAL;
  118. goto bail;
  119. }
  120. ohci_writel(ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
  121. (void)ohci_readl(ohci, &ohci->regs->intrdisable);
  122. /* make sure snapshot being resumed re-enumerates everything */
  123. if (message.event == PM_EVENT_PRETHAW)
  124. ohci_usb_reset(ohci);
  125. clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
  126. bail:
  127. spin_unlock_irqrestore (&ohci->lock, flags);
  128. return rc;
  129. }
  130. static int ohci_pci_resume (struct usb_hcd *hcd)
  131. {
  132. set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
  133. usb_hcd_resume_root_hub(hcd);
  134. return 0;
  135. }
  136. #endif /* CONFIG_PM */
  137. /*-------------------------------------------------------------------------*/
  138. static const struct hc_driver ohci_pci_hc_driver = {
  139. .description = hcd_name,
  140. .product_desc = "OHCI Host Controller",
  141. .hcd_priv_size = sizeof(struct ohci_hcd),
  142. /*
  143. * generic hardware linkage
  144. */
  145. .irq = ohci_irq,
  146. .flags = HCD_MEMORY | HCD_USB11,
  147. /*
  148. * basic lifecycle operations
  149. */
  150. .reset = ohci_pci_reset,
  151. .start = ohci_pci_start,
  152. .stop = ohci_stop,
  153. .shutdown = ohci_shutdown,
  154. #ifdef CONFIG_PM
  155. /* these suspend/resume entries are for upstream PCI glue ONLY */
  156. .suspend = ohci_pci_suspend,
  157. .resume = ohci_pci_resume,
  158. #endif
  159. /*
  160. * managing i/o requests and associated device resources
  161. */
  162. .urb_enqueue = ohci_urb_enqueue,
  163. .urb_dequeue = ohci_urb_dequeue,
  164. .endpoint_disable = ohci_endpoint_disable,
  165. /*
  166. * scheduling support
  167. */
  168. .get_frame_number = ohci_get_frame,
  169. /*
  170. * root hub support
  171. */
  172. .hub_status_data = ohci_hub_status_data,
  173. .hub_control = ohci_hub_control,
  174. .hub_irq_enable = ohci_rhsc_enable,
  175. #ifdef CONFIG_PM
  176. .bus_suspend = ohci_bus_suspend,
  177. .bus_resume = ohci_bus_resume,
  178. #endif
  179. .start_port_reset = ohci_start_port_reset,
  180. };
  181. /*-------------------------------------------------------------------------*/
  182. static const struct pci_device_id pci_ids [] = { {
  183. /* handle any USB OHCI controller */
  184. PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_OHCI, ~0),
  185. .driver_data = (unsigned long) &ohci_pci_hc_driver,
  186. }, { /* end: all zeroes */ }
  187. };
  188. MODULE_DEVICE_TABLE (pci, pci_ids);
  189. /* pci driver glue; this is a "new style" PCI driver module */
  190. static struct pci_driver ohci_pci_driver = {
  191. .name = (char *) hcd_name,
  192. .id_table = pci_ids,
  193. .probe = usb_hcd_pci_probe,
  194. .remove = usb_hcd_pci_remove,
  195. #ifdef CONFIG_PM
  196. .suspend = usb_hcd_pci_suspend,
  197. .resume = usb_hcd_pci_resume,
  198. #endif
  199. .shutdown = usb_hcd_pci_shutdown,
  200. };
  201. static int __init ohci_hcd_pci_init (void)
  202. {
  203. printk (KERN_DEBUG "%s: " DRIVER_INFO " (PCI)\n", hcd_name);
  204. if (usb_disabled())
  205. return -ENODEV;
  206. pr_debug ("%s: block sizes: ed %Zd td %Zd\n", hcd_name,
  207. sizeof (struct ed), sizeof (struct td));
  208. return pci_register_driver (&ohci_pci_driver);
  209. }
  210. module_init (ohci_hcd_pci_init);
  211. /*-------------------------------------------------------------------------*/
  212. static void __exit ohci_hcd_pci_cleanup (void)
  213. {
  214. pci_unregister_driver (&ohci_pci_driver);
  215. }
  216. module_exit (ohci_hcd_pci_cleanup);