lh7a40x_udc.c 50 KB

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  1. /*
  2. * linux/drivers/usb/gadget/lh7a40x_udc.c
  3. * Sharp LH7A40x on-chip full speed USB device controllers
  4. *
  5. * Copyright (C) 2004 Mikko Lahteenmaki, Nordic ID
  6. * Copyright (C) 2004 Bo Henriksen, Nordic ID
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. *
  22. */
  23. #include <linux/platform_device.h>
  24. #include "lh7a40x_udc.h"
  25. //#define DEBUG printk
  26. //#define DEBUG_EP0 printk
  27. //#define DEBUG_SETUP printk
  28. #ifndef DEBUG_EP0
  29. # define DEBUG_EP0(fmt,args...)
  30. #endif
  31. #ifndef DEBUG_SETUP
  32. # define DEBUG_SETUP(fmt,args...)
  33. #endif
  34. #ifndef DEBUG
  35. # define NO_STATES
  36. # define DEBUG(fmt,args...)
  37. #endif
  38. #define DRIVER_DESC "LH7A40x USB Device Controller"
  39. #define DRIVER_VERSION __DATE__
  40. #ifndef _BIT /* FIXME - what happended to _BIT in 2.6.7bk18? */
  41. #define _BIT(x) (1<<(x))
  42. #endif
  43. struct lh7a40x_udc *the_controller;
  44. static const char driver_name[] = "lh7a40x_udc";
  45. static const char driver_desc[] = DRIVER_DESC;
  46. static const char ep0name[] = "ep0-control";
  47. /*
  48. Local definintions.
  49. */
  50. #ifndef NO_STATES
  51. static char *state_names[] = {
  52. "WAIT_FOR_SETUP",
  53. "DATA_STATE_XMIT",
  54. "DATA_STATE_NEED_ZLP",
  55. "WAIT_FOR_OUT_STATUS",
  56. "DATA_STATE_RECV"
  57. };
  58. #endif
  59. /*
  60. Local declarations.
  61. */
  62. static int lh7a40x_ep_enable(struct usb_ep *ep,
  63. const struct usb_endpoint_descriptor *);
  64. static int lh7a40x_ep_disable(struct usb_ep *ep);
  65. static struct usb_request *lh7a40x_alloc_request(struct usb_ep *ep, gfp_t);
  66. static void lh7a40x_free_request(struct usb_ep *ep, struct usb_request *);
  67. static void *lh7a40x_alloc_buffer(struct usb_ep *ep, unsigned, dma_addr_t *,
  68. gfp_t);
  69. static void lh7a40x_free_buffer(struct usb_ep *ep, void *, dma_addr_t,
  70. unsigned);
  71. static int lh7a40x_queue(struct usb_ep *ep, struct usb_request *, gfp_t);
  72. static int lh7a40x_dequeue(struct usb_ep *ep, struct usb_request *);
  73. static int lh7a40x_set_halt(struct usb_ep *ep, int);
  74. static int lh7a40x_fifo_status(struct usb_ep *ep);
  75. static int lh7a40x_fifo_status(struct usb_ep *ep);
  76. static void lh7a40x_fifo_flush(struct usb_ep *ep);
  77. static void lh7a40x_ep0_kick(struct lh7a40x_udc *dev, struct lh7a40x_ep *ep);
  78. static void lh7a40x_handle_ep0(struct lh7a40x_udc *dev, u32 intr);
  79. static void done(struct lh7a40x_ep *ep, struct lh7a40x_request *req,
  80. int status);
  81. static void pio_irq_enable(int bEndpointAddress);
  82. static void pio_irq_disable(int bEndpointAddress);
  83. static void stop_activity(struct lh7a40x_udc *dev,
  84. struct usb_gadget_driver *driver);
  85. static void flush(struct lh7a40x_ep *ep);
  86. static void udc_enable(struct lh7a40x_udc *dev);
  87. static void udc_set_address(struct lh7a40x_udc *dev, unsigned char address);
  88. static struct usb_ep_ops lh7a40x_ep_ops = {
  89. .enable = lh7a40x_ep_enable,
  90. .disable = lh7a40x_ep_disable,
  91. .alloc_request = lh7a40x_alloc_request,
  92. .free_request = lh7a40x_free_request,
  93. .alloc_buffer = lh7a40x_alloc_buffer,
  94. .free_buffer = lh7a40x_free_buffer,
  95. .queue = lh7a40x_queue,
  96. .dequeue = lh7a40x_dequeue,
  97. .set_halt = lh7a40x_set_halt,
  98. .fifo_status = lh7a40x_fifo_status,
  99. .fifo_flush = lh7a40x_fifo_flush,
  100. };
  101. /* Inline code */
  102. static __inline__ int write_packet(struct lh7a40x_ep *ep,
  103. struct lh7a40x_request *req, int max)
  104. {
  105. u8 *buf;
  106. int length, count;
  107. volatile u32 *fifo = (volatile u32 *)ep->fifo;
  108. buf = req->req.buf + req->req.actual;
  109. prefetch(buf);
  110. length = req->req.length - req->req.actual;
  111. length = min(length, max);
  112. req->req.actual += length;
  113. DEBUG("Write %d (max %d), fifo %p\n", length, max, fifo);
  114. count = length;
  115. while (count--) {
  116. *fifo = *buf++;
  117. }
  118. return length;
  119. }
  120. static __inline__ void usb_set_index(u32 ep)
  121. {
  122. *(volatile u32 *)io_p2v(USB_INDEX) = ep;
  123. }
  124. static __inline__ u32 usb_read(u32 port)
  125. {
  126. return *(volatile u32 *)io_p2v(port);
  127. }
  128. static __inline__ void usb_write(u32 val, u32 port)
  129. {
  130. *(volatile u32 *)io_p2v(port) = val;
  131. }
  132. static __inline__ void usb_set(u32 val, u32 port)
  133. {
  134. volatile u32 *ioport = (volatile u32 *)io_p2v(port);
  135. u32 after = (*ioport) | val;
  136. *ioport = after;
  137. }
  138. static __inline__ void usb_clear(u32 val, u32 port)
  139. {
  140. volatile u32 *ioport = (volatile u32 *)io_p2v(port);
  141. u32 after = (*ioport) & ~val;
  142. *ioport = after;
  143. }
  144. /*-------------------------------------------------------------------------*/
  145. #define GPIO_PORTC_DR (0x80000E08)
  146. #define GPIO_PORTC_DDR (0x80000E18)
  147. #define GPIO_PORTC_PDR (0x80000E70)
  148. /* get port C pin data register */
  149. #define get_portc_pdr(bit) ((usb_read(GPIO_PORTC_PDR) & _BIT(bit)) != 0)
  150. /* get port C data direction register */
  151. #define get_portc_ddr(bit) ((usb_read(GPIO_PORTC_DDR) & _BIT(bit)) != 0)
  152. /* set port C data register */
  153. #define set_portc_dr(bit, val) (val ? usb_set(_BIT(bit), GPIO_PORTC_DR) : usb_clear(_BIT(bit), GPIO_PORTC_DR))
  154. /* set port C data direction register */
  155. #define set_portc_ddr(bit, val) (val ? usb_set(_BIT(bit), GPIO_PORTC_DDR) : usb_clear(_BIT(bit), GPIO_PORTC_DDR))
  156. /*
  157. * LPD7A404 GPIO's:
  158. * Port C bit 1 = USB Port 1 Power Enable
  159. * Port C bit 2 = USB Port 1 Data Carrier Detect
  160. */
  161. #define is_usb_connected() get_portc_pdr(2)
  162. #ifdef CONFIG_USB_GADGET_DEBUG_FILES
  163. static const char proc_node_name[] = "driver/udc";
  164. static int
  165. udc_proc_read(char *page, char **start, off_t off, int count,
  166. int *eof, void *_dev)
  167. {
  168. char *buf = page;
  169. struct lh7a40x_udc *dev = _dev;
  170. char *next = buf;
  171. unsigned size = count;
  172. unsigned long flags;
  173. int t;
  174. if (off != 0)
  175. return 0;
  176. local_irq_save(flags);
  177. /* basic device status */
  178. t = scnprintf(next, size,
  179. DRIVER_DESC "\n"
  180. "%s version: %s\n"
  181. "Gadget driver: %s\n"
  182. "Host: %s\n\n",
  183. driver_name, DRIVER_VERSION,
  184. dev->driver ? dev->driver->driver.name : "(none)",
  185. is_usb_connected()? "full speed" : "disconnected");
  186. size -= t;
  187. next += t;
  188. t = scnprintf(next, size,
  189. "GPIO:\n"
  190. " Port C bit 1: %d, dir %d\n"
  191. " Port C bit 2: %d, dir %d\n\n",
  192. get_portc_pdr(1), get_portc_ddr(1),
  193. get_portc_pdr(2), get_portc_ddr(2)
  194. );
  195. size -= t;
  196. next += t;
  197. t = scnprintf(next, size,
  198. "DCP pullup: %d\n\n",
  199. (usb_read(USB_PM) & PM_USB_DCP) != 0);
  200. size -= t;
  201. next += t;
  202. local_irq_restore(flags);
  203. *eof = 1;
  204. return count - size;
  205. }
  206. #define create_proc_files() create_proc_read_entry(proc_node_name, 0, NULL, udc_proc_read, dev)
  207. #define remove_proc_files() remove_proc_entry(proc_node_name, NULL)
  208. #else /* !CONFIG_USB_GADGET_DEBUG_FILES */
  209. #define create_proc_files() do {} while (0)
  210. #define remove_proc_files() do {} while (0)
  211. #endif /* CONFIG_USB_GADGET_DEBUG_FILES */
  212. /*
  213. * udc_disable - disable USB device controller
  214. */
  215. static void udc_disable(struct lh7a40x_udc *dev)
  216. {
  217. DEBUG("%s, %p\n", __FUNCTION__, dev);
  218. udc_set_address(dev, 0);
  219. /* Disable interrupts */
  220. usb_write(0, USB_IN_INT_EN);
  221. usb_write(0, USB_OUT_INT_EN);
  222. usb_write(0, USB_INT_EN);
  223. /* Disable the USB */
  224. usb_write(0, USB_PM);
  225. #ifdef CONFIG_ARCH_LH7A404
  226. /* Disable USB power */
  227. set_portc_dr(1, 0);
  228. #endif
  229. /* if hardware supports it, disconnect from usb */
  230. /* make_usb_disappear(); */
  231. dev->ep0state = WAIT_FOR_SETUP;
  232. dev->gadget.speed = USB_SPEED_UNKNOWN;
  233. dev->usb_address = 0;
  234. }
  235. /*
  236. * udc_reinit - initialize software state
  237. */
  238. static void udc_reinit(struct lh7a40x_udc *dev)
  239. {
  240. u32 i;
  241. DEBUG("%s, %p\n", __FUNCTION__, dev);
  242. /* device/ep0 records init */
  243. INIT_LIST_HEAD(&dev->gadget.ep_list);
  244. INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
  245. dev->ep0state = WAIT_FOR_SETUP;
  246. /* basic endpoint records init */
  247. for (i = 0; i < UDC_MAX_ENDPOINTS; i++) {
  248. struct lh7a40x_ep *ep = &dev->ep[i];
  249. if (i != 0)
  250. list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list);
  251. ep->desc = 0;
  252. ep->stopped = 0;
  253. INIT_LIST_HEAD(&ep->queue);
  254. ep->pio_irqs = 0;
  255. }
  256. /* the rest was statically initialized, and is read-only */
  257. }
  258. #define BYTES2MAXP(x) (x / 8)
  259. #define MAXP2BYTES(x) (x * 8)
  260. /* until it's enabled, this UDC should be completely invisible
  261. * to any USB host.
  262. */
  263. static void udc_enable(struct lh7a40x_udc *dev)
  264. {
  265. int ep;
  266. DEBUG("%s, %p\n", __FUNCTION__, dev);
  267. dev->gadget.speed = USB_SPEED_UNKNOWN;
  268. #ifdef CONFIG_ARCH_LH7A404
  269. /* Set Port C bit 1 & 2 as output */
  270. set_portc_ddr(1, 1);
  271. set_portc_ddr(2, 1);
  272. /* Enable USB power */
  273. set_portc_dr(1, 0);
  274. #endif
  275. /*
  276. * C.f Chapter 18.1.3.1 Initializing the USB
  277. */
  278. /* Disable the USB */
  279. usb_clear(PM_USB_ENABLE, USB_PM);
  280. /* Reset APB & I/O sides of the USB */
  281. usb_set(USB_RESET_APB | USB_RESET_IO, USB_RESET);
  282. mdelay(5);
  283. usb_clear(USB_RESET_APB | USB_RESET_IO, USB_RESET);
  284. /* Set MAXP values for each */
  285. for (ep = 0; ep < UDC_MAX_ENDPOINTS; ep++) {
  286. struct lh7a40x_ep *ep_reg = &dev->ep[ep];
  287. u32 csr;
  288. usb_set_index(ep);
  289. switch (ep_reg->ep_type) {
  290. case ep_bulk_in:
  291. case ep_interrupt:
  292. usb_clear(USB_IN_CSR2_USB_DMA_EN | USB_IN_CSR2_AUTO_SET,
  293. ep_reg->csr2);
  294. /* Fall through */
  295. case ep_control:
  296. usb_write(BYTES2MAXP(ep_maxpacket(ep_reg)),
  297. USB_IN_MAXP);
  298. break;
  299. case ep_bulk_out:
  300. usb_clear(USB_OUT_CSR2_USB_DMA_EN |
  301. USB_OUT_CSR2_AUTO_CLR, ep_reg->csr2);
  302. usb_write(BYTES2MAXP(ep_maxpacket(ep_reg)),
  303. USB_OUT_MAXP);
  304. break;
  305. }
  306. /* Read & Write CSR1, just in case */
  307. csr = usb_read(ep_reg->csr1);
  308. usb_write(csr, ep_reg->csr1);
  309. flush(ep_reg);
  310. }
  311. /* Disable interrupts */
  312. usb_write(0, USB_IN_INT_EN);
  313. usb_write(0, USB_OUT_INT_EN);
  314. usb_write(0, USB_INT_EN);
  315. /* Enable interrupts */
  316. usb_set(USB_IN_INT_EP0, USB_IN_INT_EN);
  317. usb_set(USB_INT_RESET_INT | USB_INT_RESUME_INT, USB_INT_EN);
  318. /* Dont enable rest of the interrupts */
  319. /* usb_set(USB_IN_INT_EP3 | USB_IN_INT_EP1 | USB_IN_INT_EP0, USB_IN_INT_EN);
  320. usb_set(USB_OUT_INT_EP2, USB_OUT_INT_EN); */
  321. /* Enable SUSPEND */
  322. usb_set(PM_ENABLE_SUSPEND, USB_PM);
  323. /* Enable the USB */
  324. usb_set(PM_USB_ENABLE, USB_PM);
  325. #ifdef CONFIG_ARCH_LH7A404
  326. /* NOTE: DOES NOT WORK! */
  327. /* Let host detect UDC:
  328. * Software must write a 0 to the PMR:DCP_CTRL bit to turn this
  329. * transistor on and pull the USBDP pin HIGH.
  330. */
  331. /* usb_clear(PM_USB_DCP, USB_PM);
  332. usb_set(PM_USB_DCP, USB_PM); */
  333. #endif
  334. }
  335. /*
  336. Register entry point for the peripheral controller driver.
  337. */
  338. int usb_gadget_register_driver(struct usb_gadget_driver *driver)
  339. {
  340. struct lh7a40x_udc *dev = the_controller;
  341. int retval;
  342. DEBUG("%s: %s\n", __FUNCTION__, driver->driver.name);
  343. if (!driver
  344. || driver->speed != USB_SPEED_FULL
  345. || !driver->bind
  346. || !driver->unbind || !driver->disconnect || !driver->setup)
  347. return -EINVAL;
  348. if (!dev)
  349. return -ENODEV;
  350. if (dev->driver)
  351. return -EBUSY;
  352. /* first hook up the driver ... */
  353. dev->driver = driver;
  354. dev->gadget.dev.driver = &driver->driver;
  355. device_add(&dev->gadget.dev);
  356. retval = driver->bind(&dev->gadget);
  357. if (retval) {
  358. printk("%s: bind to driver %s --> error %d\n", dev->gadget.name,
  359. driver->driver.name, retval);
  360. device_del(&dev->gadget.dev);
  361. dev->driver = 0;
  362. dev->gadget.dev.driver = 0;
  363. return retval;
  364. }
  365. /* ... then enable host detection and ep0; and we're ready
  366. * for set_configuration as well as eventual disconnect.
  367. * NOTE: this shouldn't power up until later.
  368. */
  369. printk("%s: registered gadget driver '%s'\n", dev->gadget.name,
  370. driver->driver.name);
  371. udc_enable(dev);
  372. return 0;
  373. }
  374. EXPORT_SYMBOL(usb_gadget_register_driver);
  375. /*
  376. Unregister entry point for the peripheral controller driver.
  377. */
  378. int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
  379. {
  380. struct lh7a40x_udc *dev = the_controller;
  381. unsigned long flags;
  382. if (!dev)
  383. return -ENODEV;
  384. if (!driver || driver != dev->driver)
  385. return -EINVAL;
  386. spin_lock_irqsave(&dev->lock, flags);
  387. dev->driver = 0;
  388. stop_activity(dev, driver);
  389. spin_unlock_irqrestore(&dev->lock, flags);
  390. driver->unbind(&dev->gadget);
  391. device_del(&dev->gadget.dev);
  392. udc_disable(dev);
  393. DEBUG("unregistered gadget driver '%s'\n", driver->driver.name);
  394. return 0;
  395. }
  396. EXPORT_SYMBOL(usb_gadget_unregister_driver);
  397. /*-------------------------------------------------------------------------*/
  398. /** Write request to FIFO (max write == maxp size)
  399. * Return: 0 = still running, 1 = completed, negative = errno
  400. * NOTE: INDEX register must be set for EP
  401. */
  402. static int write_fifo(struct lh7a40x_ep *ep, struct lh7a40x_request *req)
  403. {
  404. u32 max;
  405. u32 csr;
  406. max = le16_to_cpu(ep->desc->wMaxPacketSize);
  407. csr = usb_read(ep->csr1);
  408. DEBUG("CSR: %x %d\n", csr, csr & USB_IN_CSR1_FIFO_NOT_EMPTY);
  409. if (!(csr & USB_IN_CSR1_FIFO_NOT_EMPTY)) {
  410. unsigned count;
  411. int is_last, is_short;
  412. count = write_packet(ep, req, max);
  413. usb_set(USB_IN_CSR1_IN_PKT_RDY, ep->csr1);
  414. /* last packet is usually short (or a zlp) */
  415. if (unlikely(count != max))
  416. is_last = is_short = 1;
  417. else {
  418. if (likely(req->req.length != req->req.actual)
  419. || req->req.zero)
  420. is_last = 0;
  421. else
  422. is_last = 1;
  423. /* interrupt/iso maxpacket may not fill the fifo */
  424. is_short = unlikely(max < ep_maxpacket(ep));
  425. }
  426. DEBUG("%s: wrote %s %d bytes%s%s %d left %p\n", __FUNCTION__,
  427. ep->ep.name, count,
  428. is_last ? "/L" : "", is_short ? "/S" : "",
  429. req->req.length - req->req.actual, req);
  430. /* requests complete when all IN data is in the FIFO */
  431. if (is_last) {
  432. done(ep, req, 0);
  433. if (list_empty(&ep->queue)) {
  434. pio_irq_disable(ep_index(ep));
  435. }
  436. return 1;
  437. }
  438. } else {
  439. DEBUG("Hmm.. %d ep FIFO is not empty!\n", ep_index(ep));
  440. }
  441. return 0;
  442. }
  443. /** Read to request from FIFO (max read == bytes in fifo)
  444. * Return: 0 = still running, 1 = completed, negative = errno
  445. * NOTE: INDEX register must be set for EP
  446. */
  447. static int read_fifo(struct lh7a40x_ep *ep, struct lh7a40x_request *req)
  448. {
  449. u32 csr;
  450. u8 *buf;
  451. unsigned bufferspace, count, is_short;
  452. volatile u32 *fifo = (volatile u32 *)ep->fifo;
  453. /* make sure there's a packet in the FIFO. */
  454. csr = usb_read(ep->csr1);
  455. if (!(csr & USB_OUT_CSR1_OUT_PKT_RDY)) {
  456. DEBUG("%s: Packet NOT ready!\n", __FUNCTION__);
  457. return -EINVAL;
  458. }
  459. buf = req->req.buf + req->req.actual;
  460. prefetchw(buf);
  461. bufferspace = req->req.length - req->req.actual;
  462. /* read all bytes from this packet */
  463. count = usb_read(USB_OUT_FIFO_WC1);
  464. req->req.actual += min(count, bufferspace);
  465. is_short = (count < ep->ep.maxpacket);
  466. DEBUG("read %s %02x, %d bytes%s req %p %d/%d\n",
  467. ep->ep.name, csr, count,
  468. is_short ? "/S" : "", req, req->req.actual, req->req.length);
  469. while (likely(count-- != 0)) {
  470. u8 byte = (u8) (*fifo & 0xff);
  471. if (unlikely(bufferspace == 0)) {
  472. /* this happens when the driver's buffer
  473. * is smaller than what the host sent.
  474. * discard the extra data.
  475. */
  476. if (req->req.status != -EOVERFLOW)
  477. printk("%s overflow %d\n", ep->ep.name, count);
  478. req->req.status = -EOVERFLOW;
  479. } else {
  480. *buf++ = byte;
  481. bufferspace--;
  482. }
  483. }
  484. usb_clear(USB_OUT_CSR1_OUT_PKT_RDY, ep->csr1);
  485. /* completion */
  486. if (is_short || req->req.actual == req->req.length) {
  487. done(ep, req, 0);
  488. usb_set(USB_OUT_CSR1_FIFO_FLUSH, ep->csr1);
  489. if (list_empty(&ep->queue))
  490. pio_irq_disable(ep_index(ep));
  491. return 1;
  492. }
  493. /* finished that packet. the next one may be waiting... */
  494. return 0;
  495. }
  496. /*
  497. * done - retire a request; caller blocked irqs
  498. * INDEX register is preserved to keep same
  499. */
  500. static void done(struct lh7a40x_ep *ep, struct lh7a40x_request *req, int status)
  501. {
  502. unsigned int stopped = ep->stopped;
  503. u32 index;
  504. DEBUG("%s, %p\n", __FUNCTION__, ep);
  505. list_del_init(&req->queue);
  506. if (likely(req->req.status == -EINPROGRESS))
  507. req->req.status = status;
  508. else
  509. status = req->req.status;
  510. if (status && status != -ESHUTDOWN)
  511. DEBUG("complete %s req %p stat %d len %u/%u\n",
  512. ep->ep.name, &req->req, status,
  513. req->req.actual, req->req.length);
  514. /* don't modify queue heads during completion callback */
  515. ep->stopped = 1;
  516. /* Read current index (completion may modify it) */
  517. index = usb_read(USB_INDEX);
  518. spin_unlock(&ep->dev->lock);
  519. req->req.complete(&ep->ep, &req->req);
  520. spin_lock(&ep->dev->lock);
  521. /* Restore index */
  522. usb_set_index(index);
  523. ep->stopped = stopped;
  524. }
  525. /** Enable EP interrupt */
  526. static void pio_irq_enable(int ep)
  527. {
  528. DEBUG("%s: %d\n", __FUNCTION__, ep);
  529. switch (ep) {
  530. case 1:
  531. usb_set(USB_IN_INT_EP1, USB_IN_INT_EN);
  532. break;
  533. case 2:
  534. usb_set(USB_OUT_INT_EP2, USB_OUT_INT_EN);
  535. break;
  536. case 3:
  537. usb_set(USB_IN_INT_EP3, USB_IN_INT_EN);
  538. break;
  539. default:
  540. DEBUG("Unknown endpoint: %d\n", ep);
  541. break;
  542. }
  543. }
  544. /** Disable EP interrupt */
  545. static void pio_irq_disable(int ep)
  546. {
  547. DEBUG("%s: %d\n", __FUNCTION__, ep);
  548. switch (ep) {
  549. case 1:
  550. usb_clear(USB_IN_INT_EP1, USB_IN_INT_EN);
  551. break;
  552. case 2:
  553. usb_clear(USB_OUT_INT_EP2, USB_OUT_INT_EN);
  554. break;
  555. case 3:
  556. usb_clear(USB_IN_INT_EP3, USB_IN_INT_EN);
  557. break;
  558. default:
  559. DEBUG("Unknown endpoint: %d\n", ep);
  560. break;
  561. }
  562. }
  563. /*
  564. * nuke - dequeue ALL requests
  565. */
  566. void nuke(struct lh7a40x_ep *ep, int status)
  567. {
  568. struct lh7a40x_request *req;
  569. DEBUG("%s, %p\n", __FUNCTION__, ep);
  570. /* Flush FIFO */
  571. flush(ep);
  572. /* called with irqs blocked */
  573. while (!list_empty(&ep->queue)) {
  574. req = list_entry(ep->queue.next, struct lh7a40x_request, queue);
  575. done(ep, req, status);
  576. }
  577. /* Disable IRQ if EP is enabled (has descriptor) */
  578. if (ep->desc)
  579. pio_irq_disable(ep_index(ep));
  580. }
  581. /*
  582. void nuke_all(struct lh7a40x_udc *dev)
  583. {
  584. int n;
  585. for(n=0; n<UDC_MAX_ENDPOINTS; n++) {
  586. struct lh7a40x_ep *ep = &dev->ep[n];
  587. usb_set_index(n);
  588. nuke(ep, 0);
  589. }
  590. }*/
  591. /*
  592. static void flush_all(struct lh7a40x_udc *dev)
  593. {
  594. int n;
  595. for (n = 0; n < UDC_MAX_ENDPOINTS; n++)
  596. {
  597. struct lh7a40x_ep *ep = &dev->ep[n];
  598. flush(ep);
  599. }
  600. }
  601. */
  602. /** Flush EP
  603. * NOTE: INDEX register must be set before this call
  604. */
  605. static void flush(struct lh7a40x_ep *ep)
  606. {
  607. DEBUG("%s, %p\n", __FUNCTION__, ep);
  608. switch (ep->ep_type) {
  609. case ep_control:
  610. /* check, by implication c.f. 15.1.2.11 */
  611. break;
  612. case ep_bulk_in:
  613. case ep_interrupt:
  614. /* if(csr & USB_IN_CSR1_IN_PKT_RDY) */
  615. usb_set(USB_IN_CSR1_FIFO_FLUSH, ep->csr1);
  616. break;
  617. case ep_bulk_out:
  618. /* if(csr & USB_OUT_CSR1_OUT_PKT_RDY) */
  619. usb_set(USB_OUT_CSR1_FIFO_FLUSH, ep->csr1);
  620. break;
  621. }
  622. }
  623. /**
  624. * lh7a40x_in_epn - handle IN interrupt
  625. */
  626. static void lh7a40x_in_epn(struct lh7a40x_udc *dev, u32 ep_idx, u32 intr)
  627. {
  628. u32 csr;
  629. struct lh7a40x_ep *ep = &dev->ep[ep_idx];
  630. struct lh7a40x_request *req;
  631. usb_set_index(ep_idx);
  632. csr = usb_read(ep->csr1);
  633. DEBUG("%s: %d, csr %x\n", __FUNCTION__, ep_idx, csr);
  634. if (csr & USB_IN_CSR1_SENT_STALL) {
  635. DEBUG("USB_IN_CSR1_SENT_STALL\n");
  636. usb_set(USB_IN_CSR1_SENT_STALL /*|USB_IN_CSR1_SEND_STALL */ ,
  637. ep->csr1);
  638. return;
  639. }
  640. if (!ep->desc) {
  641. DEBUG("%s: NO EP DESC\n", __FUNCTION__);
  642. return;
  643. }
  644. if (list_empty(&ep->queue))
  645. req = 0;
  646. else
  647. req = list_entry(ep->queue.next, struct lh7a40x_request, queue);
  648. DEBUG("req: %p\n", req);
  649. if (!req)
  650. return;
  651. write_fifo(ep, req);
  652. }
  653. /* ********************************************************************************************* */
  654. /* Bulk OUT (recv)
  655. */
  656. static void lh7a40x_out_epn(struct lh7a40x_udc *dev, u32 ep_idx, u32 intr)
  657. {
  658. struct lh7a40x_ep *ep = &dev->ep[ep_idx];
  659. struct lh7a40x_request *req;
  660. DEBUG("%s: %d\n", __FUNCTION__, ep_idx);
  661. usb_set_index(ep_idx);
  662. if (ep->desc) {
  663. u32 csr;
  664. csr = usb_read(ep->csr1);
  665. while ((csr =
  666. usb_read(ep->
  667. csr1)) & (USB_OUT_CSR1_OUT_PKT_RDY |
  668. USB_OUT_CSR1_SENT_STALL)) {
  669. DEBUG("%s: %x\n", __FUNCTION__, csr);
  670. if (csr & USB_OUT_CSR1_SENT_STALL) {
  671. DEBUG("%s: stall sent, flush fifo\n",
  672. __FUNCTION__);
  673. /* usb_set(USB_OUT_CSR1_FIFO_FLUSH, ep->csr1); */
  674. flush(ep);
  675. } else if (csr & USB_OUT_CSR1_OUT_PKT_RDY) {
  676. if (list_empty(&ep->queue))
  677. req = 0;
  678. else
  679. req =
  680. list_entry(ep->queue.next,
  681. struct lh7a40x_request,
  682. queue);
  683. if (!req) {
  684. printk("%s: NULL REQ %d\n",
  685. __FUNCTION__, ep_idx);
  686. flush(ep);
  687. break;
  688. } else {
  689. read_fifo(ep, req);
  690. }
  691. }
  692. }
  693. } else {
  694. /* Throw packet away.. */
  695. printk("%s: No descriptor?!?\n", __FUNCTION__);
  696. flush(ep);
  697. }
  698. }
  699. static void stop_activity(struct lh7a40x_udc *dev,
  700. struct usb_gadget_driver *driver)
  701. {
  702. int i;
  703. /* don't disconnect drivers more than once */
  704. if (dev->gadget.speed == USB_SPEED_UNKNOWN)
  705. driver = 0;
  706. dev->gadget.speed = USB_SPEED_UNKNOWN;
  707. /* prevent new request submissions, kill any outstanding requests */
  708. for (i = 0; i < UDC_MAX_ENDPOINTS; i++) {
  709. struct lh7a40x_ep *ep = &dev->ep[i];
  710. ep->stopped = 1;
  711. usb_set_index(i);
  712. nuke(ep, -ESHUTDOWN);
  713. }
  714. /* report disconnect; the driver is already quiesced */
  715. if (driver) {
  716. spin_unlock(&dev->lock);
  717. driver->disconnect(&dev->gadget);
  718. spin_lock(&dev->lock);
  719. }
  720. /* re-init driver-visible data structures */
  721. udc_reinit(dev);
  722. }
  723. /** Handle USB RESET interrupt
  724. */
  725. static void lh7a40x_reset_intr(struct lh7a40x_udc *dev)
  726. {
  727. #if 0 /* def CONFIG_ARCH_LH7A404 */
  728. /* Does not work always... */
  729. DEBUG("%s: %d\n", __FUNCTION__, dev->usb_address);
  730. if (!dev->usb_address) {
  731. /*usb_set(USB_RESET_IO, USB_RESET);
  732. mdelay(5);
  733. usb_clear(USB_RESET_IO, USB_RESET); */
  734. return;
  735. }
  736. /* Put the USB controller into reset. */
  737. usb_set(USB_RESET_IO, USB_RESET);
  738. /* Set Device ID to 0 */
  739. udc_set_address(dev, 0);
  740. /* Let PLL2 settle down */
  741. mdelay(5);
  742. /* Release the USB controller from reset */
  743. usb_clear(USB_RESET_IO, USB_RESET);
  744. /* Re-enable UDC */
  745. udc_enable(dev);
  746. #endif
  747. dev->gadget.speed = USB_SPEED_FULL;
  748. }
  749. /*
  750. * lh7a40x usb client interrupt handler.
  751. */
  752. static irqreturn_t lh7a40x_udc_irq(int irq, void *_dev)
  753. {
  754. struct lh7a40x_udc *dev = _dev;
  755. DEBUG("\n\n");
  756. spin_lock(&dev->lock);
  757. for (;;) {
  758. u32 intr_in = usb_read(USB_IN_INT);
  759. u32 intr_out = usb_read(USB_OUT_INT);
  760. u32 intr_int = usb_read(USB_INT);
  761. /* Test also against enable bits.. (lh7a40x errata).. Sigh.. */
  762. u32 in_en = usb_read(USB_IN_INT_EN);
  763. u32 out_en = usb_read(USB_OUT_INT_EN);
  764. if (!intr_out && !intr_in && !intr_int)
  765. break;
  766. DEBUG("%s (on state %s)\n", __FUNCTION__,
  767. state_names[dev->ep0state]);
  768. DEBUG("intr_out = %x\n", intr_out);
  769. DEBUG("intr_in = %x\n", intr_in);
  770. DEBUG("intr_int = %x\n", intr_int);
  771. if (intr_in) {
  772. usb_write(intr_in, USB_IN_INT);
  773. if ((intr_in & USB_IN_INT_EP1)
  774. && (in_en & USB_IN_INT_EP1)) {
  775. DEBUG("USB_IN_INT_EP1\n");
  776. lh7a40x_in_epn(dev, 1, intr_in);
  777. }
  778. if ((intr_in & USB_IN_INT_EP3)
  779. && (in_en & USB_IN_INT_EP3)) {
  780. DEBUG("USB_IN_INT_EP3\n");
  781. lh7a40x_in_epn(dev, 3, intr_in);
  782. }
  783. if (intr_in & USB_IN_INT_EP0) {
  784. DEBUG("USB_IN_INT_EP0 (control)\n");
  785. lh7a40x_handle_ep0(dev, intr_in);
  786. }
  787. }
  788. if (intr_out) {
  789. usb_write(intr_out, USB_OUT_INT);
  790. if ((intr_out & USB_OUT_INT_EP2)
  791. && (out_en & USB_OUT_INT_EP2)) {
  792. DEBUG("USB_OUT_INT_EP2\n");
  793. lh7a40x_out_epn(dev, 2, intr_out);
  794. }
  795. }
  796. if (intr_int) {
  797. usb_write(intr_int, USB_INT);
  798. if (intr_int & USB_INT_RESET_INT) {
  799. lh7a40x_reset_intr(dev);
  800. }
  801. if (intr_int & USB_INT_RESUME_INT) {
  802. DEBUG("USB resume\n");
  803. if (dev->gadget.speed != USB_SPEED_UNKNOWN
  804. && dev->driver
  805. && dev->driver->resume
  806. && is_usb_connected()) {
  807. dev->driver->resume(&dev->gadget);
  808. }
  809. }
  810. if (intr_int & USB_INT_SUSPEND_INT) {
  811. DEBUG("USB suspend%s\n",
  812. is_usb_connected()? "" : "+disconnect");
  813. if (!is_usb_connected()) {
  814. stop_activity(dev, dev->driver);
  815. } else if (dev->gadget.speed !=
  816. USB_SPEED_UNKNOWN && dev->driver
  817. && dev->driver->suspend) {
  818. dev->driver->suspend(&dev->gadget);
  819. }
  820. }
  821. }
  822. }
  823. spin_unlock(&dev->lock);
  824. return IRQ_HANDLED;
  825. }
  826. static int lh7a40x_ep_enable(struct usb_ep *_ep,
  827. const struct usb_endpoint_descriptor *desc)
  828. {
  829. struct lh7a40x_ep *ep;
  830. struct lh7a40x_udc *dev;
  831. unsigned long flags;
  832. DEBUG("%s, %p\n", __FUNCTION__, _ep);
  833. ep = container_of(_ep, struct lh7a40x_ep, ep);
  834. if (!_ep || !desc || ep->desc || _ep->name == ep0name
  835. || desc->bDescriptorType != USB_DT_ENDPOINT
  836. || ep->bEndpointAddress != desc->bEndpointAddress
  837. || ep_maxpacket(ep) < le16_to_cpu(desc->wMaxPacketSize)) {
  838. DEBUG("%s, bad ep or descriptor\n", __FUNCTION__);
  839. return -EINVAL;
  840. }
  841. /* xfer types must match, except that interrupt ~= bulk */
  842. if (ep->bmAttributes != desc->bmAttributes
  843. && ep->bmAttributes != USB_ENDPOINT_XFER_BULK
  844. && desc->bmAttributes != USB_ENDPOINT_XFER_INT) {
  845. DEBUG("%s, %s type mismatch\n", __FUNCTION__, _ep->name);
  846. return -EINVAL;
  847. }
  848. /* hardware _could_ do smaller, but driver doesn't */
  849. if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK
  850. && le16_to_cpu(desc->wMaxPacketSize) != ep_maxpacket(ep))
  851. || !desc->wMaxPacketSize) {
  852. DEBUG("%s, bad %s maxpacket\n", __FUNCTION__, _ep->name);
  853. return -ERANGE;
  854. }
  855. dev = ep->dev;
  856. if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
  857. DEBUG("%s, bogus device state\n", __FUNCTION__);
  858. return -ESHUTDOWN;
  859. }
  860. spin_lock_irqsave(&ep->dev->lock, flags);
  861. ep->stopped = 0;
  862. ep->desc = desc;
  863. ep->pio_irqs = 0;
  864. ep->ep.maxpacket = le16_to_cpu(desc->wMaxPacketSize);
  865. spin_unlock_irqrestore(&ep->dev->lock, flags);
  866. /* Reset halt state (does flush) */
  867. lh7a40x_set_halt(_ep, 0);
  868. DEBUG("%s: enabled %s\n", __FUNCTION__, _ep->name);
  869. return 0;
  870. }
  871. /** Disable EP
  872. * NOTE: Sets INDEX register
  873. */
  874. static int lh7a40x_ep_disable(struct usb_ep *_ep)
  875. {
  876. struct lh7a40x_ep *ep;
  877. unsigned long flags;
  878. DEBUG("%s, %p\n", __FUNCTION__, _ep);
  879. ep = container_of(_ep, struct lh7a40x_ep, ep);
  880. if (!_ep || !ep->desc) {
  881. DEBUG("%s, %s not enabled\n", __FUNCTION__,
  882. _ep ? ep->ep.name : NULL);
  883. return -EINVAL;
  884. }
  885. spin_lock_irqsave(&ep->dev->lock, flags);
  886. usb_set_index(ep_index(ep));
  887. /* Nuke all pending requests (does flush) */
  888. nuke(ep, -ESHUTDOWN);
  889. /* Disable ep IRQ */
  890. pio_irq_disable(ep_index(ep));
  891. ep->desc = 0;
  892. ep->stopped = 1;
  893. spin_unlock_irqrestore(&ep->dev->lock, flags);
  894. DEBUG("%s: disabled %s\n", __FUNCTION__, _ep->name);
  895. return 0;
  896. }
  897. static struct usb_request *lh7a40x_alloc_request(struct usb_ep *ep,
  898. gfp_t gfp_flags)
  899. {
  900. struct lh7a40x_request *req;
  901. DEBUG("%s, %p\n", __FUNCTION__, ep);
  902. req = kzalloc(sizeof(*req), gfp_flags);
  903. if (!req)
  904. return 0;
  905. INIT_LIST_HEAD(&req->queue);
  906. return &req->req;
  907. }
  908. static void lh7a40x_free_request(struct usb_ep *ep, struct usb_request *_req)
  909. {
  910. struct lh7a40x_request *req;
  911. DEBUG("%s, %p\n", __FUNCTION__, ep);
  912. req = container_of(_req, struct lh7a40x_request, req);
  913. WARN_ON(!list_empty(&req->queue));
  914. kfree(req);
  915. }
  916. static void *lh7a40x_alloc_buffer(struct usb_ep *ep, unsigned bytes,
  917. dma_addr_t * dma, gfp_t gfp_flags)
  918. {
  919. char *retval;
  920. DEBUG("%s (%p, %d, %d)\n", __FUNCTION__, ep, bytes, gfp_flags);
  921. retval = kmalloc(bytes, gfp_flags & ~(__GFP_DMA | __GFP_HIGHMEM));
  922. if (retval)
  923. *dma = virt_to_bus(retval);
  924. return retval;
  925. }
  926. static void lh7a40x_free_buffer(struct usb_ep *ep, void *buf, dma_addr_t dma,
  927. unsigned bytes)
  928. {
  929. DEBUG("%s, %p\n", __FUNCTION__, ep);
  930. kfree(buf);
  931. }
  932. /** Queue one request
  933. * Kickstart transfer if needed
  934. * NOTE: Sets INDEX register
  935. */
  936. static int lh7a40x_queue(struct usb_ep *_ep, struct usb_request *_req,
  937. gfp_t gfp_flags)
  938. {
  939. struct lh7a40x_request *req;
  940. struct lh7a40x_ep *ep;
  941. struct lh7a40x_udc *dev;
  942. unsigned long flags;
  943. DEBUG("\n\n\n%s, %p\n", __FUNCTION__, _ep);
  944. req = container_of(_req, struct lh7a40x_request, req);
  945. if (unlikely
  946. (!_req || !_req->complete || !_req->buf
  947. || !list_empty(&req->queue))) {
  948. DEBUG("%s, bad params\n", __FUNCTION__);
  949. return -EINVAL;
  950. }
  951. ep = container_of(_ep, struct lh7a40x_ep, ep);
  952. if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) {
  953. DEBUG("%s, bad ep\n", __FUNCTION__);
  954. return -EINVAL;
  955. }
  956. dev = ep->dev;
  957. if (unlikely(!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
  958. DEBUG("%s, bogus device state %p\n", __FUNCTION__, dev->driver);
  959. return -ESHUTDOWN;
  960. }
  961. DEBUG("%s queue req %p, len %d buf %p\n", _ep->name, _req, _req->length,
  962. _req->buf);
  963. spin_lock_irqsave(&dev->lock, flags);
  964. _req->status = -EINPROGRESS;
  965. _req->actual = 0;
  966. /* kickstart this i/o queue? */
  967. DEBUG("Add to %d Q %d %d\n", ep_index(ep), list_empty(&ep->queue),
  968. ep->stopped);
  969. if (list_empty(&ep->queue) && likely(!ep->stopped)) {
  970. u32 csr;
  971. if (unlikely(ep_index(ep) == 0)) {
  972. /* EP0 */
  973. list_add_tail(&req->queue, &ep->queue);
  974. lh7a40x_ep0_kick(dev, ep);
  975. req = 0;
  976. } else if (ep_is_in(ep)) {
  977. /* EP1 & EP3 */
  978. usb_set_index(ep_index(ep));
  979. csr = usb_read(ep->csr1);
  980. pio_irq_enable(ep_index(ep));
  981. if ((csr & USB_IN_CSR1_FIFO_NOT_EMPTY) == 0) {
  982. if (write_fifo(ep, req) == 1)
  983. req = 0;
  984. }
  985. } else {
  986. /* EP2 */
  987. usb_set_index(ep_index(ep));
  988. csr = usb_read(ep->csr1);
  989. pio_irq_enable(ep_index(ep));
  990. if (!(csr & USB_OUT_CSR1_FIFO_FULL)) {
  991. if (read_fifo(ep, req) == 1)
  992. req = 0;
  993. }
  994. }
  995. }
  996. /* pio or dma irq handler advances the queue. */
  997. if (likely(req != 0))
  998. list_add_tail(&req->queue, &ep->queue);
  999. spin_unlock_irqrestore(&dev->lock, flags);
  1000. return 0;
  1001. }
  1002. /* dequeue JUST ONE request */
  1003. static int lh7a40x_dequeue(struct usb_ep *_ep, struct usb_request *_req)
  1004. {
  1005. struct lh7a40x_ep *ep;
  1006. struct lh7a40x_request *req;
  1007. unsigned long flags;
  1008. DEBUG("%s, %p\n", __FUNCTION__, _ep);
  1009. ep = container_of(_ep, struct lh7a40x_ep, ep);
  1010. if (!_ep || ep->ep.name == ep0name)
  1011. return -EINVAL;
  1012. spin_lock_irqsave(&ep->dev->lock, flags);
  1013. /* make sure it's actually queued on this endpoint */
  1014. list_for_each_entry(req, &ep->queue, queue) {
  1015. if (&req->req == _req)
  1016. break;
  1017. }
  1018. if (&req->req != _req) {
  1019. spin_unlock_irqrestore(&ep->dev->lock, flags);
  1020. return -EINVAL;
  1021. }
  1022. done(ep, req, -ECONNRESET);
  1023. spin_unlock_irqrestore(&ep->dev->lock, flags);
  1024. return 0;
  1025. }
  1026. /** Halt specific EP
  1027. * Return 0 if success
  1028. * NOTE: Sets INDEX register to EP !
  1029. */
  1030. static int lh7a40x_set_halt(struct usb_ep *_ep, int value)
  1031. {
  1032. struct lh7a40x_ep *ep;
  1033. unsigned long flags;
  1034. ep = container_of(_ep, struct lh7a40x_ep, ep);
  1035. if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) {
  1036. DEBUG("%s, bad ep\n", __FUNCTION__);
  1037. return -EINVAL;
  1038. }
  1039. usb_set_index(ep_index(ep));
  1040. DEBUG("%s, ep %d, val %d\n", __FUNCTION__, ep_index(ep), value);
  1041. spin_lock_irqsave(&ep->dev->lock, flags);
  1042. if (ep_index(ep) == 0) {
  1043. /* EP0 */
  1044. usb_set(EP0_SEND_STALL, ep->csr1);
  1045. } else if (ep_is_in(ep)) {
  1046. u32 csr = usb_read(ep->csr1);
  1047. if (value && ((csr & USB_IN_CSR1_FIFO_NOT_EMPTY)
  1048. || !list_empty(&ep->queue))) {
  1049. /*
  1050. * Attempts to halt IN endpoints will fail (returning -EAGAIN)
  1051. * if any transfer requests are still queued, or if the controller
  1052. * FIFO still holds bytes that the host hasn’t collected.
  1053. */
  1054. spin_unlock_irqrestore(&ep->dev->lock, flags);
  1055. DEBUG
  1056. ("Attempt to halt IN endpoint failed (returning -EAGAIN) %d %d\n",
  1057. (csr & USB_IN_CSR1_FIFO_NOT_EMPTY),
  1058. !list_empty(&ep->queue));
  1059. return -EAGAIN;
  1060. }
  1061. flush(ep);
  1062. if (value)
  1063. usb_set(USB_IN_CSR1_SEND_STALL, ep->csr1);
  1064. else {
  1065. usb_clear(USB_IN_CSR1_SEND_STALL, ep->csr1);
  1066. usb_set(USB_IN_CSR1_CLR_DATA_TOGGLE, ep->csr1);
  1067. }
  1068. } else {
  1069. flush(ep);
  1070. if (value)
  1071. usb_set(USB_OUT_CSR1_SEND_STALL, ep->csr1);
  1072. else {
  1073. usb_clear(USB_OUT_CSR1_SEND_STALL, ep->csr1);
  1074. usb_set(USB_OUT_CSR1_CLR_DATA_REG, ep->csr1);
  1075. }
  1076. }
  1077. if (value) {
  1078. ep->stopped = 1;
  1079. } else {
  1080. ep->stopped = 0;
  1081. }
  1082. spin_unlock_irqrestore(&ep->dev->lock, flags);
  1083. DEBUG("%s %s halted\n", _ep->name, value == 0 ? "NOT" : "IS");
  1084. return 0;
  1085. }
  1086. /** Return bytes in EP FIFO
  1087. * NOTE: Sets INDEX register to EP
  1088. */
  1089. static int lh7a40x_fifo_status(struct usb_ep *_ep)
  1090. {
  1091. u32 csr;
  1092. int count = 0;
  1093. struct lh7a40x_ep *ep;
  1094. ep = container_of(_ep, struct lh7a40x_ep, ep);
  1095. if (!_ep) {
  1096. DEBUG("%s, bad ep\n", __FUNCTION__);
  1097. return -ENODEV;
  1098. }
  1099. DEBUG("%s, %d\n", __FUNCTION__, ep_index(ep));
  1100. /* LPD can't report unclaimed bytes from IN fifos */
  1101. if (ep_is_in(ep))
  1102. return -EOPNOTSUPP;
  1103. usb_set_index(ep_index(ep));
  1104. csr = usb_read(ep->csr1);
  1105. if (ep->dev->gadget.speed != USB_SPEED_UNKNOWN ||
  1106. csr & USB_OUT_CSR1_OUT_PKT_RDY) {
  1107. count = usb_read(USB_OUT_FIFO_WC1);
  1108. }
  1109. return count;
  1110. }
  1111. /** Flush EP FIFO
  1112. * NOTE: Sets INDEX register to EP
  1113. */
  1114. static void lh7a40x_fifo_flush(struct usb_ep *_ep)
  1115. {
  1116. struct lh7a40x_ep *ep;
  1117. ep = container_of(_ep, struct lh7a40x_ep, ep);
  1118. if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) {
  1119. DEBUG("%s, bad ep\n", __FUNCTION__);
  1120. return;
  1121. }
  1122. usb_set_index(ep_index(ep));
  1123. flush(ep);
  1124. }
  1125. /****************************************************************/
  1126. /* End Point 0 related functions */
  1127. /****************************************************************/
  1128. /* return: 0 = still running, 1 = completed, negative = errno */
  1129. static int write_fifo_ep0(struct lh7a40x_ep *ep, struct lh7a40x_request *req)
  1130. {
  1131. u32 max;
  1132. unsigned count;
  1133. int is_last;
  1134. max = ep_maxpacket(ep);
  1135. DEBUG_EP0("%s\n", __FUNCTION__);
  1136. count = write_packet(ep, req, max);
  1137. /* last packet is usually short (or a zlp) */
  1138. if (unlikely(count != max))
  1139. is_last = 1;
  1140. else {
  1141. if (likely(req->req.length != req->req.actual) || req->req.zero)
  1142. is_last = 0;
  1143. else
  1144. is_last = 1;
  1145. }
  1146. DEBUG_EP0("%s: wrote %s %d bytes%s %d left %p\n", __FUNCTION__,
  1147. ep->ep.name, count,
  1148. is_last ? "/L" : "", req->req.length - req->req.actual, req);
  1149. /* requests complete when all IN data is in the FIFO */
  1150. if (is_last) {
  1151. done(ep, req, 0);
  1152. return 1;
  1153. }
  1154. return 0;
  1155. }
  1156. static __inline__ int lh7a40x_fifo_read(struct lh7a40x_ep *ep,
  1157. unsigned char *cp, int max)
  1158. {
  1159. int bytes;
  1160. int count = usb_read(USB_OUT_FIFO_WC1);
  1161. volatile u32 *fifo = (volatile u32 *)ep->fifo;
  1162. if (count > max)
  1163. count = max;
  1164. bytes = count;
  1165. while (count--)
  1166. *cp++ = *fifo & 0xFF;
  1167. return bytes;
  1168. }
  1169. static __inline__ void lh7a40x_fifo_write(struct lh7a40x_ep *ep,
  1170. unsigned char *cp, int count)
  1171. {
  1172. volatile u32 *fifo = (volatile u32 *)ep->fifo;
  1173. DEBUG_EP0("fifo_write: %d %d\n", ep_index(ep), count);
  1174. while (count--)
  1175. *fifo = *cp++;
  1176. }
  1177. static int read_fifo_ep0(struct lh7a40x_ep *ep, struct lh7a40x_request *req)
  1178. {
  1179. u32 csr;
  1180. u8 *buf;
  1181. unsigned bufferspace, count, is_short;
  1182. volatile u32 *fifo = (volatile u32 *)ep->fifo;
  1183. DEBUG_EP0("%s\n", __FUNCTION__);
  1184. csr = usb_read(USB_EP0_CSR);
  1185. if (!(csr & USB_OUT_CSR1_OUT_PKT_RDY))
  1186. return 0;
  1187. buf = req->req.buf + req->req.actual;
  1188. prefetchw(buf);
  1189. bufferspace = req->req.length - req->req.actual;
  1190. /* read all bytes from this packet */
  1191. if (likely(csr & EP0_OUT_PKT_RDY)) {
  1192. count = usb_read(USB_OUT_FIFO_WC1);
  1193. req->req.actual += min(count, bufferspace);
  1194. } else /* zlp */
  1195. count = 0;
  1196. is_short = (count < ep->ep.maxpacket);
  1197. DEBUG_EP0("read %s %02x, %d bytes%s req %p %d/%d\n",
  1198. ep->ep.name, csr, count,
  1199. is_short ? "/S" : "", req, req->req.actual, req->req.length);
  1200. while (likely(count-- != 0)) {
  1201. u8 byte = (u8) (*fifo & 0xff);
  1202. if (unlikely(bufferspace == 0)) {
  1203. /* this happens when the driver's buffer
  1204. * is smaller than what the host sent.
  1205. * discard the extra data.
  1206. */
  1207. if (req->req.status != -EOVERFLOW)
  1208. DEBUG_EP0("%s overflow %d\n", ep->ep.name,
  1209. count);
  1210. req->req.status = -EOVERFLOW;
  1211. } else {
  1212. *buf++ = byte;
  1213. bufferspace--;
  1214. }
  1215. }
  1216. /* completion */
  1217. if (is_short || req->req.actual == req->req.length) {
  1218. done(ep, req, 0);
  1219. return 1;
  1220. }
  1221. /* finished that packet. the next one may be waiting... */
  1222. return 0;
  1223. }
  1224. /**
  1225. * udc_set_address - set the USB address for this device
  1226. * @address:
  1227. *
  1228. * Called from control endpoint function after it decodes a set address setup packet.
  1229. */
  1230. static void udc_set_address(struct lh7a40x_udc *dev, unsigned char address)
  1231. {
  1232. DEBUG_EP0("%s: %d\n", __FUNCTION__, address);
  1233. /* c.f. 15.1.2.2 Table 15-4 address will be used after DATA_END is set */
  1234. dev->usb_address = address;
  1235. usb_set((address & USB_FA_FUNCTION_ADDR), USB_FA);
  1236. usb_set(USB_FA_ADDR_UPDATE | (address & USB_FA_FUNCTION_ADDR), USB_FA);
  1237. /* usb_read(USB_FA); */
  1238. }
  1239. /*
  1240. * DATA_STATE_RECV (OUT_PKT_RDY)
  1241. * - if error
  1242. * set EP0_CLR_OUT | EP0_DATA_END | EP0_SEND_STALL bits
  1243. * - else
  1244. * set EP0_CLR_OUT bit
  1245. if last set EP0_DATA_END bit
  1246. */
  1247. static void lh7a40x_ep0_out(struct lh7a40x_udc *dev, u32 csr)
  1248. {
  1249. struct lh7a40x_request *req;
  1250. struct lh7a40x_ep *ep = &dev->ep[0];
  1251. int ret;
  1252. DEBUG_EP0("%s: %x\n", __FUNCTION__, csr);
  1253. if (list_empty(&ep->queue))
  1254. req = 0;
  1255. else
  1256. req = list_entry(ep->queue.next, struct lh7a40x_request, queue);
  1257. if (req) {
  1258. if (req->req.length == 0) {
  1259. DEBUG_EP0("ZERO LENGTH OUT!\n");
  1260. usb_set((EP0_CLR_OUT | EP0_DATA_END), USB_EP0_CSR);
  1261. dev->ep0state = WAIT_FOR_SETUP;
  1262. return;
  1263. }
  1264. ret = read_fifo_ep0(ep, req);
  1265. if (ret) {
  1266. /* Done! */
  1267. DEBUG_EP0("%s: finished, waiting for status\n",
  1268. __FUNCTION__);
  1269. usb_set((EP0_CLR_OUT | EP0_DATA_END), USB_EP0_CSR);
  1270. dev->ep0state = WAIT_FOR_SETUP;
  1271. } else {
  1272. /* Not done yet.. */
  1273. DEBUG_EP0("%s: not finished\n", __FUNCTION__);
  1274. usb_set(EP0_CLR_OUT, USB_EP0_CSR);
  1275. }
  1276. } else {
  1277. DEBUG_EP0("NO REQ??!\n");
  1278. }
  1279. }
  1280. /*
  1281. * DATA_STATE_XMIT
  1282. */
  1283. static int lh7a40x_ep0_in(struct lh7a40x_udc *dev, u32 csr)
  1284. {
  1285. struct lh7a40x_request *req;
  1286. struct lh7a40x_ep *ep = &dev->ep[0];
  1287. int ret, need_zlp = 0;
  1288. DEBUG_EP0("%s: %x\n", __FUNCTION__, csr);
  1289. if (list_empty(&ep->queue))
  1290. req = 0;
  1291. else
  1292. req = list_entry(ep->queue.next, struct lh7a40x_request, queue);
  1293. if (!req) {
  1294. DEBUG_EP0("%s: NULL REQ\n", __FUNCTION__);
  1295. return 0;
  1296. }
  1297. if (req->req.length == 0) {
  1298. usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR);
  1299. dev->ep0state = WAIT_FOR_SETUP;
  1300. return 1;
  1301. }
  1302. if (req->req.length - req->req.actual == EP0_PACKETSIZE) {
  1303. /* Next write will end with the packet size, */
  1304. /* so we need Zero-length-packet */
  1305. need_zlp = 1;
  1306. }
  1307. ret = write_fifo_ep0(ep, req);
  1308. if (ret == 1 && !need_zlp) {
  1309. /* Last packet */
  1310. DEBUG_EP0("%s: finished, waiting for status\n", __FUNCTION__);
  1311. usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR);
  1312. dev->ep0state = WAIT_FOR_SETUP;
  1313. } else {
  1314. DEBUG_EP0("%s: not finished\n", __FUNCTION__);
  1315. usb_set(EP0_IN_PKT_RDY, USB_EP0_CSR);
  1316. }
  1317. if (need_zlp) {
  1318. DEBUG_EP0("%s: Need ZLP!\n", __FUNCTION__);
  1319. usb_set(EP0_IN_PKT_RDY, USB_EP0_CSR);
  1320. dev->ep0state = DATA_STATE_NEED_ZLP;
  1321. }
  1322. return 1;
  1323. }
  1324. static int lh7a40x_handle_get_status(struct lh7a40x_udc *dev,
  1325. struct usb_ctrlrequest *ctrl)
  1326. {
  1327. struct lh7a40x_ep *ep0 = &dev->ep[0];
  1328. struct lh7a40x_ep *qep;
  1329. int reqtype = (ctrl->bRequestType & USB_RECIP_MASK);
  1330. u16 val = 0;
  1331. if (reqtype == USB_RECIP_INTERFACE) {
  1332. /* This is not supported.
  1333. * And according to the USB spec, this one does nothing..
  1334. * Just return 0
  1335. */
  1336. DEBUG_SETUP("GET_STATUS: USB_RECIP_INTERFACE\n");
  1337. } else if (reqtype == USB_RECIP_DEVICE) {
  1338. DEBUG_SETUP("GET_STATUS: USB_RECIP_DEVICE\n");
  1339. val |= (1 << 0); /* Self powered */
  1340. /*val |= (1<<1); *//* Remote wakeup */
  1341. } else if (reqtype == USB_RECIP_ENDPOINT) {
  1342. int ep_num = (ctrl->wIndex & ~USB_DIR_IN);
  1343. DEBUG_SETUP
  1344. ("GET_STATUS: USB_RECIP_ENDPOINT (%d), ctrl->wLength = %d\n",
  1345. ep_num, ctrl->wLength);
  1346. if (ctrl->wLength > 2 || ep_num > 3)
  1347. return -EOPNOTSUPP;
  1348. qep = &dev->ep[ep_num];
  1349. if (ep_is_in(qep) != ((ctrl->wIndex & USB_DIR_IN) ? 1 : 0)
  1350. && ep_index(qep) != 0) {
  1351. return -EOPNOTSUPP;
  1352. }
  1353. usb_set_index(ep_index(qep));
  1354. /* Return status on next IN token */
  1355. switch (qep->ep_type) {
  1356. case ep_control:
  1357. val =
  1358. (usb_read(qep->csr1) & EP0_SEND_STALL) ==
  1359. EP0_SEND_STALL;
  1360. break;
  1361. case ep_bulk_in:
  1362. case ep_interrupt:
  1363. val =
  1364. (usb_read(qep->csr1) & USB_IN_CSR1_SEND_STALL) ==
  1365. USB_IN_CSR1_SEND_STALL;
  1366. break;
  1367. case ep_bulk_out:
  1368. val =
  1369. (usb_read(qep->csr1) & USB_OUT_CSR1_SEND_STALL) ==
  1370. USB_OUT_CSR1_SEND_STALL;
  1371. break;
  1372. }
  1373. /* Back to EP0 index */
  1374. usb_set_index(0);
  1375. DEBUG_SETUP("GET_STATUS, ep: %d (%x), val = %d\n", ep_num,
  1376. ctrl->wIndex, val);
  1377. } else {
  1378. DEBUG_SETUP("Unknown REQ TYPE: %d\n", reqtype);
  1379. return -EOPNOTSUPP;
  1380. }
  1381. /* Clear "out packet ready" */
  1382. usb_set((EP0_CLR_OUT), USB_EP0_CSR);
  1383. /* Put status to FIFO */
  1384. lh7a40x_fifo_write(ep0, (u8 *) & val, sizeof(val));
  1385. /* Issue "In packet ready" */
  1386. usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR);
  1387. return 0;
  1388. }
  1389. /*
  1390. * WAIT_FOR_SETUP (OUT_PKT_RDY)
  1391. * - read data packet from EP0 FIFO
  1392. * - decode command
  1393. * - if error
  1394. * set EP0_CLR_OUT | EP0_DATA_END | EP0_SEND_STALL bits
  1395. * - else
  1396. * set EP0_CLR_OUT | EP0_DATA_END bits
  1397. */
  1398. static void lh7a40x_ep0_setup(struct lh7a40x_udc *dev, u32 csr)
  1399. {
  1400. struct lh7a40x_ep *ep = &dev->ep[0];
  1401. struct usb_ctrlrequest ctrl;
  1402. int i, bytes, is_in;
  1403. DEBUG_SETUP("%s: %x\n", __FUNCTION__, csr);
  1404. /* Nuke all previous transfers */
  1405. nuke(ep, -EPROTO);
  1406. /* read control req from fifo (8 bytes) */
  1407. bytes = lh7a40x_fifo_read(ep, (unsigned char *)&ctrl, 8);
  1408. DEBUG_SETUP("Read CTRL REQ %d bytes\n", bytes);
  1409. DEBUG_SETUP("CTRL.bRequestType = %d (is_in %d)\n", ctrl.bRequestType,
  1410. ctrl.bRequestType == USB_DIR_IN);
  1411. DEBUG_SETUP("CTRL.bRequest = %d\n", ctrl.bRequest);
  1412. DEBUG_SETUP("CTRL.wLength = %d\n", ctrl.wLength);
  1413. DEBUG_SETUP("CTRL.wValue = %d (%d)\n", ctrl.wValue, ctrl.wValue >> 8);
  1414. DEBUG_SETUP("CTRL.wIndex = %d\n", ctrl.wIndex);
  1415. /* Set direction of EP0 */
  1416. if (likely(ctrl.bRequestType & USB_DIR_IN)) {
  1417. ep->bEndpointAddress |= USB_DIR_IN;
  1418. is_in = 1;
  1419. } else {
  1420. ep->bEndpointAddress &= ~USB_DIR_IN;
  1421. is_in = 0;
  1422. }
  1423. dev->req_pending = 1;
  1424. /* Handle some SETUP packets ourselves */
  1425. switch (ctrl.bRequest) {
  1426. case USB_REQ_SET_ADDRESS:
  1427. if (ctrl.bRequestType != (USB_TYPE_STANDARD | USB_RECIP_DEVICE))
  1428. break;
  1429. DEBUG_SETUP("USB_REQ_SET_ADDRESS (%d)\n", ctrl.wValue);
  1430. udc_set_address(dev, ctrl.wValue);
  1431. usb_set((EP0_CLR_OUT | EP0_DATA_END), USB_EP0_CSR);
  1432. return;
  1433. case USB_REQ_GET_STATUS:{
  1434. if (lh7a40x_handle_get_status(dev, &ctrl) == 0)
  1435. return;
  1436. case USB_REQ_CLEAR_FEATURE:
  1437. case USB_REQ_SET_FEATURE:
  1438. if (ctrl.bRequestType == USB_RECIP_ENDPOINT) {
  1439. struct lh7a40x_ep *qep;
  1440. int ep_num = (ctrl.wIndex & 0x0f);
  1441. /* Support only HALT feature */
  1442. if (ctrl.wValue != 0 || ctrl.wLength != 0
  1443. || ep_num > 3 || ep_num < 1)
  1444. break;
  1445. qep = &dev->ep[ep_num];
  1446. spin_unlock(&dev->lock);
  1447. if (ctrl.bRequest == USB_REQ_SET_FEATURE) {
  1448. DEBUG_SETUP("SET_FEATURE (%d)\n",
  1449. ep_num);
  1450. lh7a40x_set_halt(&qep->ep, 1);
  1451. } else {
  1452. DEBUG_SETUP("CLR_FEATURE (%d)\n",
  1453. ep_num);
  1454. lh7a40x_set_halt(&qep->ep, 0);
  1455. }
  1456. spin_lock(&dev->lock);
  1457. usb_set_index(0);
  1458. /* Reply with a ZLP on next IN token */
  1459. usb_set((EP0_CLR_OUT | EP0_DATA_END),
  1460. USB_EP0_CSR);
  1461. return;
  1462. }
  1463. break;
  1464. }
  1465. default:
  1466. break;
  1467. }
  1468. if (likely(dev->driver)) {
  1469. /* device-2-host (IN) or no data setup command, process immediately */
  1470. spin_unlock(&dev->lock);
  1471. i = dev->driver->setup(&dev->gadget, &ctrl);
  1472. spin_lock(&dev->lock);
  1473. if (i < 0) {
  1474. /* setup processing failed, force stall */
  1475. DEBUG_SETUP
  1476. (" --> ERROR: gadget setup FAILED (stalling), setup returned %d\n",
  1477. i);
  1478. usb_set_index(0);
  1479. usb_set((EP0_CLR_OUT | EP0_DATA_END | EP0_SEND_STALL),
  1480. USB_EP0_CSR);
  1481. /* ep->stopped = 1; */
  1482. dev->ep0state = WAIT_FOR_SETUP;
  1483. }
  1484. }
  1485. }
  1486. /*
  1487. * DATA_STATE_NEED_ZLP
  1488. */
  1489. static void lh7a40x_ep0_in_zlp(struct lh7a40x_udc *dev, u32 csr)
  1490. {
  1491. DEBUG_EP0("%s: %x\n", __FUNCTION__, csr);
  1492. /* c.f. Table 15-14 */
  1493. usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR);
  1494. dev->ep0state = WAIT_FOR_SETUP;
  1495. }
  1496. /*
  1497. * handle ep0 interrupt
  1498. */
  1499. static void lh7a40x_handle_ep0(struct lh7a40x_udc *dev, u32 intr)
  1500. {
  1501. struct lh7a40x_ep *ep = &dev->ep[0];
  1502. u32 csr;
  1503. /* Set index 0 */
  1504. usb_set_index(0);
  1505. csr = usb_read(USB_EP0_CSR);
  1506. DEBUG_EP0("%s: csr = %x\n", __FUNCTION__, csr);
  1507. /*
  1508. * For overview of what we should be doing see c.f. Chapter 18.1.2.4
  1509. * We will follow that outline here modified by our own global state
  1510. * indication which provides hints as to what we think should be
  1511. * happening..
  1512. */
  1513. /*
  1514. * if SENT_STALL is set
  1515. * - clear the SENT_STALL bit
  1516. */
  1517. if (csr & EP0_SENT_STALL) {
  1518. DEBUG_EP0("%s: EP0_SENT_STALL is set: %x\n", __FUNCTION__, csr);
  1519. usb_clear((EP0_SENT_STALL | EP0_SEND_STALL), USB_EP0_CSR);
  1520. nuke(ep, -ECONNABORTED);
  1521. dev->ep0state = WAIT_FOR_SETUP;
  1522. return;
  1523. }
  1524. /*
  1525. * if a transfer is in progress && IN_PKT_RDY and OUT_PKT_RDY are clear
  1526. * - fill EP0 FIFO
  1527. * - if last packet
  1528. * - set IN_PKT_RDY | DATA_END
  1529. * - else
  1530. * set IN_PKT_RDY
  1531. */
  1532. if (!(csr & (EP0_IN_PKT_RDY | EP0_OUT_PKT_RDY))) {
  1533. DEBUG_EP0("%s: IN_PKT_RDY and OUT_PKT_RDY are clear\n",
  1534. __FUNCTION__);
  1535. switch (dev->ep0state) {
  1536. case DATA_STATE_XMIT:
  1537. DEBUG_EP0("continue with DATA_STATE_XMIT\n");
  1538. lh7a40x_ep0_in(dev, csr);
  1539. return;
  1540. case DATA_STATE_NEED_ZLP:
  1541. DEBUG_EP0("continue with DATA_STATE_NEED_ZLP\n");
  1542. lh7a40x_ep0_in_zlp(dev, csr);
  1543. return;
  1544. default:
  1545. /* Stall? */
  1546. DEBUG_EP0("Odd state!! state = %s\n",
  1547. state_names[dev->ep0state]);
  1548. dev->ep0state = WAIT_FOR_SETUP;
  1549. /* nuke(ep, 0); */
  1550. /* usb_set(EP0_SEND_STALL, ep->csr1); */
  1551. break;
  1552. }
  1553. }
  1554. /*
  1555. * if SETUP_END is set
  1556. * - abort the last transfer
  1557. * - set SERVICED_SETUP_END_BIT
  1558. */
  1559. if (csr & EP0_SETUP_END) {
  1560. DEBUG_EP0("%s: EP0_SETUP_END is set: %x\n", __FUNCTION__, csr);
  1561. usb_set(EP0_CLR_SETUP_END, USB_EP0_CSR);
  1562. nuke(ep, 0);
  1563. dev->ep0state = WAIT_FOR_SETUP;
  1564. }
  1565. /*
  1566. * if EP0_OUT_PKT_RDY is set
  1567. * - read data packet from EP0 FIFO
  1568. * - decode command
  1569. * - if error
  1570. * set SERVICED_OUT_PKT_RDY | DATA_END bits | SEND_STALL
  1571. * - else
  1572. * set SERVICED_OUT_PKT_RDY | DATA_END bits
  1573. */
  1574. if (csr & EP0_OUT_PKT_RDY) {
  1575. DEBUG_EP0("%s: EP0_OUT_PKT_RDY is set: %x\n", __FUNCTION__,
  1576. csr);
  1577. switch (dev->ep0state) {
  1578. case WAIT_FOR_SETUP:
  1579. DEBUG_EP0("WAIT_FOR_SETUP\n");
  1580. lh7a40x_ep0_setup(dev, csr);
  1581. break;
  1582. case DATA_STATE_RECV:
  1583. DEBUG_EP0("DATA_STATE_RECV\n");
  1584. lh7a40x_ep0_out(dev, csr);
  1585. break;
  1586. default:
  1587. /* send stall? */
  1588. DEBUG_EP0("strange state!! 2. send stall? state = %d\n",
  1589. dev->ep0state);
  1590. break;
  1591. }
  1592. }
  1593. }
  1594. static void lh7a40x_ep0_kick(struct lh7a40x_udc *dev, struct lh7a40x_ep *ep)
  1595. {
  1596. u32 csr;
  1597. usb_set_index(0);
  1598. csr = usb_read(USB_EP0_CSR);
  1599. DEBUG_EP0("%s: %x\n", __FUNCTION__, csr);
  1600. /* Clear "out packet ready" */
  1601. usb_set(EP0_CLR_OUT, USB_EP0_CSR);
  1602. if (ep_is_in(ep)) {
  1603. dev->ep0state = DATA_STATE_XMIT;
  1604. lh7a40x_ep0_in(dev, csr);
  1605. } else {
  1606. dev->ep0state = DATA_STATE_RECV;
  1607. lh7a40x_ep0_out(dev, csr);
  1608. }
  1609. }
  1610. /* ---------------------------------------------------------------------------
  1611. * device-scoped parts of the api to the usb controller hardware
  1612. * ---------------------------------------------------------------------------
  1613. */
  1614. static int lh7a40x_udc_get_frame(struct usb_gadget *_gadget)
  1615. {
  1616. u32 frame1 = usb_read(USB_FRM_NUM1); /* Least significant 8 bits */
  1617. u32 frame2 = usb_read(USB_FRM_NUM2); /* Most significant 3 bits */
  1618. DEBUG("%s, %p\n", __FUNCTION__, _gadget);
  1619. return ((frame2 & 0x07) << 8) | (frame1 & 0xff);
  1620. }
  1621. static int lh7a40x_udc_wakeup(struct usb_gadget *_gadget)
  1622. {
  1623. /* host may not have enabled remote wakeup */
  1624. /*if ((UDCCS0 & UDCCS0_DRWF) == 0)
  1625. return -EHOSTUNREACH;
  1626. udc_set_mask_UDCCR(UDCCR_RSM); */
  1627. return -ENOTSUPP;
  1628. }
  1629. static const struct usb_gadget_ops lh7a40x_udc_ops = {
  1630. .get_frame = lh7a40x_udc_get_frame,
  1631. .wakeup = lh7a40x_udc_wakeup,
  1632. /* current versions must always be self-powered */
  1633. };
  1634. static void nop_release(struct device *dev)
  1635. {
  1636. DEBUG("%s %s\n", __FUNCTION__, dev->bus_id);
  1637. }
  1638. static struct lh7a40x_udc memory = {
  1639. .usb_address = 0,
  1640. .gadget = {
  1641. .ops = &lh7a40x_udc_ops,
  1642. .ep0 = &memory.ep[0].ep,
  1643. .name = driver_name,
  1644. .dev = {
  1645. .bus_id = "gadget",
  1646. .release = nop_release,
  1647. },
  1648. },
  1649. /* control endpoint */
  1650. .ep[0] = {
  1651. .ep = {
  1652. .name = ep0name,
  1653. .ops = &lh7a40x_ep_ops,
  1654. .maxpacket = EP0_PACKETSIZE,
  1655. },
  1656. .dev = &memory,
  1657. .bEndpointAddress = 0,
  1658. .bmAttributes = 0,
  1659. .ep_type = ep_control,
  1660. .fifo = io_p2v(USB_EP0_FIFO),
  1661. .csr1 = USB_EP0_CSR,
  1662. .csr2 = USB_EP0_CSR,
  1663. },
  1664. /* first group of endpoints */
  1665. .ep[1] = {
  1666. .ep = {
  1667. .name = "ep1in-bulk",
  1668. .ops = &lh7a40x_ep_ops,
  1669. .maxpacket = 64,
  1670. },
  1671. .dev = &memory,
  1672. .bEndpointAddress = USB_DIR_IN | 1,
  1673. .bmAttributes = USB_ENDPOINT_XFER_BULK,
  1674. .ep_type = ep_bulk_in,
  1675. .fifo = io_p2v(USB_EP1_FIFO),
  1676. .csr1 = USB_IN_CSR1,
  1677. .csr2 = USB_IN_CSR2,
  1678. },
  1679. .ep[2] = {
  1680. .ep = {
  1681. .name = "ep2out-bulk",
  1682. .ops = &lh7a40x_ep_ops,
  1683. .maxpacket = 64,
  1684. },
  1685. .dev = &memory,
  1686. .bEndpointAddress = 2,
  1687. .bmAttributes = USB_ENDPOINT_XFER_BULK,
  1688. .ep_type = ep_bulk_out,
  1689. .fifo = io_p2v(USB_EP2_FIFO),
  1690. .csr1 = USB_OUT_CSR1,
  1691. .csr2 = USB_OUT_CSR2,
  1692. },
  1693. .ep[3] = {
  1694. .ep = {
  1695. .name = "ep3in-int",
  1696. .ops = &lh7a40x_ep_ops,
  1697. .maxpacket = 64,
  1698. },
  1699. .dev = &memory,
  1700. .bEndpointAddress = USB_DIR_IN | 3,
  1701. .bmAttributes = USB_ENDPOINT_XFER_INT,
  1702. .ep_type = ep_interrupt,
  1703. .fifo = io_p2v(USB_EP3_FIFO),
  1704. .csr1 = USB_IN_CSR1,
  1705. .csr2 = USB_IN_CSR2,
  1706. },
  1707. };
  1708. /*
  1709. * probe - binds to the platform device
  1710. */
  1711. static int lh7a40x_udc_probe(struct platform_device *pdev)
  1712. {
  1713. struct lh7a40x_udc *dev = &memory;
  1714. int retval;
  1715. DEBUG("%s: %p\n", __FUNCTION__, pdev);
  1716. spin_lock_init(&dev->lock);
  1717. dev->dev = &pdev->dev;
  1718. device_initialize(&dev->gadget.dev);
  1719. dev->gadget.dev.parent = &pdev->dev;
  1720. the_controller = dev;
  1721. platform_set_drvdata(pdev, dev);
  1722. udc_disable(dev);
  1723. udc_reinit(dev);
  1724. /* irq setup after old hardware state is cleaned up */
  1725. retval =
  1726. request_irq(IRQ_USBINTR, lh7a40x_udc_irq, IRQF_DISABLED, driver_name,
  1727. dev);
  1728. if (retval != 0) {
  1729. DEBUG(KERN_ERR "%s: can't get irq %i, err %d\n", driver_name,
  1730. IRQ_USBINTR, retval);
  1731. return -EBUSY;
  1732. }
  1733. create_proc_files();
  1734. return retval;
  1735. }
  1736. static int lh7a40x_udc_remove(struct platform_device *pdev)
  1737. {
  1738. struct lh7a40x_udc *dev = platform_get_drvdata(pdev);
  1739. DEBUG("%s: %p\n", __FUNCTION__, pdev);
  1740. udc_disable(dev);
  1741. remove_proc_files();
  1742. usb_gadget_unregister_driver(dev->driver);
  1743. free_irq(IRQ_USBINTR, dev);
  1744. platform_set_drvdata(pdev, 0);
  1745. the_controller = 0;
  1746. return 0;
  1747. }
  1748. /*-------------------------------------------------------------------------*/
  1749. static struct platform_driver udc_driver = {
  1750. .probe = lh7a40x_udc_probe,
  1751. .remove = lh7a40x_udc_remove,
  1752. /* FIXME power management support */
  1753. /* .suspend = ... disable UDC */
  1754. /* .resume = ... re-enable UDC */
  1755. .driver = {
  1756. .name = (char *)driver_name,
  1757. .owner = THIS_MODULE,
  1758. },
  1759. };
  1760. static int __init udc_init(void)
  1761. {
  1762. DEBUG("%s: %s version %s\n", __FUNCTION__, driver_name, DRIVER_VERSION);
  1763. return platform_driver_register(&udc_driver);
  1764. }
  1765. static void __exit udc_exit(void)
  1766. {
  1767. platform_driver_unregister(&udc_driver);
  1768. }
  1769. module_init(udc_init);
  1770. module_exit(udc_exit);
  1771. MODULE_DESCRIPTION(DRIVER_DESC);
  1772. MODULE_AUTHOR("Mikko Lahteenmaki, Bo Henriksen");
  1773. MODULE_LICENSE("GPL");