serial_txx9.c 31 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204
  1. /*
  2. * drivers/serial/serial_txx9.c
  3. *
  4. * Derived from many drivers using generic_serial interface,
  5. * especially serial_tx3912.c by Steven J. Hill and r39xx_serial.c
  6. * (was in Linux/VR tree) by Jim Pick.
  7. *
  8. * Copyright (C) 1999 Harald Koerfgen
  9. * Copyright (C) 2000 Jim Pick <jim@jimpick.com>
  10. * Copyright (C) 2001 Steven J. Hill (sjhill@realitydiluted.com)
  11. * Copyright (C) 2000-2002 Toshiba Corporation
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License version 2 as
  15. * published by the Free Software Foundation.
  16. *
  17. * Serial driver for TX3927/TX4927/TX4925/TX4938 internal SIO controller
  18. *
  19. * Revision History:
  20. * 0.30 Initial revision. (Renamed from serial_txx927.c)
  21. * 0.31 Use save_flags instead of local_irq_save.
  22. * 0.32 Support SCLK.
  23. * 0.33 Switch TXX9_TTY_NAME by CONFIG_SERIAL_TXX9_STDSERIAL.
  24. * Support TIOCSERGETLSR.
  25. * 0.34 Support slow baudrate.
  26. * 0.40 Merge codes from mainstream kernel (2.4.22).
  27. * 0.41 Fix console checking in rs_shutdown_port().
  28. * Disable flow-control in serial_console_write().
  29. * 0.42 Fix minor compiler warning.
  30. * 1.00 Kernel 2.6. Converted to new serial core (based on 8250.c).
  31. * 1.01 Set fifosize to make tx_empry called properly.
  32. * Use standard uart_get_divisor.
  33. * 1.02 Cleanup. (import 8250.c changes)
  34. * 1.03 Fix low-latency mode. (import 8250.c changes)
  35. * 1.04 Remove usage of deprecated functions, cleanup.
  36. * 1.05 More strict check in verify_port. Cleanup.
  37. * 1.06 Do not insert a char caused previous overrun.
  38. * Fix some spin_locks.
  39. * Do not call uart_add_one_port for absent ports.
  40. */
  41. #if defined(CONFIG_SERIAL_TXX9_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  42. #define SUPPORT_SYSRQ
  43. #endif
  44. #include <linux/module.h>
  45. #include <linux/ioport.h>
  46. #include <linux/init.h>
  47. #include <linux/console.h>
  48. #include <linux/sysrq.h>
  49. #include <linux/delay.h>
  50. #include <linux/device.h>
  51. #include <linux/pci.h>
  52. #include <linux/tty.h>
  53. #include <linux/tty_flip.h>
  54. #include <linux/serial_core.h>
  55. #include <linux/serial.h>
  56. #include <linux/mutex.h>
  57. #include <asm/io.h>
  58. #include <asm/irq.h>
  59. static char *serial_version = "1.06";
  60. static char *serial_name = "TX39/49 Serial driver";
  61. #define PASS_LIMIT 256
  62. #if !defined(CONFIG_SERIAL_TXX9_STDSERIAL)
  63. /* "ttyS" is used for standard serial driver */
  64. #define TXX9_TTY_NAME "ttyTX"
  65. #define TXX9_TTY_MINOR_START (64 + 64) /* ttyTX0(128), ttyTX1(129) */
  66. #else
  67. /* acts like standard serial driver */
  68. #define TXX9_TTY_NAME "ttyS"
  69. #define TXX9_TTY_MINOR_START 64
  70. #endif
  71. #define TXX9_TTY_MAJOR TTY_MAJOR
  72. /* flag aliases */
  73. #define UPF_TXX9_HAVE_CTS_LINE UPF_BUGGY_UART
  74. #define UPF_TXX9_USE_SCLK UPF_MAGIC_MULTIPLIER
  75. #ifdef CONFIG_PCI
  76. /* support for Toshiba TC86C001 SIO */
  77. #define ENABLE_SERIAL_TXX9_PCI
  78. #endif
  79. /*
  80. * Number of serial ports
  81. */
  82. #ifdef ENABLE_SERIAL_TXX9_PCI
  83. #define NR_PCI_BOARDS 4
  84. #define UART_NR (4 + NR_PCI_BOARDS)
  85. #else
  86. #define UART_NR 4
  87. #endif
  88. #define HIGH_BITS_OFFSET ((sizeof(long)-sizeof(int))*8)
  89. struct uart_txx9_port {
  90. struct uart_port port;
  91. /*
  92. * We provide a per-port pm hook.
  93. */
  94. void (*pm)(struct uart_port *port,
  95. unsigned int state, unsigned int old);
  96. };
  97. #define TXX9_REGION_SIZE 0x24
  98. /* TXX9 Serial Registers */
  99. #define TXX9_SILCR 0x00
  100. #define TXX9_SIDICR 0x04
  101. #define TXX9_SIDISR 0x08
  102. #define TXX9_SICISR 0x0c
  103. #define TXX9_SIFCR 0x10
  104. #define TXX9_SIFLCR 0x14
  105. #define TXX9_SIBGR 0x18
  106. #define TXX9_SITFIFO 0x1c
  107. #define TXX9_SIRFIFO 0x20
  108. /* SILCR : Line Control */
  109. #define TXX9_SILCR_SCS_MASK 0x00000060
  110. #define TXX9_SILCR_SCS_IMCLK 0x00000000
  111. #define TXX9_SILCR_SCS_IMCLK_BG 0x00000020
  112. #define TXX9_SILCR_SCS_SCLK 0x00000040
  113. #define TXX9_SILCR_SCS_SCLK_BG 0x00000060
  114. #define TXX9_SILCR_UEPS 0x00000010
  115. #define TXX9_SILCR_UPEN 0x00000008
  116. #define TXX9_SILCR_USBL_MASK 0x00000004
  117. #define TXX9_SILCR_USBL_1BIT 0x00000000
  118. #define TXX9_SILCR_USBL_2BIT 0x00000004
  119. #define TXX9_SILCR_UMODE_MASK 0x00000003
  120. #define TXX9_SILCR_UMODE_8BIT 0x00000000
  121. #define TXX9_SILCR_UMODE_7BIT 0x00000001
  122. /* SIDICR : DMA/Int. Control */
  123. #define TXX9_SIDICR_TDE 0x00008000
  124. #define TXX9_SIDICR_RDE 0x00004000
  125. #define TXX9_SIDICR_TIE 0x00002000
  126. #define TXX9_SIDICR_RIE 0x00001000
  127. #define TXX9_SIDICR_SPIE 0x00000800
  128. #define TXX9_SIDICR_CTSAC 0x00000600
  129. #define TXX9_SIDICR_STIE_MASK 0x0000003f
  130. #define TXX9_SIDICR_STIE_OERS 0x00000020
  131. #define TXX9_SIDICR_STIE_CTSS 0x00000010
  132. #define TXX9_SIDICR_STIE_RBRKD 0x00000008
  133. #define TXX9_SIDICR_STIE_TRDY 0x00000004
  134. #define TXX9_SIDICR_STIE_TXALS 0x00000002
  135. #define TXX9_SIDICR_STIE_UBRKD 0x00000001
  136. /* SIDISR : DMA/Int. Status */
  137. #define TXX9_SIDISR_UBRK 0x00008000
  138. #define TXX9_SIDISR_UVALID 0x00004000
  139. #define TXX9_SIDISR_UFER 0x00002000
  140. #define TXX9_SIDISR_UPER 0x00001000
  141. #define TXX9_SIDISR_UOER 0x00000800
  142. #define TXX9_SIDISR_ERI 0x00000400
  143. #define TXX9_SIDISR_TOUT 0x00000200
  144. #define TXX9_SIDISR_TDIS 0x00000100
  145. #define TXX9_SIDISR_RDIS 0x00000080
  146. #define TXX9_SIDISR_STIS 0x00000040
  147. #define TXX9_SIDISR_RFDN_MASK 0x0000001f
  148. /* SICISR : Change Int. Status */
  149. #define TXX9_SICISR_OERS 0x00000020
  150. #define TXX9_SICISR_CTSS 0x00000010
  151. #define TXX9_SICISR_RBRKD 0x00000008
  152. #define TXX9_SICISR_TRDY 0x00000004
  153. #define TXX9_SICISR_TXALS 0x00000002
  154. #define TXX9_SICISR_UBRKD 0x00000001
  155. /* SIFCR : FIFO Control */
  156. #define TXX9_SIFCR_SWRST 0x00008000
  157. #define TXX9_SIFCR_RDIL_MASK 0x00000180
  158. #define TXX9_SIFCR_RDIL_1 0x00000000
  159. #define TXX9_SIFCR_RDIL_4 0x00000080
  160. #define TXX9_SIFCR_RDIL_8 0x00000100
  161. #define TXX9_SIFCR_RDIL_12 0x00000180
  162. #define TXX9_SIFCR_RDIL_MAX 0x00000180
  163. #define TXX9_SIFCR_TDIL_MASK 0x00000018
  164. #define TXX9_SIFCR_TDIL_MASK 0x00000018
  165. #define TXX9_SIFCR_TDIL_1 0x00000000
  166. #define TXX9_SIFCR_TDIL_4 0x00000001
  167. #define TXX9_SIFCR_TDIL_8 0x00000010
  168. #define TXX9_SIFCR_TDIL_MAX 0x00000010
  169. #define TXX9_SIFCR_TFRST 0x00000004
  170. #define TXX9_SIFCR_RFRST 0x00000002
  171. #define TXX9_SIFCR_FRSTE 0x00000001
  172. #define TXX9_SIO_TX_FIFO 8
  173. #define TXX9_SIO_RX_FIFO 16
  174. /* SIFLCR : Flow Control */
  175. #define TXX9_SIFLCR_RCS 0x00001000
  176. #define TXX9_SIFLCR_TES 0x00000800
  177. #define TXX9_SIFLCR_RTSSC 0x00000200
  178. #define TXX9_SIFLCR_RSDE 0x00000100
  179. #define TXX9_SIFLCR_TSDE 0x00000080
  180. #define TXX9_SIFLCR_RTSTL_MASK 0x0000001e
  181. #define TXX9_SIFLCR_RTSTL_MAX 0x0000001e
  182. #define TXX9_SIFLCR_TBRK 0x00000001
  183. /* SIBGR : Baudrate Control */
  184. #define TXX9_SIBGR_BCLK_MASK 0x00000300
  185. #define TXX9_SIBGR_BCLK_T0 0x00000000
  186. #define TXX9_SIBGR_BCLK_T2 0x00000100
  187. #define TXX9_SIBGR_BCLK_T4 0x00000200
  188. #define TXX9_SIBGR_BCLK_T6 0x00000300
  189. #define TXX9_SIBGR_BRD_MASK 0x000000ff
  190. static inline unsigned int sio_in(struct uart_txx9_port *up, int offset)
  191. {
  192. switch (up->port.iotype) {
  193. default:
  194. return __raw_readl(up->port.membase + offset);
  195. case UPIO_PORT:
  196. return inl(up->port.iobase + offset);
  197. }
  198. }
  199. static inline void
  200. sio_out(struct uart_txx9_port *up, int offset, int value)
  201. {
  202. switch (up->port.iotype) {
  203. default:
  204. __raw_writel(value, up->port.membase + offset);
  205. break;
  206. case UPIO_PORT:
  207. outl(value, up->port.iobase + offset);
  208. break;
  209. }
  210. }
  211. static inline void
  212. sio_mask(struct uart_txx9_port *up, int offset, unsigned int value)
  213. {
  214. sio_out(up, offset, sio_in(up, offset) & ~value);
  215. }
  216. static inline void
  217. sio_set(struct uart_txx9_port *up, int offset, unsigned int value)
  218. {
  219. sio_out(up, offset, sio_in(up, offset) | value);
  220. }
  221. static inline void
  222. sio_quot_set(struct uart_txx9_port *up, int quot)
  223. {
  224. quot >>= 1;
  225. if (quot < 256)
  226. sio_out(up, TXX9_SIBGR, quot | TXX9_SIBGR_BCLK_T0);
  227. else if (quot < (256 << 2))
  228. sio_out(up, TXX9_SIBGR, (quot >> 2) | TXX9_SIBGR_BCLK_T2);
  229. else if (quot < (256 << 4))
  230. sio_out(up, TXX9_SIBGR, (quot >> 4) | TXX9_SIBGR_BCLK_T4);
  231. else if (quot < (256 << 6))
  232. sio_out(up, TXX9_SIBGR, (quot >> 6) | TXX9_SIBGR_BCLK_T6);
  233. else
  234. sio_out(up, TXX9_SIBGR, 0xff | TXX9_SIBGR_BCLK_T6);
  235. }
  236. static void serial_txx9_stop_tx(struct uart_port *port)
  237. {
  238. struct uart_txx9_port *up = (struct uart_txx9_port *)port;
  239. sio_mask(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
  240. }
  241. static void serial_txx9_start_tx(struct uart_port *port)
  242. {
  243. struct uart_txx9_port *up = (struct uart_txx9_port *)port;
  244. sio_set(up, TXX9_SIDICR, TXX9_SIDICR_TIE);
  245. }
  246. static void serial_txx9_stop_rx(struct uart_port *port)
  247. {
  248. struct uart_txx9_port *up = (struct uart_txx9_port *)port;
  249. up->port.read_status_mask &= ~TXX9_SIDISR_RDIS;
  250. }
  251. static void serial_txx9_enable_ms(struct uart_port *port)
  252. {
  253. /* TXX9-SIO can not control DTR... */
  254. }
  255. static inline void
  256. receive_chars(struct uart_txx9_port *up, unsigned int *status)
  257. {
  258. struct tty_struct *tty = up->port.info->tty;
  259. unsigned char ch;
  260. unsigned int disr = *status;
  261. int max_count = 256;
  262. char flag;
  263. unsigned int next_ignore_status_mask;
  264. do {
  265. ch = sio_in(up, TXX9_SIRFIFO);
  266. flag = TTY_NORMAL;
  267. up->port.icount.rx++;
  268. /* mask out RFDN_MASK bit added by previous overrun */
  269. next_ignore_status_mask =
  270. up->port.ignore_status_mask & ~TXX9_SIDISR_RFDN_MASK;
  271. if (unlikely(disr & (TXX9_SIDISR_UBRK | TXX9_SIDISR_UPER |
  272. TXX9_SIDISR_UFER | TXX9_SIDISR_UOER))) {
  273. /*
  274. * For statistics only
  275. */
  276. if (disr & TXX9_SIDISR_UBRK) {
  277. disr &= ~(TXX9_SIDISR_UFER | TXX9_SIDISR_UPER);
  278. up->port.icount.brk++;
  279. /*
  280. * We do the SysRQ and SAK checking
  281. * here because otherwise the break
  282. * may get masked by ignore_status_mask
  283. * or read_status_mask.
  284. */
  285. if (uart_handle_break(&up->port))
  286. goto ignore_char;
  287. } else if (disr & TXX9_SIDISR_UPER)
  288. up->port.icount.parity++;
  289. else if (disr & TXX9_SIDISR_UFER)
  290. up->port.icount.frame++;
  291. if (disr & TXX9_SIDISR_UOER) {
  292. up->port.icount.overrun++;
  293. /*
  294. * The receiver read buffer still hold
  295. * a char which caused overrun.
  296. * Ignore next char by adding RFDN_MASK
  297. * to ignore_status_mask temporarily.
  298. */
  299. next_ignore_status_mask |=
  300. TXX9_SIDISR_RFDN_MASK;
  301. }
  302. /*
  303. * Mask off conditions which should be ingored.
  304. */
  305. disr &= up->port.read_status_mask;
  306. if (disr & TXX9_SIDISR_UBRK) {
  307. flag = TTY_BREAK;
  308. } else if (disr & TXX9_SIDISR_UPER)
  309. flag = TTY_PARITY;
  310. else if (disr & TXX9_SIDISR_UFER)
  311. flag = TTY_FRAME;
  312. }
  313. if (uart_handle_sysrq_char(&up->port, ch))
  314. goto ignore_char;
  315. uart_insert_char(&up->port, disr, TXX9_SIDISR_UOER, ch, flag);
  316. ignore_char:
  317. up->port.ignore_status_mask = next_ignore_status_mask;
  318. disr = sio_in(up, TXX9_SIDISR);
  319. } while (!(disr & TXX9_SIDISR_UVALID) && (max_count-- > 0));
  320. spin_unlock(&up->port.lock);
  321. tty_flip_buffer_push(tty);
  322. spin_lock(&up->port.lock);
  323. *status = disr;
  324. }
  325. static inline void transmit_chars(struct uart_txx9_port *up)
  326. {
  327. struct circ_buf *xmit = &up->port.info->xmit;
  328. int count;
  329. if (up->port.x_char) {
  330. sio_out(up, TXX9_SITFIFO, up->port.x_char);
  331. up->port.icount.tx++;
  332. up->port.x_char = 0;
  333. return;
  334. }
  335. if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
  336. serial_txx9_stop_tx(&up->port);
  337. return;
  338. }
  339. count = TXX9_SIO_TX_FIFO;
  340. do {
  341. sio_out(up, TXX9_SITFIFO, xmit->buf[xmit->tail]);
  342. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  343. up->port.icount.tx++;
  344. if (uart_circ_empty(xmit))
  345. break;
  346. } while (--count > 0);
  347. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  348. uart_write_wakeup(&up->port);
  349. if (uart_circ_empty(xmit))
  350. serial_txx9_stop_tx(&up->port);
  351. }
  352. static irqreturn_t serial_txx9_interrupt(int irq, void *dev_id)
  353. {
  354. int pass_counter = 0;
  355. struct uart_txx9_port *up = dev_id;
  356. unsigned int status;
  357. while (1) {
  358. spin_lock(&up->port.lock);
  359. status = sio_in(up, TXX9_SIDISR);
  360. if (!(sio_in(up, TXX9_SIDICR) & TXX9_SIDICR_TIE))
  361. status &= ~TXX9_SIDISR_TDIS;
  362. if (!(status & (TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
  363. TXX9_SIDISR_TOUT))) {
  364. spin_unlock(&up->port.lock);
  365. break;
  366. }
  367. if (status & TXX9_SIDISR_RDIS)
  368. receive_chars(up, &status);
  369. if (status & TXX9_SIDISR_TDIS)
  370. transmit_chars(up);
  371. /* Clear TX/RX Int. Status */
  372. sio_mask(up, TXX9_SIDISR,
  373. TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS |
  374. TXX9_SIDISR_TOUT);
  375. spin_unlock(&up->port.lock);
  376. if (pass_counter++ > PASS_LIMIT)
  377. break;
  378. }
  379. return pass_counter ? IRQ_HANDLED : IRQ_NONE;
  380. }
  381. static unsigned int serial_txx9_tx_empty(struct uart_port *port)
  382. {
  383. struct uart_txx9_port *up = (struct uart_txx9_port *)port;
  384. unsigned long flags;
  385. unsigned int ret;
  386. spin_lock_irqsave(&up->port.lock, flags);
  387. ret = (sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS) ? TIOCSER_TEMT : 0;
  388. spin_unlock_irqrestore(&up->port.lock, flags);
  389. return ret;
  390. }
  391. static unsigned int serial_txx9_get_mctrl(struct uart_port *port)
  392. {
  393. struct uart_txx9_port *up = (struct uart_txx9_port *)port;
  394. unsigned int ret;
  395. ret = ((sio_in(up, TXX9_SIFLCR) & TXX9_SIFLCR_RTSSC) ? 0 : TIOCM_RTS)
  396. | ((sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS) ? 0 : TIOCM_CTS);
  397. return ret;
  398. }
  399. static void serial_txx9_set_mctrl(struct uart_port *port, unsigned int mctrl)
  400. {
  401. struct uart_txx9_port *up = (struct uart_txx9_port *)port;
  402. if (mctrl & TIOCM_RTS)
  403. sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
  404. else
  405. sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSSC);
  406. }
  407. static void serial_txx9_break_ctl(struct uart_port *port, int break_state)
  408. {
  409. struct uart_txx9_port *up = (struct uart_txx9_port *)port;
  410. unsigned long flags;
  411. spin_lock_irqsave(&up->port.lock, flags);
  412. if (break_state == -1)
  413. sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
  414. else
  415. sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
  416. spin_unlock_irqrestore(&up->port.lock, flags);
  417. }
  418. static int serial_txx9_startup(struct uart_port *port)
  419. {
  420. struct uart_txx9_port *up = (struct uart_txx9_port *)port;
  421. unsigned long flags;
  422. int retval;
  423. /*
  424. * Clear the FIFO buffers and disable them.
  425. * (they will be reenabled in set_termios())
  426. */
  427. sio_set(up, TXX9_SIFCR,
  428. TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
  429. /* clear reset */
  430. sio_mask(up, TXX9_SIFCR,
  431. TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
  432. sio_out(up, TXX9_SIDICR, 0);
  433. /*
  434. * Clear the interrupt registers.
  435. */
  436. sio_out(up, TXX9_SIDISR, 0);
  437. retval = request_irq(up->port.irq, serial_txx9_interrupt,
  438. IRQF_SHARED, "serial_txx9", up);
  439. if (retval)
  440. return retval;
  441. /*
  442. * Now, initialize the UART
  443. */
  444. spin_lock_irqsave(&up->port.lock, flags);
  445. serial_txx9_set_mctrl(&up->port, up->port.mctrl);
  446. spin_unlock_irqrestore(&up->port.lock, flags);
  447. /* Enable RX/TX */
  448. sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
  449. /*
  450. * Finally, enable interrupts.
  451. */
  452. sio_set(up, TXX9_SIDICR, TXX9_SIDICR_RIE);
  453. return 0;
  454. }
  455. static void serial_txx9_shutdown(struct uart_port *port)
  456. {
  457. struct uart_txx9_port *up = (struct uart_txx9_port *)port;
  458. unsigned long flags;
  459. /*
  460. * Disable interrupts from this port
  461. */
  462. sio_out(up, TXX9_SIDICR, 0); /* disable all intrs */
  463. spin_lock_irqsave(&up->port.lock, flags);
  464. serial_txx9_set_mctrl(&up->port, up->port.mctrl);
  465. spin_unlock_irqrestore(&up->port.lock, flags);
  466. /*
  467. * Disable break condition
  468. */
  469. sio_mask(up, TXX9_SIFLCR, TXX9_SIFLCR_TBRK);
  470. #ifdef CONFIG_SERIAL_TXX9_CONSOLE
  471. if (up->port.cons && up->port.line == up->port.cons->index) {
  472. free_irq(up->port.irq, up);
  473. return;
  474. }
  475. #endif
  476. /* reset FIFOs */
  477. sio_set(up, TXX9_SIFCR,
  478. TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
  479. /* clear reset */
  480. sio_mask(up, TXX9_SIFCR,
  481. TXX9_SIFCR_TFRST | TXX9_SIFCR_RFRST | TXX9_SIFCR_FRSTE);
  482. /* Disable RX/TX */
  483. sio_set(up, TXX9_SIFLCR, TXX9_SIFLCR_RSDE | TXX9_SIFLCR_TSDE);
  484. free_irq(up->port.irq, up);
  485. }
  486. static void
  487. serial_txx9_set_termios(struct uart_port *port, struct termios *termios,
  488. struct termios *old)
  489. {
  490. struct uart_txx9_port *up = (struct uart_txx9_port *)port;
  491. unsigned int cval, fcr = 0;
  492. unsigned long flags;
  493. unsigned int baud, quot;
  494. cval = sio_in(up, TXX9_SILCR);
  495. /* byte size and parity */
  496. cval &= ~TXX9_SILCR_UMODE_MASK;
  497. switch (termios->c_cflag & CSIZE) {
  498. case CS7:
  499. cval |= TXX9_SILCR_UMODE_7BIT;
  500. break;
  501. default:
  502. case CS5: /* not supported */
  503. case CS6: /* not supported */
  504. case CS8:
  505. cval |= TXX9_SILCR_UMODE_8BIT;
  506. break;
  507. }
  508. cval &= ~TXX9_SILCR_USBL_MASK;
  509. if (termios->c_cflag & CSTOPB)
  510. cval |= TXX9_SILCR_USBL_2BIT;
  511. else
  512. cval |= TXX9_SILCR_USBL_1BIT;
  513. cval &= ~(TXX9_SILCR_UPEN | TXX9_SILCR_UEPS);
  514. if (termios->c_cflag & PARENB)
  515. cval |= TXX9_SILCR_UPEN;
  516. if (!(termios->c_cflag & PARODD))
  517. cval |= TXX9_SILCR_UEPS;
  518. /*
  519. * Ask the core to calculate the divisor for us.
  520. */
  521. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16/2);
  522. quot = uart_get_divisor(port, baud);
  523. /* Set up FIFOs */
  524. /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
  525. fcr = TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1;
  526. /*
  527. * Ok, we're now changing the port state. Do it with
  528. * interrupts disabled.
  529. */
  530. spin_lock_irqsave(&up->port.lock, flags);
  531. /*
  532. * Update the per-port timeout.
  533. */
  534. uart_update_timeout(port, termios->c_cflag, baud);
  535. up->port.read_status_mask = TXX9_SIDISR_UOER |
  536. TXX9_SIDISR_TDIS | TXX9_SIDISR_RDIS;
  537. if (termios->c_iflag & INPCK)
  538. up->port.read_status_mask |= TXX9_SIDISR_UFER | TXX9_SIDISR_UPER;
  539. if (termios->c_iflag & (BRKINT | PARMRK))
  540. up->port.read_status_mask |= TXX9_SIDISR_UBRK;
  541. /*
  542. * Characteres to ignore
  543. */
  544. up->port.ignore_status_mask = 0;
  545. if (termios->c_iflag & IGNPAR)
  546. up->port.ignore_status_mask |= TXX9_SIDISR_UPER | TXX9_SIDISR_UFER;
  547. if (termios->c_iflag & IGNBRK) {
  548. up->port.ignore_status_mask |= TXX9_SIDISR_UBRK;
  549. /*
  550. * If we're ignoring parity and break indicators,
  551. * ignore overruns too (for real raw support).
  552. */
  553. if (termios->c_iflag & IGNPAR)
  554. up->port.ignore_status_mask |= TXX9_SIDISR_UOER;
  555. }
  556. /*
  557. * ignore all characters if CREAD is not set
  558. */
  559. if ((termios->c_cflag & CREAD) == 0)
  560. up->port.ignore_status_mask |= TXX9_SIDISR_RDIS;
  561. /* CTS flow control flag */
  562. if ((termios->c_cflag & CRTSCTS) &&
  563. (up->port.flags & UPF_TXX9_HAVE_CTS_LINE)) {
  564. sio_set(up, TXX9_SIFLCR,
  565. TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES);
  566. } else {
  567. sio_mask(up, TXX9_SIFLCR,
  568. TXX9_SIFLCR_RCS | TXX9_SIFLCR_TES);
  569. }
  570. sio_out(up, TXX9_SILCR, cval);
  571. sio_quot_set(up, quot);
  572. sio_out(up, TXX9_SIFCR, fcr);
  573. serial_txx9_set_mctrl(&up->port, up->port.mctrl);
  574. spin_unlock_irqrestore(&up->port.lock, flags);
  575. }
  576. static void
  577. serial_txx9_pm(struct uart_port *port, unsigned int state,
  578. unsigned int oldstate)
  579. {
  580. struct uart_txx9_port *up = (struct uart_txx9_port *)port;
  581. if (up->pm)
  582. up->pm(port, state, oldstate);
  583. }
  584. static int serial_txx9_request_resource(struct uart_txx9_port *up)
  585. {
  586. unsigned int size = TXX9_REGION_SIZE;
  587. int ret = 0;
  588. switch (up->port.iotype) {
  589. default:
  590. if (!up->port.mapbase)
  591. break;
  592. if (!request_mem_region(up->port.mapbase, size, "serial_txx9")) {
  593. ret = -EBUSY;
  594. break;
  595. }
  596. if (up->port.flags & UPF_IOREMAP) {
  597. up->port.membase = ioremap(up->port.mapbase, size);
  598. if (!up->port.membase) {
  599. release_mem_region(up->port.mapbase, size);
  600. ret = -ENOMEM;
  601. }
  602. }
  603. break;
  604. case UPIO_PORT:
  605. if (!request_region(up->port.iobase, size, "serial_txx9"))
  606. ret = -EBUSY;
  607. break;
  608. }
  609. return ret;
  610. }
  611. static void serial_txx9_release_resource(struct uart_txx9_port *up)
  612. {
  613. unsigned int size = TXX9_REGION_SIZE;
  614. switch (up->port.iotype) {
  615. default:
  616. if (!up->port.mapbase)
  617. break;
  618. if (up->port.flags & UPF_IOREMAP) {
  619. iounmap(up->port.membase);
  620. up->port.membase = NULL;
  621. }
  622. release_mem_region(up->port.mapbase, size);
  623. break;
  624. case UPIO_PORT:
  625. release_region(up->port.iobase, size);
  626. break;
  627. }
  628. }
  629. static void serial_txx9_release_port(struct uart_port *port)
  630. {
  631. struct uart_txx9_port *up = (struct uart_txx9_port *)port;
  632. serial_txx9_release_resource(up);
  633. }
  634. static int serial_txx9_request_port(struct uart_port *port)
  635. {
  636. struct uart_txx9_port *up = (struct uart_txx9_port *)port;
  637. return serial_txx9_request_resource(up);
  638. }
  639. static void serial_txx9_config_port(struct uart_port *port, int uflags)
  640. {
  641. struct uart_txx9_port *up = (struct uart_txx9_port *)port;
  642. unsigned long flags;
  643. int ret;
  644. /*
  645. * Find the region that we can probe for. This in turn
  646. * tells us whether we can probe for the type of port.
  647. */
  648. ret = serial_txx9_request_resource(up);
  649. if (ret < 0)
  650. return;
  651. port->type = PORT_TXX9;
  652. up->port.fifosize = TXX9_SIO_TX_FIFO;
  653. #ifdef CONFIG_SERIAL_TXX9_CONSOLE
  654. if (up->port.line == up->port.cons->index)
  655. return;
  656. #endif
  657. spin_lock_irqsave(&up->port.lock, flags);
  658. /*
  659. * Reset the UART.
  660. */
  661. sio_out(up, TXX9_SIFCR, TXX9_SIFCR_SWRST);
  662. #ifdef CONFIG_CPU_TX49XX
  663. /* TX4925 BUG WORKAROUND. Accessing SIOC register
  664. * immediately after soft reset causes bus error. */
  665. iob();
  666. udelay(1);
  667. #endif
  668. while (sio_in(up, TXX9_SIFCR) & TXX9_SIFCR_SWRST)
  669. ;
  670. /* TX Int by FIFO Empty, RX Int by Receiving 1 char. */
  671. sio_set(up, TXX9_SIFCR,
  672. TXX9_SIFCR_TDIL_MAX | TXX9_SIFCR_RDIL_1);
  673. /* initial settings */
  674. sio_out(up, TXX9_SILCR,
  675. TXX9_SILCR_UMODE_8BIT | TXX9_SILCR_USBL_1BIT |
  676. ((up->port.flags & UPF_TXX9_USE_SCLK) ?
  677. TXX9_SILCR_SCS_SCLK_BG : TXX9_SILCR_SCS_IMCLK_BG));
  678. sio_quot_set(up, uart_get_divisor(port, 9600));
  679. sio_out(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSTL_MAX /* 15 */);
  680. spin_unlock_irqrestore(&up->port.lock, flags);
  681. }
  682. static int
  683. serial_txx9_verify_port(struct uart_port *port, struct serial_struct *ser)
  684. {
  685. unsigned long new_port = ser->port;
  686. if (HIGH_BITS_OFFSET)
  687. new_port += (unsigned long)ser->port_high << HIGH_BITS_OFFSET;
  688. if (ser->type != port->type ||
  689. ser->irq != port->irq ||
  690. ser->io_type != port->iotype ||
  691. new_port != port->iobase ||
  692. (unsigned long)ser->iomem_base != port->mapbase)
  693. return -EINVAL;
  694. return 0;
  695. }
  696. static const char *
  697. serial_txx9_type(struct uart_port *port)
  698. {
  699. return "txx9";
  700. }
  701. static struct uart_ops serial_txx9_pops = {
  702. .tx_empty = serial_txx9_tx_empty,
  703. .set_mctrl = serial_txx9_set_mctrl,
  704. .get_mctrl = serial_txx9_get_mctrl,
  705. .stop_tx = serial_txx9_stop_tx,
  706. .start_tx = serial_txx9_start_tx,
  707. .stop_rx = serial_txx9_stop_rx,
  708. .enable_ms = serial_txx9_enable_ms,
  709. .break_ctl = serial_txx9_break_ctl,
  710. .startup = serial_txx9_startup,
  711. .shutdown = serial_txx9_shutdown,
  712. .set_termios = serial_txx9_set_termios,
  713. .pm = serial_txx9_pm,
  714. .type = serial_txx9_type,
  715. .release_port = serial_txx9_release_port,
  716. .request_port = serial_txx9_request_port,
  717. .config_port = serial_txx9_config_port,
  718. .verify_port = serial_txx9_verify_port,
  719. };
  720. static struct uart_txx9_port serial_txx9_ports[UART_NR];
  721. static void __init serial_txx9_register_ports(struct uart_driver *drv)
  722. {
  723. int i;
  724. for (i = 0; i < UART_NR; i++) {
  725. struct uart_txx9_port *up = &serial_txx9_ports[i];
  726. up->port.line = i;
  727. up->port.ops = &serial_txx9_pops;
  728. if (up->port.iobase || up->port.mapbase)
  729. uart_add_one_port(drv, &up->port);
  730. }
  731. }
  732. #ifdef CONFIG_SERIAL_TXX9_CONSOLE
  733. /*
  734. * Wait for transmitter & holding register to empty
  735. */
  736. static inline void wait_for_xmitr(struct uart_txx9_port *up)
  737. {
  738. unsigned int tmout = 10000;
  739. /* Wait up to 10ms for the character(s) to be sent. */
  740. while (--tmout &&
  741. !(sio_in(up, TXX9_SICISR) & TXX9_SICISR_TXALS))
  742. udelay(1);
  743. /* Wait up to 1s for flow control if necessary */
  744. if (up->port.flags & UPF_CONS_FLOW) {
  745. tmout = 1000000;
  746. while (--tmout &&
  747. (sio_in(up, TXX9_SICISR) & TXX9_SICISR_CTSS))
  748. udelay(1);
  749. }
  750. }
  751. static void serial_txx9_console_putchar(struct uart_port *port, int ch)
  752. {
  753. struct uart_txx9_port *up = (struct uart_txx9_port *)port;
  754. wait_for_xmitr(up);
  755. sio_out(up, TXX9_SITFIFO, ch);
  756. }
  757. /*
  758. * Print a string to the serial port trying not to disturb
  759. * any possible real use of the port...
  760. *
  761. * The console_lock must be held when we get here.
  762. */
  763. static void
  764. serial_txx9_console_write(struct console *co, const char *s, unsigned int count)
  765. {
  766. struct uart_txx9_port *up = &serial_txx9_ports[co->index];
  767. unsigned int ier, flcr;
  768. /*
  769. * First save the UER then disable the interrupts
  770. */
  771. ier = sio_in(up, TXX9_SIDICR);
  772. sio_out(up, TXX9_SIDICR, 0);
  773. /*
  774. * Disable flow-control if enabled (and unnecessary)
  775. */
  776. flcr = sio_in(up, TXX9_SIFLCR);
  777. if (!(up->port.flags & UPF_CONS_FLOW) && (flcr & TXX9_SIFLCR_TES))
  778. sio_out(up, TXX9_SIFLCR, flcr & ~TXX9_SIFLCR_TES);
  779. uart_console_write(&up->port, s, count, serial_txx9_console_putchar);
  780. /*
  781. * Finally, wait for transmitter to become empty
  782. * and restore the IER
  783. */
  784. wait_for_xmitr(up);
  785. sio_out(up, TXX9_SIFLCR, flcr);
  786. sio_out(up, TXX9_SIDICR, ier);
  787. }
  788. static int serial_txx9_console_setup(struct console *co, char *options)
  789. {
  790. struct uart_port *port;
  791. struct uart_txx9_port *up;
  792. int baud = 9600;
  793. int bits = 8;
  794. int parity = 'n';
  795. int flow = 'n';
  796. /*
  797. * Check whether an invalid uart number has been specified, and
  798. * if so, search for the first available port that does have
  799. * console support.
  800. */
  801. if (co->index >= UART_NR)
  802. co->index = 0;
  803. up = &serial_txx9_ports[co->index];
  804. port = &up->port;
  805. if (!port->ops)
  806. return -ENODEV;
  807. /*
  808. * Disable UART interrupts, set DTR and RTS high
  809. * and set speed.
  810. */
  811. sio_out(up, TXX9_SIDICR, 0);
  812. /* initial settings */
  813. sio_out(up, TXX9_SILCR,
  814. TXX9_SILCR_UMODE_8BIT | TXX9_SILCR_USBL_1BIT |
  815. ((port->flags & UPF_TXX9_USE_SCLK) ?
  816. TXX9_SILCR_SCS_SCLK_BG : TXX9_SILCR_SCS_IMCLK_BG));
  817. sio_out(up, TXX9_SIFLCR, TXX9_SIFLCR_RTSTL_MAX /* 15 */);
  818. if (options)
  819. uart_parse_options(options, &baud, &parity, &bits, &flow);
  820. return uart_set_options(port, co, baud, parity, bits, flow);
  821. }
  822. static struct uart_driver serial_txx9_reg;
  823. static struct console serial_txx9_console = {
  824. .name = TXX9_TTY_NAME,
  825. .write = serial_txx9_console_write,
  826. .device = uart_console_device,
  827. .setup = serial_txx9_console_setup,
  828. .flags = CON_PRINTBUFFER,
  829. .index = -1,
  830. .data = &serial_txx9_reg,
  831. };
  832. static int __init serial_txx9_console_init(void)
  833. {
  834. register_console(&serial_txx9_console);
  835. return 0;
  836. }
  837. console_initcall(serial_txx9_console_init);
  838. #define SERIAL_TXX9_CONSOLE &serial_txx9_console
  839. #else
  840. #define SERIAL_TXX9_CONSOLE NULL
  841. #endif
  842. static struct uart_driver serial_txx9_reg = {
  843. .owner = THIS_MODULE,
  844. .driver_name = "serial_txx9",
  845. .dev_name = TXX9_TTY_NAME,
  846. .major = TXX9_TTY_MAJOR,
  847. .minor = TXX9_TTY_MINOR_START,
  848. .nr = UART_NR,
  849. .cons = SERIAL_TXX9_CONSOLE,
  850. };
  851. int __init early_serial_txx9_setup(struct uart_port *port)
  852. {
  853. if (port->line >= ARRAY_SIZE(serial_txx9_ports))
  854. return -ENODEV;
  855. serial_txx9_ports[port->line].port = *port;
  856. serial_txx9_ports[port->line].port.ops = &serial_txx9_pops;
  857. serial_txx9_ports[port->line].port.flags |= UPF_BOOT_AUTOCONF;
  858. return 0;
  859. }
  860. #ifdef ENABLE_SERIAL_TXX9_PCI
  861. /**
  862. * serial_txx9_suspend_port - suspend one serial port
  863. * @line: serial line number
  864. *
  865. * Suspend one serial port.
  866. */
  867. static void serial_txx9_suspend_port(int line)
  868. {
  869. uart_suspend_port(&serial_txx9_reg, &serial_txx9_ports[line].port);
  870. }
  871. /**
  872. * serial_txx9_resume_port - resume one serial port
  873. * @line: serial line number
  874. *
  875. * Resume one serial port.
  876. */
  877. static void serial_txx9_resume_port(int line)
  878. {
  879. uart_resume_port(&serial_txx9_reg, &serial_txx9_ports[line].port);
  880. }
  881. static DEFINE_MUTEX(serial_txx9_mutex);
  882. /**
  883. * serial_txx9_register_port - register a serial port
  884. * @port: serial port template
  885. *
  886. * Configure the serial port specified by the request.
  887. *
  888. * The port is then probed and if necessary the IRQ is autodetected
  889. * If this fails an error is returned.
  890. *
  891. * On success the port is ready to use and the line number is returned.
  892. */
  893. static int __devinit serial_txx9_register_port(struct uart_port *port)
  894. {
  895. int i;
  896. struct uart_txx9_port *uart;
  897. int ret = -ENOSPC;
  898. mutex_lock(&serial_txx9_mutex);
  899. for (i = 0; i < UART_NR; i++) {
  900. uart = &serial_txx9_ports[i];
  901. if (!(uart->port.iobase || uart->port.mapbase))
  902. break;
  903. }
  904. if (i < UART_NR) {
  905. uart->port.iobase = port->iobase;
  906. uart->port.membase = port->membase;
  907. uart->port.irq = port->irq;
  908. uart->port.uartclk = port->uartclk;
  909. uart->port.iotype = port->iotype;
  910. uart->port.flags = port->flags | UPF_BOOT_AUTOCONF;
  911. uart->port.mapbase = port->mapbase;
  912. if (port->dev)
  913. uart->port.dev = port->dev;
  914. ret = uart_add_one_port(&serial_txx9_reg, &uart->port);
  915. if (ret == 0)
  916. ret = uart->port.line;
  917. }
  918. mutex_unlock(&serial_txx9_mutex);
  919. return ret;
  920. }
  921. /**
  922. * serial_txx9_unregister_port - remove a txx9 serial port at runtime
  923. * @line: serial line number
  924. *
  925. * Remove one serial port. This may not be called from interrupt
  926. * context. We hand the port back to the our control.
  927. */
  928. static void __devexit serial_txx9_unregister_port(int line)
  929. {
  930. struct uart_txx9_port *uart = &serial_txx9_ports[line];
  931. mutex_lock(&serial_txx9_mutex);
  932. uart_remove_one_port(&serial_txx9_reg, &uart->port);
  933. uart->port.flags = 0;
  934. uart->port.type = PORT_UNKNOWN;
  935. uart->port.iobase = 0;
  936. uart->port.mapbase = 0;
  937. uart->port.membase = NULL;
  938. uart->port.dev = NULL;
  939. mutex_unlock(&serial_txx9_mutex);
  940. }
  941. /*
  942. * Probe one serial board. Unfortunately, there is no rhyme nor reason
  943. * to the arrangement of serial ports on a PCI card.
  944. */
  945. static int __devinit
  946. pciserial_txx9_init_one(struct pci_dev *dev, const struct pci_device_id *ent)
  947. {
  948. struct uart_port port;
  949. int line;
  950. int rc;
  951. rc = pci_enable_device(dev);
  952. if (rc)
  953. return rc;
  954. memset(&port, 0, sizeof(port));
  955. port.ops = &serial_txx9_pops;
  956. port.flags |= UPF_TXX9_HAVE_CTS_LINE;
  957. port.uartclk = 66670000;
  958. port.irq = dev->irq;
  959. port.iotype = UPIO_PORT;
  960. port.iobase = pci_resource_start(dev, 1);
  961. port.dev = &dev->dev;
  962. line = serial_txx9_register_port(&port);
  963. if (line < 0) {
  964. printk(KERN_WARNING "Couldn't register serial port %s: %d\n", pci_name(dev), line);
  965. }
  966. pci_set_drvdata(dev, (void *)(long)line);
  967. return 0;
  968. }
  969. static void __devexit pciserial_txx9_remove_one(struct pci_dev *dev)
  970. {
  971. int line = (int)(long)pci_get_drvdata(dev);
  972. pci_set_drvdata(dev, NULL);
  973. if (line) {
  974. serial_txx9_unregister_port(line);
  975. pci_disable_device(dev);
  976. }
  977. }
  978. static int pciserial_txx9_suspend_one(struct pci_dev *dev, pm_message_t state)
  979. {
  980. int line = (int)(long)pci_get_drvdata(dev);
  981. if (line)
  982. serial_txx9_suspend_port(line);
  983. pci_save_state(dev);
  984. pci_set_power_state(dev, pci_choose_state(dev, state));
  985. return 0;
  986. }
  987. static int pciserial_txx9_resume_one(struct pci_dev *dev)
  988. {
  989. int line = (int)(long)pci_get_drvdata(dev);
  990. pci_set_power_state(dev, PCI_D0);
  991. pci_restore_state(dev);
  992. if (line) {
  993. pci_enable_device(dev);
  994. serial_txx9_resume_port(line);
  995. }
  996. return 0;
  997. }
  998. static struct pci_device_id serial_txx9_pci_tbl[] = {
  999. { PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC86C001_MISC,
  1000. PCI_ANY_ID, PCI_ANY_ID,
  1001. 0, 0, 0 },
  1002. { 0, }
  1003. };
  1004. static struct pci_driver serial_txx9_pci_driver = {
  1005. .name = "serial_txx9",
  1006. .probe = pciserial_txx9_init_one,
  1007. .remove = __devexit_p(pciserial_txx9_remove_one),
  1008. .suspend = pciserial_txx9_suspend_one,
  1009. .resume = pciserial_txx9_resume_one,
  1010. .id_table = serial_txx9_pci_tbl,
  1011. };
  1012. MODULE_DEVICE_TABLE(pci, serial_txx9_pci_tbl);
  1013. #endif /* ENABLE_SERIAL_TXX9_PCI */
  1014. static int __init serial_txx9_init(void)
  1015. {
  1016. int ret;
  1017. printk(KERN_INFO "%s version %s\n", serial_name, serial_version);
  1018. ret = uart_register_driver(&serial_txx9_reg);
  1019. if (ret >= 0) {
  1020. serial_txx9_register_ports(&serial_txx9_reg);
  1021. #ifdef ENABLE_SERIAL_TXX9_PCI
  1022. ret = pci_register_driver(&serial_txx9_pci_driver);
  1023. #endif
  1024. }
  1025. return ret;
  1026. }
  1027. static void __exit serial_txx9_exit(void)
  1028. {
  1029. int i;
  1030. #ifdef ENABLE_SERIAL_TXX9_PCI
  1031. pci_unregister_driver(&serial_txx9_pci_driver);
  1032. #endif
  1033. for (i = 0; i < UART_NR; i++) {
  1034. struct uart_txx9_port *up = &serial_txx9_ports[i];
  1035. if (up->port.iobase || up->port.mapbase)
  1036. uart_remove_one_port(&serial_txx9_reg, &up->port);
  1037. }
  1038. uart_unregister_driver(&serial_txx9_reg);
  1039. }
  1040. module_init(serial_txx9_init);
  1041. module_exit(serial_txx9_exit);
  1042. MODULE_LICENSE("GPL");
  1043. MODULE_DESCRIPTION("TX39/49 serial driver");
  1044. MODULE_ALIAS_CHARDEV_MAJOR(TXX9_TTY_MAJOR);