pxa.c 20 KB

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  1. /*
  2. * linux/drivers/serial/pxa.c
  3. *
  4. * Based on drivers/serial/8250.c by Russell King.
  5. *
  6. * Author: Nicolas Pitre
  7. * Created: Feb 20, 2003
  8. * Copyright: (C) 2003 Monta Vista Software, Inc.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * Note 1: This driver is made separate from the already too overloaded
  16. * 8250.c because it needs some kirks of its own and that'll make it
  17. * easier to add DMA support.
  18. *
  19. * Note 2: I'm too sick of device allocation policies for serial ports.
  20. * If someone else wants to request an "official" allocation of major/minor
  21. * for this driver please be my guest. And don't forget that new hardware
  22. * to come from Intel might have more than 3 or 4 of those UARTs. Let's
  23. * hope for a better port registration and dynamic device allocation scheme
  24. * with the serial core maintainer satisfaction to appear soon.
  25. */
  26. #if defined(CONFIG_SERIAL_PXA_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  27. #define SUPPORT_SYSRQ
  28. #endif
  29. #include <linux/module.h>
  30. #include <linux/ioport.h>
  31. #include <linux/init.h>
  32. #include <linux/console.h>
  33. #include <linux/sysrq.h>
  34. #include <linux/serial_reg.h>
  35. #include <linux/circ_buf.h>
  36. #include <linux/delay.h>
  37. #include <linux/interrupt.h>
  38. #include <linux/platform_device.h>
  39. #include <linux/tty.h>
  40. #include <linux/tty_flip.h>
  41. #include <linux/serial_core.h>
  42. #include <asm/io.h>
  43. #include <asm/hardware.h>
  44. #include <asm/irq.h>
  45. #include <asm/arch/pxa-regs.h>
  46. struct uart_pxa_port {
  47. struct uart_port port;
  48. unsigned char ier;
  49. unsigned char lcr;
  50. unsigned char mcr;
  51. unsigned int lsr_break_flag;
  52. unsigned int cken;
  53. char *name;
  54. };
  55. static inline unsigned int serial_in(struct uart_pxa_port *up, int offset)
  56. {
  57. offset <<= 2;
  58. return readl(up->port.membase + offset);
  59. }
  60. static inline void serial_out(struct uart_pxa_port *up, int offset, int value)
  61. {
  62. offset <<= 2;
  63. writel(value, up->port.membase + offset);
  64. }
  65. static void serial_pxa_enable_ms(struct uart_port *port)
  66. {
  67. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  68. up->ier |= UART_IER_MSI;
  69. serial_out(up, UART_IER, up->ier);
  70. }
  71. static void serial_pxa_stop_tx(struct uart_port *port)
  72. {
  73. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  74. if (up->ier & UART_IER_THRI) {
  75. up->ier &= ~UART_IER_THRI;
  76. serial_out(up, UART_IER, up->ier);
  77. }
  78. }
  79. static void serial_pxa_stop_rx(struct uart_port *port)
  80. {
  81. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  82. up->ier &= ~UART_IER_RLSI;
  83. up->port.read_status_mask &= ~UART_LSR_DR;
  84. serial_out(up, UART_IER, up->ier);
  85. }
  86. static inline void receive_chars(struct uart_pxa_port *up, int *status)
  87. {
  88. struct tty_struct *tty = up->port.info->tty;
  89. unsigned int ch, flag;
  90. int max_count = 256;
  91. do {
  92. ch = serial_in(up, UART_RX);
  93. flag = TTY_NORMAL;
  94. up->port.icount.rx++;
  95. if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
  96. UART_LSR_FE | UART_LSR_OE))) {
  97. /*
  98. * For statistics only
  99. */
  100. if (*status & UART_LSR_BI) {
  101. *status &= ~(UART_LSR_FE | UART_LSR_PE);
  102. up->port.icount.brk++;
  103. /*
  104. * We do the SysRQ and SAK checking
  105. * here because otherwise the break
  106. * may get masked by ignore_status_mask
  107. * or read_status_mask.
  108. */
  109. if (uart_handle_break(&up->port))
  110. goto ignore_char;
  111. } else if (*status & UART_LSR_PE)
  112. up->port.icount.parity++;
  113. else if (*status & UART_LSR_FE)
  114. up->port.icount.frame++;
  115. if (*status & UART_LSR_OE)
  116. up->port.icount.overrun++;
  117. /*
  118. * Mask off conditions which should be ignored.
  119. */
  120. *status &= up->port.read_status_mask;
  121. #ifdef CONFIG_SERIAL_PXA_CONSOLE
  122. if (up->port.line == up->port.cons->index) {
  123. /* Recover the break flag from console xmit */
  124. *status |= up->lsr_break_flag;
  125. up->lsr_break_flag = 0;
  126. }
  127. #endif
  128. if (*status & UART_LSR_BI) {
  129. flag = TTY_BREAK;
  130. } else if (*status & UART_LSR_PE)
  131. flag = TTY_PARITY;
  132. else if (*status & UART_LSR_FE)
  133. flag = TTY_FRAME;
  134. }
  135. if (uart_handle_sysrq_char(&up->port, ch))
  136. goto ignore_char;
  137. uart_insert_char(&up->port, *status, UART_LSR_OE, ch, flag);
  138. ignore_char:
  139. *status = serial_in(up, UART_LSR);
  140. } while ((*status & UART_LSR_DR) && (max_count-- > 0));
  141. tty_flip_buffer_push(tty);
  142. }
  143. static void transmit_chars(struct uart_pxa_port *up)
  144. {
  145. struct circ_buf *xmit = &up->port.info->xmit;
  146. int count;
  147. if (up->port.x_char) {
  148. serial_out(up, UART_TX, up->port.x_char);
  149. up->port.icount.tx++;
  150. up->port.x_char = 0;
  151. return;
  152. }
  153. if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
  154. serial_pxa_stop_tx(&up->port);
  155. return;
  156. }
  157. count = up->port.fifosize / 2;
  158. do {
  159. serial_out(up, UART_TX, xmit->buf[xmit->tail]);
  160. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  161. up->port.icount.tx++;
  162. if (uart_circ_empty(xmit))
  163. break;
  164. } while (--count > 0);
  165. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  166. uart_write_wakeup(&up->port);
  167. if (uart_circ_empty(xmit))
  168. serial_pxa_stop_tx(&up->port);
  169. }
  170. static void serial_pxa_start_tx(struct uart_port *port)
  171. {
  172. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  173. if (!(up->ier & UART_IER_THRI)) {
  174. up->ier |= UART_IER_THRI;
  175. serial_out(up, UART_IER, up->ier);
  176. }
  177. }
  178. static inline void check_modem_status(struct uart_pxa_port *up)
  179. {
  180. int status;
  181. status = serial_in(up, UART_MSR);
  182. if ((status & UART_MSR_ANY_DELTA) == 0)
  183. return;
  184. if (status & UART_MSR_TERI)
  185. up->port.icount.rng++;
  186. if (status & UART_MSR_DDSR)
  187. up->port.icount.dsr++;
  188. if (status & UART_MSR_DDCD)
  189. uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
  190. if (status & UART_MSR_DCTS)
  191. uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
  192. wake_up_interruptible(&up->port.info->delta_msr_wait);
  193. }
  194. /*
  195. * This handles the interrupt from one port.
  196. */
  197. static inline irqreturn_t serial_pxa_irq(int irq, void *dev_id)
  198. {
  199. struct uart_pxa_port *up = dev_id;
  200. unsigned int iir, lsr;
  201. iir = serial_in(up, UART_IIR);
  202. if (iir & UART_IIR_NO_INT)
  203. return IRQ_NONE;
  204. lsr = serial_in(up, UART_LSR);
  205. if (lsr & UART_LSR_DR)
  206. receive_chars(up, &lsr);
  207. check_modem_status(up);
  208. if (lsr & UART_LSR_THRE)
  209. transmit_chars(up);
  210. return IRQ_HANDLED;
  211. }
  212. static unsigned int serial_pxa_tx_empty(struct uart_port *port)
  213. {
  214. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  215. unsigned long flags;
  216. unsigned int ret;
  217. spin_lock_irqsave(&up->port.lock, flags);
  218. ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
  219. spin_unlock_irqrestore(&up->port.lock, flags);
  220. return ret;
  221. }
  222. static unsigned int serial_pxa_get_mctrl(struct uart_port *port)
  223. {
  224. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  225. unsigned char status;
  226. unsigned int ret;
  227. status = serial_in(up, UART_MSR);
  228. ret = 0;
  229. if (status & UART_MSR_DCD)
  230. ret |= TIOCM_CAR;
  231. if (status & UART_MSR_RI)
  232. ret |= TIOCM_RNG;
  233. if (status & UART_MSR_DSR)
  234. ret |= TIOCM_DSR;
  235. if (status & UART_MSR_CTS)
  236. ret |= TIOCM_CTS;
  237. return ret;
  238. }
  239. static void serial_pxa_set_mctrl(struct uart_port *port, unsigned int mctrl)
  240. {
  241. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  242. unsigned char mcr = 0;
  243. if (mctrl & TIOCM_RTS)
  244. mcr |= UART_MCR_RTS;
  245. if (mctrl & TIOCM_DTR)
  246. mcr |= UART_MCR_DTR;
  247. if (mctrl & TIOCM_OUT1)
  248. mcr |= UART_MCR_OUT1;
  249. if (mctrl & TIOCM_OUT2)
  250. mcr |= UART_MCR_OUT2;
  251. if (mctrl & TIOCM_LOOP)
  252. mcr |= UART_MCR_LOOP;
  253. mcr |= up->mcr;
  254. serial_out(up, UART_MCR, mcr);
  255. }
  256. static void serial_pxa_break_ctl(struct uart_port *port, int break_state)
  257. {
  258. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  259. unsigned long flags;
  260. spin_lock_irqsave(&up->port.lock, flags);
  261. if (break_state == -1)
  262. up->lcr |= UART_LCR_SBC;
  263. else
  264. up->lcr &= ~UART_LCR_SBC;
  265. serial_out(up, UART_LCR, up->lcr);
  266. spin_unlock_irqrestore(&up->port.lock, flags);
  267. }
  268. #if 0
  269. static void serial_pxa_dma_init(struct pxa_uart *up)
  270. {
  271. up->rxdma =
  272. pxa_request_dma(up->name, DMA_PRIO_LOW, pxa_receive_dma, up);
  273. if (up->rxdma < 0)
  274. goto out;
  275. up->txdma =
  276. pxa_request_dma(up->name, DMA_PRIO_LOW, pxa_transmit_dma, up);
  277. if (up->txdma < 0)
  278. goto err_txdma;
  279. up->dmadesc = kmalloc(4 * sizeof(pxa_dma_desc), GFP_KERNEL);
  280. if (!up->dmadesc)
  281. goto err_alloc;
  282. /* ... */
  283. err_alloc:
  284. pxa_free_dma(up->txdma);
  285. err_rxdma:
  286. pxa_free_dma(up->rxdma);
  287. out:
  288. return;
  289. }
  290. #endif
  291. static int serial_pxa_startup(struct uart_port *port)
  292. {
  293. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  294. unsigned long flags;
  295. int retval;
  296. if (port->line == 3) /* HWUART */
  297. up->mcr |= UART_MCR_AFE;
  298. else
  299. up->mcr = 0;
  300. /*
  301. * Allocate the IRQ
  302. */
  303. retval = request_irq(up->port.irq, serial_pxa_irq, 0, up->name, up);
  304. if (retval)
  305. return retval;
  306. /*
  307. * Clear the FIFO buffers and disable them.
  308. * (they will be reenabled in set_termios())
  309. */
  310. serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  311. serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
  312. UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
  313. serial_out(up, UART_FCR, 0);
  314. /*
  315. * Clear the interrupt registers.
  316. */
  317. (void) serial_in(up, UART_LSR);
  318. (void) serial_in(up, UART_RX);
  319. (void) serial_in(up, UART_IIR);
  320. (void) serial_in(up, UART_MSR);
  321. /*
  322. * Now, initialize the UART
  323. */
  324. serial_out(up, UART_LCR, UART_LCR_WLEN8);
  325. spin_lock_irqsave(&up->port.lock, flags);
  326. up->port.mctrl |= TIOCM_OUT2;
  327. serial_pxa_set_mctrl(&up->port, up->port.mctrl);
  328. spin_unlock_irqrestore(&up->port.lock, flags);
  329. /*
  330. * Finally, enable interrupts. Note: Modem status interrupts
  331. * are set via set_termios(), which will be occurring imminently
  332. * anyway, so we don't enable them here.
  333. */
  334. up->ier = UART_IER_RLSI | UART_IER_RDI | UART_IER_RTOIE | UART_IER_UUE;
  335. serial_out(up, UART_IER, up->ier);
  336. /*
  337. * And clear the interrupt registers again for luck.
  338. */
  339. (void) serial_in(up, UART_LSR);
  340. (void) serial_in(up, UART_RX);
  341. (void) serial_in(up, UART_IIR);
  342. (void) serial_in(up, UART_MSR);
  343. return 0;
  344. }
  345. static void serial_pxa_shutdown(struct uart_port *port)
  346. {
  347. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  348. unsigned long flags;
  349. free_irq(up->port.irq, up);
  350. /*
  351. * Disable interrupts from this port
  352. */
  353. up->ier = 0;
  354. serial_out(up, UART_IER, 0);
  355. spin_lock_irqsave(&up->port.lock, flags);
  356. up->port.mctrl &= ~TIOCM_OUT2;
  357. serial_pxa_set_mctrl(&up->port, up->port.mctrl);
  358. spin_unlock_irqrestore(&up->port.lock, flags);
  359. /*
  360. * Disable break condition and FIFOs
  361. */
  362. serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC);
  363. serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
  364. UART_FCR_CLEAR_RCVR |
  365. UART_FCR_CLEAR_XMIT);
  366. serial_out(up, UART_FCR, 0);
  367. }
  368. static void
  369. serial_pxa_set_termios(struct uart_port *port, struct termios *termios,
  370. struct termios *old)
  371. {
  372. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  373. unsigned char cval, fcr = 0;
  374. unsigned long flags;
  375. unsigned int baud, quot;
  376. switch (termios->c_cflag & CSIZE) {
  377. case CS5:
  378. cval = UART_LCR_WLEN5;
  379. break;
  380. case CS6:
  381. cval = UART_LCR_WLEN6;
  382. break;
  383. case CS7:
  384. cval = UART_LCR_WLEN7;
  385. break;
  386. default:
  387. case CS8:
  388. cval = UART_LCR_WLEN8;
  389. break;
  390. }
  391. if (termios->c_cflag & CSTOPB)
  392. cval |= UART_LCR_STOP;
  393. if (termios->c_cflag & PARENB)
  394. cval |= UART_LCR_PARITY;
  395. if (!(termios->c_cflag & PARODD))
  396. cval |= UART_LCR_EPAR;
  397. /*
  398. * Ask the core to calculate the divisor for us.
  399. */
  400. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
  401. quot = uart_get_divisor(port, baud);
  402. if ((up->port.uartclk / quot) < (2400 * 16))
  403. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR1;
  404. else if ((up->port.uartclk / quot) < (230400 * 16))
  405. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR8;
  406. else
  407. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR32;
  408. /*
  409. * Ok, we're now changing the port state. Do it with
  410. * interrupts disabled.
  411. */
  412. spin_lock_irqsave(&up->port.lock, flags);
  413. /*
  414. * Ensure the port will be enabled.
  415. * This is required especially for serial console.
  416. */
  417. up->ier |= IER_UUE;
  418. /*
  419. * Update the per-port timeout.
  420. */
  421. uart_update_timeout(port, termios->c_cflag, baud);
  422. up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
  423. if (termios->c_iflag & INPCK)
  424. up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
  425. if (termios->c_iflag & (BRKINT | PARMRK))
  426. up->port.read_status_mask |= UART_LSR_BI;
  427. /*
  428. * Characters to ignore
  429. */
  430. up->port.ignore_status_mask = 0;
  431. if (termios->c_iflag & IGNPAR)
  432. up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
  433. if (termios->c_iflag & IGNBRK) {
  434. up->port.ignore_status_mask |= UART_LSR_BI;
  435. /*
  436. * If we're ignoring parity and break indicators,
  437. * ignore overruns too (for real raw support).
  438. */
  439. if (termios->c_iflag & IGNPAR)
  440. up->port.ignore_status_mask |= UART_LSR_OE;
  441. }
  442. /*
  443. * ignore all characters if CREAD is not set
  444. */
  445. if ((termios->c_cflag & CREAD) == 0)
  446. up->port.ignore_status_mask |= UART_LSR_DR;
  447. /*
  448. * CTS flow control flag and modem status interrupts
  449. */
  450. up->ier &= ~UART_IER_MSI;
  451. if (UART_ENABLE_MS(&up->port, termios->c_cflag))
  452. up->ier |= UART_IER_MSI;
  453. serial_out(up, UART_IER, up->ier);
  454. serial_out(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
  455. serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */
  456. serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */
  457. serial_out(up, UART_LCR, cval); /* reset DLAB */
  458. up->lcr = cval; /* Save LCR */
  459. serial_pxa_set_mctrl(&up->port, up->port.mctrl);
  460. serial_out(up, UART_FCR, fcr);
  461. spin_unlock_irqrestore(&up->port.lock, flags);
  462. }
  463. static void
  464. serial_pxa_pm(struct uart_port *port, unsigned int state,
  465. unsigned int oldstate)
  466. {
  467. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  468. pxa_set_cken(up->cken, !state);
  469. if (!state)
  470. udelay(1);
  471. }
  472. static void serial_pxa_release_port(struct uart_port *port)
  473. {
  474. }
  475. static int serial_pxa_request_port(struct uart_port *port)
  476. {
  477. return 0;
  478. }
  479. static void serial_pxa_config_port(struct uart_port *port, int flags)
  480. {
  481. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  482. up->port.type = PORT_PXA;
  483. }
  484. static int
  485. serial_pxa_verify_port(struct uart_port *port, struct serial_struct *ser)
  486. {
  487. /* we don't want the core code to modify any port params */
  488. return -EINVAL;
  489. }
  490. static const char *
  491. serial_pxa_type(struct uart_port *port)
  492. {
  493. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  494. return up->name;
  495. }
  496. #ifdef CONFIG_SERIAL_PXA_CONSOLE
  497. static struct uart_pxa_port serial_pxa_ports[];
  498. static struct uart_driver serial_pxa_reg;
  499. #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
  500. /*
  501. * Wait for transmitter & holding register to empty
  502. */
  503. static inline void wait_for_xmitr(struct uart_pxa_port *up)
  504. {
  505. unsigned int status, tmout = 10000;
  506. /* Wait up to 10ms for the character(s) to be sent. */
  507. do {
  508. status = serial_in(up, UART_LSR);
  509. if (status & UART_LSR_BI)
  510. up->lsr_break_flag = UART_LSR_BI;
  511. if (--tmout == 0)
  512. break;
  513. udelay(1);
  514. } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
  515. /* Wait up to 1s for flow control if necessary */
  516. if (up->port.flags & UPF_CONS_FLOW) {
  517. tmout = 1000000;
  518. while (--tmout &&
  519. ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
  520. udelay(1);
  521. }
  522. }
  523. static void serial_pxa_console_putchar(struct uart_port *port, int ch)
  524. {
  525. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  526. wait_for_xmitr(up);
  527. serial_out(up, UART_TX, ch);
  528. }
  529. /*
  530. * Print a string to the serial port trying not to disturb
  531. * any possible real use of the port...
  532. *
  533. * The console_lock must be held when we get here.
  534. */
  535. static void
  536. serial_pxa_console_write(struct console *co, const char *s, unsigned int count)
  537. {
  538. struct uart_pxa_port *up = &serial_pxa_ports[co->index];
  539. unsigned int ier;
  540. /*
  541. * First save the IER then disable the interrupts
  542. */
  543. ier = serial_in(up, UART_IER);
  544. serial_out(up, UART_IER, UART_IER_UUE);
  545. uart_console_write(&up->port, s, count, serial_pxa_console_putchar);
  546. /*
  547. * Finally, wait for transmitter to become empty
  548. * and restore the IER
  549. */
  550. wait_for_xmitr(up);
  551. serial_out(up, UART_IER, ier);
  552. }
  553. static int __init
  554. serial_pxa_console_setup(struct console *co, char *options)
  555. {
  556. struct uart_pxa_port *up;
  557. int baud = 9600;
  558. int bits = 8;
  559. int parity = 'n';
  560. int flow = 'n';
  561. if (co->index == -1 || co->index >= serial_pxa_reg.nr)
  562. co->index = 0;
  563. up = &serial_pxa_ports[co->index];
  564. if (options)
  565. uart_parse_options(options, &baud, &parity, &bits, &flow);
  566. return uart_set_options(&up->port, co, baud, parity, bits, flow);
  567. }
  568. static struct console serial_pxa_console = {
  569. .name = "ttyS",
  570. .write = serial_pxa_console_write,
  571. .device = uart_console_device,
  572. .setup = serial_pxa_console_setup,
  573. .flags = CON_PRINTBUFFER,
  574. .index = -1,
  575. .data = &serial_pxa_reg,
  576. };
  577. static int __init
  578. serial_pxa_console_init(void)
  579. {
  580. register_console(&serial_pxa_console);
  581. return 0;
  582. }
  583. console_initcall(serial_pxa_console_init);
  584. #define PXA_CONSOLE &serial_pxa_console
  585. #else
  586. #define PXA_CONSOLE NULL
  587. #endif
  588. struct uart_ops serial_pxa_pops = {
  589. .tx_empty = serial_pxa_tx_empty,
  590. .set_mctrl = serial_pxa_set_mctrl,
  591. .get_mctrl = serial_pxa_get_mctrl,
  592. .stop_tx = serial_pxa_stop_tx,
  593. .start_tx = serial_pxa_start_tx,
  594. .stop_rx = serial_pxa_stop_rx,
  595. .enable_ms = serial_pxa_enable_ms,
  596. .break_ctl = serial_pxa_break_ctl,
  597. .startup = serial_pxa_startup,
  598. .shutdown = serial_pxa_shutdown,
  599. .set_termios = serial_pxa_set_termios,
  600. .pm = serial_pxa_pm,
  601. .type = serial_pxa_type,
  602. .release_port = serial_pxa_release_port,
  603. .request_port = serial_pxa_request_port,
  604. .config_port = serial_pxa_config_port,
  605. .verify_port = serial_pxa_verify_port,
  606. };
  607. static struct uart_pxa_port serial_pxa_ports[] = {
  608. { /* FFUART */
  609. .name = "FFUART",
  610. .cken = CKEN6_FFUART,
  611. .port = {
  612. .type = PORT_PXA,
  613. .iotype = UPIO_MEM,
  614. .membase = (void *)&FFUART,
  615. .mapbase = __PREG(FFUART),
  616. .irq = IRQ_FFUART,
  617. .uartclk = 921600 * 16,
  618. .fifosize = 64,
  619. .ops = &serial_pxa_pops,
  620. .line = 0,
  621. },
  622. }, { /* BTUART */
  623. .name = "BTUART",
  624. .cken = CKEN7_BTUART,
  625. .port = {
  626. .type = PORT_PXA,
  627. .iotype = UPIO_MEM,
  628. .membase = (void *)&BTUART,
  629. .mapbase = __PREG(BTUART),
  630. .irq = IRQ_BTUART,
  631. .uartclk = 921600 * 16,
  632. .fifosize = 64,
  633. .ops = &serial_pxa_pops,
  634. .line = 1,
  635. },
  636. }, { /* STUART */
  637. .name = "STUART",
  638. .cken = CKEN5_STUART,
  639. .port = {
  640. .type = PORT_PXA,
  641. .iotype = UPIO_MEM,
  642. .membase = (void *)&STUART,
  643. .mapbase = __PREG(STUART),
  644. .irq = IRQ_STUART,
  645. .uartclk = 921600 * 16,
  646. .fifosize = 64,
  647. .ops = &serial_pxa_pops,
  648. .line = 2,
  649. },
  650. }, { /* HWUART */
  651. .name = "HWUART",
  652. .cken = CKEN4_HWUART,
  653. .port = {
  654. .type = PORT_PXA,
  655. .iotype = UPIO_MEM,
  656. .membase = (void *)&HWUART,
  657. .mapbase = __PREG(HWUART),
  658. .irq = IRQ_HWUART,
  659. .uartclk = 921600 * 16,
  660. .fifosize = 64,
  661. .ops = &serial_pxa_pops,
  662. .line = 3,
  663. },
  664. }
  665. };
  666. static struct uart_driver serial_pxa_reg = {
  667. .owner = THIS_MODULE,
  668. .driver_name = "PXA serial",
  669. .dev_name = "ttyS",
  670. .major = TTY_MAJOR,
  671. .minor = 64,
  672. .nr = ARRAY_SIZE(serial_pxa_ports),
  673. .cons = PXA_CONSOLE,
  674. };
  675. static int serial_pxa_suspend(struct platform_device *dev, pm_message_t state)
  676. {
  677. struct uart_pxa_port *sport = platform_get_drvdata(dev);
  678. if (sport)
  679. uart_suspend_port(&serial_pxa_reg, &sport->port);
  680. return 0;
  681. }
  682. static int serial_pxa_resume(struct platform_device *dev)
  683. {
  684. struct uart_pxa_port *sport = platform_get_drvdata(dev);
  685. if (sport)
  686. uart_resume_port(&serial_pxa_reg, &sport->port);
  687. return 0;
  688. }
  689. static int serial_pxa_probe(struct platform_device *dev)
  690. {
  691. serial_pxa_ports[dev->id].port.dev = &dev->dev;
  692. uart_add_one_port(&serial_pxa_reg, &serial_pxa_ports[dev->id].port);
  693. platform_set_drvdata(dev, &serial_pxa_ports[dev->id]);
  694. return 0;
  695. }
  696. static int serial_pxa_remove(struct platform_device *dev)
  697. {
  698. struct uart_pxa_port *sport = platform_get_drvdata(dev);
  699. platform_set_drvdata(dev, NULL);
  700. if (sport)
  701. uart_remove_one_port(&serial_pxa_reg, &sport->port);
  702. return 0;
  703. }
  704. static struct platform_driver serial_pxa_driver = {
  705. .probe = serial_pxa_probe,
  706. .remove = serial_pxa_remove,
  707. .suspend = serial_pxa_suspend,
  708. .resume = serial_pxa_resume,
  709. .driver = {
  710. .name = "pxa2xx-uart",
  711. },
  712. };
  713. int __init serial_pxa_init(void)
  714. {
  715. int ret;
  716. ret = uart_register_driver(&serial_pxa_reg);
  717. if (ret != 0)
  718. return ret;
  719. ret = platform_driver_register(&serial_pxa_driver);
  720. if (ret != 0)
  721. uart_unregister_driver(&serial_pxa_reg);
  722. return ret;
  723. }
  724. void __exit serial_pxa_exit(void)
  725. {
  726. platform_driver_unregister(&serial_pxa_driver);
  727. uart_unregister_driver(&serial_pxa_reg);
  728. }
  729. module_init(serial_pxa_init);
  730. module_exit(serial_pxa_exit);
  731. MODULE_LICENSE("GPL");