ql4_dbg.c 7.2 KB

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  1. /*
  2. * QLogic iSCSI HBA Driver
  3. * Copyright (c) 2003-2006 QLogic Corporation
  4. *
  5. * See LICENSE.qla4xxx for copyright and licensing details.
  6. */
  7. #include "ql4_def.h"
  8. #include <scsi/scsi_dbg.h>
  9. static void qla4xxx_print_srb_info(struct srb * srb)
  10. {
  11. printk("%s: srb = 0x%p, flags=0x%02x\n", __func__, srb, srb->flags);
  12. printk("%s: cmd = 0x%p, saved_dma_handle = 0x%lx\n",
  13. __func__, srb->cmd, (unsigned long) srb->dma_handle);
  14. printk("%s: fw_ddb_index = %d, lun = %d\n",
  15. __func__, srb->fw_ddb_index, srb->cmd->device->lun);
  16. printk("%s: iocb_tov = %d\n",
  17. __func__, srb->iocb_tov);
  18. printk("%s: cc_stat = 0x%x, r_start = 0x%lx, u_start = 0x%lx\n\n",
  19. __func__, srb->cc_stat, srb->r_start, srb->u_start);
  20. }
  21. void qla4xxx_print_scsi_cmd(struct scsi_cmnd *cmd)
  22. {
  23. printk("SCSI Command = 0x%p, Handle=0x%p\n", cmd, cmd->host_scribble);
  24. printk(" b=%d, t=%02xh, l=%02xh, cmd_len = %02xh\n",
  25. cmd->device->channel, cmd->device->id, cmd->device->lun,
  26. cmd->cmd_len);
  27. scsi_print_command(cmd);
  28. printk(" seg_cnt = %d\n", cmd->use_sg);
  29. printk(" request buffer = 0x%p, request buffer len = 0x%x\n",
  30. cmd->request_buffer, cmd->request_bufflen);
  31. if (cmd->use_sg) {
  32. struct scatterlist *sg;
  33. sg = (struct scatterlist *)cmd->request_buffer;
  34. printk(" SG buffer: \n");
  35. qla4xxx_dump_buffer((caddr_t) sg,
  36. (cmd->use_sg * sizeof(*sg)));
  37. }
  38. printk(" tag = %d, transfersize = 0x%x \n", cmd->tag,
  39. cmd->transfersize);
  40. printk(" Pid = %d, SP = 0x%p\n", (int)cmd->pid, cmd->SCp.ptr);
  41. printk(" underflow size = 0x%x, direction=0x%x\n", cmd->underflow,
  42. cmd->sc_data_direction);
  43. printk(" Current time (jiffies) = 0x%lx, "
  44. "timeout expires = 0x%lx\n", jiffies, cmd->eh_timeout.expires);
  45. qla4xxx_print_srb_info((struct srb *) cmd->SCp.ptr);
  46. }
  47. void __dump_registers(struct scsi_qla_host *ha)
  48. {
  49. uint8_t i;
  50. for (i = 0; i < MBOX_REG_COUNT; i++) {
  51. printk(KERN_INFO "0x%02X mailbox[%d] = 0x%08X\n",
  52. (uint8_t) offsetof(struct isp_reg, mailbox[i]), i,
  53. readw(&ha->reg->mailbox[i]));
  54. }
  55. printk(KERN_INFO "0x%02X flash_address = 0x%08X\n",
  56. (uint8_t) offsetof(struct isp_reg, flash_address),
  57. readw(&ha->reg->flash_address));
  58. printk(KERN_INFO "0x%02X flash_data = 0x%08X\n",
  59. (uint8_t) offsetof(struct isp_reg, flash_data),
  60. readw(&ha->reg->flash_data));
  61. printk(KERN_INFO "0x%02X ctrl_status = 0x%08X\n",
  62. (uint8_t) offsetof(struct isp_reg, ctrl_status),
  63. readw(&ha->reg->ctrl_status));
  64. if (is_qla4010(ha)) {
  65. printk(KERN_INFO "0x%02X nvram = 0x%08X\n",
  66. (uint8_t) offsetof(struct isp_reg, u1.isp4010.nvram),
  67. readw(&ha->reg->u1.isp4010.nvram));
  68. }
  69. else if (is_qla4022(ha)) {
  70. printk(KERN_INFO "0x%02X intr_mask = 0x%08X\n",
  71. (uint8_t) offsetof(struct isp_reg,
  72. u1.isp4022.intr_mask),
  73. readw(&ha->reg->u1.isp4022.intr_mask));
  74. printk(KERN_INFO "0x%02X nvram = 0x%08X\n",
  75. (uint8_t) offsetof(struct isp_reg, u1.isp4022.nvram),
  76. readw(&ha->reg->u1.isp4022.nvram));
  77. printk(KERN_INFO "0x%02X semaphore = 0x%08X\n",
  78. (uint8_t) offsetof(struct isp_reg,
  79. u1.isp4022.semaphore),
  80. readw(&ha->reg->u1.isp4022.semaphore));
  81. }
  82. printk(KERN_INFO "0x%02X req_q_in = 0x%08X\n",
  83. (uint8_t) offsetof(struct isp_reg, req_q_in),
  84. readw(&ha->reg->req_q_in));
  85. printk(KERN_INFO "0x%02X rsp_q_out = 0x%08X\n",
  86. (uint8_t) offsetof(struct isp_reg, rsp_q_out),
  87. readw(&ha->reg->rsp_q_out));
  88. if (is_qla4010(ha)) {
  89. printk(KERN_INFO "0x%02X ext_hw_conf = 0x%08X\n",
  90. (uint8_t) offsetof(struct isp_reg,
  91. u2.isp4010.ext_hw_conf),
  92. readw(&ha->reg->u2.isp4010.ext_hw_conf));
  93. printk(KERN_INFO "0x%02X port_ctrl = 0x%08X\n",
  94. (uint8_t) offsetof(struct isp_reg,
  95. u2.isp4010.port_ctrl),
  96. readw(&ha->reg->u2.isp4010.port_ctrl));
  97. printk(KERN_INFO "0x%02X port_status = 0x%08X\n",
  98. (uint8_t) offsetof(struct isp_reg,
  99. u2.isp4010.port_status),
  100. readw(&ha->reg->u2.isp4010.port_status));
  101. printk(KERN_INFO "0x%02X req_q_out = 0x%08X\n",
  102. (uint8_t) offsetof(struct isp_reg,
  103. u2.isp4010.req_q_out),
  104. readw(&ha->reg->u2.isp4010.req_q_out));
  105. printk(KERN_INFO "0x%02X gp_out = 0x%08X\n",
  106. (uint8_t) offsetof(struct isp_reg, u2.isp4010.gp_out),
  107. readw(&ha->reg->u2.isp4010.gp_out));
  108. printk(KERN_INFO "0x%02X gp_in = 0x%08X\n",
  109. (uint8_t) offsetof(struct isp_reg, u2.isp4010.gp_in),
  110. readw(&ha->reg->u2.isp4010.gp_in));
  111. printk(KERN_INFO "0x%02X port_err_status = 0x%08X\n",
  112. (uint8_t) offsetof(struct isp_reg,
  113. u2.isp4010.port_err_status),
  114. readw(&ha->reg->u2.isp4010.port_err_status));
  115. }
  116. else if (is_qla4022(ha)) {
  117. printk(KERN_INFO "Page 0 Registers:\n");
  118. printk(KERN_INFO "0x%02X ext_hw_conf = 0x%08X\n",
  119. (uint8_t) offsetof(struct isp_reg,
  120. u2.isp4022.p0.ext_hw_conf),
  121. readw(&ha->reg->u2.isp4022.p0.ext_hw_conf));
  122. printk(KERN_INFO "0x%02X port_ctrl = 0x%08X\n",
  123. (uint8_t) offsetof(struct isp_reg,
  124. u2.isp4022.p0.port_ctrl),
  125. readw(&ha->reg->u2.isp4022.p0.port_ctrl));
  126. printk(KERN_INFO "0x%02X port_status = 0x%08X\n",
  127. (uint8_t) offsetof(struct isp_reg,
  128. u2.isp4022.p0.port_status),
  129. readw(&ha->reg->u2.isp4022.p0.port_status));
  130. printk(KERN_INFO "0x%02X gp_out = 0x%08X\n",
  131. (uint8_t) offsetof(struct isp_reg,
  132. u2.isp4022.p0.gp_out),
  133. readw(&ha->reg->u2.isp4022.p0.gp_out));
  134. printk(KERN_INFO "0x%02X gp_in = 0x%08X\n",
  135. (uint8_t) offsetof(struct isp_reg, u2.isp4022.p0.gp_in),
  136. readw(&ha->reg->u2.isp4022.p0.gp_in));
  137. printk(KERN_INFO "0x%02X port_err_status = 0x%08X\n",
  138. (uint8_t) offsetof(struct isp_reg,
  139. u2.isp4022.p0.port_err_status),
  140. readw(&ha->reg->u2.isp4022.p0.port_err_status));
  141. printk(KERN_INFO "Page 1 Registers:\n");
  142. writel(HOST_MEM_CFG_PAGE & set_rmask(CSR_SCSI_PAGE_SELECT),
  143. &ha->reg->ctrl_status);
  144. printk(KERN_INFO "0x%02X req_q_out = 0x%08X\n",
  145. (uint8_t) offsetof(struct isp_reg,
  146. u2.isp4022.p1.req_q_out),
  147. readw(&ha->reg->u2.isp4022.p1.req_q_out));
  148. writel(PORT_CTRL_STAT_PAGE & set_rmask(CSR_SCSI_PAGE_SELECT),
  149. &ha->reg->ctrl_status);
  150. }
  151. }
  152. void qla4xxx_dump_mbox_registers(struct scsi_qla_host *ha)
  153. {
  154. unsigned long flags = 0;
  155. int i = 0;
  156. spin_lock_irqsave(&ha->hardware_lock, flags);
  157. for (i = 1; i < MBOX_REG_COUNT; i++)
  158. printk(KERN_INFO " Mailbox[%d] = %08x\n", i,
  159. readw(&ha->reg->mailbox[i]));
  160. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  161. }
  162. void qla4xxx_dump_registers(struct scsi_qla_host *ha)
  163. {
  164. unsigned long flags = 0;
  165. spin_lock_irqsave(&ha->hardware_lock, flags);
  166. __dump_registers(ha);
  167. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  168. }
  169. void qla4xxx_dump_buffer(void *b, uint32_t size)
  170. {
  171. uint32_t cnt;
  172. uint8_t *c = b;
  173. printk(" 0 1 2 3 4 5 6 7 8 9 Ah Bh Ch Dh Eh "
  174. "Fh\n");
  175. printk("------------------------------------------------------------"
  176. "--\n");
  177. for (cnt = 0; cnt < size; cnt++, c++) {
  178. printk(KERN_DEBUG "%02x", *c);
  179. if (!(cnt % 16))
  180. printk(KERN_DEBUG "\n");
  181. else
  182. printk(KERN_DEBUG " ");
  183. }
  184. if (cnt % 16)
  185. printk(KERN_DEBUG "\n");
  186. }